import lshw-B.02.18-21.el8
This commit is contained in:
parent
d94fd8058d
commit
6956356fd6
64
SOURCES/0001-merge-Github-PR-40-and-41.patch
Normal file
64
SOURCES/0001-merge-Github-PR-40-and-41.patch
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@ -0,0 +1,64 @@
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From 028f6b229a138211d17bb32b8668dc73e6724464 Mon Sep 17 00:00:00 2001
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From: Lyonel Vincent <lyonel@ezix.org>
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Date: Thu, 14 Jun 2018 19:17:26 +0200
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Subject: [PATCH 1/8] merge Github PR #40 and #41
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Properly handle scsi device type 0x14 (== 20) to add ZBC and ZAC host
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managed zoned block devices to the "disk" class. While at it, also add
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in scsi_type() the missing type name string for the device
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type 0xe (== 14).
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---
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lshw.spec.in | 2 +-
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src/core/scsi.cc | 8 +++++++-
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2 files changed, 8 insertions(+), 2 deletions(-)
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diff --git a/lshw.spec.in b/lshw.spec.in
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index c597379c3bc8..f7f88b323ce9 100644
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--- a/lshw.spec.in
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+++ b/lshw.spec.in
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@@ -12,7 +12,7 @@ Group: Applications/System
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BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
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%description
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-lshw (Hardware Lister) is a small tool to provide detailed informaton on
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+lshw (Hardware Lister) is a small tool to provide detailed information on
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the hardware configuration of the machine. It can report exact memory
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configuration, firmware version, mainboard configuration, CPU version
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and speed, cache configuration, bus speed, etc. on DMI-capable x86s
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diff --git a/src/core/scsi.cc b/src/core/scsi.cc
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index 75061c0fb195..4992c889dd12 100644
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--- a/src/core/scsi.cc
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+++ b/src/core/scsi.cc
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@@ -260,6 +260,10 @@ static const char *scsi_type(int type)
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return "Medium Changer";
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case 0xd:
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return "Enclosure";
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+ case 0xe:
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+ return "Simplified direct-access device";
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+ case 0x14:
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+ return "Host managed zoned block device";
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default:
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return "";
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}
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@@ -706,6 +710,7 @@ static void scan_sg(hwNode & n)
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{
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case 0:
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case 14:
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+ case 20:
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device = hwNode("disk", hw::disk);
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break;
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case 1:
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@@ -752,7 +757,8 @@ static void scan_sg(hwNode & n)
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}
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if ((m_id.scsi_type == 4) || (m_id.scsi_type == 5))
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scan_cdrom(device);
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- if ((m_id.scsi_type == 0) || (m_id.scsi_type == 7) || (m_id.scsi_type == 14))
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+ if ((m_id.scsi_type == 0) || (m_id.scsi_type == 7) ||
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+ (m_id.scsi_type == 14) || (m_id.scsi_type == 20))
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scan_disk(device);
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if (!adapter_businfo.empty())
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--
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2.17.1
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|
@ -0,0 +1,72 @@
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From 60173f077a54610e7b80f24e9189aee29fbd6012 Mon Sep 17 00:00:00 2001
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From: Dan Callaghan <dcallagh@redhat.com>
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Date: Mon, 9 Jul 2018 17:46:39 +1000
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Subject: [PATCH 2/8] Avoid very long IDE programming interface names as
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capabilities
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Recent versions of the PCIID database added programming interface names
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for IDE controllers, like this:
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01 IDE interface
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00 ISA Compatibility mode-only controller
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05 PCI native mode-only controller
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0a ISA Compatibility mode controller, supports both channels switched to PCI native mode
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0f PCI native mode controller, supports both channels switched to ISA compatibility mode
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80 ISA Compatibility mode-only controller, supports bus mastering
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85 PCI native mode-only controller, supports bus mastering
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8a ISA Compatibility mode controller, supports both channels switched to PCI native mode, supports bus mastering
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8f PCI native mode controller, supports both channels switched to ISA compatibility mode, supports bus mastering
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resulting in an awkwardly named capability for the IDE controller:
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<capabilities>
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<capability id="ide" />
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<capability id="pci_native_mode_controller__supports_both_channels_switched_to_isa_compatibility_mode__supports_bus_mastering" />
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<capability id="bus_master" >bus mastering</capability>
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</capabilities>
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This patch adds a special case for IDE controllers to avoid using the
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programming interface name as a capability. Instead, separate
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capabilities are added for the possible combinations:
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<capabilities>
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<capability id="ide" />
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<capability id="isa_compat_mode" >ISA compatibility mode</capability>
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<capability id="pci_native_mode" >PCI native mode</capability>
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<capability id="bus_master" >bus mastering</capability>
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</capabilities>
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---
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src/core/pci.cc | 16 +++++++++++++++-
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1 file changed, 15 insertions(+), 1 deletion(-)
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diff --git a/src/core/pci.cc b/src/core/pci.cc
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index d6111fdf096d..c8380c3034be 100644
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--- a/src/core/pci.cc
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+++ b/src/core/pci.cc
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@@ -965,7 +965,21 @@ static hwNode *scan_pci_dev(struct pci_dev &d, hwNode & n)
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}
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device->setDescription(get_class_description(dclass));
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- if (moredescription != ""
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+ if (dclass == PCI_CLASS_STORAGE_IDE)
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+ {
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+ // IDE programming interface names are really long and awkward,
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+ // so don't add them as capabilities
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+ if (progif == 0x00 || progif == 0x80)
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+ device->addCapability("isa_compat_mode", "ISA compatibility mode");
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+ else if (progif == 0x05 || progif == 0x85)
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+ device->addCapability("pci_native_mode", "PCI native mode");
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+ else if (progif == 0x0a || progif == 0x0f || progif == 0x8a || progif == 0x8f)
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+ {
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+ device->addCapability("isa_compat_mode", "ISA compatibility mode");
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+ device->addCapability("pci_native_mode", "PCI native mode");
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+ }
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+ }
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+ else if (moredescription != ""
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&& moredescription != device->getDescription())
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{
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device->addCapability(moredescription);
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--
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2.17.1
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|
27
SOURCES/0003-Set-powerpc-logo-hint.patch
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27
SOURCES/0003-Set-powerpc-logo-hint.patch
Normal file
@ -0,0 +1,27 @@
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From 4e963955897536be49df9678d07ce7529ed7bdf3 Mon Sep 17 00:00:00 2001
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From: Dan Callaghan <dcallagh@redhat.com>
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Date: Wed, 11 Jul 2018 12:48:51 +1000
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Subject: [PATCH 3/8] Set powerpc logo hint
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Previously, when the CPU information was coming from /proc/cpuinfo, this
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logo hint was being set.
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---
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src/core/device-tree.cc | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/src/core/device-tree.cc b/src/core/device-tree.cc
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index 642b3c54ece1..790362250294 100644
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--- a/src/core/device-tree.cc
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+++ b/src/core/device-tree.cc
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@@ -695,6 +695,7 @@ static void scan_devtree_cpu_power(hwNode & core)
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}
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cpu.setDescription("CPU");
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+ cpu.addHint("logo", string("powerpc"));
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set_cpu(cpu, currentcpu++, basepath);
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reg = get_u32(basepath + "/reg");
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--
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2.17.1
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|
49
SOURCES/0004-Fix-DIMM-info-for-older-IBM-POWER-systems.patch
Normal file
49
SOURCES/0004-Fix-DIMM-info-for-older-IBM-POWER-systems.patch
Normal file
@ -0,0 +1,49 @@
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From 5c69f583963c01afefeff967416ea79fbfafd1f6 Mon Sep 17 00:00:00 2001
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From: Dan Callaghan <dcallagh@redhat.com>
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Date: Wed, 11 Jul 2018 13:34:55 +1000
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Subject: [PATCH 4/8] Fix DIMM info for older IBM POWER systems
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Commit f95aa917 applied the patch from #695, adding the
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scan_devtree_memory_ibm() function, but it called the function in the
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wrong place. The function finds memory-controller@* nodes on older IBM
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POWER systems, not newer OPAL firmware based ones.
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This patch has the side effect of reordering CPU nodes before memory
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nodes on non-IBM device-tree-based hardware (like Calxeda Highbank and
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other unusual stuff). That is in line with other platforms.
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---
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src/core/device-tree.cc | 7 +++----
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1 file changed, 3 insertions(+), 4 deletions(-)
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diff --git a/src/core/device-tree.cc b/src/core/device-tree.cc
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index 642b3c54ece1..23ef797788cb 100644
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--- a/src/core/device-tree.cc
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+++ b/src/core/device-tree.cc
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@@ -1395,7 +1395,6 @@ bool scan_device_tree(hwNode & n)
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core->addHint("icon", string("board"));
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scan_devtree_root(*core);
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scan_devtree_cpu_power(*core);
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- scan_devtree_memory_ibm(*core);
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scan_devtree_memory_powernv(*core);
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scan_devtree_firmware_powernv(*core);
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n.addCapability("powernv", "Non-virtualized");
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@@ -1448,12 +1447,12 @@ bool scan_device_tree(hwNode & n)
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if (exists(DEVICETREE "/ibm,lpar-capable")) {
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n.setDescription("pSeries LPAR");
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scan_devtree_cpu_power(*core);
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- scan_devtree_memory(*core);
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}
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else {
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- scan_devtree_memory(*core);
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scan_devtree_cpu(*core);
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- }
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+ }
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+ scan_devtree_memory(*core);
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+ scan_devtree_memory_ibm(*core);
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}
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}
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--
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2.17.1
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|
91
SOURCES/0005-apply-Github-PR42.patch
Normal file
91
SOURCES/0005-apply-Github-PR42.patch
Normal file
@ -0,0 +1,91 @@
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From f54a30ec01cc4173707720821056b99464e7e245 Mon Sep 17 00:00:00 2001
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From: Lyonel Vincent <lyonel@ezix.org>
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Date: Thu, 20 Dec 2018 15:49:41 +0100
|
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Subject: [PATCH 5/8] apply Github PR42
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Fix typos
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---
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docs/Changelog | 4 ++--
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src/lshw.1 | 6 +++---
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src/lshw.sgml | 6 +++---
|
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3 files changed, 9 insertions(+), 9 deletions(-)
|
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diff --git a/docs/Changelog b/docs/Changelog
|
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index 924b146cb523..c11ddb2dcc4a 100644
|
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--- a/docs/Changelog
|
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+++ b/docs/Changelog
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@@ -83,7 +83,7 @@
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fixed a portability problem with GTK+ [1099]
|
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* B.02.05
|
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added support for DVD writers
|
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- improved GUI usability (thanks to OpenUsability volonteers: Tina Trillitzsch and Florian Graessle)
|
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+ improved GUI usability (thanks to OpenUsability volunteers: Tina Trillitzsch and Florian Graessle)
|
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many new SVG icons
|
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added a logo for LSHW (used as icon for gtk-lshw's windows)
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build system updates
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@@ -209,6 +209,6 @@
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fixes for GCC 3.2
|
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* T.00.02
|
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second public test release
|
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- PCI busses listing
|
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+ PCI buses listing
|
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* T.00.01
|
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first public test release
|
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diff --git a/src/lshw.1 b/src/lshw.1
|
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index 43e4eacd75a2..43239da0bb44 100644
|
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--- a/src/lshw.1
|
||||
+++ b/src/lshw.1
|
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@@ -101,10 +101,10 @@ A list of all known PCI ID's (vendors, devices, classes and subclasses).
|
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If compiled with zlib support, lshw will look for \fIpci.ids.gz\fR first, then for \fIpci.ids\fR\&.
|
||||
.TP
|
||||
\fB/proc/bus/pci/*\fR
|
||||
-Used to access the configuration of installed PCI busses and devices.
|
||||
+Used to access the configuration of installed PCI buses and devices.
|
||||
.TP
|
||||
\fB/proc/ide/*\fR
|
||||
-Used to access the configuration of installed IDE busses and devices.
|
||||
+Used to access the configuration of installed IDE buses and devices.
|
||||
.TP
|
||||
\fB/proc/scsi/*, /dev/sg*\fR
|
||||
Used to access the configuration of installed SCSI devices.
|
||||
@@ -116,7 +116,7 @@ Used on x86 platforms to access CPU-specific configuration.
|
||||
Used on PowerPC platforms to access OpenFirmware configuration.
|
||||
.TP
|
||||
\fB/proc/bus/usb/*\fR
|
||||
-Used to access the configuration of installed USB busses and devices.
|
||||
+Used to access the configuration of installed USB buses and devices.
|
||||
.TP
|
||||
\fB/sys/*\fR
|
||||
Used on 2.6 kernels to access hardware/driver configuration information.
|
||||
diff --git a/src/lshw.sgml b/src/lshw.sgml
|
||||
index 2f3a3ac1ab92..8c1c49e0898b 100644
|
||||
--- a/src/lshw.sgml
|
||||
+++ b/src/lshw.sgml
|
||||
@@ -171,12 +171,12 @@ If compiled with zlib support, lshw will look for <filename>pci.ids.gz</filename
|
||||
|
||||
<varlistentry><term>/proc/bus/pci/*</term>
|
||||
<listitem><para>
|
||||
-Used to access the configuration of installed PCI busses and devices.
|
||||
+Used to access the configuration of installed PCI buses and devices.
|
||||
</para></listitem></varlistentry>
|
||||
|
||||
<varlistentry><term>/proc/ide/*</term>
|
||||
<listitem><para>
|
||||
-Used to access the configuration of installed IDE busses and devices.
|
||||
+Used to access the configuration of installed IDE buses and devices.
|
||||
</para></listitem></varlistentry>
|
||||
|
||||
<varlistentry><term>/proc/scsi/*, /dev/sg*</term>
|
||||
@@ -196,7 +196,7 @@ Used on PowerPC platforms to access OpenFirmware configuration.
|
||||
|
||||
<varlistentry><term>/proc/bus/usb/*</term>
|
||||
<listitem><para>
|
||||
-Used to access the configuration of installed USB busses and devices.
|
||||
+Used to access the configuration of installed USB buses and devices.
|
||||
</para></listitem></varlistentry>
|
||||
|
||||
<varlistentry><term>/sys/*</term>
|
||||
--
|
||||
2.17.1
|
||||
|
@ -0,0 +1,26 @@
|
||||
From 4a415a6725fd88e9219e6af92dcdaf88e0dff36e Mon Sep 17 00:00:00 2001
|
||||
From: hygonsoc <hygonsoc@gmail.com>
|
||||
Date: Wed, 26 Dec 2018 00:08:00 +0800
|
||||
Subject: [PATCH 6/8] add Hygon company description for Hygon CPU VendorID
|
||||
checking
|
||||
|
||||
---
|
||||
src/core/cpuinfo.cc | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/src/core/cpuinfo.cc b/src/core/cpuinfo.cc
|
||||
index 8a72d985f57c..33085fda1159 100644
|
||||
--- a/src/core/cpuinfo.cc
|
||||
+++ b/src/core/cpuinfo.cc
|
||||
@@ -455,6 +455,8 @@ string value)
|
||||
{
|
||||
if (value == "AuthenticAMD")
|
||||
value = "Advanced Micro Devices [AMD]";
|
||||
+ if (value == "HygonGenuine")
|
||||
+ value = "Hygon";
|
||||
if (value == "GenuineIntel")
|
||||
value = "Intel Corp.";
|
||||
cpu->setVendor(value);
|
||||
--
|
||||
2.17.1
|
||||
|
84562
SOURCES/0007-update-id-files.patch
Normal file
84562
SOURCES/0007-update-id-files.patch
Normal file
File diff suppressed because it is too large
Load Diff
35
SOURCES/0008-merge-Github-PR44.patch
Normal file
35
SOURCES/0008-merge-Github-PR44.patch
Normal file
@ -0,0 +1,35 @@
|
||||
From 6cc0581bc805c8bf7ea057c065c3c36caf744ef3 Mon Sep 17 00:00:00 2001
|
||||
From: Lyonel Vincent <lyonel@ezix.org>
|
||||
Date: Sun, 24 Mar 2019 11:18:57 +0100
|
||||
Subject: [PATCH 8/8] merge Github PR44
|
||||
|
||||
Add a class 'nvme' for NVMe devices
|
||||
|
||||
---
|
||||
src/core/pci.cc | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/src/core/pci.cc b/src/core/pci.cc
|
||||
index c8380c3034be..21b9033285ff 100644
|
||||
--- a/src/core/pci.cc
|
||||
+++ b/src/core/pci.cc
|
||||
@@ -105,6 +105,7 @@ __ID("@(#) $Id$");
|
||||
#define PCI_CLASS_STORAGE_RAID 0x0104
|
||||
#define PCI_CLASS_STORAGE_SATA 0x0106
|
||||
#define PCI_CLASS_STORAGE_SAS 0x0107
|
||||
+#define PCI_CLASS_STORAGE_NVME 0x0108
|
||||
#define PCI_CLASS_STORAGE_OTHER 0x0180
|
||||
|
||||
#define PCI_BASE_CLASS_NETWORK 0x02
|
||||
@@ -340,6 +341,8 @@ static const char *get_class_name(unsigned int c)
|
||||
return "sata";
|
||||
case PCI_CLASS_STORAGE_SAS:
|
||||
return "sas";
|
||||
+ case PCI_CLASS_STORAGE_NVME:
|
||||
+ return "nvme";
|
||||
case PCI_CLASS_BRIDGE_HOST:
|
||||
return "host";
|
||||
case PCI_CLASS_BRIDGE_ISA:
|
||||
--
|
||||
2.17.1
|
||||
|
@ -0,0 +1,28 @@
|
||||
From 5c3b96616ecec2345c6b785352192c033738f2e1 Mon Sep 17 00:00:00 2001
|
||||
From: Lianbo Jiang <lijiang@redhat.com>
|
||||
Date: Thu, 25 Apr 2019 12:37:38 +0800
|
||||
Subject: [PATCH] Add the "FindPkgConfig" to CMakeLists.txt.
|
||||
|
||||
Include the "FindPkgConfig" in order to fix "Unknown CMake command
|
||||
pkg_check_modules"
|
||||
|
||||
Signed-off-by: Lianbo Jiang <lijiang@redhat.com>
|
||||
---
|
||||
CMakeLists.txt | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/CMakeLists.txt b/CMakeLists.txt
|
||||
index 6c69c37336c8..688863130291 100644
|
||||
--- a/CMakeLists.txt
|
||||
+++ b/CMakeLists.txt
|
||||
@@ -1,5 +1,7 @@
|
||||
cmake_minimum_required(VERSION 3.0)
|
||||
|
||||
+include(FindPkgConfig)
|
||||
+
|
||||
project(lshw)
|
||||
set(VERSION "B.012.18")
|
||||
|
||||
--
|
||||
2.17.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
Summary: Hardware lister
|
||||
Name: lshw
|
||||
Version: B.02.18
|
||||
Release: 16%{?dist}
|
||||
Release: 21%{?dist}
|
||||
License: GPLv2
|
||||
Group: Applications/System
|
||||
URL: http://ezix.org/project/wiki/HardwareLiSter
|
||||
@ -10,6 +10,16 @@ Patch1: lshw-B.02.18-scandir.patch
|
||||
Patch2: lshw-B.02.18-20cda77.patch
|
||||
Patch3: lshw-B.02.18-revert-json.patch
|
||||
Patch4: lshw-B.02.18-cmake.patch
|
||||
Patch5: lshw-B.02.18-Add-the-FindPkgConfig-to-CMakeLists.patch
|
||||
Patch6: 0001-merge-Github-PR-40-and-41.patch
|
||||
Patch7: 0002-Avoid-very-long-IDE-programming-interface-names-as-c.patch
|
||||
Patch8: 0003-Set-powerpc-logo-hint.patch
|
||||
Patch9: 0004-Fix-DIMM-info-for-older-IBM-POWER-systems.patch
|
||||
Patch10: 0005-apply-Github-PR42.patch
|
||||
Patch11: 0006-add-Hygon-company-description-for-Hygon-CPU-VendorID.patch
|
||||
Patch12: 0007-update-id-files.patch
|
||||
Patch13: 0008-merge-Github-PR44.patch
|
||||
|
||||
BuildRequires: cmake
|
||||
BuildRequires: desktop-file-utils
|
||||
BuildRequires: gcc
|
||||
@ -19,6 +29,8 @@ BuildRequires: gtk2-devel >= 2.4
|
||||
BuildRequires: libappstream-glib
|
||||
BuildRequires: ninja-build
|
||||
BuildRequires: python3-devel
|
||||
BuildRequires: sqlite
|
||||
BuildRequires: sqlite-devel
|
||||
Requires: hwdata
|
||||
%description
|
||||
lshw is a small tool to provide detailed informaton on the hardware
|
||||
@ -45,10 +57,19 @@ format.
|
||||
%patch02 -p1
|
||||
%patch03 -R -p1
|
||||
%patch04 -p1
|
||||
%patch05 -p1
|
||||
%patch06 -p1
|
||||
%patch07 -p1
|
||||
%patch08 -p1
|
||||
%patch09 -p1
|
||||
%patch10 -p1
|
||||
%patch11 -p1
|
||||
%patch12 -p1
|
||||
%patch13 -p1
|
||||
|
||||
%build
|
||||
mkdir build && pushd build
|
||||
%cmake .. -DNOLOGO=ON -DHWDATA=OFF -DPOLICYKIT=ON -DBUILD_SHARED_LIBS=OFF -GNinja
|
||||
%cmake .. -DNOLOGO=ON -DHWDATA=OFF -DPOLICYKIT=ON -DBUILD_SHARED_LIBS=OFF -DSQLITE=ON -GNinja
|
||||
%ninja_build
|
||||
|
||||
%install
|
||||
@ -92,6 +113,26 @@ src/lshw -json \
|
||||
%{_datadir}/polkit-1/actions/org.ezix.lshw.gui.policy
|
||||
|
||||
%changelog
|
||||
* Mon May 13 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-21
|
||||
- Update to upstream master 6cc0581bc805.
|
||||
- Resolves: rhbz#1664092
|
||||
|
||||
* Thu Apr 25 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-20
|
||||
- Change python to python3 in selftest/Makefile for the CI gating test.
|
||||
- Resolves: rhbz#1680623
|
||||
|
||||
* Thu Apr 25 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-19
|
||||
- Enable SQLite and fix the CI gating test.
|
||||
- Resolves: rhbz#1680623
|
||||
|
||||
* Tue Apr 23 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-18
|
||||
- Fix:59a8e99ab22d ("Porting the code from /CoreOS/lshw/sanity/check-output for the CI gating")
|
||||
- Resolves: rhbz#1680623
|
||||
|
||||
* Fri Apr 19 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-17
|
||||
- Add the CI gating test
|
||||
- Resolves: rhbz#1680623
|
||||
|
||||
* Mon Apr 02 2018 Terje Rosten <terje.rosten@ntnu.no> - B.02.18-16
|
||||
- Update to commit 20cda77
|
||||
- Convert to cmake build system
|
||||
|
Loading…
Reference in New Issue
Block a user