rpms
/
lshw
7
0
Fork 0
Code Issues Pull Requests Releases Activity

import lshw-B.02.18-21.el8

This commit is contained in:
CentOS Sources 2019-11-05 15:21:54 -05:00 committed by Stepan Oksanichenko
parent d94fd8058d
commit 6956356fd6
10 changed files with 84997 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

64
SOURCES/0001-merge-Github-PR-40-and-41.patch Normal file
View File

@ -0,0 +1,64 @@
From 028f6b229a138211d17bb32b8668dc73e6724464 Mon Sep 17 00:00:00 2001
From: Lyonel Vincent <lyonel@ezix.org>
Date: Thu, 14 Jun 2018 19:17:26 +0200
Subject: [PATCH 1/8] merge Github PR #40 and #41
Properly handle scsi device type 0x14 (== 20) to add ZBC and ZAC host
managed zoned block devices to the "disk" class. While at it, also add
in scsi_type() the missing type name string for the device
type 0xe (== 14).
---
lshw.spec.in | 2 +-
src/core/scsi.cc | 8 +++++++-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/lshw.spec.in b/lshw.spec.in
index c597379c3bc8..f7f88b323ce9 100644
--- a/lshw.spec.in
+++ b/lshw.spec.in
@@ -12,7 +12,7 @@ Group: Applications/System
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
%description
-lshw (Hardware Lister) is a small tool to provide detailed informaton on
+lshw (Hardware Lister) is a small tool to provide detailed information on
the hardware configuration of the machine. It can report exact memory
configuration, firmware version, mainboard configuration, CPU version
and speed, cache configuration, bus speed, etc. on DMI-capable x86s
diff --git a/src/core/scsi.cc b/src/core/scsi.cc
index 75061c0fb195..4992c889dd12 100644
--- a/src/core/scsi.cc
+++ b/src/core/scsi.cc
@@ -260,6 +260,10 @@ static const char *scsi_type(int type)
return "Medium Changer";
case 0xd:
return "Enclosure";
+ case 0xe:
+ return "Simplified direct-access device";
+ case 0x14:
+ return "Host managed zoned block device";
default:
return "";
}
@@ -706,6 +710,7 @@ static void scan_sg(hwNode & n)
{
case 0:
case 14:
+ case 20:
device = hwNode("disk", hw::disk);
break;
case 1:
@@ -752,7 +757,8 @@ static void scan_sg(hwNode & n)
}
if ((m_id.scsi_type == 4) || (m_id.scsi_type == 5))
scan_cdrom(device);
- if ((m_id.scsi_type == 0) || (m_id.scsi_type == 7) || (m_id.scsi_type == 14))
+ if ((m_id.scsi_type == 0) || (m_id.scsi_type == 7) ||
+ (m_id.scsi_type == 14) || (m_id.scsi_type == 20))
scan_disk(device);
if (!adapter_businfo.empty())
--
2.17.1

72
SOURCES/0002-Avoid-very-long-IDE-programming-interface-names-as-c.patch Normal file
View File

@ -0,0 +1,72 @@
From 60173f077a54610e7b80f24e9189aee29fbd6012 Mon Sep 17 00:00:00 2001
From: Dan Callaghan <dcallagh@redhat.com>
Date: Mon, 9 Jul 2018 17:46:39 +1000
Subject: [PATCH 2/8] Avoid very long IDE programming interface names as
capabilities
Recent versions of the PCIID database added programming interface names
for IDE controllers, like this:
01 IDE interface
00 ISA Compatibility mode-only controller
05 PCI native mode-only controller
0a ISA Compatibility mode controller, supports both channels switched to PCI native mode
0f PCI native mode controller, supports both channels switched to ISA compatibility mode
80 ISA Compatibility mode-only controller, supports bus mastering
85 PCI native mode-only controller, supports bus mastering
8a ISA Compatibility mode controller, supports both channels switched to PCI native mode, supports bus mastering
8f PCI native mode controller, supports both channels switched to ISA compatibility mode, supports bus mastering
resulting in an awkwardly named capability for the IDE controller:
<capabilities>
<capability id="ide" />
<capability id="pci_native_mode_controller__supports_both_channels_switched_to_isa_compatibility_mode__supports_bus_mastering" />
<capability id="bus_master" >bus mastering</capability>
</capabilities>
This patch adds a special case for IDE controllers to avoid using the
programming interface name as a capability. Instead, separate
capabilities are added for the possible combinations:
<capabilities>
<capability id="ide" />
<capability id="isa_compat_mode" >ISA compatibility mode</capability>
<capability id="pci_native_mode" >PCI native mode</capability>
<capability id="bus_master" >bus mastering</capability>
</capabilities>
---
src/core/pci.cc | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/src/core/pci.cc b/src/core/pci.cc
index d6111fdf096d..c8380c3034be 100644
--- a/src/core/pci.cc
+++ b/src/core/pci.cc
@@ -965,7 +965,21 @@ static hwNode *scan_pci_dev(struct pci_dev &d, hwNode & n)
}
device->setDescription(get_class_description(dclass));
- if (moredescription != ""
+ if (dclass == PCI_CLASS_STORAGE_IDE)
+ {
+ // IDE programming interface names are really long and awkward,
+ // so don't add them as capabilities
+ if (progif == 0x00 || progif == 0x80)
+ device->addCapability("isa_compat_mode", "ISA compatibility mode");
+ else if (progif == 0x05 || progif == 0x85)
+ device->addCapability("pci_native_mode", "PCI native mode");
+ else if (progif == 0x0a || progif == 0x0f || progif == 0x8a || progif == 0x8f)
+ {
+ device->addCapability("isa_compat_mode", "ISA compatibility mode");
+ device->addCapability("pci_native_mode", "PCI native mode");
+ }
+ }
+ else if (moredescription != ""
&& moredescription != device->getDescription())
{
device->addCapability(moredescription);
--
2.17.1

27
SOURCES/0003-Set-powerpc-logo-hint.patch Normal file
View File

@ -0,0 +1,27 @@
From 4e963955897536be49df9678d07ce7529ed7bdf3 Mon Sep 17 00:00:00 2001
From: Dan Callaghan <dcallagh@redhat.com>
Date: Wed, 11 Jul 2018 12:48:51 +1000
Subject: [PATCH 3/8] Set powerpc logo hint
Previously, when the CPU information was coming from /proc/cpuinfo, this
logo hint was being set.
---
src/core/device-tree.cc | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/core/device-tree.cc b/src/core/device-tree.cc
index 642b3c54ece1..790362250294 100644
--- a/src/core/device-tree.cc
+++ b/src/core/device-tree.cc
@@ -695,6 +695,7 @@ static void scan_devtree_cpu_power(hwNode & core)
}
cpu.setDescription("CPU");
+ cpu.addHint("logo", string("powerpc"));
set_cpu(cpu, currentcpu++, basepath);
reg = get_u32(basepath + "/reg");
--
2.17.1

49
SOURCES/0004-Fix-DIMM-info-for-older-IBM-POWER-systems.patch Normal file
View File

@ -0,0 +1,49 @@
From 5c69f583963c01afefeff967416ea79fbfafd1f6 Mon Sep 17 00:00:00 2001
From: Dan Callaghan <dcallagh@redhat.com>
Date: Wed, 11 Jul 2018 13:34:55 +1000
Subject: [PATCH 4/8] Fix DIMM info for older IBM POWER systems
Commit f95aa917 applied the patch from #695, adding the
scan_devtree_memory_ibm() function, but it called the function in the
wrong place. The function finds memory-controller@* nodes on older IBM
POWER systems, not newer OPAL firmware based ones.
This patch has the side effect of reordering CPU nodes before memory
nodes on non-IBM device-tree-based hardware (like Calxeda Highbank and
other unusual stuff). That is in line with other platforms.
---
src/core/device-tree.cc | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/src/core/device-tree.cc b/src/core/device-tree.cc
index 642b3c54ece1..23ef797788cb 100644
--- a/src/core/device-tree.cc
+++ b/src/core/device-tree.cc
@@ -1395,7 +1395,6 @@ bool scan_device_tree(hwNode & n)
core->addHint("icon", string("board"));
scan_devtree_root(*core);
scan_devtree_cpu_power(*core);
- scan_devtree_memory_ibm(*core);
scan_devtree_memory_powernv(*core);
scan_devtree_firmware_powernv(*core);
n.addCapability("powernv", "Non-virtualized");
@@ -1448,12 +1447,12 @@ bool scan_device_tree(hwNode & n)
if (exists(DEVICETREE "/ibm,lpar-capable")) {
n.setDescription("pSeries LPAR");
scan_devtree_cpu_power(*core);
- scan_devtree_memory(*core);
}
else {
- scan_devtree_memory(*core);
scan_devtree_cpu(*core);
- }
+ }
+ scan_devtree_memory(*core);
+ scan_devtree_memory_ibm(*core);
}
}
--
2.17.1

91
SOURCES/0005-apply-Github-PR42.patch Normal file
View File

@ -0,0 +1,91 @@
From f54a30ec01cc4173707720821056b99464e7e245 Mon Sep 17 00:00:00 2001
From: Lyonel Vincent <lyonel@ezix.org>
Date: Thu, 20 Dec 2018 15:49:41 +0100
Subject: [PATCH 5/8] apply Github PR42
Fix typos
---
docs/Changelog | 4 ++--
src/lshw.1 | 6 +++---
src/lshw.sgml | 6 +++---
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/docs/Changelog b/docs/Changelog
index 924b146cb523..c11ddb2dcc4a 100644
--- a/docs/Changelog
+++ b/docs/Changelog
@@ -83,7 +83,7 @@
fixed a portability problem with GTK+ [1099]
* B.02.05
added support for DVD writers
- improved GUI usability (thanks to OpenUsability volonteers: Tina Trillitzsch and Florian Graessle)
+ improved GUI usability (thanks to OpenUsability volunteers: Tina Trillitzsch and Florian Graessle)
many new SVG icons
added a logo for LSHW (used as icon for gtk-lshw's windows)
build system updates
@@ -209,6 +209,6 @@
fixes for GCC 3.2
* T.00.02
second public test release
- PCI busses listing
+ PCI buses listing
* T.00.01
first public test release
diff --git a/src/lshw.1 b/src/lshw.1
index 43e4eacd75a2..43239da0bb44 100644
--- a/src/lshw.1
+++ b/src/lshw.1
@@ -101,10 +101,10 @@ A list of all known PCI ID's (vendors, devices, classes and subclasses).
If compiled with zlib support, lshw will look for \fIpci.ids.gz\fR first, then for \fIpci.ids\fR\&.
.TP
\fB/proc/bus/pci/*\fR
-Used to access the configuration of installed PCI busses and devices.
+Used to access the configuration of installed PCI buses and devices.
.TP
\fB/proc/ide/*\fR
-Used to access the configuration of installed IDE busses and devices.
+Used to access the configuration of installed IDE buses and devices.
.TP
\fB/proc/scsi/*, /dev/sg*\fR
Used to access the configuration of installed SCSI devices.
@@ -116,7 +116,7 @@ Used on x86 platforms to access CPU-specific configuration.
Used on PowerPC platforms to access OpenFirmware configuration.
.TP
\fB/proc/bus/usb/*\fR
-Used to access the configuration of installed USB busses and devices.
+Used to access the configuration of installed USB buses and devices.
.TP
\fB/sys/*\fR
Used on 2.6 kernels to access hardware/driver configuration information.
diff --git a/src/lshw.sgml b/src/lshw.sgml
index 2f3a3ac1ab92..8c1c49e0898b 100644
--- a/src/lshw.sgml
+++ b/src/lshw.sgml
@@ -171,12 +171,12 @@ If compiled with zlib support, lshw will look for <filename>pci.ids.gz</filename
<varlistentry><term>/proc/bus/pci/*</term>
<listitem><para>
-Used to access the configuration of installed PCI busses and devices.
+Used to access the configuration of installed PCI buses and devices.
</para></listitem></varlistentry>
<varlistentry><term>/proc/ide/*</term>
<listitem><para>
-Used to access the configuration of installed IDE busses and devices.
+Used to access the configuration of installed IDE buses and devices.
</para></listitem></varlistentry>
<varlistentry><term>/proc/scsi/*, /dev/sg*</term>
@@ -196,7 +196,7 @@ Used on PowerPC platforms to access OpenFirmware configuration.
<varlistentry><term>/proc/bus/usb/*</term>
<listitem><para>
-Used to access the configuration of installed USB busses and devices.
+Used to access the configuration of installed USB buses and devices.
</para></listitem></varlistentry>
<varlistentry><term>/sys/*</term>
--
2.17.1

26
SOURCES/0006-add-Hygon-company-description-for-Hygon-CPU-VendorID.patch Normal file
View File

@ -0,0 +1,26 @@
From 4a415a6725fd88e9219e6af92dcdaf88e0dff36e Mon Sep 17 00:00:00 2001
From: hygonsoc <hygonsoc@gmail.com>
Date: Wed, 26 Dec 2018 00:08:00 +0800
Subject: [PATCH 6/8] add Hygon company description for Hygon CPU VendorID
checking
---
src/core/cpuinfo.cc | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/core/cpuinfo.cc b/src/core/cpuinfo.cc
index 8a72d985f57c..33085fda1159 100644
--- a/src/core/cpuinfo.cc
+++ b/src/core/cpuinfo.cc
@@ -455,6 +455,8 @@ string value)
{
if (value == "AuthenticAMD")
value = "Advanced Micro Devices [AMD]";
+ if (value == "HygonGenuine")
+ value = "Hygon";
if (value == "GenuineIntel")
value = "Intel Corp.";
cpu->setVendor(value);
--
2.17.1

84562
SOURCES/0007-update-id-files.patch Normal file
View File

File diff suppressed because it is too large Load Diff

35
SOURCES/0008-merge-Github-PR44.patch Normal file
View File

@ -0,0 +1,35 @@
From 6cc0581bc805c8bf7ea057c065c3c36caf744ef3 Mon Sep 17 00:00:00 2001
From: Lyonel Vincent <lyonel@ezix.org>
Date: Sun, 24 Mar 2019 11:18:57 +0100
Subject: [PATCH 8/8] merge Github PR44
Add a class 'nvme' for NVMe devices
---
src/core/pci.cc | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/core/pci.cc b/src/core/pci.cc
index c8380c3034be..21b9033285ff 100644
--- a/src/core/pci.cc
+++ b/src/core/pci.cc
@@ -105,6 +105,7 @@ __ID("@(#) $Id$");
#define PCI_CLASS_STORAGE_RAID 0x0104
#define PCI_CLASS_STORAGE_SATA 0x0106
#define PCI_CLASS_STORAGE_SAS 0x0107
+#define PCI_CLASS_STORAGE_NVME 0x0108
#define PCI_CLASS_STORAGE_OTHER 0x0180
#define PCI_BASE_CLASS_NETWORK 0x02
@@ -340,6 +341,8 @@ static const char *get_class_name(unsigned int c)
return "sata";
case PCI_CLASS_STORAGE_SAS:
return "sas";
+ case PCI_CLASS_STORAGE_NVME:
+ return "nvme";
case PCI_CLASS_BRIDGE_HOST:
return "host";
case PCI_CLASS_BRIDGE_ISA:
--
2.17.1

28
SOURCES/lshw-B.02.18-Add-the-FindPkgConfig-to-CMakeLists.patch Normal file
View File

@ -0,0 +1,28 @@
From 5c3b96616ecec2345c6b785352192c033738f2e1 Mon Sep 17 00:00:00 2001
From: Lianbo Jiang <lijiang@redhat.com>
Date: Thu, 25 Apr 2019 12:37:38 +0800
Subject: [PATCH] Add the "FindPkgConfig" to CMakeLists.txt.
Include the "FindPkgConfig" in order to fix "Unknown CMake command
pkg_check_modules"
Signed-off-by: Lianbo Jiang <lijiang@redhat.com>
---
CMakeLists.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 6c69c37336c8..688863130291 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -1,5 +1,7 @@
cmake_minimum_required(VERSION 3.0)
+include(FindPkgConfig)
+
project(lshw)
set(VERSION "B.012.18")
--
2.17.1

45
SPECS/lshw.spec
View File

@ -1,7 +1,7 @@
Summary: Hardware lister
Name: lshw
Version: B.02.18
Release: 16%{?dist}
Release: 21%{?dist}
License: GPLv2
Group: Applications/System
URL: http://ezix.org/project/wiki/HardwareLiSter
@ -10,6 +10,16 @@ Patch1: lshw-B.02.18-scandir.patch
Patch2: lshw-B.02.18-20cda77.patch
Patch3: lshw-B.02.18-revert-json.patch
Patch4: lshw-B.02.18-cmake.patch
Patch5: lshw-B.02.18-Add-the-FindPkgConfig-to-CMakeLists.patch
Patch6: 0001-merge-Github-PR-40-and-41.patch
Patch7: 0002-Avoid-very-long-IDE-programming-interface-names-as-c.patch
Patch8: 0003-Set-powerpc-logo-hint.patch
Patch9: 0004-Fix-DIMM-info-for-older-IBM-POWER-systems.patch
Patch10: 0005-apply-Github-PR42.patch
Patch11: 0006-add-Hygon-company-description-for-Hygon-CPU-VendorID.patch
Patch12: 0007-update-id-files.patch
Patch13: 0008-merge-Github-PR44.patch
BuildRequires: cmake
BuildRequires: desktop-file-utils
BuildRequires: gcc
@ -19,6 +29,8 @@ BuildRequires: gtk2-devel >= 2.4
BuildRequires: libappstream-glib
BuildRequires: ninja-build
BuildRequires: python3-devel
BuildRequires: sqlite
BuildRequires: sqlite-devel
Requires: hwdata
%description
lshw is a small tool to provide detailed informaton on the hardware
@ -45,10 +57,19 @@ format.
%patch02 -p1
%patch03 -R -p1
%patch04 -p1
%patch05 -p1
%patch06 -p1
%patch07 -p1
%patch08 -p1
%patch09 -p1
%patch10 -p1
%patch11 -p1
%patch12 -p1
%patch13 -p1
%build
mkdir build && pushd build
%cmake .. -DNOLOGO=ON -DHWDATA=OFF -DPOLICYKIT=ON -DBUILD_SHARED_LIBS=OFF -GNinja
%cmake .. -DNOLOGO=ON -DHWDATA=OFF -DPOLICYKIT=ON -DBUILD_SHARED_LIBS=OFF -DSQLITE=ON -GNinja
%ninja_build
%install
@ -92,6 +113,26 @@ src/lshw -json \
%{_datadir}/polkit-1/actions/org.ezix.lshw.gui.policy
%changelog
* Mon May 13 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-21
- Update to upstream master 6cc0581bc805.
- Resolves: rhbz#1664092
* Thu Apr 25 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-20
- Change python to python3 in selftest/Makefile for the CI gating test.
- Resolves: rhbz#1680623
* Thu Apr 25 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-19
- Enable SQLite and fix the CI gating test.
- Resolves: rhbz#1680623
* Tue Apr 23 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-18
- Fix:59a8e99ab22d ("Porting the code from /CoreOS/lshw/sanity/check-output for the CI gating")
- Resolves: rhbz#1680623
* Fri Apr 19 2019 Lianbo Jiang <lijiang@redhat.com> - B.02.18-17
- Add the CI gating test
- Resolves: rhbz#1680623
* Mon Apr 02 2018 Terje Rosten <terje.rosten@ntnu.no> - B.02.18-16
- Update to commit 20cda77
- Convert to cmake build system