88 lines
4.4 KiB
Diff
88 lines
4.4 KiB
Diff
From 3915d1efcdb1e9d10c8f6966acbe5c359d824ba1 Mon Sep 17 00:00:00 2001
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From: Josh Stone <jistone@redhat.com>
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Date: Mon, 6 Apr 2026 14:08:10 -0700
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Subject: [PATCH] [CodeGen] Preserve big-endian trunc in concat_vectors
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A transform from `concat_vectors(trunc(scalar), undef)` to
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`scalar_to_vector(scalar)` is only equivalent for little-endian targets.
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On big-endian, that would put the extra upper bytes ahead of the desired
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truncated bytes. This problem was seen on Rust s390x in [RHEL-147748].
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[RHEL-147748]: https://redhat.atlassian.net/browse/RHEL-147748
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Assisted-by: Claude Code
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---
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llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 +-
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llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll | 45 +++++++++++++++++++
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2 files changed, 48 insertions(+), 1 deletion(-)
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create mode 100644 llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
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diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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index 383e45c5ea3a8..5485ee86251a5 100644
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--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@@ -26513,9 +26513,11 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
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// If the bitcast type isn't legal, it might be a trunc of a legal type;
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// look through the trunc so we can still do the transform:
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// concat_vectors(trunc(scalar), undef) -> scalar_to_vector(scalar)
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+ // However, this is only equivalent on little-endian targets.
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if (Scalar->getOpcode() == ISD::TRUNCATE &&
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!TLI.isTypeLegal(Scalar.getValueType()) &&
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- TLI.isTypeLegal(Scalar->getOperand(0).getValueType()))
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+ TLI.isTypeLegal(Scalar->getOperand(0).getValueType()) &&
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+ DAG.getDataLayout().isLittleEndian())
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Scalar = Scalar->getOperand(0);
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EVT SclTy = Scalar.getValueType();
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diff --git a/llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll b/llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
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new file mode 100644
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index 0000000000000..42d787d945145
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--- /dev/null
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+++ b/llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
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@@ -0,0 +1,45 @@
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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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+
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+; Test that truncated scalars use the correct vector insert instruction.
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+; On big-endian targets, concat_vectors should not skip truncates when
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+; creating scalar_to_vector, as the bytes would be in the wrong position.
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+
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+; This truncated i16 should use vlvgh (insert halfword), not vlvgf (insert fullword).
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+define <16 x i8> @test_concat_trunc_i16(i32 %x) {
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+; CHECK-LABEL: test_concat_trunc_i16:
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+; CHECK: # %bb.0:
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+; CHECK-NEXT: vlvgh %v24, %r2, 0
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+; CHECK-NEXT: br %r14
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+ %t = trunc i32 %x to i16
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+ %vec = bitcast i16 %t to <2 x i8>
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+ %result = shufflevector <2 x i8> %vec, <2 x i8> poison, <16 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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+ ret <16 x i8> %result
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+}
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+
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+; Test with a more complex shuffle pattern, reduced from a Rust bug report.
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+define fastcc void @test_shuffle_with_trunc() {
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+; CHECK-LABEL: test_shuffle_with_trunc:
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+; CHECK: # %bb.0:
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+; CHECK-NEXT: lh %r1, 0
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+; CHECK-NEXT: l %r0, 0
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+; CHECK-NEXT: vlvgh %v1, %r1, 0
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+; CHECK-NEXT: larl %r1, .LCPI1_0
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+; CHECK-NEXT: vl %v2, 0(%r1), 3
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+; CHECK-NEXT: vlvgf %v0, %r0, 0
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+; CHECK-NEXT: vperm %v0, %v0, %v1, %v2
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+; CHECK-NEXT: vst %v0, 0, 3
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+; CHECK-NEXT: br %r14
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+ %1 = load i32, ptr null, align 8
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+ %2 = load i16, ptr null, align 1
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+ br label %3
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+
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+3:
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+ %4 = bitcast i32 %1 to <4 x i8>
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+ %5 = shufflevector <4 x i8> %4, <4 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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+ %6 = bitcast i16 %2 to <2 x i8>
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+ %7 = shufflevector <2 x i8> %6, <2 x i8> zeroinitializer, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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+ %8 = shufflevector <16 x i8> %5, <16 x i8> %7, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 25, i32 26, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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+ store <16 x i8> %8, ptr null, align 8
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+ ret void
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+}
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