.fmf/version

@@ -0,0 +1 @@
+1

.gitignore

@@ -1,2 +1,46 @@
-SOURCES/llvm-project-19.1.7.src.tar.xz
+SOURCES/cmake-15.0.7.src.tar.xz
-SOURCES/llvm-project-19.1.7.src.tar.xz.sig
+SOURCES/llvm-15.0.7.src.tar.xz
+/cmake-15.0.7.src.tar.xz
+/llvm-15.0.7.src.tar.xz
+/llvm-16.0.0.src.tar.xz
+/llvm-16.0.0.src.tar.xz.sig
+/cmake-16.0.0.src.tar.xz
+/cmake-16.0.0.src.tar.xz.sig
+/third-party-16.0.0.src.tar.xz
+/third-party-16.0.0.src.tar.xz.sig
+/llvm-16.0.6.src.tar.xz
+/llvm-16.0.6.src.tar.xz.sig
+/cmake-16.0.6.src.tar.xz
+/cmake-16.0.6.src.tar.xz.sig
+/third-party-16.0.6.src.tar.xz
+/third-party-16.0.6.src.tar.xz.sig
+/llvm-17.0.2.src.tar.xz
+/llvm-17.0.2.src.tar.xz.sig
+/cmake-17.0.2.src.tar.xz
+/cmake-17.0.2.src.tar.xz.sig
+/third-party-17.0.2.src.tar.xz
+/third-party-17.0.2.src.tar.xz.sig
+/llvm-17.0.6.src.tar.xz
+/llvm-17.0.6.src.tar.xz.sig
+/cmake-17.0.6.src.tar.xz
+/cmake-17.0.6.src.tar.xz.sig
+/third-party-17.0.6.src.tar.xz
+/third-party-17.0.6.src.tar.xz.sig
+/llvm-18.1.8.src.tar.xz
+/llvm-18.1.8.src.tar.xz.sig
+/cmake-18.1.8.src.tar.xz
+/cmake-18.1.8.src.tar.xz.sig
+/third-party-18.1.8.src.tar.xz
+/third-party-18.1.8.src.tar.xz.sig
+/llvm-project-19.1.3.src.tar.xz
+/llvm-project-19.1.3.src.tar.xz.sig
+/llvm-project-18.1.8.src.tar.xz
+/llvm-project-18.1.8.src.tar.xz.sig
+/llvm-project-19.1.7.src.tar.xz
+/llvm-project-19.1.7.src.tar.xz.sig
+/llvm-project-20.1.3.src.tar.xz
+/llvm-project-20.1.3.src.tar.xz.sig
+/llvm-project-20.1.6.src.tar.xz
+/llvm-project-20.1.6.src.tar.xz.sig
+/llvm-project-20.1.7.src.tar.xz
+/llvm-project-20.1.7.src.tar.xz.sig

.llvm.metadata

@@ -1,2 +0,0 @@
-6e4033d8b76a89e82220b5445bff58cdce64300e SOURCES/llvm-project-19.1.7.src.tar.xz
-48f839c6e47a34a1138862a9db6274c150179532 SOURCES/llvm-project-19.1.7.src.tar.xz.sig

0001-20-polly-shared-libs.patch

@@ -0,0 +1,59 @@
+From cecb98f56e7d6619d0427fbdbc2f200ce212f0c6 Mon Sep 17 00:00:00 2001
+From: Konrad Kleine <kkleine@redhat.com>
+Date: Tue, 28 Jan 2025 08:34:09 +0000
+Subject: [PATCH] [polly] shared libs
+
+---
+ polly/cmake/polly_macros.cmake    | 5 ++++-
+ polly/lib/CMakeLists.txt          | 1 +
+ polly/lib/External/CMakeLists.txt | 1 +
+ 3 files changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/polly/cmake/polly_macros.cmake b/polly/cmake/polly_macros.cmake
+index 9bd7b0b0ea59..fc2c3a76901f 100644
+--- a/polly/cmake/polly_macros.cmake
++++ b/polly/cmake/polly_macros.cmake
+@@ -1,5 +1,5 @@
+ macro(add_polly_library name)
+-  cmake_parse_arguments(ARG "" "" "" ${ARGN})
++  cmake_parse_arguments(ARG "SHARED" "" "" ${ARGN})
+   set(srcs ${ARG_UNPARSED_ARGUMENTS})
+   if(MSVC_IDE OR XCODE)
+     file( GLOB_RECURSE headers *.h *.td *.def)
+@@ -17,6 +17,9 @@ macro(add_polly_library name)
+   else()
+     set(libkind)
+   endif()
++  if (ARG_SHARED)
++    set(libkind SHARED)
++  endif()
+   add_library( ${name} ${libkind} ${srcs} )
+   set_target_properties(${name} PROPERTIES FOLDER "Polly/Libraries")
+ 
+diff --git a/polly/lib/CMakeLists.txt b/polly/lib/CMakeLists.txt
+index d91f4ecd37e6..965f635b7ff6 100644
+--- a/polly/lib/CMakeLists.txt
++++ b/polly/lib/CMakeLists.txt
+@@ -41,6 +41,7 @@ set(POLLY_COMPONENTS
+ # the sources them to be recompiled for each of them.
+ add_llvm_pass_plugin(Polly
+   NO_MODULE
++  SHARED
+   SUBPROJECT Polly
+   Analysis/DependenceInfo.cpp
+   Analysis/PolyhedralInfo.cpp
+diff --git a/polly/lib/External/CMakeLists.txt b/polly/lib/External/CMakeLists.txt
+index 5dd69b7199dc..f065fbd7b942 100644
+--- a/polly/lib/External/CMakeLists.txt
++++ b/polly/lib/External/CMakeLists.txt
+@@ -284,6 +284,7 @@ if (POLLY_BUNDLED_ISL)
+     )
+ 
+   add_polly_library(PollyISL
++    SHARED
+     ${ISL_FILES}
+     )
+ 
+-- 
+2.46.0
+

0001-SystemZ-Fix-ICE-with-i128-i64-uaddo-carry-chain.patch

@@ -0,0 +1,81 @@
+From 6d5697f7cb4e933d2f176c46b7ac05a9cbaeb8b6 Mon Sep 17 00:00:00 2001
+From: Ulrich Weigand <ulrich.weigand@de.ibm.com>
+Date: Thu, 23 Jan 2025 19:11:18 +0100
+Subject: [PATCH] [SystemZ] Fix ICE with i128->i64 uaddo carry chain
+
+We can only optimize a uaddo_carry via specialized instruction
+if the carry was produced by another uaddo(_carry) instruction;
+there is already a check for that.
+
+However, i128 uaddo(_carry) use a completely different mechanism;
+they indicate carry in a vector register instead of the CC flag.
+Thus, we must also check that we don't mix those two - that check
+has been missing.
+
+Fixes: https://github.com/llvm/llvm-project/issues/124001
+---
+ .../Target/SystemZ/SystemZISelLowering.cpp    | 12 ++++++----
+ llvm/test/CodeGen/SystemZ/pr124001.ll         | 23 +++++++++++++++++++
+ 2 files changed, 31 insertions(+), 4 deletions(-)
+ create mode 100644 llvm/test/CodeGen/SystemZ/pr124001.ll
+
+diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+index 4040ab6d4510..1fb31c26e20d 100644
+--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
++++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+@@ -4708,15 +4708,19 @@ SDValue SystemZTargetLowering::lowerXALUO(SDValue Op,
+ }
+ 
+ static bool isAddCarryChain(SDValue Carry) {
+-  while (Carry.getOpcode() == ISD::UADDO_CARRY)
++  while (Carry.getOpcode() == ISD::UADDO_CARRY &&
++         Carry->getValueType(0) != MVT::i128)
+     Carry = Carry.getOperand(2);
+-  return Carry.getOpcode() == ISD::UADDO;
++  return Carry.getOpcode() == ISD::UADDO &&
++         Carry->getValueType(0) != MVT::i128;
+ }
+ 
+ static bool isSubBorrowChain(SDValue Carry) {
+-  while (Carry.getOpcode() == ISD::USUBO_CARRY)
++  while (Carry.getOpcode() == ISD::USUBO_CARRY &&
++         Carry->getValueType(0) != MVT::i128)
+     Carry = Carry.getOperand(2);
+-  return Carry.getOpcode() == ISD::USUBO;
++  return Carry.getOpcode() == ISD::USUBO &&
++         Carry->getValueType(0) != MVT::i128;
+ }
+ 
+ // Lower UADDO_CARRY/USUBO_CARRY nodes.
+diff --git a/llvm/test/CodeGen/SystemZ/pr124001.ll b/llvm/test/CodeGen/SystemZ/pr124001.ll
+new file mode 100644
+index 000000000000..9cf630a55dd6
+--- /dev/null
++++ b/llvm/test/CodeGen/SystemZ/pr124001.ll
+@@ -0,0 +1,23 @@
++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
++; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
++
++define i64 @test(i128 %in) {
++; CHECK-LABEL: test:
++; CHECK:       # %bb.0:
++; CHECK-NEXT:    larl %r1, .LCPI0_0
++; CHECK-NEXT:    vl %v0, 0(%r2), 3
++; CHECK-NEXT:    vl %v1, 0(%r1), 3
++; CHECK-NEXT:    vaccq %v0, %v0, %v1
++; CHECK-NEXT:    vlgvg %r1, %v0, 1
++; CHECK-NEXT:    la %r2, 1(%r1)
++; CHECK-NEXT:    br %r14
++  %1 = tail call { i128, i1 } @llvm.uadd.with.overflow.i128(i128 %in, i128 1)
++  %2 = extractvalue { i128, i1 } %1, 1
++  %3 = zext i1 %2 to i64
++  %4 = add i64 %3, 1
++  ret i64 %4
++}
++
++declare { i128, i1 } @llvm.uadd.with.overflow.i128(i128, i128) #0
++
++attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+-- 
+2.48.1
+

0001-cmake-Resolve-symlink-when-finding-install-prefix.patch

@@ -0,0 +1,39 @@
+From 06774eb8a7dc0bc36b59e53310c7f5b5d89f6c29 Mon Sep 17 00:00:00 2001
+From: Nikita Popov <npopov@redhat.com>
+Date: Tue, 28 Jan 2025 12:31:49 +0100
+Subject: [PATCH] [cmake] Resolve symlink when finding install prefix
+
+When determining the install prefix in LLVMConfig.cmake etc resolve
+symlinks in CMAKE_CURRENT_LIST_FILE first. The motivation for this
+is to support symlinks like `/usr/lib64/cmake/llvm` to
+`/usr/lib64/llvm19/lib/cmake/llvm`. This only works correctly if
+the paths are relative to the resolved symlink.
+
+It's worth noting that this *mostly* already works out of the box,
+because cmake automatically does the symlink resolution when the
+library is found via CMAKE_PREFIX_PATH. It just doesn't happen
+when it's found via the default prefix path.
+---
+ cmake/Modules/FindPrefixFromConfig.cmake | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/cmake/Modules/FindPrefixFromConfig.cmake b/cmake/Modules/FindPrefixFromConfig.cmake
+index 22211e4b72f2..3daff607ff84 100644
+--- a/cmake/Modules/FindPrefixFromConfig.cmake
++++ b/cmake/Modules/FindPrefixFromConfig.cmake
+@@ -39,10 +39,10 @@ function(find_prefix_from_config out_var prefix_var path_to_leave)
+     # install prefix, and avoid hard-coding any absolute paths.
+     set(config_code
+       "# Compute the installation prefix from this LLVMConfig.cmake file location."
+-      "get_filename_component(${prefix_var} \"\${CMAKE_CURRENT_LIST_FILE}\" PATH)")
++      "get_filename_component(${prefix_var} \"\${CMAKE_CURRENT_LIST_FILE}\" REALPATH)")
+     # Construct the proper number of get_filename_component(... PATH)
+     # calls to compute the installation prefix.
+-    string(REGEX REPLACE "/" ";" _count "${path_to_leave}")
++    string(REGEX REPLACE "/" ";" _count "${path_to_leave}/plus_one")
+     foreach(p ${_count})
+       list(APPEND config_code
+         "get_filename_component(${prefix_var} \"\${${prefix_var}}\" PATH)")
+-- 
+2.48.1
+

0001-sanitizer_common-Disable-termio-ioctls-on-PowerPC.patch

@@ -0,0 +1,51 @@
+From be7b1ef7c8e58b454e20f7f70d0e316528e2c823 Mon Sep 17 00:00:00 2001
+From: Tom Stellard <tstellar@redhat.com>
+Date: Tue, 29 Apr 2025 21:35:57 +0000
+Subject: [PATCH] [sanitizer_common] Disable termio ioctls on PowerPC
+
+glibc-2.42 removed the termio.h header, but there are refrences to it
+still in the kernel's ioctl.h, so we need disable these ioctls to fix
+this build.
+---
+ .../sanitizer_platform_limits_posix.cpp            | 14 +++++++++++---
+ 1 file changed, 11 insertions(+), 3 deletions(-)
+
+diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp b/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
+index 7a89bf1c7498..7b81951f82ae 100644
+--- a/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
++++ b/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
+@@ -182,6 +182,12 @@ typedef struct user_fpregs elf_fpregset_t;
+ #include <sys/ioctl.h>
+ #endif
+ 
++// Work around struct termio usage in ioctl.h on ppc64le.
++#if SANITIZER_GLIBC && !__has_include(<termio.h>) &&  defined(__powerpc64__)
++  #define DISABLE_TERMIO_IOCTLS 1
++#endif
++
++
+ // Include these after system headers to avoid name clashes and ambiguities.
+ #  include "sanitizer_common.h"
+ #  include "sanitizer_internal_defs.h"
+@@ -779,13 +785,15 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
+   unsigned IOCTL_SOUND_PCM_WRITE_FILTER = SOUND_PCM_WRITE_FILTER;
+ #endif // SOUND_VERSION
+   unsigned IOCTL_TCFLSH = TCFLSH;
++#if !defined(DISABLE_TERMIO_IOCTLS)
+   unsigned IOCTL_TCGETA = TCGETA;
+-  unsigned IOCTL_TCGETS = TCGETS;
+-  unsigned IOCTL_TCSBRK = TCSBRK;
+-  unsigned IOCTL_TCSBRKP = TCSBRKP;
+   unsigned IOCTL_TCSETA = TCSETA;
+   unsigned IOCTL_TCSETAF = TCSETAF;
+   unsigned IOCTL_TCSETAW = TCSETAW;
++#endif
++  unsigned IOCTL_TCGETS = TCGETS;
++  unsigned IOCTL_TCSBRK = TCSBRK;
++  unsigned IOCTL_TCSBRKP = TCSBRKP;
+   unsigned IOCTL_TCSETS = TCSETS;
+   unsigned IOCTL_TCSETSF = TCSETSF;
+   unsigned IOCTL_TCSETSW = TCSETSW;
+-- 
+2.48.1
+

0001-sanitizer_common-Disable-termio-ioctls-on-PowerPC.patch.20

@@ -0,0 +1,56 @@
+From 1e49835cc5737b2dffff5923e09546b70a54f90d Mon Sep 17 00:00:00 2001
+From: Tom Stellard <tstellar@redhat.com>
+Date: Tue, 29 Apr 2025 21:35:57 +0000
+Subject: [PATCH] [sanitizer_common] Disable termio ioctls on PowerPC
+
+glibc-2.42 removed the termio.h header, but there are refrences to it
+still in the kernel's ioctl.h, so we need disable these ioctls to fix
+this build.
+---
+ .../sanitizer_platform_limits_posix.cpp       | 19 ++++++++++++++++---
+ 1 file changed, 16 insertions(+), 3 deletions(-)
+
+diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp b/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
+index 10b6535499de..303c82783528 100644
+--- a/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
++++ b/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
+@@ -173,6 +173,17 @@ typedef struct user_fpregs elf_fpregset_t;
+ #include <sys/sockio.h>
+ #endif
+ 
++#if SANITIZER_HAIKU
++#include <sys/sockio.h>
++#include <sys/ioctl.h>
++#endif
++
++// Work around struct termio usage in ioctl.h on ppc64le.
++#if SANITIZER_GLIBC && !__has_include(<termio.h>) &&  defined(__powerpc64__)
++  #define DISABLE_TERMIO_IOCTLS 1
++#endif
++
++
+ // Include these after system headers to avoid name clashes and ambiguities.
+ #  include "sanitizer_common.h"
+ #  include "sanitizer_internal_defs.h"
+@@ -764,13 +775,15 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
+   unsigned IOCTL_SOUND_PCM_WRITE_FILTER = SOUND_PCM_WRITE_FILTER;
+ #endif // SOUND_VERSION
+   unsigned IOCTL_TCFLSH = TCFLSH;
++#if !defined(DISABLE_TERMIO_IOCTLS)
+   unsigned IOCTL_TCGETA = TCGETA;
+-  unsigned IOCTL_TCGETS = TCGETS;
+-  unsigned IOCTL_TCSBRK = TCSBRK;
+-  unsigned IOCTL_TCSBRKP = TCSBRKP;
+   unsigned IOCTL_TCSETA = TCSETA;
+   unsigned IOCTL_TCSETAF = TCSETAF;
+   unsigned IOCTL_TCSETAW = TCSETAW;
++#endif
++  unsigned IOCTL_TCGETS = TCGETS;
++  unsigned IOCTL_TCSBRK = TCSBRK;
++  unsigned IOCTL_TCSBRKP = TCSBRKP;
+   unsigned IOCTL_TCSETS = TCSETS;
+   unsigned IOCTL_TCSETSF = TCSETSF;
+   unsigned IOCTL_TCSETSW = TCSETSW;
+-- 
+2.48.1
+

20-131099.patch

@@ -0,0 +1,28 @@
+From e43271ec7438ecb78f99db134aeca274a47f6c28 Mon Sep 17 00:00:00 2001
+From: Konrad Kleine <kkleine@redhat.com>
+Date: Thu, 13 Mar 2025 09:12:24 +0100
+Subject: [PATCH] Filter out configuration file from compile commands
+
+The commands to run the compilation when printed with `-###` contain
+various irrelevant lines for the perf-training. Most of them are
+filtered out already but when configured with
+`CLANG_CONFIG_FILE_SYSTEM_DIR` a new line like the following is
+added and needs to be filtered out:
+
+`Configuration file: /etc/clang/x86_64-redhat-linux-gnu-clang.cfg`
+---
+ clang/utils/perf-training/perf-helper.py | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/clang/utils/perf-training/perf-helper.py b/clang/utils/perf-training/perf-helper.py
+index 80c6356d0497c..29904aded5ab0 100644
+--- a/clang/utils/perf-training/perf-helper.py
++++ b/clang/utils/perf-training/perf-helper.py
+@@ -237,6 +237,7 @@ def get_cc1_command_for_args(cmd, env):
+             or ln.startswith("InstalledDir:")
+             or ln.startswith("LLVM Profile Note")
+             or ln.startswith(" (in-process)")
++            or ln.startswith("Configuration file:")
+             or " version " in ln
+         ):
+             continue

446.patch

@@ -0,0 +1,235 @@
+From 595c2a20d256bf8e3b2ac8687c0029b42e64878d Mon Sep 17 00:00:00 2001
+From: Nikita Popov <npopov@redhat.com>
+Date: Jun 13 2025 08:46:26 +0000
+Subject: Invert symlink direction
+
+
+This is an alternative to:
+https://src.fedoraproject.org/rpms/llvm/pull-request/439.
+
+Instead of undoing the prefix change completely, this instead inverts
+the direction of the symlinks: The non-compat package ships all the
+files in the default prefix, but has symlinks from the versioned
+prefix to the default prefix.
+
+The implementation approach is to install everything into the
+versioned prefix first (keeping things unified between compat and
+non-compat build initially) and to then move and symlink in
+post-processing.
+
+The llvm-config setup here stays the same as it currently is,
+with llvm-config executables being installed in the versioned
+prefix, while the one in the default prefix is managed by
+alternatives. This patch does not fix the issues with alternatives
+handling, we'd apply https://src.fedoraproject.org/rpms/llvm/pull-request/417
+on top of this patch for that.
+
+Fixes https://bugzilla.redhat.com/show_bug.cgi?id=2365079.
+
+---
+
+diff --git a/Makefile b/Makefile
+index ced0465..242e15d 100644
+--- a/Makefile
++++ b/Makefile
+@@ -4,7 +4,7 @@
+ # Tweak this to centos-stream-9-x86_64 to build for CentOS
+ MOCK_CHROOT?=fedora-rawhide-x86_64
+ MOCK_OPTS?=
+-MOCK_OPTS_RELEASE?=--no-clean --no-cleanup-after --without lto_build --define "debug_package %{nil}" $(MOCK_OPTS)
++MOCK_OPTS_RELEASE?=--no-clean --no-cleanup-after --without lto_build --without pgo --define "debug_package %{nil}" $(MOCK_OPTS)
+ MOCK_OPTS_SNAPSHOT?=$(MOCK_OPTS_RELEASE) --with snapshot_build $(MOCK_OPTS)
+ YYYYMMDD?=$(shell date +%Y%m%d)
+ SOURCEDIR=$(shell pwd)
+diff --git a/llvm.spec b/llvm.spec
+index 9d9e5d7..dcdef08 100644
+--- a/llvm.spec
++++ b/llvm.spec
+@@ -316,7 +316,7 @@
+ #region main package
+ Name:		%{pkg_name_llvm}
+ Version:	%{maj_ver}.%{min_ver}.%{patch_ver}%{?rc_ver:~rc%{rc_ver}}%{?llvm_snapshot_version_suffix:~%{llvm_snapshot_version_suffix}}
+-Release:	7%{?dist}
++Release:	8%{?dist}
+ Summary:	The Low Level Virtual Machine
+ 
+ License:	Apache-2.0 WITH LLVM-exception OR NCSA
+@@ -1330,8 +1330,15 @@ popd
+ 	-DCLANG_INCLUDE_TESTS:BOOL=ON \\\
+ 	-DCLANG_PLUGIN_SUPPORT:BOOL=ON \\\
+ 	-DCLANG_REPOSITORY_STRING="%{?dist_vendor} %{version}-%{release}" \\\
+-	-DLLVM_EXTERNAL_CLANG_TOOLS_EXTRA_SOURCE_DIR=../clang-tools-extra \\\
++	-DLLVM_EXTERNAL_CLANG_TOOLS_EXTRA_SOURCE_DIR=../clang-tools-extra
++
++%if %{with compat_build}
++%global cmake_config_args %{cmake_config_args} \\\
+ 	-DCLANG_RESOURCE_DIR=../../../lib/clang/%{maj_ver}
++%else
++%global cmake_config_args %{cmake_config_args} \\\
++	-DCLANG_RESOURCE_DIR=../lib/clang/%{maj_ver}
++%endif
+ #endregion clang options
+ 
+ #region compiler-rt options
+@@ -1938,8 +1945,12 @@ rm -Rvf %{buildroot}%{install_datadir}/clang-doc
+ # TODO: What are the Fedora guidelines for packaging bash autocomplete files?
+ rm -vf %{buildroot}%{install_datadir}/clang/bash-autocomplete.sh
+ 
+-# Create sub-directories in the clang resource directory that will be
+-# populated by other packages
++%if %{without compat_build}
++# Move clang resource directory to default prefix.
++mkdir -p %{buildroot}%{_prefix}/lib/clang
++mv %{buildroot}%{install_prefix}/lib/clang/%{maj_ver} %{buildroot}%{_prefix}/lib/clang/%{maj_ver}
++%endif
++# Create any missing sub-directories in the clang resource directory.
+ mkdir -p %{buildroot}%{_prefix}/lib/clang/%{maj_ver}/{bin,include,lib,share}/
+ 
+ # Add versioned resource directory macro
+@@ -2025,7 +2036,7 @@ rmdir %{buildroot}%{install_prefix}/%{_lib}/python%{python3_version}
+ 
+ # python: fix binary libraries location
+ liblldb=$(basename $(readlink -e %{buildroot}%{install_libdir}/liblldb.so))
+-ln -vsf "../../../llvm%{maj_ver}/lib/${liblldb}" %{buildroot}%{python3_sitearch}/lldb/_lldb.so
++ln -vsf "../../../${liblldb}" %{buildroot}%{python3_sitearch}/lldb/_lldb.so
+ %py_byte_compile %{__python3} %{buildroot}%{python3_sitearch}/lldb
+ %endif
+ %endif
+@@ -2066,62 +2077,69 @@ popd
+ rm -f %{buildroot}%{install_libdir}/libLLVMBOLT*.a
+ #endregion BOLT installation
+ 
+-# Create symlinks from the system install prefix to the llvm install prefix.
++# Move files from src to dest and replace the old files in src with relative
++# symlinks.
++move_and_replace_with_symlinks() {
++    local src="$1"
++    local dest="$2"
++    mkdir -p "$dest"
++
++    # Change to source directory to simplify relative paths
++    (cd "$src" && \
++        find * -type d -exec mkdir -p "$dest/{}" \; && \
++        find * \( -type f -o -type l \) -exec mv "$src/{}" "$dest/{}" \; \
++             -exec ln -s --relative "$dest/{}" "$src/{}" \;)
++}
++
++%if %{without compat_build}
++# Move files from the llvm prefix to the system prefix and replace them with
++# symlinks. We do it this way around because symlinks between multilib packages
++# would conflict otherwise.
++move_and_replace_with_symlinks %{buildroot}%{install_bindir} %{buildroot}%{_bindir}
++move_and_replace_with_symlinks %{buildroot}%{install_libdir} %{buildroot}%{_libdir}
++move_and_replace_with_symlinks %{buildroot}%{install_libexecdir} %{buildroot}%{_libexecdir}
++move_and_replace_with_symlinks %{buildroot}%{install_includedir} %{buildroot}%{_includedir}
++move_and_replace_with_symlinks %{buildroot}%{install_datadir} %{buildroot}%{_datadir}
++%endif
++
++# Create versioned symlinks for binaries.
+ # Do this at the end so it includes any files added by preceding steps.
+ mkdir -p %{buildroot}%{_bindir}
+ for f in %{buildroot}%{install_bindir}/*; do
+   filename=`basename $f`
+-  if [[ "$filename" == "clang-%{maj_ver}" ]]; then
++  if [[ "$filename" =~ ^(lit|ld|clang-%{maj_ver})$ ]]; then
+     continue
+   fi
+-  # Add symlink for binaries with version suffix.
+-  ln -s ../../%{install_bindir}/$filename %{buildroot}/%{_bindir}/$filename-%{maj_ver}
+-  # For non-compat builds, also add a symlink without version suffix.
+-  %if %{without compat_build}
+-    ln -s ../../%{install_bindir}/$filename %{buildroot}/%{_bindir}/$filename
++  %if %{with compat_build}
++    ln -s ../../%{install_bindir}/$filename %{buildroot}/%{_bindir}/$filename-%{maj_ver}
++  %else
++    # clang-NN is already created by the build system.
++    if [[ "$filename" == "clang" ]]; then
++      continue
++    fi
++    ln -s $filename %{buildroot}/%{_bindir}/$filename-%{maj_ver}
+   %endif
+ done
+ 
+-# Move man pages to system install prefix.
+ mkdir -p %{buildroot}%{_mandir}/man1
+ for f in %{buildroot}%{install_mandir}/man1/*; do
+   filename=`basename $f`
+   filename=${filename%.1}
+-  mv $f %{buildroot}%{_mandir}/man1/$filename-%{maj_ver}.1
+-  %if %{without compat_build}
+-    ln -s $filename-%{maj_ver}.1 %{buildroot}%{_mandir}/man1/$filename.1
++  %if %{with compat_build}
++    # Move man pages to system install prefix.
++    mv $f %{buildroot}%{_mandir}/man1/$filename-%{maj_ver}.1
++  %else
++    # Create suffixed symlink.
++    ln -s $filename.1 %{buildroot}%{_mandir}/man1/$filename-%{maj_ver}.1
+   %endif
+ done
+-rmdir %{buildroot}%{install_mandir}/man1
+-rmdir %{buildroot}%{install_mandir}
++rm -rf %{buildroot}%{install_mandir}
+ 
++# As an exception, always keep llvm-config in the versioned prefix.
++# The llvm-config in the default prefix will be managed by alternatives.
+ %if %{without compat_build}
+-# We don't create directory symlinks, because RPM does not support
+-# switching between a directory and a symlink, causing upgrade/downgrade issues.
+-# Instead, recursively copy the directories while creating symlinks.
+-copy_with_relative_symlinks() {
+-    local src="$1"
+-    local dest="$2"
+-    mkdir -p "$dest"
+-
+-    # Change to source directory to simplify relative paths
+-    (cd "$src" && \
+-        find * -type d -exec mkdir -p "$dest/{}" \; && \
+-        find * \( -type f -o -type l \) -exec ln -s --relative "$src/{}" "$dest/{}" \;)
+-}
+-
+-# Add symlinks for libraries.
+-copy_with_relative_symlinks %{buildroot}%{install_libdir} %{buildroot}%{_libdir}
+-copy_with_relative_symlinks %{buildroot}%{install_libexecdir} %{buildroot}%{_libexecdir}
+-copy_with_relative_symlinks %{buildroot}%{install_includedir} %{buildroot}%{_includedir}
+-copy_with_relative_symlinks %{buildroot}%{install_datadir} %{buildroot}%{_datadir}
+-
+-%if %{maj_ver} >= 21 && %{with offload}
+-# Remove offload libaries since we only want to ship these in the configured
+-# install prefix.
+-rm -Rf %{buildroot}%{_libdir}/amdgcn-amd-amdhsa
+-rm -Rf %{buildroot}%{_libdir}/nvptx64-nvidia-cuda
+-%endif
++rm %{buildroot}%{install_bindir}/llvm-config
++mv %{buildroot}%{_bindir}/llvm-config %{buildroot}%{install_bindir}/llvm-config
+ %endif
+ 
+ # ghost presence for llvm-config, managed by alternatives.
+@@ -3164,10 +3182,12 @@ fi
+     libomptarget-nvptx*.bc
+ }}
+ %else
+-%{install_libdir}/amdgcn-amd-amdhsa/libompdevice.a
+-%{install_libdir}/amdgcn-amd-amdhsa/libomptarget-amdgpu.bc
+-%{install_libdir}/nvptx64-nvidia-cuda/libompdevice.a
+-%{install_libdir}/nvptx64-nvidia-cuda/libomptarget-nvptx.bc
++%{expand_libs %{expand:
++    amdgcn-amd-amdhsa/libompdevice.a
++    amdgcn-amd-amdhsa/libomptarget-amdgpu.bc
++    nvptx64-nvidia-cuda/libompdevice.a
++    nvptx64-nvidia-cuda/libomptarget-nvptx.bc
++}}
+ %endif
+ 
+ %expand_includes offload
+@@ -3403,6 +3423,10 @@ fi
+ 
+ #region changelog
+ %changelog
++* Tue Jun 10 2025 Nikita Popov <npopov@redhat.com> - 20.1.6-8
++- Invert symlink direction
++- Fix i686 multilib installation (rhbz#2365079)
++
+ * Thu Jun 05 2025 Timm Bäder <tbaeder@redhat.com> - 20.1.6-7
+ - Backport patch to fix rhbz#2363895
+ 
+

SOURCES/0001-18-Always-build-shared-libs-for-LLD.patch

@@ -1,29 +0,0 @@
-From b1c60d7fa322a2d208556087df9e7ef94bfbffb8 Mon Sep 17 00:00:00 2001
-From: Nikita Popov <npopov@redhat.com>
-Date: Wed, 8 May 2024 12:30:36 +0900
-Subject: [PATCH] Always build shared libs for LLD
-
-We don't want to enable BUILD_SHARED_LIBS for the whole build,
-but we do want to build lld libraries.
----
- lld/cmake/modules/AddLLD.cmake | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/lld/cmake/modules/AddLLD.cmake b/lld/cmake/modules/AddLLD.cmake
-index 2ee066b41535..270c03f096ac 100644
---- a/lld/cmake/modules/AddLLD.cmake
-+++ b/lld/cmake/modules/AddLLD.cmake
-@@ -7,9 +7,8 @@ macro(add_lld_library name)
-     ""
-     ""
-     ${ARGN})
--  if(ARG_SHARED)
--    set(ARG_ENABLE_SHARED SHARED)
--  endif()
-+  # Always build shared libs for LLD.
-+  set(ARG_ENABLE_SHARED SHARED)
-   llvm_add_library(${name} ${ARG_ENABLE_SHARED} ${ARG_UNPARSED_ARGUMENTS})
-   set_target_properties(${name} PROPERTIES FOLDER "lld libraries")
- 
--- 
-2.44.0

SOURCES/0001-openmp-Add-option-to-disable-tsan-tests-111548.patch

@@ -1,62 +0,0 @@
-From b2edeb58b8cb3268acee425cd52b406eb60a8095 Mon Sep 17 00:00:00 2001
-From: Nikita Popov <npopov@redhat.com>
-Date: Wed, 9 Oct 2024 11:29:30 +0200
-Subject: [PATCH] [openmp] Add option to disable tsan tests (#111548)
-
-This adds a OPENMP_TEST_ENABLE_TSAN option that allows to override
-whether tests using tsan will be enabled. The option defaults to the
-existing auto-detection.
-
-The background here is
-https://github.com/llvm/llvm-project/issues/111492, where we have some
-systems where tsan doesn't work, but we do still want to build it and
-run tests that don't use tsan.
----
- openmp/cmake/OpenMPTesting.cmake          | 3 +++
- openmp/tools/archer/tests/CMakeLists.txt  | 2 +-
- openmp/tools/archer/tests/lit.site.cfg.in | 2 +-
- 3 files changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/openmp/cmake/OpenMPTesting.cmake b/openmp/cmake/OpenMPTesting.cmake
-index c67ad8b1cbd9..14cc5c67d84c 100644
---- a/openmp/cmake/OpenMPTesting.cmake
-+++ b/openmp/cmake/OpenMPTesting.cmake
-@@ -163,6 +163,9 @@ else()
-   set(OPENMP_TEST_COMPILER_HAS_OMIT_FRAME_POINTER_FLAGS 1)
- endif()
- 
-+set(OPENMP_TEST_ENABLE_TSAN "${OPENMP_TEST_COMPILER_HAS_TSAN_FLAGS}" CACHE BOOL
-+    "Whether to enable tests using tsan")
-+
- # Function to set compiler features for use in lit.
- function(update_test_compiler_features)
-   set(FEATURES "[")
-diff --git a/openmp/tools/archer/tests/CMakeLists.txt b/openmp/tools/archer/tests/CMakeLists.txt
-index 5de91148fa4b..412c7d63725e 100644
---- a/openmp/tools/archer/tests/CMakeLists.txt
-+++ b/openmp/tools/archer/tests/CMakeLists.txt
-@@ -28,7 +28,7 @@ macro(pythonize_bool var)
- endmacro()
- 
- pythonize_bool(LIBARCHER_HAVE_LIBATOMIC)
--pythonize_bool(OPENMP_TEST_COMPILER_HAS_TSAN_FLAGS)
-+pythonize_bool(OPENMP_TEST_ENABLE_TSAN)
- 
- set(ARCHER_TSAN_TEST_DEPENDENCE "")
- if(TARGET tsan)
-diff --git a/openmp/tools/archer/tests/lit.site.cfg.in b/openmp/tools/archer/tests/lit.site.cfg.in
-index 55edfde9738e..ddcb7b8bc3a5 100644
---- a/openmp/tools/archer/tests/lit.site.cfg.in
-+++ b/openmp/tools/archer/tests/lit.site.cfg.in
-@@ -12,7 +12,7 @@ config.omp_library_dir = "@LIBOMP_LIBRARY_DIR@"
- config.omp_header_dir = "@LIBOMP_INCLUDE_DIR@"
- config.operating_system = "@CMAKE_SYSTEM_NAME@"
- config.has_libatomic = @LIBARCHER_HAVE_LIBATOMIC@
--config.has_tsan = @OPENMP_TEST_COMPILER_HAS_TSAN_FLAGS@
-+config.has_tsan = @OPENMP_TEST_ENABLE_TSAN@
- 
- config.test_archer_flags = "@LIBARCHER_TEST_FLAGS@"
- config.libarcher_obj_root = "@CMAKE_CURRENT_BINARY_DIR@"
--- 
-2.46.0
-

SOURCES/0001-openmp-Use-core_siblings_list-if-physical_package_id.patch

@@ -1,205 +0,0 @@
-From 5fb4d7f6079a76b2907ccc8c53c7c509c30a3dca Mon Sep 17 00:00:00 2001
-From: Nikita Popov <npopov@redhat.com>
-Date: Thu, 10 Oct 2024 12:47:33 +0000
-Subject: [PATCH] [openmp] Use core_siblings_list if physical_package_id not
- available
-
-On powerpc, physical_package_id may not be available. Currently,
-this causes openmp to fall back to flat topology and various
-affinity tests fail.
-
-Fix this by parsing core_siblings_list to deterimine which cpus
-belong to the same socket. This matches what the testing code
-does. The code to parse the CPU list format thankfully already
-exists.
-
-Fixes https://github.com/llvm/llvm-project/issues/111809.
----
- openmp/runtime/src/kmp_affinity.cpp          | 100 +++++++++++++------
- openmp/runtime/test/affinity/kmp-hw-subset.c |   2 +-
- 2 files changed, 72 insertions(+), 30 deletions(-)
-
-diff --git a/openmp/runtime/src/kmp_affinity.cpp b/openmp/runtime/src/kmp_affinity.cpp
-index cf5cad04eb57..c3d5ecf1345e 100644
---- a/openmp/runtime/src/kmp_affinity.cpp
-+++ b/openmp/runtime/src/kmp_affinity.cpp
-@@ -1589,15 +1589,13 @@ kmp_str_buf_t *__kmp_affinity_str_buf_mask(kmp_str_buf_t *buf,
-   return buf;
- }
- 
--// Return (possibly empty) affinity mask representing the offline CPUs
--// Caller must free the mask
--kmp_affin_mask_t *__kmp_affinity_get_offline_cpus() {
--  kmp_affin_mask_t *offline;
--  KMP_CPU_ALLOC(offline);
--  KMP_CPU_ZERO(offline);
-+static kmp_affin_mask_t *__kmp_parse_cpu_list(const char *path) {
-+  kmp_affin_mask_t *mask;
-+  KMP_CPU_ALLOC(mask);
-+  KMP_CPU_ZERO(mask);
- #if KMP_OS_LINUX
-   int n, begin_cpu, end_cpu;
--  kmp_safe_raii_file_t offline_file;
-+  kmp_safe_raii_file_t file;
-   auto skip_ws = [](FILE *f) {
-     int c;
-     do {
-@@ -1606,29 +1604,29 @@ kmp_affin_mask_t *__kmp_affinity_get_offline_cpus() {
-     if (c != EOF)
-       ungetc(c, f);
-   };
--  // File contains CSV of integer ranges representing the offline CPUs
-+  // File contains CSV of integer ranges representing the CPUs
-   // e.g., 1,2,4-7,9,11-15
--  int status = offline_file.try_open("/sys/devices/system/cpu/offline", "r");
-+  int status = file.try_open(path, "r");
-   if (status != 0)
--    return offline;
--  while (!feof(offline_file)) {
--    skip_ws(offline_file);
--    n = fscanf(offline_file, "%d", &begin_cpu);
-+    return mask;
-+  while (!feof(file)) {
-+    skip_ws(file);
-+    n = fscanf(file, "%d", &begin_cpu);
-     if (n != 1)
-       break;
--    skip_ws(offline_file);
--    int c = fgetc(offline_file);
-+    skip_ws(file);
-+    int c = fgetc(file);
-     if (c == EOF || c == ',') {
-       // Just single CPU
-       end_cpu = begin_cpu;
-     } else if (c == '-') {
-       // Range of CPUs
--      skip_ws(offline_file);
--      n = fscanf(offline_file, "%d", &end_cpu);
-+      skip_ws(file);
-+      n = fscanf(file, "%d", &end_cpu);
-       if (n != 1)
-         break;
--      skip_ws(offline_file);
--      c = fgetc(offline_file); // skip ','
-+      skip_ws(file);
-+      c = fgetc(file); // skip ','
-     } else {
-       // Syntax problem
-       break;
-@@ -1638,13 +1636,19 @@ kmp_affin_mask_t *__kmp_affinity_get_offline_cpus() {
-         end_cpu >= __kmp_xproc || begin_cpu > end_cpu) {
-       continue;
-     }
--    // Insert [begin_cpu, end_cpu] into offline mask
-+    // Insert [begin_cpu, end_cpu] into mask
-     for (int cpu = begin_cpu; cpu <= end_cpu; ++cpu) {
--      KMP_CPU_SET(cpu, offline);
-+      KMP_CPU_SET(cpu, mask);
-     }
-   }
- #endif
--  return offline;
-+  return mask;
-+}
-+
-+// Return (possibly empty) affinity mask representing the offline CPUs
-+// Caller must free the mask
-+kmp_affin_mask_t *__kmp_affinity_get_offline_cpus() {
-+  return __kmp_parse_cpu_list("/sys/devices/system/cpu/offline");
- }
- 
- // Return the number of available procs
-@@ -3175,6 +3179,37 @@ static inline const char *__kmp_cpuinfo_get_envvar() {
-   return envvar;
- }
- 
-+static bool __kmp_package_id_from_core_siblings_list(unsigned **threadInfo,
-+                                                     unsigned num_avail,
-+                                                     unsigned idx) {
-+  if (!KMP_AFFINITY_CAPABLE())
-+    return false;
-+
-+  char path[256];
-+  KMP_SNPRINTF(path, sizeof(path),
-+               "/sys/devices/system/cpu/cpu%u/topology/core_siblings_list",
-+               threadInfo[idx][osIdIndex]);
-+  kmp_affin_mask_t *siblings = __kmp_parse_cpu_list(path);
-+  for (unsigned i = 0; i < num_avail; ++i) {
-+    unsigned cpu_id = threadInfo[i][osIdIndex];
-+    KMP_ASSERT(cpu_id < __kmp_affin_mask_size * CHAR_BIT);
-+    if (!KMP_CPU_ISSET(cpu_id, siblings))
-+      continue;
-+    if (threadInfo[i][pkgIdIndex] == UINT_MAX) {
-+      // Arbitrarily pick the first index we encounter, it only matters that
-+      // the value is the same for all siblings.
-+      threadInfo[i][pkgIdIndex] = idx;
-+    } else if (threadInfo[i][pkgIdIndex] != idx) {
-+      // Contradictory sibling lists.
-+      KMP_CPU_FREE(siblings);
-+      return false;
-+    }
-+  }
-+  KMP_ASSERT(threadInfo[idx][pkgIdIndex] != UINT_MAX);
-+  KMP_CPU_FREE(siblings);
-+  return true;
-+}
-+
- // Parse /proc/cpuinfo (or an alternate file in the same format) to obtain the
- // affinity map. On AIX, the map is obtained through system SRAD (Scheduler
- // Resource Allocation Domain).
-@@ -3550,18 +3585,13 @@ static bool __kmp_affinity_create_cpuinfo_map(int *line,
-         return false;
-       }
- 
--      // Check for missing fields.  The osId field must be there, and we
--      // currently require that the physical id field is specified, also.
-+      // Check for missing fields.  The osId field must be there. The physical
-+      // id field will be checked later.
-       if (threadInfo[num_avail][osIdIndex] == UINT_MAX) {
-         CLEANUP_THREAD_INFO;
-         *msg_id = kmp_i18n_str_MissingProcField;
-         return false;
-       }
--      if (threadInfo[0][pkgIdIndex] == UINT_MAX) {
--        CLEANUP_THREAD_INFO;
--        *msg_id = kmp_i18n_str_MissingPhysicalIDField;
--        return false;
--      }
- 
-       // Skip this proc if it is not included in the machine model.
-       if (KMP_AFFINITY_CAPABLE() &&
-@@ -3591,6 +3621,18 @@ static bool __kmp_affinity_create_cpuinfo_map(int *line,
-   }
-   *line = 0;
- 
-+  // At least on powerpc, Linux may return -1 for physical_package_id. Try
-+  // to reconstruct topology from core_siblings_list in that case.
-+  for (i = 0; i < num_avail; ++i) {
-+    if (threadInfo[i][pkgIdIndex] == UINT_MAX) {
-+      if (!__kmp_package_id_from_core_siblings_list(threadInfo, num_avail, i)) {
-+        CLEANUP_THREAD_INFO;
-+        *msg_id = kmp_i18n_str_MissingPhysicalIDField;
-+        return false;
-+      }
-+    }
-+  }
-+
- #if KMP_MIC && REDUCE_TEAM_SIZE
-   unsigned teamSize = 0;
- #endif // KMP_MIC && REDUCE_TEAM_SIZE
-diff --git a/openmp/runtime/test/affinity/kmp-hw-subset.c b/openmp/runtime/test/affinity/kmp-hw-subset.c
-index 606fcdfbada9..0b49969bd3b1 100644
---- a/openmp/runtime/test/affinity/kmp-hw-subset.c
-+++ b/openmp/runtime/test/affinity/kmp-hw-subset.c
-@@ -25,7 +25,7 @@ static int compare_hw_subset_places(const place_list_t *openmp_places,
-     expected_per_place = nthreads_per_core;
-   } else {
-     expected_total = nsockets;
--    expected_per_place = ncores_per_socket;
-+    expected_per_place = ncores_per_socket * nthreads_per_core;
-   }
-   if (openmp_places->num_places != expected_total) {
-     fprintf(stderr, "error: KMP_HW_SUBSET did not half each resource layer!\n");
--- 
-2.47.0
-

SOURCES/0001-profile-Use-base-vaddr-for-__llvm_write_binary_ids-n.patch

@@ -1,86 +0,0 @@
-From ccc2b792e57d632bc887b226a4e7f0a8189eab8b Mon Sep 17 00:00:00 2001
-From: Josh Stone <jistone@redhat.com>
-Date: Mon, 4 Nov 2024 16:37:49 -0800
-Subject: [PATCH] [profile] Use base+vaddr for `__llvm_write_binary_ids` note
- pointers
-
-This function is always examining its own ELF headers in memory, but it
-was trying to use conditions between examining files or memory, and it
-wasn't accounting for LOAD offsets at runtime. This is especially bad if
-a loaded segment has additional padding that's not in the file offsets.
-
-Now we do a first scan of the program headers to figure out the runtime
-base address based on `PT_PHDR` and/or `PT_DYNAMIC` (else assume zero),
-similar to libc's `do_start`. Then each `PT_NOTE` pointer is simply the
-base plus the segments's `pt_vaddr`, which includes LOAD offsets.
-
-Fixes #114605
----
- .../lib/profile/InstrProfilingPlatformLinux.c | 40 ++++++++-----------
- 1 file changed, 16 insertions(+), 24 deletions(-)
-
-diff --git a/compiler-rt/lib/profile/InstrProfilingPlatformLinux.c b/compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
-index e2c06d51e0c6..c365129a0768 100644
---- a/compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
-+++ b/compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
-@@ -194,41 +194,33 @@ static int WriteBinaryIds(ProfDataWriter *Writer, const ElfW(Nhdr) * Note,
-  */
- COMPILER_RT_VISIBILITY int __llvm_write_binary_ids(ProfDataWriter *Writer) {
-   extern const ElfW(Ehdr) __ehdr_start __attribute__((visibility("hidden")));
-+  extern ElfW(Dyn) _DYNAMIC[] __attribute__((weak, visibility("hidden")));
-+
-   const ElfW(Ehdr) *ElfHeader = &__ehdr_start;
-   const ElfW(Phdr) *ProgramHeader =
-       (const ElfW(Phdr) *)((uintptr_t)ElfHeader + ElfHeader->e_phoff);
- 
-+  /* Compute the added base address in case of position-independent code. */
-+  uintptr_t Base = 0;
-+  for (uint32_t I = 0; I < ElfHeader->e_phnum; I++) {
-+    if (ProgramHeader[I].p_type == PT_PHDR)
-+      Base = (uintptr_t)ProgramHeader - ProgramHeader[I].p_vaddr;
-+    if (ProgramHeader[I].p_type == PT_DYNAMIC && _DYNAMIC)
-+      Base = (uintptr_t)_DYNAMIC - ProgramHeader[I].p_vaddr;
-+  }
-+
-   int TotalBinaryIdsSize = 0;
--  uint32_t I;
-   /* Iterate through entries in the program header. */
--  for (I = 0; I < ElfHeader->e_phnum; I++) {
-+  for (uint32_t I = 0; I < ElfHeader->e_phnum; I++) {
-     /* Look for the notes segment in program header entries. */
-     if (ProgramHeader[I].p_type != PT_NOTE)
-       continue;
- 
-     /* There can be multiple notes segment, and examine each of them. */
--    const ElfW(Nhdr) * Note;
--    const ElfW(Nhdr) * NotesEnd;
--    /*
--     * When examining notes in file, use p_offset, which is the offset within
--     * the elf file, to find the start of notes.
--     */
--    if (ProgramHeader[I].p_memsz == 0 ||
--        ProgramHeader[I].p_memsz == ProgramHeader[I].p_filesz) {
--      Note = (const ElfW(Nhdr) *)((uintptr_t)ElfHeader +
--                                  ProgramHeader[I].p_offset);
--      NotesEnd = (const ElfW(Nhdr) *)((const char *)(Note) +
--                                      ProgramHeader[I].p_filesz);
--    } else {
--      /*
--       * When examining notes in memory, use p_vaddr, which is the address of
--       * section after loaded to memory, to find the start of notes.
--       */
--      Note =
--          (const ElfW(Nhdr) *)((uintptr_t)ElfHeader + ProgramHeader[I].p_vaddr);
--      NotesEnd =
--          (const ElfW(Nhdr) *)((const char *)(Note) + ProgramHeader[I].p_memsz);
--    }
-+    const ElfW(Nhdr) *Note =
-+        (const ElfW(Nhdr) *)(Base + ProgramHeader[I].p_vaddr);
-+    const ElfW(Nhdr) *NotesEnd =
-+        (const ElfW(Nhdr) *)((const char *)(Note) + ProgramHeader[I].p_memsz);
- 
-     int BinaryIdsSize = WriteBinaryIds(Writer, Note, NotesEnd);
-     if (TotalBinaryIdsSize == -1)
--- 
-2.47.0
-

SOURCES/18-99273.patch

@@ -1,893 +0,0 @@
-From 91052169960477fbc39169c10f9fae3bec732510 Mon Sep 17 00:00:00 2001
-From: Carl Ritson <carl.ritson@amd.com>
-Date: Wed, 17 Jul 2024 15:07:42 +0900
-Subject: [PATCH 1/3] [AMDGPU] Implement workaround for GFX11.5 export priority
-
-On GFX11.5 shaders having completed exports need to execute/wait
-at a lower priority than shaders still executing exports.
-Add code to maintain normal priority of 2 for shaders that export
-and drop to priority 0 after exports.
----
- llvm/lib/Target/AMDGPU/AMDGPU.td              |  15 +-
- .../lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 112 ++++++
- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h  |   1 +
- llvm/lib/Target/AMDGPU/GCNSubtarget.h         |   3 +
- .../AMDGPU/required-export-priority.ll        | 344 ++++++++++++++++++
- .../AMDGPU/required-export-priority.mir       | 293 +++++++++++++++
- 6 files changed, 765 insertions(+), 3 deletions(-)
- create mode 100644 llvm/test/CodeGen/AMDGPU/required-export-priority.ll
- create mode 100644 llvm/test/CodeGen/AMDGPU/required-export-priority.mir
-
-diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
-index dfc8eaea66f7b..14fcf6a210a78 100644
---- a/llvm/lib/Target/AMDGPU/AMDGPU.td
-+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
-@@ -947,6 +947,12 @@ def FeatureHasRestrictedSOffset : SubtargetFeature<"restricted-soffset",
-   "Has restricted SOffset (immediate not supported)."
- >;
- 
-+def FeatureRequiredExportPriority : SubtargetFeature<"required-export-priority",
-+  "HasRequiredExportPriority",
-+  "true",
-+  "Export priority must be explicitly manipulated on GFX11.5"
-+>;
-+
- //===------------------------------------------------------------===//
- // Subtarget Features (options and debugging)
- //===------------------------------------------------------------===//
-@@ -1597,14 +1603,16 @@ def FeatureISAVersion11_5_0 : FeatureSet<
-   !listconcat(FeatureISAVersion11_Common.Features,
-     [FeatureSALUFloatInsts,
-      FeatureDPPSrc1SGPR,
--     FeatureVGPRSingleUseHintInsts])>;
-+     FeatureVGPRSingleUseHintInsts,
-+     FeatureRequiredExportPriority])>;
- 
- def FeatureISAVersion11_5_1 : FeatureSet<
-   !listconcat(FeatureISAVersion11_Common.Features,
-     [FeatureSALUFloatInsts,
-      FeatureDPPSrc1SGPR,
-      FeatureVGPRSingleUseHintInsts,
--     FeatureGFX11FullVGPRs])>;
-+     FeatureGFX11FullVGPRs,
-+     FeatureRequiredExportPriority])>;
- 
- def FeatureISAVersion12 : FeatureSet<
-   [FeatureGFX12,
-diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
-index a402fc6d7e611..a8b171aa82840 100644
---- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
-+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
-@@ -14,6 +14,7 @@
- #include "GCNSubtarget.h"
- #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
- #include "SIMachineFunctionInfo.h"
-+#include "llvm/CodeGen/MachineFrameInfo.h"
- #include "llvm/CodeGen/MachineFunction.h"
- #include "llvm/CodeGen/ScheduleDAG.h"
- #include "llvm/TargetParser/TargetParser.h"
-@@ -1104,6 +1105,7 @@ void GCNHazardRecognizer::fixHazards(MachineInstr *MI) {
-   fixWMMAHazards(MI);
-   fixShift64HighRegBug(MI);
-   fixVALUMaskWriteHazard(MI);
-+  fixRequiredExportPriority(MI);
- }
- 
- bool GCNHazardRecognizer::fixVcmpxPermlaneHazards(MachineInstr *MI) {
-@@ -2895,3 +2897,113 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
- 
-   return true;
- }
-+
-+static bool ensureEntrySetPrio(MachineFunction *MF, int Priority,
-+                               const SIInstrInfo &TII) {
-+  MachineBasicBlock &EntryMBB = MF->front();
-+  if (EntryMBB.begin() != EntryMBB.end()) {
-+    auto &EntryMI = *EntryMBB.begin();
-+    if (EntryMI.getOpcode() == AMDGPU::S_SETPRIO &&
-+        EntryMI.getOperand(0).getImm() >= Priority)
-+      return false;
-+  }
-+
-+  BuildMI(EntryMBB, EntryMBB.begin(), DebugLoc(), TII.get(AMDGPU::S_SETPRIO))
-+      .addImm(Priority);
-+  return true;
-+}
-+
-+bool GCNHazardRecognizer::fixRequiredExportPriority(MachineInstr *MI) {
-+  if (!ST.hasRequiredExportPriority())
-+    return false;
-+
-+  // Assume the following shader types will never have exports,
-+  // and avoid adding or adjusting S_SETPRIO.
-+  MachineBasicBlock *MBB = MI->getParent();
-+  MachineFunction *MF = MBB->getParent();
-+  auto CC = MF->getFunction().getCallingConv();
-+  switch (CC) {
-+  case CallingConv::AMDGPU_CS:
-+  case CallingConv::AMDGPU_CS_Chain:
-+  case CallingConv::AMDGPU_CS_ChainPreserve:
-+  case CallingConv::AMDGPU_KERNEL:
-+    return false;
-+  default:
-+    break;
-+  }
-+
-+  const int MaxPriority = 3;
-+  const int NormalPriority = 2;
-+  const int PostExportPriority = 0;
-+
-+  auto It = MI->getIterator();
-+  switch (MI->getOpcode()) {
-+  case AMDGPU::S_ENDPGM:
-+  case AMDGPU::S_ENDPGM_SAVED:
-+  case AMDGPU::S_ENDPGM_ORDERED_PS_DONE:
-+  case AMDGPU::SI_RETURN_TO_EPILOG:
-+    // Ensure shader with calls raises priority at entry.
-+    // This ensures correct priority if exports exist in callee.
-+    if (MF->getFrameInfo().hasCalls())
-+      return ensureEntrySetPrio(MF, NormalPriority, TII);
-+    return false;
-+  case AMDGPU::S_SETPRIO: {
-+    // Raise minimum priority unless in workaround.
-+    auto &PrioOp = MI->getOperand(0);
-+    int Prio = PrioOp.getImm();
-+    bool InWA = (Prio == PostExportPriority) &&
-+                (It != MBB->begin() && TII.isEXP(*std::prev(It)));
-+    if (InWA || Prio >= NormalPriority)
-+      return false;
-+    PrioOp.setImm(std::min(Prio + NormalPriority, MaxPriority));
-+    return true;
-+  }
-+  default:
-+    if (!TII.isEXP(*MI))
-+      return false;
-+    break;
-+  }
-+
-+  // Check entry priority at each export (as there will only be a few).
-+  // Note: amdgpu_gfx can only be a callee, so defer to caller setprio.
-+  bool Changed = false;
-+  if (CC != CallingConv::AMDGPU_Gfx)
-+    Changed = ensureEntrySetPrio(MF, NormalPriority, TII);
-+
-+  auto NextMI = std::next(It);
-+  bool EndOfShader = false;
-+  if (NextMI != MBB->end()) {
-+    // Only need WA at end of sequence of exports.
-+    if (TII.isEXP(*NextMI))
-+      return Changed;
-+    // Assume appropriate S_SETPRIO after export means WA already applied.
-+    if (NextMI->getOpcode() == AMDGPU::S_SETPRIO &&
-+        NextMI->getOperand(0).getImm() == PostExportPriority)
-+      return Changed;
-+    EndOfShader = NextMI->getOpcode() == AMDGPU::S_ENDPGM;
-+  }
-+
-+  const DebugLoc &DL = MI->getDebugLoc();
-+
-+  // Lower priority.
-+  BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_SETPRIO))
-+      .addImm(PostExportPriority);
-+
-+  if (!EndOfShader) {
-+    // Wait for exports to complete.
-+    BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_WAITCNT_EXPCNT))
-+        .addReg(AMDGPU::SGPR_NULL)
-+        .addImm(0);
-+  }
-+
-+  BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_NOP)).addImm(0);
-+  BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_NOP)).addImm(0);
-+
-+  if (!EndOfShader) {
-+    // Return to normal (higher) priority.
-+    BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_SETPRIO))
-+        .addImm(NormalPriority);
-+  }
-+
-+  return true;
-+}
-diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
-index 3ccca527c626b..f2a64ab48e180 100644
---- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
-+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
-@@ -107,6 +107,7 @@ class GCNHazardRecognizer final : public ScheduleHazardRecognizer {
-   bool fixWMMAHazards(MachineInstr *MI);
-   bool fixShift64HighRegBug(MachineInstr *MI);
-   bool fixVALUMaskWriteHazard(MachineInstr *MI);
-+  bool fixRequiredExportPriority(MachineInstr *MI);
- 
-   int checkMAIHazards(MachineInstr *MI);
-   int checkMAIHazards908(MachineInstr *MI);
-diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
-index e5817594a4521..def89c785b855 100644
---- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
-+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
-@@ -238,6 +238,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
-   bool HasVOPDInsts = false;
-   bool HasVALUTransUseHazard = false;
-   bool HasForceStoreSC0SC1 = false;
-+  bool HasRequiredExportPriority = false;
- 
-   // Dummy feature to use for assembler in tablegen.
-   bool FeatureDisable = false;
-@@ -1282,6 +1283,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
- 
-   bool hasRestrictedSOffset() const { return HasRestrictedSOffset; }
- 
-+  bool hasRequiredExportPriority() const { return HasRequiredExportPriority; }
-+
-   /// \returns true if the target uses LOADcnt/SAMPLEcnt/BVHcnt, DScnt/KMcnt
-   /// and STOREcnt rather than VMcnt, LGKMcnt and VScnt respectively.
-   bool hasExtendedWaitCounts() const { return getGeneration() >= GFX12; }
-diff --git a/llvm/test/CodeGen/AMDGPU/required-export-priority.ll b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
-new file mode 100644
-index 0000000000000..377902f3f0d1a
---- /dev/null
-+++ b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
-@@ -0,0 +1,344 @@
-+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-+; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -amdgpu-enable-vopd=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
-+
-+define amdgpu_ps void @test_export_zeroes_f32() #0 {
-+; GCN-LABEL: test_export_zeroes_f32:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    v_mov_b32_e32 v0, 0
-+; GCN-NEXT:    exp mrt0 off, off, off, off
-+; GCN-NEXT:    exp mrt0 off, off, off, off done
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_endpgm
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 0.0, float 0.0, float 0.0, float 0.0, i1 false, i1 false)
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 0.0, float 0.0, float 0.0, float 0.0, i1 true, i1 false)
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_export_en_src0_f32() #0 {
-+; GCN-LABEL: test_export_en_src0_f32:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
-+; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
-+; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
-+; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
-+; GCN-NEXT:    exp mrt0 v3, off, off, off done
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_endpgm
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 1, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
-+  ret void
-+}
-+
-+define amdgpu_gs void @test_export_gs() #0 {
-+; GCN-LABEL: test_export_gs:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
-+; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
-+; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
-+; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
-+; GCN-NEXT:    exp mrt0 off, v2, off, off done
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_endpgm
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
-+  ret void
-+}
-+
-+define amdgpu_hs void @test_export_hs() #0 {
-+; GCN-LABEL: test_export_hs:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
-+; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
-+; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
-+; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
-+; GCN-NEXT:    exp mrt0 off, v2, off, off done
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_endpgm
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
-+  ret void
-+}
-+
-+define amdgpu_gfx void @test_export_gfx(float %v) #0 {
-+; GCN-LABEL: test_export_gfx:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-+; GCN-NEXT:    v_mov_b32_e32 v1, 4.0
-+; GCN-NEXT:    v_mov_b32_e32 v2, 0.5
-+; GCN-NEXT:    v_mov_b32_e32 v3, 2.0
-+; GCN-NEXT:    exp mrt0 off, v3, off, off done
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    s_waitcnt expcnt(0)
-+; GCN-NEXT:    s_setpc_b64 s[30:31]
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float %v, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
-+  ret void
-+}
-+
-+define amdgpu_cs void @test_export_cs() #0 {
-+; GCN-LABEL: test_export_cs:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
-+; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
-+; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
-+; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
-+; GCN-NEXT:    exp mrt0 off, v2, off, off done
-+; GCN-NEXT:    s_endpgm
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
-+  ret void
-+}
-+
-+define amdgpu_kernel void @test_export_kernel() #0 {
-+; GCN-LABEL: test_export_kernel:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
-+; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
-+; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
-+; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
-+; GCN-NEXT:    exp mrt0 off, v2, off, off done
-+; GCN-NEXT:    s_endpgm
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
-+  ret void
-+}
-+
-+define amdgpu_gfx void @test_no_export_gfx(float %v) #0 {
-+; GCN-LABEL: test_no_export_gfx:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-+; GCN-NEXT:    s_setpc_b64 s[30:31]
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_no_export_ps(float %v) #0 {
-+; GCN-LABEL: test_no_export_ps:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_endpgm
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_if_export_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
-+; GCN-LABEL: test_if_export_f32:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    s_mov_b32 s0, exec_lo
-+; GCN-NEXT:    v_cmpx_ne_u32_e32 0, v0
-+; GCN-NEXT:    s_cbranch_execz .LBB9_2
-+; GCN-NEXT:  ; %bb.1: ; %exp
-+; GCN-NEXT:    exp mrt0 v1, v2, v3, v4
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:  .LBB9_2: ; %end
-+; GCN-NEXT:    s_endpgm
-+  %cc = icmp eq i32 %flag, 0
-+  br i1 %cc, label %end, label %exp
-+
-+exp:
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 false, i1 false)
-+  br label %end
-+
-+end:
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_if_export_vm_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
-+; GCN-LABEL: test_if_export_vm_f32:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    s_mov_b32 s0, exec_lo
-+; GCN-NEXT:    v_cmpx_ne_u32_e32 0, v0
-+; GCN-NEXT:    s_cbranch_execz .LBB10_2
-+; GCN-NEXT:  ; %bb.1: ; %exp
-+; GCN-NEXT:    exp mrt0 v1, v2, v3, v4
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:  .LBB10_2: ; %end
-+; GCN-NEXT:    s_endpgm
-+  %cc = icmp eq i32 %flag, 0
-+  br i1 %cc, label %end, label %exp
-+
-+exp:
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 false, i1 true)
-+  br label %end
-+
-+end:
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_if_export_done_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
-+; GCN-LABEL: test_if_export_done_f32:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    s_mov_b32 s0, exec_lo
-+; GCN-NEXT:    v_cmpx_ne_u32_e32 0, v0
-+; GCN-NEXT:    s_cbranch_execz .LBB11_2
-+; GCN-NEXT:  ; %bb.1: ; %exp
-+; GCN-NEXT:    exp mrt0 v1, v2, v3, v4 done
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:  .LBB11_2: ; %end
-+; GCN-NEXT:    s_endpgm
-+  %cc = icmp eq i32 %flag, 0
-+  br i1 %cc, label %end, label %exp
-+
-+exp:
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 true, i1 false)
-+  br label %end
-+
-+end:
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_if_export_vm_done_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
-+; GCN-LABEL: test_if_export_vm_done_f32:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    s_mov_b32 s0, exec_lo
-+; GCN-NEXT:    v_cmpx_ne_u32_e32 0, v0
-+; GCN-NEXT:    s_cbranch_execz .LBB12_2
-+; GCN-NEXT:  ; %bb.1: ; %exp
-+; GCN-NEXT:    exp mrt0 v1, v2, v3, v4 done
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:  .LBB12_2: ; %end
-+; GCN-NEXT:    s_endpgm
-+  %cc = icmp eq i32 %flag, 0
-+  br i1 %cc, label %end, label %exp
-+
-+exp:
-+  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 true, i1 true)
-+  br label %end
-+
-+end:
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_export_pos_before_param_across_load(i32 %idx) #0 {
-+; GCN-LABEL: test_export_pos_before_param_across_load:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    buffer_load_b32 v0, v0, s[0:3], 0 offen
-+; GCN-NEXT:    v_mov_b32_e32 v1, 0
-+; GCN-NEXT:    v_mov_b32_e32 v2, 1.0
-+; GCN-NEXT:    v_mov_b32_e32 v3, 0.5
-+; GCN-NEXT:    s_waitcnt vmcnt(0)
-+; GCN-NEXT:    exp pos0 v1, v1, v1, v0 done
-+; GCN-NEXT:    exp invalid_target_32 v2, v2, v2, v2
-+; GCN-NEXT:    exp invalid_target_33 v2, v2, v2, v3
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_endpgm
-+  call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float 1.0, float 1.0, float 1.0, float 1.0, i1 false, i1 false)
-+  call void @llvm.amdgcn.exp.f32(i32 33, i32 15, float 1.0, float 1.0, float 1.0, float 0.5, i1 false, i1 false)
-+  %load = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) undef, i32 %idx, i32 0, i32 0)
-+  call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float 0.0, float 0.0, float 0.0, float %load, i1 true, i1 false)
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_export_across_store_load(i32 %idx, float %v) #0 {
-+; GCN-LABEL: test_export_across_store_load:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    v_mov_b32_e32 v2, 24
-+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 1, v0
-+; GCN-NEXT:    s_delay_alu instid0(VALU_DEP_2)
-+; GCN-NEXT:    v_cndmask_b32_e64 v0, v2, 8, vcc_lo
-+; GCN-NEXT:    v_mov_b32_e32 v2, 0
-+; GCN-NEXT:    scratch_store_b32 v0, v1, off
-+; GCN-NEXT:    scratch_load_b32 v0, off, off
-+; GCN-NEXT:    v_mov_b32_e32 v1, 1.0
-+; GCN-NEXT:    exp pos0 v2, v2, v2, v1 done
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    s_waitcnt vmcnt(0)
-+; GCN-NEXT:    exp invalid_target_32 v0, v2, v1, v2
-+; GCN-NEXT:    exp invalid_target_33 v0, v2, v1, v2
-+; GCN-NEXT:    s_setprio 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_nop 0
-+; GCN-NEXT:    s_endpgm
-+  %data0 = alloca <4 x float>, align 8, addrspace(5)
-+  %data1 = alloca <4 x float>, align 8, addrspace(5)
-+  %cmp = icmp eq i32 %idx, 1
-+  %data = select i1 %cmp, ptr addrspace(5) %data0, ptr addrspace(5) %data1
-+  store float %v, ptr addrspace(5) %data, align 8
-+  call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float 0.0, float 0.0, float 0.0, float 1.0, i1 true, i1 false)
-+  %load0 = load float, ptr addrspace(5) %data0, align 8
-+  call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %load0, float 0.0, float 1.0, float 0.0, i1 false, i1 false)
-+  call void @llvm.amdgcn.exp.f32(i32 33, i32 15, float %load0, float 0.0, float 1.0, float 0.0, i1 false, i1 false)
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_export_in_callee(float %v) #0 {
-+; GCN-LABEL: test_export_in_callee:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    s_getpc_b64 s[0:1]
-+; GCN-NEXT:    s_add_u32 s0, s0, test_export_gfx@gotpcrel32@lo+4
-+; GCN-NEXT:    s_addc_u32 s1, s1, test_export_gfx@gotpcrel32@hi+12
-+; GCN-NEXT:    v_add_f32_e32 v0, 1.0, v0
-+; GCN-NEXT:    s_load_b64 s[0:1], s[0:1], 0x0
-+; GCN-NEXT:    s_mov_b32 s32, 0
-+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-+; GCN-NEXT:    s_swappc_b64 s[30:31], s[0:1]
-+; GCN-NEXT:    s_endpgm
-+  %x = fadd float %v, 1.0
-+  call void @test_export_gfx(float %x)
-+  ret void
-+}
-+
-+define amdgpu_ps void @test_export_in_callee_prio(float %v) #0 {
-+; GCN-LABEL: test_export_in_callee_prio:
-+; GCN:       ; %bb.0:
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    s_mov_b32 s32, 0
-+; GCN-NEXT:    v_add_f32_e32 v0, 1.0, v0
-+; GCN-NEXT:    s_setprio 2
-+; GCN-NEXT:    s_getpc_b64 s[0:1]
-+; GCN-NEXT:    s_add_u32 s0, s0, test_export_gfx@gotpcrel32@lo+4
-+; GCN-NEXT:    s_addc_u32 s1, s1, test_export_gfx@gotpcrel32@hi+12
-+; GCN-NEXT:    s_load_b64 s[0:1], s[0:1], 0x0
-+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-+; GCN-NEXT:    s_swappc_b64 s[30:31], s[0:1]
-+; GCN-NEXT:    s_endpgm
-+  %x = fadd float %v, 1.0
-+  call void @llvm.amdgcn.s.setprio(i16 0)
-+  call void @test_export_gfx(float %x)
-+  ret void
-+}
-+
-+declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
-+declare void @llvm.amdgcn.exp.i32(i32, i32, i32, i32, i32, i32, i1, i1) #1
-+declare float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8), i32, i32, i32) #2
-+declare void @llvm.amdgcn.s.setprio(i16)
-+
-+attributes #0 = { nounwind }
-+attributes #1 = { nounwind inaccessiblememonly }
-+attributes #2 = { nounwind readnone }
-diff --git a/llvm/test/CodeGen/AMDGPU/required-export-priority.mir b/llvm/test/CodeGen/AMDGPU/required-export-priority.mir
-new file mode 100644
-index 0000000000000..eee04468036e5
---- /dev/null
-+++ b/llvm/test/CodeGen/AMDGPU/required-export-priority.mir
-@@ -0,0 +1,293 @@
-+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-+# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass=post-RA-hazard-rec -verify-machineinstrs  %s -o - | FileCheck -check-prefixes=GFX1150 %s
-+
-+--- |
-+  define amdgpu_ps void @end_of_shader() {
-+    ret void
-+  }
-+  define amdgpu_ps void @end_of_shader_return_to_epilogue() {
-+    ret void
-+  }
-+  define amdgpu_ps void @end_of_block() {
-+    ret void
-+  }
-+  define amdgpu_ps void @start_of_block() {
-+    ret void
-+  }
-+  define amdgpu_ps void @block_of_exports() {
-+    ret void
-+  }
-+  define amdgpu_ps void @sparse_exports() {
-+    ret void
-+  }
-+  define amdgpu_ps void @existing_setprio_1() {
-+    ret void
-+  }
-+  define amdgpu_ps void @existing_setprio_2() {
-+    ret void
-+  }
-+...
-+
-+---
-+name: end_of_shader
-+tracksRegLiveness: true
-+liveins:
-+  - { reg: '$vgpr0' }
-+body: |
-+  bb.0:
-+    liveins: $vgpr0
-+    ; GFX1150-LABEL: name: end_of_shader
-+    ; GFX1150: liveins: $vgpr0
-+    ; GFX1150-NEXT: {{  $}}
-+    ; GFX1150-NEXT: S_SETPRIO 2
-+    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: S_SETPRIO 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_ENDPGM 0
-+    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    S_ENDPGM 0
-+...
-+
-+---
-+name: end_of_shader_return_to_epilogue
-+tracksRegLiveness: true
-+liveins:
-+  - { reg: '$vgpr0' }
-+body: |
-+  bb.0:
-+    liveins: $vgpr0
-+    ; GFX1150-LABEL: name: end_of_shader_return_to_epilogue
-+    ; GFX1150: liveins: $vgpr0
-+    ; GFX1150-NEXT: {{  $}}
-+    ; GFX1150-NEXT: S_SETPRIO 2
-+    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: S_SETPRIO 0
-+    ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_SETPRIO 2
-+    ; GFX1150-NEXT: SI_RETURN_TO_EPILOG $vgpr0
-+    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    SI_RETURN_TO_EPILOG $vgpr0
-+...
-+
-+---
-+name: end_of_block
-+tracksRegLiveness: true
-+liveins:
-+  - { reg: '$vgpr0' }
-+body: |
-+  ; GFX1150-LABEL: name: end_of_block
-+  ; GFX1150: bb.0:
-+  ; GFX1150-NEXT:   successors: %bb.1(0x80000000)
-+  ; GFX1150-NEXT:   liveins: $vgpr0
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT:   S_SETPRIO 2
-+  ; GFX1150-NEXT:   EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+  ; GFX1150-NEXT:   S_SETPRIO 0
-+  ; GFX1150-NEXT:   S_WAITCNT_EXPCNT $sgpr_null, 0
-+  ; GFX1150-NEXT:   S_NOP 0
-+  ; GFX1150-NEXT:   S_NOP 0
-+  ; GFX1150-NEXT:   S_SETPRIO 2
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT: bb.1:
-+  ; GFX1150-NEXT:   S_ENDPGM 0
-+  bb.0:
-+    liveins: $vgpr0
-+    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+
-+  bb.1:
-+    S_ENDPGM 0
-+...
-+
-+---
-+name: start_of_block
-+tracksRegLiveness: true
-+liveins:
-+  - { reg: '$vgpr0' }
-+body: |
-+  ; GFX1150-LABEL: name: start_of_block
-+  ; GFX1150: bb.0:
-+  ; GFX1150-NEXT:   successors: %bb.1(0x80000000)
-+  ; GFX1150-NEXT:   liveins: $vgpr0
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT:   S_SETPRIO 2
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT: bb.1:
-+  ; GFX1150-NEXT:   successors: %bb.2(0x80000000)
-+  ; GFX1150-NEXT:   liveins: $vgpr0
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT:   EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+  ; GFX1150-NEXT:   S_SETPRIO 0
-+  ; GFX1150-NEXT:   S_WAITCNT_EXPCNT $sgpr_null, 0
-+  ; GFX1150-NEXT:   S_NOP 0
-+  ; GFX1150-NEXT:   S_NOP 0
-+  ; GFX1150-NEXT:   S_SETPRIO 2
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT: bb.2:
-+  ; GFX1150-NEXT:   S_ENDPGM 0
-+  bb.0:
-+    liveins: $vgpr0
-+
-+  bb.1:
-+    liveins: $vgpr0
-+    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+
-+  bb.2:
-+    S_ENDPGM 0
-+...
-+
-+---
-+name: block_of_exports
-+tracksRegLiveness: true
-+liveins:
-+  - { reg: '$vgpr0' }
-+body: |
-+  bb.0:
-+    liveins: $vgpr0
-+    ; GFX1150-LABEL: name: block_of_exports
-+    ; GFX1150: liveins: $vgpr0
-+    ; GFX1150-NEXT: {{  $}}
-+    ; GFX1150-NEXT: S_SETPRIO 2
-+    ; GFX1150-NEXT: EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: S_SETPRIO 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_ENDPGM 0
-+    EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    S_ENDPGM 0
-+...
-+
-+---
-+name: sparse_exports
-+tracksRegLiveness: true
-+liveins:
-+  - { reg: '$vgpr0' }
-+body: |
-+  bb.0:
-+    liveins: $vgpr0
-+    ; GFX1150-LABEL: name: sparse_exports
-+    ; GFX1150: liveins: $vgpr0
-+    ; GFX1150-NEXT: {{  $}}
-+    ; GFX1150-NEXT: S_SETPRIO 2
-+    ; GFX1150-NEXT: EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: S_SETPRIO 0
-+    ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_SETPRIO 2
-+    ; GFX1150-NEXT: $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
-+    ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: S_SETPRIO 0
-+    ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_SETPRIO 2
-+    ; GFX1150-NEXT: $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
-+    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: S_SETPRIO 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_ENDPGM 0
-+    EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
-+    EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
-+    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    S_ENDPGM 0
-+...
-+
-+---
-+name: existing_setprio_1
-+tracksRegLiveness: true
-+liveins:
-+  - { reg: '$vgpr0' }
-+body: |
-+  ; GFX1150-LABEL: name: existing_setprio_1
-+  ; GFX1150: bb.0:
-+  ; GFX1150-NEXT:   successors: %bb.1(0x80000000)
-+  ; GFX1150-NEXT:   liveins: $vgpr0
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT:   S_SETPRIO 2
-+  ; GFX1150-NEXT:   $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT: bb.1:
-+  ; GFX1150-NEXT:   successors: %bb.2(0x80000000)
-+  ; GFX1150-NEXT:   liveins: $vgpr0
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT:   S_SETPRIO 3
-+  ; GFX1150-NEXT:   $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
-+  ; GFX1150-NEXT:   S_SETPRIO 2
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT: bb.2:
-+  ; GFX1150-NEXT:   successors: %bb.3(0x80000000)
-+  ; GFX1150-NEXT:   liveins: $vgpr0
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT:   S_SETPRIO 3
-+  ; GFX1150-NEXT:   $vgpr0 = V_OR_B32_e32 3, $vgpr0, implicit $exec
-+  ; GFX1150-NEXT:   S_SETPRIO 2
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT: bb.3:
-+  ; GFX1150-NEXT:   liveins: $vgpr0
-+  ; GFX1150-NEXT: {{  $}}
-+  ; GFX1150-NEXT:   EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+  ; GFX1150-NEXT:   EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+  ; GFX1150-NEXT:   S_SETPRIO 0
-+  ; GFX1150-NEXT:   S_NOP 0
-+  ; GFX1150-NEXT:   S_NOP 0
-+  ; GFX1150-NEXT:   S_ENDPGM 0
-+  bb.0:
-+    liveins: $vgpr0
-+    $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
-+
-+  bb.1:
-+    liveins: $vgpr0
-+    S_SETPRIO 3
-+    $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
-+    S_SETPRIO 0
-+
-+  bb.2:
-+    liveins: $vgpr0
-+    S_SETPRIO 1
-+    $vgpr0 = V_OR_B32_e32 3, $vgpr0, implicit $exec
-+    S_SETPRIO 0
-+
-+  bb.3:
-+    liveins: $vgpr0
-+    EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    S_ENDPGM 0
-+...
-+
-+---
-+name: existing_setprio_2
-+tracksRegLiveness: true
-+liveins:
-+  - { reg: '$vgpr0' }
-+body: |
-+  bb.0:
-+    liveins: $vgpr0
-+    ; GFX1150-LABEL: name: existing_setprio_2
-+    ; GFX1150: liveins: $vgpr0
-+    ; GFX1150-NEXT: {{  $}}
-+    ; GFX1150-NEXT: S_SETPRIO 3
-+    ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    ; GFX1150-NEXT: S_SETPRIO 0
-+    ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_NOP 0
-+    ; GFX1150-NEXT: S_SETPRIO 2
-+    ; GFX1150-NEXT: S_SETPRIO 3
-+    ; GFX1150-NEXT: S_ENDPGM 0
-+    S_SETPRIO 3
-+    EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
-+    S_SETPRIO 3
-+    S_ENDPGM 0
-+...
-
-From 8ea44e65f2c19facff751aeb2ac960f907fb210f Mon Sep 17 00:00:00 2001
-From: Carl Ritson <carl.ritson@amd.com>
-Date: Wed, 17 Jul 2024 16:18:02 +0900
-Subject: [PATCH 2/3] Remove -verify-machineinstrs from test.
-
----
- llvm/test/CodeGen/AMDGPU/required-export-priority.ll | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/llvm/test/CodeGen/AMDGPU/required-export-priority.ll b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
-index 377902f3f0d1a..ebc209bd4d451 100644
---- a/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
-+++ b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
-@@ -1,5 +1,5 @@
- ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
--; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -amdgpu-enable-vopd=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
-+; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefix=GCN %s
- 
- define amdgpu_ps void @test_export_zeroes_f32() #0 {
- ; GCN-LABEL: test_export_zeroes_f32:

gating.yaml

@@ -0,0 +1,19 @@
+--- !Policy
+product_versions:
+  - fedora-*
+decision_context: bodhi_update_push_testing
+rules:
+  - !PassingTestCaseRule {test_case_name: fedora-ci.koji-build.tier0.functional}
+--- !Policy
+product_versions:
+  - fedora-*
+decision_context: bodhi_update_push_stable
+rules:
+  - !PassingTestCaseRule {test_case_name: fedora-ci.koji-build.tier0.functional}
+--- !Policy
+product_versions:
+  - rhel-9
+decision_context: osci_compose_gate
+rules:
+  - !PassingTestCaseRule {test_case_name: baseos-ci.brew-build.tier0.functional}
+  - !PassingTestCaseRule {test_case_name: osci.brew-build.rebuild.validation}

llvm.rpmlintrc

@@ -0,0 +1,2 @@
+# This library has no dependencies.
+addFilter("llvm-libs.x86_64: E: shared-lib-without-dependency-information /usr/lib64/libRemarks.so.[0-9]+")

sources

@@ -0,0 +1,2 @@
+SHA512 (llvm-project-20.1.7.src.tar.xz) = c2dbf6a468a8152409db7ff52902ecf8768a1d0328e386999f4f3672613903e1c10bddbba66b8553a6222952f8edb66266947f1fb21d0b09ae741e6249b6d1fa
+SHA512 (llvm-project-20.1.7.src.tar.xz.sig) = eff885059d547f57b98bda1fc9631f716ca6c650cd48203d9ed5443a6afb9a2d4d91d3f5c8618e307c0a44b3040bce61fdc6bce965073adc537655755d9f2112

tests/build-gating.fmf

@@ -0,0 +1,51 @@
+#
+# Build/PR gating tests for *LLVM 13*
+#
+# Imports and runs tests provided by Fedora LLVM git for the matching LLVM version.
+#
+# NOTE: *always* keep this file in sync with upstream, i.e. Fedora. Since we cannot "discover" a plan,
+# we must duplicate at least some part of upstream plan setup, like `adjust` or `provision`. Not necessarily
+# all steps, btu if we do need some of them here, let's focus on making changes in upstream first, to preserve
+# one source of truth. Once TMT learns to include whole plans, we could drop the copied content from here.
+#
+
+summary: LLVM tests for build/PR gating
+
+adjust:
+  - because: "Plan to be ran when either executed locally, or executed by CI system to gate a build or PR."
+    when: >-
+      trigger is defined
+      and trigger != commit
+      and trigger != build
+    enabled: false
+
+  # Unfortunatelly, TMT does not support more declarative approach, we need to run commands on our own.
+  - because: "On RHEL, CRB must be enabled to provide rarer packages"
+    when: >-
+      distro == rhel-9
+      or distro == rhel-8
+    prepare+:
+      - name: Enable CRB
+        how: shell
+        script: dnf config-manager --set-enabled rhel-CRB
+  - because: "On RHEL, CRB must be enabled to provide rarer packages"
+    when: >-
+      distro == centos
+    prepare+:
+      - name: Enable CRB
+        how: shell
+        script: dnf config-manager --set-enabled crb
+
+discover:
+  - name: "Upstream LLVM tests for build/PR gating"
+    how: fmf
+    url: https://gitlab.com/redhat/centos-stream/tests/llvm
+    ref: main
+    filter: "tag:-spoils-installation & tag:-not-in-default"
+
+execute:
+  how: tmt
+
+provision:
+  hardware:
+    memory: ">= 4 GiB"