.copr/Makefile

@@ -1,17 +0,0 @@
-# See https://docs.pagure.org/copr.copr/user_documentation.html#make-srpm
-# See for the --setopt option in the enabling of copr repo see:
-# https://pagure.io/copr/copr/issue/184
-
-COPR_USERNAME=$(shell rpm --eval %copr_username)
-COPR_PROJECT=$(shell rpm --eval %copr_projectname)
-
-.PHONY: srpm
-srpm:
-	dnf install -y dnf-plugins-core fedora-packager
-	dnf copr enable -y --setopt=reposdir=/tmp/yum.repos.d $(COPR_USERNAME)/$(COPR_PROJECT)
-	dnf install -y --setopt=reposdir=/tmp/yum.repos.d llvm-snapshot-builder
-	rpmbuild \
-		--define "_srcrpmdir $(outdir)" \
-		--define "_sourcedir $(shell pwd)" \
-		--define "_disable_source_fetch 0" \
-		-bs $(spec)

.fmf/version

@@ -1 +0,0 @@
-1

.gitignore

@@ -1,7 +1,6 @@
-/*.src.rpm
+SOURCES/cmake-18.1.8.src.tar.xz
-/*.src.tar.xz
+SOURCES/cmake-18.1.8.src.tar.xz.sig
-/*.src.tar.xz.sig
+SOURCES/llvm-18.1.8.src.tar.xz
-/cmake/
+SOURCES/llvm-18.1.8.src.tar.xz.sig
-/llvm-*.src/
+SOURCES/third-party-18.1.8.src.tar.xz
-/results_llvm/
+SOURCES/third-party-18.1.8.src.tar.xz.sig
-/third-party/

.llvm.metadata

@@ -0,0 +1,6 @@
+1ea03e355b705b4cada3051bd7301a57daa19283 SOURCES/cmake-18.1.8.src.tar.xz
+33c2f4327abc20c6098be064ab6bbc15536031f2 SOURCES/cmake-18.1.8.src.tar.xz.sig
+f9befa4cbef3f688ab48fca42449e13c5bcb872d SOURCES/llvm-18.1.8.src.tar.xz
+8310ebfda8205233b5ecb6baa7f5272efae31155 SOURCES/llvm-18.1.8.src.tar.xz.sig
+ada9cf5deaec0a730c751ffd84145acedc6eafeb SOURCES/third-party-18.1.8.src.tar.xz
+b87b233f778b610a7f8ed1cf9aea4112dfcd7a06 SOURCES/third-party-18.1.8.src.tar.xz.sig

0001-19-Remove-myst_parser-dependency-for-RHEL.patch

@@ -1,41 +0,0 @@
-From d8742e9b361e5fd6fee2298b8ea0aeb4671ec05a Mon Sep 17 00:00:00 2001
-From: Nikita Popov <npopov@redhat.com>
-Date: Wed, 22 May 2024 09:39:26 +0200
-Subject: [PATCH] Remove myst_parser dependency for RHEL
-
----
- clang/docs/conf.py | 3 +--
- llvm/docs/conf.py  | 3 +--
- 2 files changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/clang/docs/conf.py b/clang/docs/conf.py
-index 4cee382a718f..d2e2198e05d4 100644
---- a/clang/docs/conf.py
-+++ b/clang/docs/conf.py
-@@ -43,8 +43,7 @@ try:
- 
-     extensions.append("myst_parser")
- except ImportError:
--    if not tags.has("builder-man"):
--        raise
-+    pass
- 
- 
- # The encoding of source files.
-diff --git a/llvm/docs/conf.py b/llvm/docs/conf.py
-index 7f2ed5309606..354a41f11280 100644
---- a/llvm/docs/conf.py
-+++ b/llvm/docs/conf.py
-@@ -36,8 +36,7 @@ try:
- 
-     extensions.append("myst_parser")
- except ImportError:
--    if not tags.has("builder-man"):
--        raise
-+    pass
- 
- # Automatic anchors for markdown titles
- from llvm_slug import make_slug
--- 
-2.44.0
-

0001-20-Remove-myst_parser-dependency-for-RHEL.patch

@@ -1,43 +0,0 @@
-From 50cd36c2156d375a6d50f661908b460fbbd22e78 Mon Sep 17 00:00:00 2001
-From: Nikita Popov <npopov@redhat.com>
-Date: Wed, 22 May 2024 09:39:26 +0200
-Subject: [PATCH] Remove myst_parser dependency for RHEL
-
----
- clang/docs/conf.py | 3 +--
- llvm/docs/conf.py  | 5 +----
- 2 files changed, 2 insertions(+), 6 deletions(-)
-
-diff --git a/clang/docs/conf.py b/clang/docs/conf.py
-index 4cee382a718f..d2e2198e05d4 100644
---- a/clang/docs/conf.py
-+++ b/clang/docs/conf.py
-@@ -43,8 +43,7 @@ try:
- 
-     extensions.append("myst_parser")
- except ImportError:
--    if not tags.has("builder-man"):
--        raise
-+    pass
- 
- 
- # The encoding of source files.
-diff --git a/llvm/docs/conf.py b/llvm/docs/conf.py
-index d9fa6961032b..e38c009a457d 100644
---- a/llvm/docs/conf.py
-+++ b/llvm/docs/conf.py
-@@ -36,10 +36,7 @@ try:
- 
-     extensions.append("myst_parser")
- except ImportError:
--    if not tags.has("builder-man"):
--        raise
--else:
--    myst_enable_extensions = ["substitution"]
-+    pass
- 
- # Automatic anchors for markdown titles
- myst_heading_anchors = 6
--- 
-2.46.0
-

0001-Always-build-shared-libs-for-LLD.patch

@@ -1,30 +0,0 @@
-From 69faadbc396000bfa60c722f6fb9c0fc3fb2daf0 Mon Sep 17 00:00:00 2001
-From: Nikita Popov <npopov@redhat.com>
-Date: Wed, 8 May 2024 12:30:36 +0900
-Subject: [PATCH] Always build shared libs for LLD
-
-We don't want to enable BUILD_SHARED_LIBS for the whole build,
-but we do want to build lld libraries.
----
- lld/cmake/modules/AddLLD.cmake | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/lld/cmake/modules/AddLLD.cmake b/lld/cmake/modules/AddLLD.cmake
-index 9f2684b6f933..743ec87814a2 100644
---- a/lld/cmake/modules/AddLLD.cmake
-+++ b/lld/cmake/modules/AddLLD.cmake
-@@ -7,9 +7,8 @@ macro(add_lld_library name)
-     ""
-     ""
-     ${ARGN})
--  if(ARG_SHARED)
--    set(ARG_ENABLE_SHARED SHARED)
--  endif()
-+  # Always build shared libs for LLD.
-+  set(ARG_ENABLE_SHARED SHARED)
-   llvm_add_library(${name} ${ARG_ENABLE_SHARED} ${ARG_UNPARSED_ARGUMENTS})
- 
-   if (NOT LLVM_INSTALL_TOOLCHAIN_ONLY)
--- 
-2.45.1
-

0001-Fix-page-size-constant-on-aarch64-and-ppc64le.patch

@@ -1,25 +0,0 @@
-From 5f73befe5a0df82e455f4b1052e62f34009e98bb Mon Sep 17 00:00:00 2001
-From: Tom Stellard <tstellar@redhat.com>
-Date: Tue, 23 Apr 2024 15:08:34 -0700
-Subject: [PATCH] Fix page size constant on aarch64 and ppc64le
-
----
- compiler-rt/lib/cfi/cfi.cpp | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/compiler-rt/lib/cfi/cfi.cpp b/compiler-rt/lib/cfi/cfi.cpp
-index ad1c91623514..e7e86e5807a8 100644
---- a/compiler-rt/lib/cfi/cfi.cpp
-+++ b/compiler-rt/lib/cfi/cfi.cpp
-@@ -53,6 +53,8 @@ namespace __cfi {
- 
- #if SANITIZER_LOONGARCH64
- #define kCfiShadowLimitsStorageSize 16384 // 16KiB on loongarch64 per page
-+#elif defined(__aarch64__) || defined(__powerpc64__)
-+#define kCfiShadowLimitsStorageSize 65536 // 1 page
- #else
- #define kCfiShadowLimitsStorageSize 4096 // 1 page
- #endif
--- 
-2.40.1
-

0001-Fix-python3-clang.patch

@@ -1,45 +0,0 @@
-From 1c8a88c870a00eea6c80109cc682e0276ff7888d Mon Sep 17 00:00:00 2001
-From: Nikita Popov <npopov@redhat.com>
-Date: Mon, 8 Jul 2024 12:32:57 +0200
-Subject: [PATCH] Fix python3-clang
-
-Drop confusing `cd ..` so we stay in the root of the LLVM sources
-and the install command succeeds.
----
- install.spec.inc | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/install.spec.inc b/install.spec.inc
-index 0fc1424..5f4a43b 100644
---- a/install.spec.inc
-+++ b/install.spec.inc
-@@ -98,8 +98,6 @@ touch %{buildroot}%{_bindir}/llvm-config%{exec_suffix}
- mkdir -p %{buildroot}%{pkg_datadir}/llvm/cmake
- cp -Rv cmake/* %{buildroot}%{pkg_datadir}/llvm/cmake
- 
--cd ..
--
- #endregion
- 
- #region CLANG installation
-@@ -134,7 +132,7 @@ mkdir -p %{buildroot}%{python3_sitelib}/clang/
- # install: omitting directory 'bindings/python/clang/__pycache__'
- # NOTE: this only happens if we include the gdb plugin of libomp.
- # Remove the plugin with command and we're good: rm -rf %{buildroot}/%{_datarootdir}/gdb
--install -p -m644 clang/bindings/python/clang/* %{buildroot}%{python3_sitelib}/clang/ || true
-+install -p -m644 clang/bindings/python/clang/* %{buildroot}%{python3_sitelib}/clang/
- %py_byte_compile %{__python3} %{buildroot}%{python3_sitelib}/clang
- 
- # install scanbuild-py to python sitelib.
-@@ -268,7 +266,7 @@ done
- # https://docs.fedoraproject.org/en-US/packaging-guidelines/Alternatives/
- touch %{buildroot}%{_bindir}/ld
- 
--install -D -m 644 -t  %{buildroot}%{_mandir}/man1/ %{src_tarball_dir}/lld/docs/ld.lld.1
-+install -D -m 644 -t  %{buildroot}%{_mandir}/man1/ lld/docs/ld.lld.1
- 
- %post -n %{pkg_name_lld}
- %{_sbindir}/update-alternatives --install %{_bindir}/ld ld %{_bindir}/ld.lld 1
--- 
-2.45.2
-

0001-PATCH-clang-Make-funwind-tables-the-default-on-all-a.patch

@@ -1,27 +0,0 @@
-From 49f827b09db549de62dcaf8b90b3fcb3e08c0ee5 Mon Sep 17 00:00:00 2001
-From: Serge Guelton <sguelton@redhat.com>
-Date: Mon, 6 Mar 2023 12:37:48 +0100
-Subject: [PATCH] Make -funwind-tables the default on all archs
-
----
- clang/lib/Driver/ToolChains/Gnu.cpp | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/clang/lib/Driver/ToolChains/Gnu.cpp b/clang/lib/Driver/ToolChains/Gnu.cpp
-index 24fbdcffc07b..8fed46b49515 100644
---- a/clang/lib/Driver/ToolChains/Gnu.cpp
-+++ b/clang/lib/Driver/ToolChains/Gnu.cpp
-@@ -2904,6 +2904,10 @@ Generic_GCC::getDefaultUnwindTableLevel(const ArgList &Args) const {
-   case llvm::Triple::riscv64:
-   case llvm::Triple::x86:
-   case llvm::Triple::x86_64:
-+  // Enable -funwind-tables on all architectures supported by Fedora:
-+  // rhbz#1655546
-+  case llvm::Triple::systemz:
-+  case llvm::Triple::arm:
-     return UnwindTableLevel::Asynchronous;
-   default:
-     return UnwindTableLevel::None;
--- 
-2.39.1
-

0001-Workaround-a-bug-in-ORC-on-ppc64le.patch

@@ -1,30 +0,0 @@
-From a2449cee8c995b56f1892502aab3dfad3d6f3ca1 Mon Sep 17 00:00:00 2001
-From: Tulio Magno Quites Machado Filho <tuliom@redhat.com>
-Date: Fri, 8 Sep 2023 11:45:34 -0300
-Subject: [PATCH] Workaround a bug in ORC on ppc64le
-
-The Jit code appears to be returning the wrong printf symbol on ppc64le
-after the transition of the default long double to IEEE 128-bit floating
-point.
----
- clang/unittests/Interpreter/InterpreterTest.cpp | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/clang/unittests/Interpreter/InterpreterTest.cpp b/clang/unittests/Interpreter/InterpreterTest.cpp
-index abb8e6377aab..7b6697ebc6ed 100644
---- a/clang/unittests/Interpreter/InterpreterTest.cpp
-+++ b/clang/unittests/Interpreter/InterpreterTest.cpp
-@@ -243,7 +243,9 @@ TEST(IncrementalProcessing, FindMangledNameSymbol) {
-   EXPECT_FALSE(!Addr);
- 
-   // FIXME: Re-enable when we investigate the way we handle dllimports on Win.
--#ifndef _WIN32
-+  // FIXME: The printf symbol returned from the Jit may not be correct on
-+  //        ppc64le when the default long double is IEEE 128-bit fp.
-+#if !defined _WIN32 && !(defined __PPC64__ && defined __LITTLE_ENDIAN__)
-   EXPECT_EQ((uintptr_t)&printf, Addr->getValue());
- #endif // _WIN32
- }
--- 
-2.41.0
-

0001-openmp-Add-option-to-disable-tsan-tests-111548.patch

@@ -1,62 +0,0 @@
-From b2edeb58b8cb3268acee425cd52b406eb60a8095 Mon Sep 17 00:00:00 2001
-From: Nikita Popov <npopov@redhat.com>
-Date: Wed, 9 Oct 2024 11:29:30 +0200
-Subject: [PATCH] [openmp] Add option to disable tsan tests (#111548)
-
-This adds a OPENMP_TEST_ENABLE_TSAN option that allows to override
-whether tests using tsan will be enabled. The option defaults to the
-existing auto-detection.
-
-The background here is
-https://github.com/llvm/llvm-project/issues/111492, where we have some
-systems where tsan doesn't work, but we do still want to build it and
-run tests that don't use tsan.
----
- openmp/cmake/OpenMPTesting.cmake          | 3 +++
- openmp/tools/archer/tests/CMakeLists.txt  | 2 +-
- openmp/tools/archer/tests/lit.site.cfg.in | 2 +-
- 3 files changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/openmp/cmake/OpenMPTesting.cmake b/openmp/cmake/OpenMPTesting.cmake
-index c67ad8b1cbd9..14cc5c67d84c 100644
---- a/openmp/cmake/OpenMPTesting.cmake
-+++ b/openmp/cmake/OpenMPTesting.cmake
-@@ -163,6 +163,9 @@ else()
-   set(OPENMP_TEST_COMPILER_HAS_OMIT_FRAME_POINTER_FLAGS 1)
- endif()
- 
-+set(OPENMP_TEST_ENABLE_TSAN "${OPENMP_TEST_COMPILER_HAS_TSAN_FLAGS}" CACHE BOOL
-+    "Whether to enable tests using tsan")
-+
- # Function to set compiler features for use in lit.
- function(update_test_compiler_features)
-   set(FEATURES "[")
-diff --git a/openmp/tools/archer/tests/CMakeLists.txt b/openmp/tools/archer/tests/CMakeLists.txt
-index 5de91148fa4b..412c7d63725e 100644
---- a/openmp/tools/archer/tests/CMakeLists.txt
-+++ b/openmp/tools/archer/tests/CMakeLists.txt
-@@ -28,7 +28,7 @@ macro(pythonize_bool var)
- endmacro()
- 
- pythonize_bool(LIBARCHER_HAVE_LIBATOMIC)
--pythonize_bool(OPENMP_TEST_COMPILER_HAS_TSAN_FLAGS)
-+pythonize_bool(OPENMP_TEST_ENABLE_TSAN)
- 
- set(ARCHER_TSAN_TEST_DEPENDENCE "")
- if(TARGET tsan)
-diff --git a/openmp/tools/archer/tests/lit.site.cfg.in b/openmp/tools/archer/tests/lit.site.cfg.in
-index 55edfde9738e..ddcb7b8bc3a5 100644
---- a/openmp/tools/archer/tests/lit.site.cfg.in
-+++ b/openmp/tools/archer/tests/lit.site.cfg.in
-@@ -12,7 +12,7 @@ config.omp_library_dir = "@LIBOMP_LIBRARY_DIR@"
- config.omp_header_dir = "@LIBOMP_INCLUDE_DIR@"
- config.operating_system = "@CMAKE_SYSTEM_NAME@"
- config.has_libatomic = @LIBARCHER_HAVE_LIBATOMIC@
--config.has_tsan = @OPENMP_TEST_COMPILER_HAS_TSAN_FLAGS@
-+config.has_tsan = @OPENMP_TEST_ENABLE_TSAN@
- 
- config.test_archer_flags = "@LIBARCHER_TEST_FLAGS@"
- config.libarcher_obj_root = "@CMAKE_CURRENT_BINARY_DIR@"
--- 
-2.46.0
-

0001-openmp-Use-core_siblings_list-if-physical_package_id.patch

@@ -1,205 +0,0 @@
-From 5fb4d7f6079a76b2907ccc8c53c7c509c30a3dca Mon Sep 17 00:00:00 2001
-From: Nikita Popov <npopov@redhat.com>
-Date: Thu, 10 Oct 2024 12:47:33 +0000
-Subject: [PATCH] [openmp] Use core_siblings_list if physical_package_id not
- available
-
-On powerpc, physical_package_id may not be available. Currently,
-this causes openmp to fall back to flat topology and various
-affinity tests fail.
-
-Fix this by parsing core_siblings_list to deterimine which cpus
-belong to the same socket. This matches what the testing code
-does. The code to parse the CPU list format thankfully already
-exists.
-
-Fixes https://github.com/llvm/llvm-project/issues/111809.
----
- openmp/runtime/src/kmp_affinity.cpp          | 100 +++++++++++++------
- openmp/runtime/test/affinity/kmp-hw-subset.c |   2 +-
- 2 files changed, 72 insertions(+), 30 deletions(-)
-
-diff --git a/openmp/runtime/src/kmp_affinity.cpp b/openmp/runtime/src/kmp_affinity.cpp
-index cf5cad04eb57..c3d5ecf1345e 100644
---- a/openmp/runtime/src/kmp_affinity.cpp
-+++ b/openmp/runtime/src/kmp_affinity.cpp
-@@ -1589,15 +1589,13 @@ kmp_str_buf_t *__kmp_affinity_str_buf_mask(kmp_str_buf_t *buf,
-   return buf;
- }
- 
--// Return (possibly empty) affinity mask representing the offline CPUs
--// Caller must free the mask
--kmp_affin_mask_t *__kmp_affinity_get_offline_cpus() {
--  kmp_affin_mask_t *offline;
--  KMP_CPU_ALLOC(offline);
--  KMP_CPU_ZERO(offline);
-+static kmp_affin_mask_t *__kmp_parse_cpu_list(const char *path) {
-+  kmp_affin_mask_t *mask;
-+  KMP_CPU_ALLOC(mask);
-+  KMP_CPU_ZERO(mask);
- #if KMP_OS_LINUX
-   int n, begin_cpu, end_cpu;
--  kmp_safe_raii_file_t offline_file;
-+  kmp_safe_raii_file_t file;
-   auto skip_ws = [](FILE *f) {
-     int c;
-     do {
-@@ -1606,29 +1604,29 @@ kmp_affin_mask_t *__kmp_affinity_get_offline_cpus() {
-     if (c != EOF)
-       ungetc(c, f);
-   };
--  // File contains CSV of integer ranges representing the offline CPUs
-+  // File contains CSV of integer ranges representing the CPUs
-   // e.g., 1,2,4-7,9,11-15
--  int status = offline_file.try_open("/sys/devices/system/cpu/offline", "r");
-+  int status = file.try_open(path, "r");
-   if (status != 0)
--    return offline;
--  while (!feof(offline_file)) {
--    skip_ws(offline_file);
--    n = fscanf(offline_file, "%d", &begin_cpu);
-+    return mask;
-+  while (!feof(file)) {
-+    skip_ws(file);
-+    n = fscanf(file, "%d", &begin_cpu);
-     if (n != 1)
-       break;
--    skip_ws(offline_file);
--    int c = fgetc(offline_file);
-+    skip_ws(file);
-+    int c = fgetc(file);
-     if (c == EOF || c == ',') {
-       // Just single CPU
-       end_cpu = begin_cpu;
-     } else if (c == '-') {
-       // Range of CPUs
--      skip_ws(offline_file);
--      n = fscanf(offline_file, "%d", &end_cpu);
-+      skip_ws(file);
-+      n = fscanf(file, "%d", &end_cpu);
-       if (n != 1)
-         break;
--      skip_ws(offline_file);
--      c = fgetc(offline_file); // skip ','
-+      skip_ws(file);
-+      c = fgetc(file); // skip ','
-     } else {
-       // Syntax problem
-       break;
-@@ -1638,13 +1636,19 @@ kmp_affin_mask_t *__kmp_affinity_get_offline_cpus() {
-         end_cpu >= __kmp_xproc || begin_cpu > end_cpu) {
-       continue;
-     }
--    // Insert [begin_cpu, end_cpu] into offline mask
-+    // Insert [begin_cpu, end_cpu] into mask
-     for (int cpu = begin_cpu; cpu <= end_cpu; ++cpu) {
--      KMP_CPU_SET(cpu, offline);
-+      KMP_CPU_SET(cpu, mask);
-     }
-   }
- #endif
--  return offline;
-+  return mask;
-+}
-+
-+// Return (possibly empty) affinity mask representing the offline CPUs
-+// Caller must free the mask
-+kmp_affin_mask_t *__kmp_affinity_get_offline_cpus() {
-+  return __kmp_parse_cpu_list("/sys/devices/system/cpu/offline");
- }
- 
- // Return the number of available procs
-@@ -3175,6 +3179,37 @@ static inline const char *__kmp_cpuinfo_get_envvar() {
-   return envvar;
- }
- 
-+static bool __kmp_package_id_from_core_siblings_list(unsigned **threadInfo,
-+                                                     unsigned num_avail,
-+                                                     unsigned idx) {
-+  if (!KMP_AFFINITY_CAPABLE())
-+    return false;
-+
-+  char path[256];
-+  KMP_SNPRINTF(path, sizeof(path),
-+               "/sys/devices/system/cpu/cpu%u/topology/core_siblings_list",
-+               threadInfo[idx][osIdIndex]);
-+  kmp_affin_mask_t *siblings = __kmp_parse_cpu_list(path);
-+  for (unsigned i = 0; i < num_avail; ++i) {
-+    unsigned cpu_id = threadInfo[i][osIdIndex];
-+    KMP_ASSERT(cpu_id < __kmp_affin_mask_size * CHAR_BIT);
-+    if (!KMP_CPU_ISSET(cpu_id, siblings))
-+      continue;
-+    if (threadInfo[i][pkgIdIndex] == UINT_MAX) {
-+      // Arbitrarily pick the first index we encounter, it only matters that
-+      // the value is the same for all siblings.
-+      threadInfo[i][pkgIdIndex] = idx;
-+    } else if (threadInfo[i][pkgIdIndex] != idx) {
-+      // Contradictory sibling lists.
-+      KMP_CPU_FREE(siblings);
-+      return false;
-+    }
-+  }
-+  KMP_ASSERT(threadInfo[idx][pkgIdIndex] != UINT_MAX);
-+  KMP_CPU_FREE(siblings);
-+  return true;
-+}
-+
- // Parse /proc/cpuinfo (or an alternate file in the same format) to obtain the
- // affinity map. On AIX, the map is obtained through system SRAD (Scheduler
- // Resource Allocation Domain).
-@@ -3550,18 +3585,13 @@ static bool __kmp_affinity_create_cpuinfo_map(int *line,
-         return false;
-       }
- 
--      // Check for missing fields.  The osId field must be there, and we
--      // currently require that the physical id field is specified, also.
-+      // Check for missing fields.  The osId field must be there. The physical
-+      // id field will be checked later.
-       if (threadInfo[num_avail][osIdIndex] == UINT_MAX) {
-         CLEANUP_THREAD_INFO;
-         *msg_id = kmp_i18n_str_MissingProcField;
-         return false;
-       }
--      if (threadInfo[0][pkgIdIndex] == UINT_MAX) {
--        CLEANUP_THREAD_INFO;
--        *msg_id = kmp_i18n_str_MissingPhysicalIDField;
--        return false;
--      }
- 
-       // Skip this proc if it is not included in the machine model.
-       if (KMP_AFFINITY_CAPABLE() &&
-@@ -3591,6 +3621,18 @@ static bool __kmp_affinity_create_cpuinfo_map(int *line,
-   }
-   *line = 0;
- 
-+  // At least on powerpc, Linux may return -1 for physical_package_id. Try
-+  // to reconstruct topology from core_siblings_list in that case.
-+  for (i = 0; i < num_avail; ++i) {
-+    if (threadInfo[i][pkgIdIndex] == UINT_MAX) {
-+      if (!__kmp_package_id_from_core_siblings_list(threadInfo, num_avail, i)) {
-+        CLEANUP_THREAD_INFO;
-+        *msg_id = kmp_i18n_str_MissingPhysicalIDField;
-+        return false;
-+      }
-+    }
-+  }
-+
- #if KMP_MIC && REDUCE_TEAM_SIZE
-   unsigned teamSize = 0;
- #endif // KMP_MIC && REDUCE_TEAM_SIZE
-diff --git a/openmp/runtime/test/affinity/kmp-hw-subset.c b/openmp/runtime/test/affinity/kmp-hw-subset.c
-index 606fcdfbada9..0b49969bd3b1 100644
---- a/openmp/runtime/test/affinity/kmp-hw-subset.c
-+++ b/openmp/runtime/test/affinity/kmp-hw-subset.c
-@@ -25,7 +25,7 @@ static int compare_hw_subset_places(const place_list_t *openmp_places,
-     expected_per_place = nthreads_per_core;
-   } else {
-     expected_total = nsockets;
--    expected_per_place = ncores_per_socket;
-+    expected_per_place = ncores_per_socket * nthreads_per_core;
-   }
-   if (openmp_places->num_places != expected_total) {
-     fprintf(stderr, "error: KMP_HW_SUBSET did not half each resource layer!\n");
--- 
-2.47.0
-

0003-PATCH-clang-Don-t-install-static-libraries.patch

@@ -1,25 +0,0 @@
-From 88704fc2eabb9dd19a9c3eb81a9b3dc37d95651c Mon Sep 17 00:00:00 2001
-From: Tom Stellard <tstellar@redhat.com>
-Date: Fri, 31 Jan 2020 11:04:57 -0800
-Subject: [PATCH][clang] Don't install static libraries
-
----
- clang/cmake/modules/AddClang.cmake | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/clang/cmake/modules/AddClang.cmake b/clang/cmake/modules/AddClang.cmake
-index 5752f4277444..0f52822d91f0 100644
---- a/clang/cmake/modules/AddClang.cmake
-+++ b/clang/cmake/modules/AddClang.cmake
-@@ -113,7 +113,7 @@ macro(add_clang_library name)
-     if(TARGET ${lib})
-       target_link_libraries(${lib} INTERFACE ${LLVM_COMMON_LIBS})
- 
--      if (NOT LLVM_INSTALL_TOOLCHAIN_ONLY OR ARG_INSTALL_WITH_TOOLCHAIN)
-+      if (ARG_SHARED AND (NOT LLVM_INSTALL_TOOLCHAIN_ONLY OR ARG_INSTALL_WITH_TOOLCHAIN))
-         get_target_export_arg(${name} Clang export_to_clangtargets UMBRELLA clang-libraries)
-         install(TARGETS ${lib}
-           COMPONENT ${lib}
--- 
-2.30.2
-

SOURCES/0101-Deactivate-markdown-doc.patch

@@ -0,0 +1,13 @@
+diff --git a/llvm/docs/conf.py b/llvm/docs/conf.py
+index cf8a75980b53..b208ad138e89 100644
+--- a/llvm/docs/conf.py
++++ b/llvm/docs/conf.py
+@@ -26,7 +26,7 @@ from datetime import date
+ 
+ # Add any Sphinx extension module names here, as strings. They can be extensions
+ # coming with Sphinx (named 'sphinx.ext.*') or your custom ones.
+-extensions = ["myst_parser", "sphinx.ext.intersphinx", "sphinx.ext.todo"]
++extensions = ["sphinx.ext.intersphinx", "sphinx.ext.todo"]
+ 
+ # Automatic anchors for markdown titles
+ from llvm_slug import make_slug

SOURCES/99273.patch

@@ -0,0 +1,893 @@
+From 91052169960477fbc39169c10f9fae3bec732510 Mon Sep 17 00:00:00 2001
+From: Carl Ritson <carl.ritson@amd.com>
+Date: Wed, 17 Jul 2024 15:07:42 +0900
+Subject: [PATCH 1/3] [AMDGPU] Implement workaround for GFX11.5 export priority
+
+On GFX11.5 shaders having completed exports need to execute/wait
+at a lower priority than shaders still executing exports.
+Add code to maintain normal priority of 2 for shaders that export
+and drop to priority 0 after exports.
+---
+ llvm/lib/Target/AMDGPU/AMDGPU.td              |  15 +-
+ .../lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 112 ++++++
+ llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h  |   1 +
+ llvm/lib/Target/AMDGPU/GCNSubtarget.h         |   3 +
+ .../AMDGPU/required-export-priority.ll        | 344 ++++++++++++++++++
+ .../AMDGPU/required-export-priority.mir       | 293 +++++++++++++++
+ 6 files changed, 765 insertions(+), 3 deletions(-)
+ create mode 100644 llvm/test/CodeGen/AMDGPU/required-export-priority.ll
+ create mode 100644 llvm/test/CodeGen/AMDGPU/required-export-priority.mir
+
+diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
+index dfc8eaea66f7b..14fcf6a210a78 100644
+--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
++++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
+@@ -947,6 +947,12 @@ def FeatureHasRestrictedSOffset : SubtargetFeature<"restricted-soffset",
+   "Has restricted SOffset (immediate not supported)."
+ >;
+ 
++def FeatureRequiredExportPriority : SubtargetFeature<"required-export-priority",
++  "HasRequiredExportPriority",
++  "true",
++  "Export priority must be explicitly manipulated on GFX11.5"
++>;
++
+ //===------------------------------------------------------------===//
+ // Subtarget Features (options and debugging)
+ //===------------------------------------------------------------===//
+@@ -1597,14 +1603,16 @@ def FeatureISAVersion11_5_0 : FeatureSet<
+   !listconcat(FeatureISAVersion11_Common.Features,
+     [FeatureSALUFloatInsts,
+      FeatureDPPSrc1SGPR,
+-     FeatureVGPRSingleUseHintInsts])>;
++     FeatureVGPRSingleUseHintInsts,
++     FeatureRequiredExportPriority])>;
+ 
+ def FeatureISAVersion11_5_1 : FeatureSet<
+   !listconcat(FeatureISAVersion11_Common.Features,
+     [FeatureSALUFloatInsts,
+      FeatureDPPSrc1SGPR,
+      FeatureVGPRSingleUseHintInsts,
+-     FeatureGFX11FullVGPRs])>;
++     FeatureGFX11FullVGPRs,
++     FeatureRequiredExportPriority])>;
+ 
+ def FeatureISAVersion12 : FeatureSet<
+   [FeatureGFX12,
+diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+index a402fc6d7e611..a8b171aa82840 100644
+--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
++++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+@@ -14,6 +14,7 @@
+ #include "GCNSubtarget.h"
+ #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
+ #include "SIMachineFunctionInfo.h"
++#include "llvm/CodeGen/MachineFrameInfo.h"
+ #include "llvm/CodeGen/MachineFunction.h"
+ #include "llvm/CodeGen/ScheduleDAG.h"
+ #include "llvm/TargetParser/TargetParser.h"
+@@ -1104,6 +1105,7 @@ void GCNHazardRecognizer::fixHazards(MachineInstr *MI) {
+   fixWMMAHazards(MI);
+   fixShift64HighRegBug(MI);
+   fixVALUMaskWriteHazard(MI);
++  fixRequiredExportPriority(MI);
+ }
+ 
+ bool GCNHazardRecognizer::fixVcmpxPermlaneHazards(MachineInstr *MI) {
+@@ -2895,3 +2897,113 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
+ 
+   return true;
+ }
++
++static bool ensureEntrySetPrio(MachineFunction *MF, int Priority,
++                               const SIInstrInfo &TII) {
++  MachineBasicBlock &EntryMBB = MF->front();
++  if (EntryMBB.begin() != EntryMBB.end()) {
++    auto &EntryMI = *EntryMBB.begin();
++    if (EntryMI.getOpcode() == AMDGPU::S_SETPRIO &&
++        EntryMI.getOperand(0).getImm() >= Priority)
++      return false;
++  }
++
++  BuildMI(EntryMBB, EntryMBB.begin(), DebugLoc(), TII.get(AMDGPU::S_SETPRIO))
++      .addImm(Priority);
++  return true;
++}
++
++bool GCNHazardRecognizer::fixRequiredExportPriority(MachineInstr *MI) {
++  if (!ST.hasRequiredExportPriority())
++    return false;
++
++  // Assume the following shader types will never have exports,
++  // and avoid adding or adjusting S_SETPRIO.
++  MachineBasicBlock *MBB = MI->getParent();
++  MachineFunction *MF = MBB->getParent();
++  auto CC = MF->getFunction().getCallingConv();
++  switch (CC) {
++  case CallingConv::AMDGPU_CS:
++  case CallingConv::AMDGPU_CS_Chain:
++  case CallingConv::AMDGPU_CS_ChainPreserve:
++  case CallingConv::AMDGPU_KERNEL:
++    return false;
++  default:
++    break;
++  }
++
++  const int MaxPriority = 3;
++  const int NormalPriority = 2;
++  const int PostExportPriority = 0;
++
++  auto It = MI->getIterator();
++  switch (MI->getOpcode()) {
++  case AMDGPU::S_ENDPGM:
++  case AMDGPU::S_ENDPGM_SAVED:
++  case AMDGPU::S_ENDPGM_ORDERED_PS_DONE:
++  case AMDGPU::SI_RETURN_TO_EPILOG:
++    // Ensure shader with calls raises priority at entry.
++    // This ensures correct priority if exports exist in callee.
++    if (MF->getFrameInfo().hasCalls())
++      return ensureEntrySetPrio(MF, NormalPriority, TII);
++    return false;
++  case AMDGPU::S_SETPRIO: {
++    // Raise minimum priority unless in workaround.
++    auto &PrioOp = MI->getOperand(0);
++    int Prio = PrioOp.getImm();
++    bool InWA = (Prio == PostExportPriority) &&
++                (It != MBB->begin() && TII.isEXP(*std::prev(It)));
++    if (InWA || Prio >= NormalPriority)
++      return false;
++    PrioOp.setImm(std::min(Prio + NormalPriority, MaxPriority));
++    return true;
++  }
++  default:
++    if (!TII.isEXP(*MI))
++      return false;
++    break;
++  }
++
++  // Check entry priority at each export (as there will only be a few).
++  // Note: amdgpu_gfx can only be a callee, so defer to caller setprio.
++  bool Changed = false;
++  if (CC != CallingConv::AMDGPU_Gfx)
++    Changed = ensureEntrySetPrio(MF, NormalPriority, TII);
++
++  auto NextMI = std::next(It);
++  bool EndOfShader = false;
++  if (NextMI != MBB->end()) {
++    // Only need WA at end of sequence of exports.
++    if (TII.isEXP(*NextMI))
++      return Changed;
++    // Assume appropriate S_SETPRIO after export means WA already applied.
++    if (NextMI->getOpcode() == AMDGPU::S_SETPRIO &&
++        NextMI->getOperand(0).getImm() == PostExportPriority)
++      return Changed;
++    EndOfShader = NextMI->getOpcode() == AMDGPU::S_ENDPGM;
++  }
++
++  const DebugLoc &DL = MI->getDebugLoc();
++
++  // Lower priority.
++  BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_SETPRIO))
++      .addImm(PostExportPriority);
++
++  if (!EndOfShader) {
++    // Wait for exports to complete.
++    BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_WAITCNT_EXPCNT))
++        .addReg(AMDGPU::SGPR_NULL)
++        .addImm(0);
++  }
++
++  BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_NOP)).addImm(0);
++  BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_NOP)).addImm(0);
++
++  if (!EndOfShader) {
++    // Return to normal (higher) priority.
++    BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_SETPRIO))
++        .addImm(NormalPriority);
++  }
++
++  return true;
++}
+diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
+index 3ccca527c626b..f2a64ab48e180 100644
+--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
++++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
+@@ -107,6 +107,7 @@ class GCNHazardRecognizer final : public ScheduleHazardRecognizer {
+   bool fixWMMAHazards(MachineInstr *MI);
+   bool fixShift64HighRegBug(MachineInstr *MI);
+   bool fixVALUMaskWriteHazard(MachineInstr *MI);
++  bool fixRequiredExportPriority(MachineInstr *MI);
+ 
+   int checkMAIHazards(MachineInstr *MI);
+   int checkMAIHazards908(MachineInstr *MI);
+diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+index e5817594a4521..def89c785b855 100644
+--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
++++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+@@ -238,6 +238,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
+   bool HasVOPDInsts = false;
+   bool HasVALUTransUseHazard = false;
+   bool HasForceStoreSC0SC1 = false;
++  bool HasRequiredExportPriority = false;
+ 
+   // Dummy feature to use for assembler in tablegen.
+   bool FeatureDisable = false;
+@@ -1282,6 +1283,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
+ 
+   bool hasRestrictedSOffset() const { return HasRestrictedSOffset; }
+ 
++  bool hasRequiredExportPriority() const { return HasRequiredExportPriority; }
++
+   /// \returns true if the target uses LOADcnt/SAMPLEcnt/BVHcnt, DScnt/KMcnt
+   /// and STOREcnt rather than VMcnt, LGKMcnt and VScnt respectively.
+   bool hasExtendedWaitCounts() const { return getGeneration() >= GFX12; }
+diff --git a/llvm/test/CodeGen/AMDGPU/required-export-priority.ll b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
+new file mode 100644
+index 0000000000000..377902f3f0d1a
+--- /dev/null
++++ b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
+@@ -0,0 +1,344 @@
++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
++; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -amdgpu-enable-vopd=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
++
++define amdgpu_ps void @test_export_zeroes_f32() #0 {
++; GCN-LABEL: test_export_zeroes_f32:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    v_mov_b32_e32 v0, 0
++; GCN-NEXT:    exp mrt0 off, off, off, off
++; GCN-NEXT:    exp mrt0 off, off, off, off done
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_endpgm
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 0.0, float 0.0, float 0.0, float 0.0, i1 false, i1 false)
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 0.0, float 0.0, float 0.0, float 0.0, i1 true, i1 false)
++  ret void
++}
++
++define amdgpu_ps void @test_export_en_src0_f32() #0 {
++; GCN-LABEL: test_export_en_src0_f32:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
++; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
++; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
++; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
++; GCN-NEXT:    exp mrt0 v3, off, off, off done
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_endpgm
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 1, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
++  ret void
++}
++
++define amdgpu_gs void @test_export_gs() #0 {
++; GCN-LABEL: test_export_gs:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
++; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
++; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
++; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
++; GCN-NEXT:    exp mrt0 off, v2, off, off done
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_endpgm
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
++  ret void
++}
++
++define amdgpu_hs void @test_export_hs() #0 {
++; GCN-LABEL: test_export_hs:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
++; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
++; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
++; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
++; GCN-NEXT:    exp mrt0 off, v2, off, off done
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_endpgm
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
++  ret void
++}
++
++define amdgpu_gfx void @test_export_gfx(float %v) #0 {
++; GCN-LABEL: test_export_gfx:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
++; GCN-NEXT:    v_mov_b32_e32 v1, 4.0
++; GCN-NEXT:    v_mov_b32_e32 v2, 0.5
++; GCN-NEXT:    v_mov_b32_e32 v3, 2.0
++; GCN-NEXT:    exp mrt0 off, v3, off, off done
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    s_waitcnt expcnt(0)
++; GCN-NEXT:    s_setpc_b64 s[30:31]
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float %v, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
++  ret void
++}
++
++define amdgpu_cs void @test_export_cs() #0 {
++; GCN-LABEL: test_export_cs:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
++; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
++; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
++; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
++; GCN-NEXT:    exp mrt0 off, v2, off, off done
++; GCN-NEXT:    s_endpgm
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
++  ret void
++}
++
++define amdgpu_kernel void @test_export_kernel() #0 {
++; GCN-LABEL: test_export_kernel:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    v_mov_b32_e32 v0, 4.0
++; GCN-NEXT:    v_mov_b32_e32 v1, 0.5
++; GCN-NEXT:    v_mov_b32_e32 v2, 2.0
++; GCN-NEXT:    v_mov_b32_e32 v3, 1.0
++; GCN-NEXT:    exp mrt0 off, v2, off, off done
++; GCN-NEXT:    s_endpgm
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
++  ret void
++}
++
++define amdgpu_gfx void @test_no_export_gfx(float %v) #0 {
++; GCN-LABEL: test_no_export_gfx:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
++; GCN-NEXT:    s_setpc_b64 s[30:31]
++  ret void
++}
++
++define amdgpu_ps void @test_no_export_ps(float %v) #0 {
++; GCN-LABEL: test_no_export_ps:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_endpgm
++  ret void
++}
++
++define amdgpu_ps void @test_if_export_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
++; GCN-LABEL: test_if_export_f32:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    s_mov_b32 s0, exec_lo
++; GCN-NEXT:    v_cmpx_ne_u32_e32 0, v0
++; GCN-NEXT:    s_cbranch_execz .LBB9_2
++; GCN-NEXT:  ; %bb.1: ; %exp
++; GCN-NEXT:    exp mrt0 v1, v2, v3, v4
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:  .LBB9_2: ; %end
++; GCN-NEXT:    s_endpgm
++  %cc = icmp eq i32 %flag, 0
++  br i1 %cc, label %end, label %exp
++
++exp:
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 false, i1 false)
++  br label %end
++
++end:
++  ret void
++}
++
++define amdgpu_ps void @test_if_export_vm_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
++; GCN-LABEL: test_if_export_vm_f32:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    s_mov_b32 s0, exec_lo
++; GCN-NEXT:    v_cmpx_ne_u32_e32 0, v0
++; GCN-NEXT:    s_cbranch_execz .LBB10_2
++; GCN-NEXT:  ; %bb.1: ; %exp
++; GCN-NEXT:    exp mrt0 v1, v2, v3, v4
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:  .LBB10_2: ; %end
++; GCN-NEXT:    s_endpgm
++  %cc = icmp eq i32 %flag, 0
++  br i1 %cc, label %end, label %exp
++
++exp:
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 false, i1 true)
++  br label %end
++
++end:
++  ret void
++}
++
++define amdgpu_ps void @test_if_export_done_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
++; GCN-LABEL: test_if_export_done_f32:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    s_mov_b32 s0, exec_lo
++; GCN-NEXT:    v_cmpx_ne_u32_e32 0, v0
++; GCN-NEXT:    s_cbranch_execz .LBB11_2
++; GCN-NEXT:  ; %bb.1: ; %exp
++; GCN-NEXT:    exp mrt0 v1, v2, v3, v4 done
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:  .LBB11_2: ; %end
++; GCN-NEXT:    s_endpgm
++  %cc = icmp eq i32 %flag, 0
++  br i1 %cc, label %end, label %exp
++
++exp:
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 true, i1 false)
++  br label %end
++
++end:
++  ret void
++}
++
++define amdgpu_ps void @test_if_export_vm_done_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
++; GCN-LABEL: test_if_export_vm_done_f32:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    s_mov_b32 s0, exec_lo
++; GCN-NEXT:    v_cmpx_ne_u32_e32 0, v0
++; GCN-NEXT:    s_cbranch_execz .LBB12_2
++; GCN-NEXT:  ; %bb.1: ; %exp
++; GCN-NEXT:    exp mrt0 v1, v2, v3, v4 done
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:  .LBB12_2: ; %end
++; GCN-NEXT:    s_endpgm
++  %cc = icmp eq i32 %flag, 0
++  br i1 %cc, label %end, label %exp
++
++exp:
++  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 true, i1 true)
++  br label %end
++
++end:
++  ret void
++}
++
++define amdgpu_ps void @test_export_pos_before_param_across_load(i32 %idx) #0 {
++; GCN-LABEL: test_export_pos_before_param_across_load:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    buffer_load_b32 v0, v0, s[0:3], 0 offen
++; GCN-NEXT:    v_mov_b32_e32 v1, 0
++; GCN-NEXT:    v_mov_b32_e32 v2, 1.0
++; GCN-NEXT:    v_mov_b32_e32 v3, 0.5
++; GCN-NEXT:    s_waitcnt vmcnt(0)
++; GCN-NEXT:    exp pos0 v1, v1, v1, v0 done
++; GCN-NEXT:    exp invalid_target_32 v2, v2, v2, v2
++; GCN-NEXT:    exp invalid_target_33 v2, v2, v2, v3
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_endpgm
++  call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float 1.0, float 1.0, float 1.0, float 1.0, i1 false, i1 false)
++  call void @llvm.amdgcn.exp.f32(i32 33, i32 15, float 1.0, float 1.0, float 1.0, float 0.5, i1 false, i1 false)
++  %load = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) undef, i32 %idx, i32 0, i32 0)
++  call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float 0.0, float 0.0, float 0.0, float %load, i1 true, i1 false)
++  ret void
++}
++
++define amdgpu_ps void @test_export_across_store_load(i32 %idx, float %v) #0 {
++; GCN-LABEL: test_export_across_store_load:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    v_mov_b32_e32 v2, 24
++; GCN-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 1, v0
++; GCN-NEXT:    s_delay_alu instid0(VALU_DEP_2)
++; GCN-NEXT:    v_cndmask_b32_e64 v0, v2, 8, vcc_lo
++; GCN-NEXT:    v_mov_b32_e32 v2, 0
++; GCN-NEXT:    scratch_store_b32 v0, v1, off
++; GCN-NEXT:    scratch_load_b32 v0, off, off
++; GCN-NEXT:    v_mov_b32_e32 v1, 1.0
++; GCN-NEXT:    exp pos0 v2, v2, v2, v1 done
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_waitcnt_expcnt null, 0x0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    s_waitcnt vmcnt(0)
++; GCN-NEXT:    exp invalid_target_32 v0, v2, v1, v2
++; GCN-NEXT:    exp invalid_target_33 v0, v2, v1, v2
++; GCN-NEXT:    s_setprio 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_nop 0
++; GCN-NEXT:    s_endpgm
++  %data0 = alloca <4 x float>, align 8, addrspace(5)
++  %data1 = alloca <4 x float>, align 8, addrspace(5)
++  %cmp = icmp eq i32 %idx, 1
++  %data = select i1 %cmp, ptr addrspace(5) %data0, ptr addrspace(5) %data1
++  store float %v, ptr addrspace(5) %data, align 8
++  call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float 0.0, float 0.0, float 0.0, float 1.0, i1 true, i1 false)
++  %load0 = load float, ptr addrspace(5) %data0, align 8
++  call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %load0, float 0.0, float 1.0, float 0.0, i1 false, i1 false)
++  call void @llvm.amdgcn.exp.f32(i32 33, i32 15, float %load0, float 0.0, float 1.0, float 0.0, i1 false, i1 false)
++  ret void
++}
++
++define amdgpu_ps void @test_export_in_callee(float %v) #0 {
++; GCN-LABEL: test_export_in_callee:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    s_getpc_b64 s[0:1]
++; GCN-NEXT:    s_add_u32 s0, s0, test_export_gfx@gotpcrel32@lo+4
++; GCN-NEXT:    s_addc_u32 s1, s1, test_export_gfx@gotpcrel32@hi+12
++; GCN-NEXT:    v_add_f32_e32 v0, 1.0, v0
++; GCN-NEXT:    s_load_b64 s[0:1], s[0:1], 0x0
++; GCN-NEXT:    s_mov_b32 s32, 0
++; GCN-NEXT:    s_waitcnt lgkmcnt(0)
++; GCN-NEXT:    s_swappc_b64 s[30:31], s[0:1]
++; GCN-NEXT:    s_endpgm
++  %x = fadd float %v, 1.0
++  call void @test_export_gfx(float %x)
++  ret void
++}
++
++define amdgpu_ps void @test_export_in_callee_prio(float %v) #0 {
++; GCN-LABEL: test_export_in_callee_prio:
++; GCN:       ; %bb.0:
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    s_mov_b32 s32, 0
++; GCN-NEXT:    v_add_f32_e32 v0, 1.0, v0
++; GCN-NEXT:    s_setprio 2
++; GCN-NEXT:    s_getpc_b64 s[0:1]
++; GCN-NEXT:    s_add_u32 s0, s0, test_export_gfx@gotpcrel32@lo+4
++; GCN-NEXT:    s_addc_u32 s1, s1, test_export_gfx@gotpcrel32@hi+12
++; GCN-NEXT:    s_load_b64 s[0:1], s[0:1], 0x0
++; GCN-NEXT:    s_waitcnt lgkmcnt(0)
++; GCN-NEXT:    s_swappc_b64 s[30:31], s[0:1]
++; GCN-NEXT:    s_endpgm
++  %x = fadd float %v, 1.0
++  call void @llvm.amdgcn.s.setprio(i16 0)
++  call void @test_export_gfx(float %x)
++  ret void
++}
++
++declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
++declare void @llvm.amdgcn.exp.i32(i32, i32, i32, i32, i32, i32, i1, i1) #1
++declare float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8), i32, i32, i32) #2
++declare void @llvm.amdgcn.s.setprio(i16)
++
++attributes #0 = { nounwind }
++attributes #1 = { nounwind inaccessiblememonly }
++attributes #2 = { nounwind readnone }
+diff --git a/llvm/test/CodeGen/AMDGPU/required-export-priority.mir b/llvm/test/CodeGen/AMDGPU/required-export-priority.mir
+new file mode 100644
+index 0000000000000..eee04468036e5
+--- /dev/null
++++ b/llvm/test/CodeGen/AMDGPU/required-export-priority.mir
+@@ -0,0 +1,293 @@
++# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
++# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass=post-RA-hazard-rec -verify-machineinstrs  %s -o - | FileCheck -check-prefixes=GFX1150 %s
++
++--- |
++  define amdgpu_ps void @end_of_shader() {
++    ret void
++  }
++  define amdgpu_ps void @end_of_shader_return_to_epilogue() {
++    ret void
++  }
++  define amdgpu_ps void @end_of_block() {
++    ret void
++  }
++  define amdgpu_ps void @start_of_block() {
++    ret void
++  }
++  define amdgpu_ps void @block_of_exports() {
++    ret void
++  }
++  define amdgpu_ps void @sparse_exports() {
++    ret void
++  }
++  define amdgpu_ps void @existing_setprio_1() {
++    ret void
++  }
++  define amdgpu_ps void @existing_setprio_2() {
++    ret void
++  }
++...
++
++---
++name: end_of_shader
++tracksRegLiveness: true
++liveins:
++  - { reg: '$vgpr0' }
++body: |
++  bb.0:
++    liveins: $vgpr0
++    ; GFX1150-LABEL: name: end_of_shader
++    ; GFX1150: liveins: $vgpr0
++    ; GFX1150-NEXT: {{  $}}
++    ; GFX1150-NEXT: S_SETPRIO 2
++    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: S_SETPRIO 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_ENDPGM 0
++    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    S_ENDPGM 0
++...
++
++---
++name: end_of_shader_return_to_epilogue
++tracksRegLiveness: true
++liveins:
++  - { reg: '$vgpr0' }
++body: |
++  bb.0:
++    liveins: $vgpr0
++    ; GFX1150-LABEL: name: end_of_shader_return_to_epilogue
++    ; GFX1150: liveins: $vgpr0
++    ; GFX1150-NEXT: {{  $}}
++    ; GFX1150-NEXT: S_SETPRIO 2
++    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: S_SETPRIO 0
++    ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_SETPRIO 2
++    ; GFX1150-NEXT: SI_RETURN_TO_EPILOG $vgpr0
++    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    SI_RETURN_TO_EPILOG $vgpr0
++...
++
++---
++name: end_of_block
++tracksRegLiveness: true
++liveins:
++  - { reg: '$vgpr0' }
++body: |
++  ; GFX1150-LABEL: name: end_of_block
++  ; GFX1150: bb.0:
++  ; GFX1150-NEXT:   successors: %bb.1(0x80000000)
++  ; GFX1150-NEXT:   liveins: $vgpr0
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT:   S_SETPRIO 2
++  ; GFX1150-NEXT:   EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++  ; GFX1150-NEXT:   S_SETPRIO 0
++  ; GFX1150-NEXT:   S_WAITCNT_EXPCNT $sgpr_null, 0
++  ; GFX1150-NEXT:   S_NOP 0
++  ; GFX1150-NEXT:   S_NOP 0
++  ; GFX1150-NEXT:   S_SETPRIO 2
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT: bb.1:
++  ; GFX1150-NEXT:   S_ENDPGM 0
++  bb.0:
++    liveins: $vgpr0
++    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++
++  bb.1:
++    S_ENDPGM 0
++...
++
++---
++name: start_of_block
++tracksRegLiveness: true
++liveins:
++  - { reg: '$vgpr0' }
++body: |
++  ; GFX1150-LABEL: name: start_of_block
++  ; GFX1150: bb.0:
++  ; GFX1150-NEXT:   successors: %bb.1(0x80000000)
++  ; GFX1150-NEXT:   liveins: $vgpr0
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT:   S_SETPRIO 2
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT: bb.1:
++  ; GFX1150-NEXT:   successors: %bb.2(0x80000000)
++  ; GFX1150-NEXT:   liveins: $vgpr0
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT:   EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++  ; GFX1150-NEXT:   S_SETPRIO 0
++  ; GFX1150-NEXT:   S_WAITCNT_EXPCNT $sgpr_null, 0
++  ; GFX1150-NEXT:   S_NOP 0
++  ; GFX1150-NEXT:   S_NOP 0
++  ; GFX1150-NEXT:   S_SETPRIO 2
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT: bb.2:
++  ; GFX1150-NEXT:   S_ENDPGM 0
++  bb.0:
++    liveins: $vgpr0
++
++  bb.1:
++    liveins: $vgpr0
++    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++
++  bb.2:
++    S_ENDPGM 0
++...
++
++---
++name: block_of_exports
++tracksRegLiveness: true
++liveins:
++  - { reg: '$vgpr0' }
++body: |
++  bb.0:
++    liveins: $vgpr0
++    ; GFX1150-LABEL: name: block_of_exports
++    ; GFX1150: liveins: $vgpr0
++    ; GFX1150-NEXT: {{  $}}
++    ; GFX1150-NEXT: S_SETPRIO 2
++    ; GFX1150-NEXT: EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: S_SETPRIO 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_ENDPGM 0
++    EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    S_ENDPGM 0
++...
++
++---
++name: sparse_exports
++tracksRegLiveness: true
++liveins:
++  - { reg: '$vgpr0' }
++body: |
++  bb.0:
++    liveins: $vgpr0
++    ; GFX1150-LABEL: name: sparse_exports
++    ; GFX1150: liveins: $vgpr0
++    ; GFX1150-NEXT: {{  $}}
++    ; GFX1150-NEXT: S_SETPRIO 2
++    ; GFX1150-NEXT: EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: S_SETPRIO 0
++    ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_SETPRIO 2
++    ; GFX1150-NEXT: $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
++    ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: S_SETPRIO 0
++    ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_SETPRIO 2
++    ; GFX1150-NEXT: $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
++    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: S_SETPRIO 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_ENDPGM 0
++    EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
++    EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
++    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    S_ENDPGM 0
++...
++
++---
++name: existing_setprio_1
++tracksRegLiveness: true
++liveins:
++  - { reg: '$vgpr0' }
++body: |
++  ; GFX1150-LABEL: name: existing_setprio_1
++  ; GFX1150: bb.0:
++  ; GFX1150-NEXT:   successors: %bb.1(0x80000000)
++  ; GFX1150-NEXT:   liveins: $vgpr0
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT:   S_SETPRIO 2
++  ; GFX1150-NEXT:   $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT: bb.1:
++  ; GFX1150-NEXT:   successors: %bb.2(0x80000000)
++  ; GFX1150-NEXT:   liveins: $vgpr0
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT:   S_SETPRIO 3
++  ; GFX1150-NEXT:   $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
++  ; GFX1150-NEXT:   S_SETPRIO 2
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT: bb.2:
++  ; GFX1150-NEXT:   successors: %bb.3(0x80000000)
++  ; GFX1150-NEXT:   liveins: $vgpr0
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT:   S_SETPRIO 3
++  ; GFX1150-NEXT:   $vgpr0 = V_OR_B32_e32 3, $vgpr0, implicit $exec
++  ; GFX1150-NEXT:   S_SETPRIO 2
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT: bb.3:
++  ; GFX1150-NEXT:   liveins: $vgpr0
++  ; GFX1150-NEXT: {{  $}}
++  ; GFX1150-NEXT:   EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++  ; GFX1150-NEXT:   EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++  ; GFX1150-NEXT:   S_SETPRIO 0
++  ; GFX1150-NEXT:   S_NOP 0
++  ; GFX1150-NEXT:   S_NOP 0
++  ; GFX1150-NEXT:   S_ENDPGM 0
++  bb.0:
++    liveins: $vgpr0
++    $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
++
++  bb.1:
++    liveins: $vgpr0
++    S_SETPRIO 3
++    $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
++    S_SETPRIO 0
++
++  bb.2:
++    liveins: $vgpr0
++    S_SETPRIO 1
++    $vgpr0 = V_OR_B32_e32 3, $vgpr0, implicit $exec
++    S_SETPRIO 0
++
++  bb.3:
++    liveins: $vgpr0
++    EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    S_ENDPGM 0
++...
++
++---
++name: existing_setprio_2
++tracksRegLiveness: true
++liveins:
++  - { reg: '$vgpr0' }
++body: |
++  bb.0:
++    liveins: $vgpr0
++    ; GFX1150-LABEL: name: existing_setprio_2
++    ; GFX1150: liveins: $vgpr0
++    ; GFX1150-NEXT: {{  $}}
++    ; GFX1150-NEXT: S_SETPRIO 3
++    ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    ; GFX1150-NEXT: S_SETPRIO 0
++    ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_NOP 0
++    ; GFX1150-NEXT: S_SETPRIO 2
++    ; GFX1150-NEXT: S_SETPRIO 3
++    ; GFX1150-NEXT: S_ENDPGM 0
++    S_SETPRIO 3
++    EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
++    S_SETPRIO 3
++    S_ENDPGM 0
++...
+
+From 8ea44e65f2c19facff751aeb2ac960f907fb210f Mon Sep 17 00:00:00 2001
+From: Carl Ritson <carl.ritson@amd.com>
+Date: Wed, 17 Jul 2024 16:18:02 +0900
+Subject: [PATCH 2/3] Remove -verify-machineinstrs from test.
+
+---
+ llvm/test/CodeGen/AMDGPU/required-export-priority.ll | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/llvm/test/CodeGen/AMDGPU/required-export-priority.ll b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
+index 377902f3f0d1a..ebc209bd4d451 100644
+--- a/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
++++ b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
+@@ -1,5 +1,5 @@
+ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+-; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -amdgpu-enable-vopd=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
++; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefix=GCN %s
+ 
+ define amdgpu_ps void @test_export_zeroes_f32() #0 {
+ ; GCN-LABEL: test_export_zeroes_f32:

gating.yaml

@@ -1,18 +0,0 @@
---- !Policy
-product_versions:
-  - fedora-*
-decision_contexts:
-  - bodhi_update_push_testing
-  - bodhi_update_push_stable
-  - bodhi_update_push_stable_critpath
-subject_type: koji_build
-rules:
-  - !PassingTestCaseRule {test_case_name: fedora-ci.koji-build.tier0.functional}
---- !Policy
-product_versions:
-  - rhel-10
-decision_context: osci_compose_gate
-rules:
-  - !PassingTestCaseRule {test_case_name: baseos-ci.brew-build.tier0-tmt-x86_64-aarch64.functional}
-  - !PassingTestCaseRule {test_case_name: baseos-ci.brew-build.tier0-tmt-s390x-ppc64le.functional}
-  - !PassingTestCaseRule {test_case_name: osci.brew-build.rebuild.validation}

llvm.rpmlintrc

@@ -1,18 +0,0 @@
-# This library has no dependencies.
-addFilter("llvm-libs.x86_64: E: shared-lib-without-dependency-information /usr/lib64/libRemarks.so.[0-9]+")
-addFilter("llvm-googletest.x86_64: W: devel-file-in-non-devel-package")
-
-# same for llvm-test utilities
-addFilter("llvm-test.x86_64: W: no-manual-page-for-binary")
-
-# Don't warn about libs in llvm-libs
-addFilter("llvm-libs.x86_64: W: devel-file-in-non-devel-package /usr/lib64/lib")
-# These is ok in the llvm gold plugin
-addFilter("llvm-libs.x86_64: W: shared-lib-calls-exit /usr/lib64/LLVMgold.so")
-addFilter("llvm-libs.x86_64: W: no-soname /usr/lib64/LLVMgold.so")
-
-# These are without documentation
-addFilter("llvm-googletest.x86_64: W: no-documentation")
-addFilter("llvm-libs.x86_64: W: no-documentation")
-addFilter("llvm-static.x86_64: W: no-documentation")
-addFilter("llvm-test.x86_64: W: no-documentation")

macros.clang

@@ -1,11 +0,0 @@
-%clang_major_version @@CLANG_MAJOR_VERSION@@
-%clang_minor_version @@CLANG_MINOR_VERSION@@
-%clang_patch_version @@CLANG_PATCH_VERSION@@
-
-%clang_version %{clang_major_version}.%{clang_minor_version}.%{clang_patch_version}
-
-# This is the path to the clang resource directory that has clang's internal
-# headers and libraries.  This path should be used by packages that need to
-# install files into this directory.  This macro's value changes every time
-# clang's version changes.
-%clang_resource_dir %{_prefix}/lib/clang/%{clang_major_version}

rpminspect.yaml

@@ -1,20 +0,0 @@
----
-badfuncs:
-    # For compiler-rt, we allow the following forbidden functions:
-    # - gethostbyname
-    # - gethostbyname2
-    # - gethostbyaddr
-    # - inet_aton
-    # These are never actually used, and are installed just as interceptors.
-    allowed:
-        /usr/lib*/clang/*/lib/*/libclang_rt.?san.so:
-            - gethostbyaddr
-            - gethostbyname
-            - gethostbyname2
-            - inet_aton
-        /usr/lib*/clang/*/lib/*/libclang_rt.memprof.so:
-            - gethostbyaddr
-            - gethostbyname
-            - gethostbyname2
-            - inet_aton
-

sources

@@ -1,4 +0,0 @@
-SHA512 (llvm-project-19.1.1.src.tar.xz) = 84adab40ffb9ec236dbf203d86c08a0c2c651f98278a9d0936490c7901159eb26eabd3db9316013886b549426d4acb43b75d866f7dc670ab299bf93ba35b1891
-SHA512 (llvm-project-19.1.1.src.tar.xz.sig) = 07bb7bffb2b035417d702ca47be9d5759250f1a2cd57606855027d458ceb972a293b45d3d93bcda195588986acbb5eace60524f4aecdc0da7aeb3a8414c37c31
-SHA512 (llvm-project-18.1.8.src.tar.xz) = 25eeee9984c8b4d0fbc240df90f33cbb000d3b0414baff5c8982beafcc5e59e7ef18f6f85d95b3a5f60cb3d4cd4f877c80487b5768bc21bc833f107698ad93db
-SHA512 (llvm-project-18.1.8.src.tar.xz.sig) = ddfd1e8a06756759af6cbe488c82a6d6a62ba91f3e8a0eb4cece561321824f5d165b08ed91010588790b76e19790931d2651b24dba8567e3b151d3cb43bec25b

tests/README.md

@@ -1,6 +0,0 @@
-# Gating testplans for LLVM
-
-The tests for LLVM are in a separate repo: https://src.fedoraproject.org/tests/llvm
-This directory should contain only fmf plans (such as build-gating.fmf) which import
-the tests from the tests repo. This can be done using the "url" parameter of the
-plan's "discover" step. Reference: https://tmt.readthedocs.io/en/stable/spec/plans.html#fmf

tests/build-gating.fmf

@@ -1,59 +0,0 @@
-#
-# Build/PR gating tests for *LLVM 13*
-#
-# Compatible with various LLVM 13 distributions:
-#
-#   * Fedora (ursine packages)
-#   * Centos 9 stream (ursine packages)
-#   * RHEL-9 (ursine packages)
-#   * RHEL-8 (Red Hat module)
-#   * RHEL-7 (software collection)
-#
-
-summary: LLVM tests for build/PR gating
-adjust:
-  - because: "Plan to be ran when either executed locally, or executed by CI system to gate a build or PR."
-    when: >-
-      trigger is defined
-      and trigger != commit
-      and trigger != build
-    enabled: false
-
-  - because: "When testing SCL-ized LLVM, the collection must be enabled first"
-    environment+:
-      WITH_SCL: "scl enable llvm-toolset-13.0 rust-toolset-1.58"
-    when: "collection == llvm-toolset-13.0"
-  - because: "When testing SCL-ized LLVM, the collection must be enabled first"
-    environment+:
-      WITH_SCL: "scl enable llvm-toolset-14.0 rust-toolset-1.62"
-    when: "collection == llvm-toolset-14.0"
-
-  # Unfortunatelly, TMT does not support more declarative approach, we need to run commands on our own.
-  - because: "On CentOS, CRB must be enabled to provide rarer packages"
-    prepare+:
-      - name: Enable CRB
-        how: shell
-        script: dnf config-manager --set-enabled crb
-    when: >-
-      distro == centos
-
-  # Unfortunately, TMT does not support more declarative approach, we need to run commands on our own.
-  - because: "On RHEL, CRB must be enabled to provide rarer packages"
-    prepare+:
-      - name: Enable CRB
-        how: shell
-        script: dnf config-manager --set-enabled rhel-CRB
-    when: >-
-      distro == rhel-9
-      or distro == rhel-8
-
-discover:
-  - name: llvm-tests
-    how: fmf
-    url: https://src.fedoraproject.org/tests/llvm.git
-    ref: main
-execute:
-    how: tmt
-provision:
-  hardware:
-    memory: ">= 4 GiB"