From cd1dd1bcf894dc9aad459a1875431fa9051cfa19 Mon Sep 17 00:00:00 2001 From: CentOS Sources Date: Tue, 9 Nov 2021 04:58:37 -0500 Subject: [PATCH] import llvm-12.0.1-2.module+el8.5.0+12488+254d2a07 --- .gitignore | 2 +- .llvm.metadata | 2 +- ...ic-library-exports-into-their-own-ex.patch | 48 -- ...-binary-exports-into-their-own-expor.patch | 48 -- ...source-interleave-prefix-test-case-c.patch | 29 ++ ...id-aliasing-analysis-if-the-object-s.patch | 427 ------------------ ...nstead-of-AGR-in-eliminateFrameIndex.patch | 166 ------- SOURCES/error-opening-permission.patch | 2 +- SOURCES/llvm-11.0.1.src.tar.xz.sig | Bin 566 -> 0 bytes SOURCES/llvm-12.0.1.src.tar.xz.sig | Bin 0 -> 566 bytes SPECS/llvm.spec | 169 ++++--- 11 files changed, 128 insertions(+), 765 deletions(-) delete mode 100644 SOURCES/0001-CMake-Split-static-library-exports-into-their-own-ex.patch delete mode 100644 SOURCES/0001-CMake-Split-test-binary-exports-into-their-own-expor.patch create mode 100644 SOURCES/0001-PATCH-llvm-Make-source-interleave-prefix-test-case-c.patch delete mode 100644 SOURCES/0001-SelectionDAG-Avoid-aliasing-analysis-if-the-object-s.patch delete mode 100644 SOURCES/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch delete mode 100644 SOURCES/llvm-11.0.1.src.tar.xz.sig create mode 100644 SOURCES/llvm-12.0.1.src.tar.xz.sig diff --git a/.gitignore b/.gitignore index b408ec8..52fbb9e 100644 --- a/.gitignore +++ b/.gitignore @@ -1 +1 @@ -SOURCES/llvm-11.0.1.src.tar.xz +SOURCES/llvm-12.0.1.src.tar.xz diff --git a/.llvm.metadata b/.llvm.metadata index 4eb6ec8..99ec298 100644 --- a/.llvm.metadata +++ b/.llvm.metadata @@ -1 +1 @@ -1a911295260d4e41116b72788eb602702b4bb252 SOURCES/llvm-11.0.1.src.tar.xz +619fe668e0972d11d0fa2db670a57a42d02fb8ca SOURCES/llvm-12.0.1.src.tar.xz diff --git a/SOURCES/0001-CMake-Split-static-library-exports-into-their-own-ex.patch b/SOURCES/0001-CMake-Split-static-library-exports-into-their-own-ex.patch deleted file mode 100644 index 03a439e..0000000 --- a/SOURCES/0001-CMake-Split-static-library-exports-into-their-own-ex.patch +++ /dev/null @@ -1,48 +0,0 @@ -diff -Naur a/llvm/cmake/modules/AddLLVM.cmake b/llvm/cmake/modules/AddLLVM.cmake ---- a/llvm/cmake/modules/AddLLVM.cmake 2020-08-20 16:24:59.000000000 +0000 -+++ b/llvm/cmake/modules/AddLLVM.cmake 2020-09-15 07:09:05.411311520 +0000 -@@ -760,7 +760,11 @@ - if(${name} IN_LIST LLVM_DISTRIBUTION_COMPONENTS OR - (in_llvm_libs AND "llvm-libraries" IN_LIST LLVM_DISTRIBUTION_COMPONENTS) OR - NOT LLVM_DISTRIBUTION_COMPONENTS) -- set(export_to_llvmexports EXPORT LLVMExports) -+ if (ARG_SHARED) -+ set(export_to_llvmexports EXPORT LLVMExports) -+ else() -+ set(export_to_llvmexports EXPORT LLVMStaticExports) -+ endif() - set_property(GLOBAL PROPERTY LLVM_HAS_EXPORTS True) - endif() - -diff -Naur a/llvm/cmake/modules/CMakeLists.txt b/llvm/cmake/modules/CMakeLists.txt ---- a/llvm/cmake/modules/CMakeLists.txt 2020-08-20 16:24:59.000000000 +0000 -+++ b/llvm/cmake/modules/CMakeLists.txt 2020-09-15 07:09:05.411311520 +0000 -@@ -79,6 +79,7 @@ - # source files are put in the same cmake directory. - set(LLVM_CONFIG_EXPORTS_FILE "${LLVM_EXPORTS_FILE}") - set(LLVM_CONFIG_EXPORTS "${LLVM_EXPORTS};${LLVM_EXPORTS_BUILDTREE_ONLY}") -+set(LLVM_CONFIG_STATIC_EXPORTS_FILE "\${LLVM_CMAKE_DIR}/LLVMStaticExports.cmake") - set(llvm_config_include_buildtree_only_exports - "include(\"${LLVM_BUILDTREEONLY_EXPORTS_FILE}\")") - configure_file( -@@ -139,6 +140,8 @@ - if(llvm_has_exports) - install(EXPORT LLVMExports DESTINATION ${LLVM_INSTALL_PACKAGE_DIR} - COMPONENT cmake-exports) -+ install(EXPORT LLVMStaticExports DESTINATION ${LLVM_INSTALL_PACKAGE_DIR} -+ COMPONENT cmake-exports) - endif() - - install(FILES -diff -Naur a/llvm/cmake/modules/LLVMConfig.cmake.in b/llvm/cmake/modules/LLVMConfig.cmake.in ---- a/llvm/cmake/modules/LLVMConfig.cmake.in 2020-08-20 16:24:59.000000000 +0000 -+++ b/llvm/cmake/modules/LLVMConfig.cmake.in 2020-09-15 07:09:05.411311520 +0000 -@@ -103,6 +103,8 @@ - set(LLVM_EXPORTED_TARGETS "@LLVM_CONFIG_EXPORTS@") - include("@LLVM_CONFIG_EXPORTS_FILE@") - @llvm_config_include_buildtree_only_exports@ -+ -+ include("@LLVM_CONFIG_STATIC_EXPORTS_FILE@" OPTIONAL) - endif() - - # By creating intrinsics_gen, omp_gen and acc_gen here, subprojects that depend diff --git a/SOURCES/0001-CMake-Split-test-binary-exports-into-their-own-expor.patch b/SOURCES/0001-CMake-Split-test-binary-exports-into-their-own-expor.patch deleted file mode 100644 index 0ba80a8..0000000 --- a/SOURCES/0001-CMake-Split-test-binary-exports-into-their-own-expor.patch +++ /dev/null @@ -1,48 +0,0 @@ -diff -Naur a/llvm/cmake/modules/AddLLVM.cmake b/llvm/cmake/modules/AddLLVM.cmake ---- a/llvm/cmake/modules/AddLLVM.cmake 2020-09-15 09:12:47.596424499 +0000 -+++ b/llvm/cmake/modules/AddLLVM.cmake 2020-09-15 13:36:03.509429423 +0000 -@@ -1235,7 +1235,12 @@ - set(export_to_llvmexports) - if (${name} IN_LIST LLVM_DISTRIBUTION_COMPONENTS OR - NOT LLVM_DISTRIBUTION_COMPONENTS) -- set(export_to_llvmexports EXPORT LLVMExports) -+ if (${name} STREQUAL "not" OR ${name} STREQUAL "count" OR -+ ${name} STREQUAL "yaml-bench" OR ${name} STREQUAL "lli-child-target") -+ set(export_to_llvmexports EXPORT LLVMTestExports) -+ else() -+ set(export_to_llvmexports EXPORT LLVMExports) -+ endif() - set_property(GLOBAL PROPERTY LLVM_HAS_EXPORTS True) - endif() - -diff -Naur a/llvm/cmake/modules/CMakeLists.txt b/llvm/cmake/modules/CMakeLists.txt ---- a/llvm/cmake/modules/CMakeLists.txt 2020-09-15 09:12:47.596424499 +0000 -+++ b/llvm/cmake/modules/CMakeLists.txt 2020-09-15 09:14:33.110044977 +0000 -@@ -80,6 +80,7 @@ - set(LLVM_CONFIG_EXPORTS_FILE "${LLVM_EXPORTS_FILE}") - set(LLVM_CONFIG_EXPORTS "${LLVM_EXPORTS};${LLVM_EXPORTS_BUILDTREE_ONLY}") - set(LLVM_CONFIG_STATIC_EXPORTS_FILE "\${LLVM_CMAKE_DIR}/LLVMStaticExports.cmake") -+set(LLVM_CONFIG_TEST_EXPORTS_FILE "\${LLVM_CMAKE_DIR}/LLVMTestExports.cmake") - set(llvm_config_include_buildtree_only_exports - "include(\"${LLVM_BUILDTREEONLY_EXPORTS_FILE}\")") - configure_file( -@@ -142,6 +143,8 @@ - COMPONENT cmake-exports) - install(EXPORT LLVMStaticExports DESTINATION ${LLVM_INSTALL_PACKAGE_DIR} - COMPONENT cmake-exports) -+ install(EXPORT LLVMTestExports DESTINATION ${LLVM_INSTALL_PACKAGE_DIR} -+ COMPONENT cmake-exports) - endif() - - install(FILES -diff -Naur a/llvm/cmake/modules/LLVMConfig.cmake.in b/llvm/cmake/modules/LLVMConfig.cmake.in ---- a/llvm/cmake/modules/LLVMConfig.cmake.in 2020-09-15 09:12:47.597424505 +0000 -+++ b/llvm/cmake/modules/LLVMConfig.cmake.in 2020-09-15 09:14:54.261169357 +0000 -@@ -105,6 +105,7 @@ - @llvm_config_include_buildtree_only_exports@ - - include("@LLVM_CONFIG_STATIC_EXPORTS_FILE@" OPTIONAL) -+ include("@LLVM_CONFIG_TEST_EXPORTS_FILE@" OPTIONAL) - endif() - - # By creating intrinsics_gen, omp_gen and acc_gen here, subprojects that depend diff --git a/SOURCES/0001-PATCH-llvm-Make-source-interleave-prefix-test-case-c.patch b/SOURCES/0001-PATCH-llvm-Make-source-interleave-prefix-test-case-c.patch new file mode 100644 index 0000000..526b25f --- /dev/null +++ b/SOURCES/0001-PATCH-llvm-Make-source-interleave-prefix-test-case-c.patch @@ -0,0 +1,29 @@ +From 60760d66030695105bcf4364f22b7f6053a25253 Mon Sep 17 00:00:00 2001 +From: serge-sans-paille +Date: Thu, 8 Apr 2021 09:33:37 +0200 +Subject: [PATCH] [PATCH][llvm] Make source-interleave-prefix test case + compatible with llvm-test + +llvm-test runs test from a directory that's not the upstream one, and that leads +to some false positive. Workaround this by forcing the current working +directory. +--- + llvm/test/tools/llvm-objdump/X86/source-interleave-prefix.test | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/llvm/test/tools/llvm-objdump/X86/source-interleave-prefix.test b/llvm/test/tools/llvm-objdump/X86/source-interleave-prefix.test +index 23ce55a..d260ee2 100644 +--- a/llvm/test/tools/llvm-objdump/X86/source-interleave-prefix.test ++++ b/llvm/test/tools/llvm-objdump/X86/source-interleave-prefix.test +@@ -5,7 +5,7 @@ + + ; RUN: sed -e "s,SRC_COMPDIR,./Inputs,g" %p/Inputs/source-interleave.ll > %t-relative-path.ll + ; RUN: llc -o %t-relative-path.o -filetype=obj -mtriple=x86_64-pc-linux %t-relative-path.ll +-; RUN: llvm-objdump --prefix myprefix --source %t-relative-path.o 2>&1 | \ ++; RUN: mkdir -p %t0 && cd %t0 && llvm-objdump --prefix myprefix --source %t-relative-path.o 2>&1 | \ + ; RUN: FileCheck %s --check-prefix=CHECK-BROKEN-PREFIX -DFILE=%t-relative-path.o -DPREFIX=. + ; CHECK-BROKEN-PREFIX: warning: '[[FILE]]': failed to find source [[PREFIX]]/Inputs/source-interleave-x86_64.c + +-- +1.8.3.1 + diff --git a/SOURCES/0001-SelectionDAG-Avoid-aliasing-analysis-if-the-object-s.patch b/SOURCES/0001-SelectionDAG-Avoid-aliasing-analysis-if-the-object-s.patch deleted file mode 100644 index 33a53b6..0000000 --- a/SOURCES/0001-SelectionDAG-Avoid-aliasing-analysis-if-the-object-s.patch +++ /dev/null @@ -1,427 +0,0 @@ -From 153232761304a2746ea9a11d9da3aa5e5a7c26d0 Mon Sep 17 00:00:00 2001 -From: Hsiangkai Wang -Date: Fri, 20 Nov 2020 08:52:03 +0800 -Subject: [PATCH] [SelectionDAG] Avoid aliasing analysis if the object size is - unknown. - -If the size of memory access is unknown, do not use it to analysis. One -example of unknown size memory access is to load/store scalable vector -objects on the stack. - -Differential Revision: https://reviews.llvm.org/D91833 ---- - .../SelectionDAGAddressAnalysis.cpp | 31 +- - llvm/unittests/CodeGen/CMakeLists.txt | 1 + - .../SelectionDAGAddressAnalysisTest.cpp | 337 ++++++++++++++++++ - 3 files changed, 359 insertions(+), 10 deletions(-) - create mode 100644 llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp - -diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp -index 3a53ab9717a4..20c7d771bfb6 100644 ---- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp -+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp -@@ -7,6 +7,7 @@ - //===----------------------------------------------------------------------===// - - #include "llvm/CodeGen/SelectionDAGAddressAnalysis.h" -+#include "llvm/Analysis/MemoryLocation.h" - #include "llvm/CodeGen/ISDOpcodes.h" - #include "llvm/CodeGen/MachineFrameInfo.h" - #include "llvm/CodeGen/MachineFunction.h" -@@ -96,18 +97,28 @@ bool BaseIndexOffset::computeAliasing(const SDNode *Op0, - int64_t PtrDiff; - if (NumBytes0.hasValue() && NumBytes1.hasValue() && - BasePtr0.equalBaseIndex(BasePtr1, DAG, PtrDiff)) { -+ // If the size of memory access is unknown, do not use it to analysis. -+ // One example of unknown size memory access is to load/store scalable -+ // vector objects on the stack. - // BasePtr1 is PtrDiff away from BasePtr0. They alias if none of the - // following situations arise: -- IsAlias = !( -- // [----BasePtr0----] -- // [---BasePtr1--] -- // ========PtrDiff========> -- (*NumBytes0 <= PtrDiff) || -- // [----BasePtr0----] -- // [---BasePtr1--] -- // =====(-PtrDiff)====> -- (PtrDiff + *NumBytes1 <= 0)); // i.e. *NumBytes1 < -PtrDiff. -- return true; -+ if (PtrDiff >= 0 && -+ *NumBytes0 != static_cast(MemoryLocation::UnknownSize)) { -+ // [----BasePtr0----] -+ // [---BasePtr1--] -+ // ========PtrDiff========> -+ IsAlias = !(*NumBytes0 <= PtrDiff); -+ return true; -+ } -+ if (PtrDiff < 0 && -+ *NumBytes1 != static_cast(MemoryLocation::UnknownSize)) { -+ // [----BasePtr0----] -+ // [---BasePtr1--] -+ // =====(-PtrDiff)====> -+ IsAlias = !((PtrDiff + *NumBytes1) <= 0); -+ return true; -+ } -+ return false; - } - // If both BasePtr0 and BasePtr1 are FrameIndexes, we will not be - // able to calculate their relative offset if at least one arises -diff --git a/llvm/unittests/CodeGen/CMakeLists.txt b/llvm/unittests/CodeGen/CMakeLists.txt -index fa3cb1fa7669..2fe525f1b413 100644 ---- a/llvm/unittests/CodeGen/CMakeLists.txt -+++ b/llvm/unittests/CodeGen/CMakeLists.txt -@@ -21,6 +21,7 @@ add_llvm_unittest(CodeGenTests - MachineInstrTest.cpp - MachineOperandTest.cpp - ScalableVectorMVTsTest.cpp -+ SelectionDAGAddressAnalysisTest.cpp - TypeTraitsTest.cpp - TargetOptionsTest.cpp - ) -diff --git a/llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp b/llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp -new file mode 100644 -index 000000000000..c00b6c518e70 ---- /dev/null -+++ b/llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp -@@ -0,0 +1,337 @@ -+//===- llvm/unittest/CodeGen/SelectionDAGAddressAnalysisTest.cpp ---------===// -+// -+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -+// See https://llvm.org/LICENSE.txt for license information. -+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -+// -+//===----------------------------------------------------------------------===// -+ -+#include "llvm/CodeGen/SelectionDAGAddressAnalysis.h" -+#include "llvm/Analysis/MemoryLocation.h" -+#include "llvm/Analysis/OptimizationRemarkEmitter.h" -+#include "llvm/AsmParser/Parser.h" -+#include "llvm/CodeGen/MachineModuleInfo.h" -+#include "llvm/CodeGen/SelectionDAG.h" -+#include "llvm/CodeGen/TargetLowering.h" -+#include "llvm/Support/SourceMgr.h" -+#include "llvm/Support/TargetRegistry.h" -+#include "llvm/Support/TargetSelect.h" -+#include "llvm/Target/TargetMachine.h" -+#include "gtest/gtest.h" -+ -+namespace llvm { -+ -+class SelectionDAGAddressAnalysisTest : public testing::Test { -+protected: -+ static void SetUpTestCase() { -+ InitializeAllTargets(); -+ InitializeAllTargetMCs(); -+ } -+ -+ void SetUp() override { -+ StringRef Assembly = "@g = global i32 0\n" -+ "define i32 @f() {\n" -+ " %1 = load i32, i32* @g\n" -+ " ret i32 %1\n" -+ "}"; -+ -+ Triple TargetTriple("aarch64--"); -+ std::string Error; -+ const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error); -+ // FIXME: These tests do not depend on AArch64 specifically, but we have to -+ // initialize a target. A skeleton Target for unittests would allow us to -+ // always run these tests. -+ if (!T) -+ return; -+ -+ TargetOptions Options; -+ TM = std::unique_ptr(static_cast( -+ T->createTargetMachine("AArch64", "", "+sve", Options, None, None, -+ CodeGenOpt::Aggressive))); -+ if (!TM) -+ return; -+ -+ SMDiagnostic SMError; -+ M = parseAssemblyString(Assembly, SMError, Context); -+ if (!M) -+ report_fatal_error(SMError.getMessage()); -+ M->setDataLayout(TM->createDataLayout()); -+ -+ F = M->getFunction("f"); -+ if (!F) -+ report_fatal_error("F?"); -+ G = M->getGlobalVariable("g"); -+ if (!G) -+ report_fatal_error("G?"); -+ -+ MachineModuleInfo MMI(TM.get()); -+ -+ MF = std::make_unique(*F, *TM, *TM->getSubtargetImpl(*F), -+ 0, MMI); -+ -+ DAG = std::make_unique(*TM, CodeGenOpt::None); -+ if (!DAG) -+ report_fatal_error("DAG?"); -+ OptimizationRemarkEmitter ORE(F); -+ DAG->init(*MF, ORE, nullptr, nullptr, nullptr, nullptr, nullptr); -+ } -+ -+ TargetLoweringBase::LegalizeTypeAction getTypeAction(EVT VT) { -+ return DAG->getTargetLoweringInfo().getTypeAction(Context, VT); -+ } -+ -+ EVT getTypeToTransformTo(EVT VT) { -+ return DAG->getTargetLoweringInfo().getTypeToTransformTo(Context, VT); -+ } -+ -+ LLVMContext Context; -+ std::unique_ptr TM; -+ std::unique_ptr M; -+ Function *F; -+ GlobalVariable *G; -+ std::unique_ptr MF; -+ std::unique_ptr DAG; -+}; -+ -+TEST_F(SelectionDAGAddressAnalysisTest, sameFrameObject) { -+ if (!TM) -+ return; -+ SDLoc Loc; -+ auto Int8VT = EVT::getIntegerVT(Context, 8); -+ auto VecVT = EVT::getVectorVT(Context, Int8VT, 4); -+ SDValue FIPtr = DAG->CreateStackTemporary(VecVT); -+ int FI = cast(FIPtr.getNode())->getIndex(); -+ MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(*MF, FI); -+ TypeSize Offset = TypeSize::Fixed(0); -+ SDValue Value = DAG->getConstant(0, Loc, VecVT); -+ SDValue Index = DAG->getMemBasePlusOffset(FIPtr, Offset, Loc); -+ SDValue Store = DAG->getStore(DAG->getEntryNode(), Loc, Value, Index, -+ PtrInfo.getWithOffset(Offset)); -+ Optional NumBytes = MemoryLocation::getSizeOrUnknown( -+ cast(Store)->getMemoryVT().getStoreSize()); -+ -+ bool IsAlias; -+ bool IsValid = BaseIndexOffset::computeAliasing( -+ Store.getNode(), NumBytes, Store.getNode(), NumBytes, *DAG, IsAlias); -+ -+ EXPECT_TRUE(IsValid); -+ EXPECT_TRUE(IsAlias); -+} -+ -+TEST_F(SelectionDAGAddressAnalysisTest, noAliasingFrameObjects) { -+ if (!TM) -+ return; -+ SDLoc Loc; -+ auto Int8VT = EVT::getIntegerVT(Context, 8); -+ // <4 x i8> -+ auto VecVT = EVT::getVectorVT(Context, Int8VT, 4); -+ // <2 x i8> -+ auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2); -+ SDValue FIPtr = DAG->CreateStackTemporary(VecVT); -+ int FI = cast(FIPtr.getNode())->getIndex(); -+ MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(*MF, FI); -+ SDValue Value = DAG->getConstant(0, Loc, SubVecVT); -+ TypeSize Offset0 = TypeSize::Fixed(0); -+ TypeSize Offset1 = SubVecVT.getStoreSize(); -+ SDValue Index0 = DAG->getMemBasePlusOffset(FIPtr, Offset0, Loc); -+ SDValue Index1 = DAG->getMemBasePlusOffset(FIPtr, Offset1, Loc); -+ SDValue Store0 = DAG->getStore(DAG->getEntryNode(), Loc, Value, Index0, -+ PtrInfo.getWithOffset(Offset0)); -+ SDValue Store1 = DAG->getStore(DAG->getEntryNode(), Loc, Value, Index1, -+ PtrInfo.getWithOffset(Offset1)); -+ Optional NumBytes0 = MemoryLocation::getSizeOrUnknown( -+ cast(Store0)->getMemoryVT().getStoreSize()); -+ Optional NumBytes1 = MemoryLocation::getSizeOrUnknown( -+ cast(Store1)->getMemoryVT().getStoreSize()); -+ -+ bool IsAlias; -+ bool IsValid = BaseIndexOffset::computeAliasing( -+ Store0.getNode(), NumBytes0, Store1.getNode(), NumBytes1, *DAG, IsAlias); -+ -+ EXPECT_TRUE(IsValid); -+ EXPECT_FALSE(IsAlias); -+} -+ -+TEST_F(SelectionDAGAddressAnalysisTest, unknownSizeFrameObjects) { -+ if (!TM) -+ return; -+ SDLoc Loc; -+ auto Int8VT = EVT::getIntegerVT(Context, 8); -+ // -+ auto VecVT = EVT::getVectorVT(Context, Int8VT, 4, true); -+ // -+ auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2, true); -+ SDValue FIPtr = DAG->CreateStackTemporary(VecVT); -+ int FI = cast(FIPtr.getNode())->getIndex(); -+ MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(*MF, FI); -+ SDValue Value = DAG->getConstant(0, Loc, SubVecVT); -+ TypeSize Offset0 = TypeSize::Fixed(0); -+ TypeSize Offset1 = SubVecVT.getStoreSize(); -+ SDValue Index0 = DAG->getMemBasePlusOffset(FIPtr, Offset0, Loc); -+ SDValue Index1 = DAG->getMemBasePlusOffset(FIPtr, Offset1, Loc); -+ SDValue Store0 = DAG->getStore(DAG->getEntryNode(), Loc, Value, Index0, -+ PtrInfo.getWithOffset(Offset0)); -+ SDValue Store1 = DAG->getStore(DAG->getEntryNode(), Loc, Value, Index1, -+ PtrInfo.getWithOffset(Offset1)); -+ Optional NumBytes0 = MemoryLocation::getSizeOrUnknown( -+ cast(Store0)->getMemoryVT().getStoreSize()); -+ Optional NumBytes1 = MemoryLocation::getSizeOrUnknown( -+ cast(Store1)->getMemoryVT().getStoreSize()); -+ -+ bool IsAlias; -+ bool IsValid = BaseIndexOffset::computeAliasing( -+ Store0.getNode(), NumBytes0, Store1.getNode(), NumBytes1, *DAG, IsAlias); -+ -+ EXPECT_FALSE(IsValid); -+} -+ -+TEST_F(SelectionDAGAddressAnalysisTest, globalWithFrameObject) { -+ if (!TM) -+ return; -+ SDLoc Loc; -+ auto Int8VT = EVT::getIntegerVT(Context, 8); -+ // -+ auto VecVT = EVT::getVectorVT(Context, Int8VT, 4, true); -+ SDValue FIPtr = DAG->CreateStackTemporary(VecVT); -+ int FI = cast(FIPtr.getNode())->getIndex(); -+ MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(*MF, FI); -+ SDValue Value = DAG->getConstant(0, Loc, VecVT); -+ TypeSize Offset = TypeSize::Fixed(0); -+ SDValue Index = DAG->getMemBasePlusOffset(FIPtr, Offset, Loc); -+ SDValue Store = DAG->getStore(DAG->getEntryNode(), Loc, Value, Index, -+ PtrInfo.getWithOffset(Offset)); -+ Optional NumBytes = MemoryLocation::getSizeOrUnknown( -+ cast(Store)->getMemoryVT().getStoreSize()); -+ EVT GTy = DAG->getTargetLoweringInfo().getValueType(DAG->getDataLayout(), -+ G->getType()); -+ SDValue GValue = DAG->getConstant(0, Loc, GTy); -+ SDValue GAddr = DAG->getGlobalAddress(G, Loc, GTy); -+ SDValue GStore = DAG->getStore(DAG->getEntryNode(), Loc, GValue, GAddr, -+ MachinePointerInfo(G, 0)); -+ Optional GNumBytes = MemoryLocation::getSizeOrUnknown( -+ cast(GStore)->getMemoryVT().getStoreSize()); -+ -+ bool IsAlias; -+ bool IsValid = BaseIndexOffset::computeAliasing( -+ Store.getNode(), NumBytes, GStore.getNode(), GNumBytes, *DAG, IsAlias); -+ -+ EXPECT_TRUE(IsValid); -+ EXPECT_FALSE(IsAlias); -+} -+ -+TEST_F(SelectionDAGAddressAnalysisTest, fixedSizeFrameObjectsWithinDiff) { -+ if (!TM) -+ return; -+ SDLoc Loc; -+ auto Int8VT = EVT::getIntegerVT(Context, 8); -+ // -+ auto VecVT = EVT::getVectorVT(Context, Int8VT, 4, true); -+ // -+ auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2, true); -+ // <2 x i8> -+ auto SubFixedVecVT2xi8 = EVT::getVectorVT(Context, Int8VT, 2); -+ SDValue FIPtr = DAG->CreateStackTemporary(VecVT); -+ int FI = cast(FIPtr.getNode())->getIndex(); -+ MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(*MF, FI); -+ SDValue Value0 = DAG->getConstant(0, Loc, SubFixedVecVT2xi8); -+ SDValue Value1 = DAG->getConstant(0, Loc, SubVecVT); -+ TypeSize Offset0 = TypeSize::Fixed(0); -+ TypeSize Offset1 = SubFixedVecVT2xi8.getStoreSize(); -+ SDValue Index0 = DAG->getMemBasePlusOffset(FIPtr, Offset0, Loc); -+ SDValue Index1 = DAG->getMemBasePlusOffset(FIPtr, Offset1, Loc); -+ SDValue Store0 = DAG->getStore(DAG->getEntryNode(), Loc, Value0, Index0, -+ PtrInfo.getWithOffset(Offset0)); -+ SDValue Store1 = DAG->getStore(DAG->getEntryNode(), Loc, Value1, Index1, -+ PtrInfo.getWithOffset(Offset1)); -+ Optional NumBytes0 = MemoryLocation::getSizeOrUnknown( -+ cast(Store0)->getMemoryVT().getStoreSize()); -+ Optional NumBytes1 = MemoryLocation::getSizeOrUnknown( -+ cast(Store1)->getMemoryVT().getStoreSize()); -+ -+ bool IsAlias; -+ bool IsValid = BaseIndexOffset::computeAliasing( -+ Store0.getNode(), NumBytes0, Store1.getNode(), NumBytes1, *DAG, IsAlias); -+ EXPECT_TRUE(IsValid); -+ EXPECT_FALSE(IsAlias); -+ -+ IsValid = BaseIndexOffset::computeAliasing( -+ Store1.getNode(), NumBytes1, Store0.getNode(), NumBytes0, *DAG, IsAlias); -+ EXPECT_TRUE(IsValid); -+ EXPECT_FALSE(IsAlias); -+} -+ -+TEST_F(SelectionDAGAddressAnalysisTest, fixedSizeFrameObjectsOutOfDiff) { -+ if (!TM) -+ return; -+ SDLoc Loc; -+ auto Int8VT = EVT::getIntegerVT(Context, 8); -+ // -+ auto VecVT = EVT::getVectorVT(Context, Int8VT, 4, true); -+ // -+ auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2, true); -+ // <2 x i8> -+ auto SubFixedVecVT2xi8 = EVT::getVectorVT(Context, Int8VT, 2); -+ // <4 x i8> -+ auto SubFixedVecVT4xi8 = EVT::getVectorVT(Context, Int8VT, 4); -+ SDValue FIPtr = DAG->CreateStackTemporary(VecVT); -+ int FI = cast(FIPtr.getNode())->getIndex(); -+ MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(*MF, FI); -+ SDValue Value0 = DAG->getConstant(0, Loc, SubFixedVecVT4xi8); -+ SDValue Value1 = DAG->getConstant(0, Loc, SubVecVT); -+ TypeSize Offset0 = TypeSize::Fixed(0); -+ TypeSize Offset1 = SubFixedVecVT2xi8.getStoreSize(); -+ SDValue Index0 = DAG->getMemBasePlusOffset(FIPtr, Offset0, Loc); -+ SDValue Index1 = DAG->getMemBasePlusOffset(FIPtr, Offset1, Loc); -+ SDValue Store0 = DAG->getStore(DAG->getEntryNode(), Loc, Value0, Index0, -+ PtrInfo.getWithOffset(Offset0)); -+ SDValue Store1 = DAG->getStore(DAG->getEntryNode(), Loc, Value1, Index1, -+ PtrInfo.getWithOffset(Offset1)); -+ Optional NumBytes0 = MemoryLocation::getSizeOrUnknown( -+ cast(Store0)->getMemoryVT().getStoreSize()); -+ Optional NumBytes1 = MemoryLocation::getSizeOrUnknown( -+ cast(Store1)->getMemoryVT().getStoreSize()); -+ -+ bool IsAlias; -+ bool IsValid = BaseIndexOffset::computeAliasing( -+ Store0.getNode(), NumBytes0, Store1.getNode(), NumBytes1, *DAG, IsAlias); -+ EXPECT_TRUE(IsValid); -+ EXPECT_TRUE(IsAlias); -+} -+ -+TEST_F(SelectionDAGAddressAnalysisTest, twoFixedStackObjects) { -+ if (!TM) -+ return; -+ SDLoc Loc; -+ auto Int8VT = EVT::getIntegerVT(Context, 8); -+ // -+ auto VecVT = EVT::getVectorVT(Context, Int8VT, 2, true); -+ // <2 x i8> -+ auto FixedVecVT = EVT::getVectorVT(Context, Int8VT, 2); -+ SDValue FIPtr0 = DAG->CreateStackTemporary(FixedVecVT); -+ SDValue FIPtr1 = DAG->CreateStackTemporary(VecVT); -+ int FI0 = cast(FIPtr0.getNode())->getIndex(); -+ int FI1 = cast(FIPtr1.getNode())->getIndex(); -+ MachinePointerInfo PtrInfo0 = MachinePointerInfo::getFixedStack(*MF, FI0); -+ MachinePointerInfo PtrInfo1 = MachinePointerInfo::getFixedStack(*MF, FI1); -+ SDValue Value0 = DAG->getConstant(0, Loc, FixedVecVT); -+ SDValue Value1 = DAG->getConstant(0, Loc, VecVT); -+ TypeSize Offset0 = TypeSize::Fixed(0); -+ SDValue Index0 = DAG->getMemBasePlusOffset(FIPtr0, Offset0, Loc); -+ SDValue Index1 = DAG->getMemBasePlusOffset(FIPtr1, Offset0, Loc); -+ SDValue Store0 = DAG->getStore(DAG->getEntryNode(), Loc, Value0, Index0, -+ PtrInfo0.getWithOffset(Offset0)); -+ SDValue Store1 = DAG->getStore(DAG->getEntryNode(), Loc, Value1, Index1, -+ PtrInfo1.getWithOffset(Offset0)); -+ Optional NumBytes0 = MemoryLocation::getSizeOrUnknown( -+ cast(Store0)->getMemoryVT().getStoreSize()); -+ Optional NumBytes1 = MemoryLocation::getSizeOrUnknown( -+ cast(Store1)->getMemoryVT().getStoreSize()); -+ -+ bool IsAlias; -+ bool IsValid = BaseIndexOffset::computeAliasing( -+ Store0.getNode(), NumBytes0, Store1.getNode(), NumBytes1, *DAG, IsAlias); -+ EXPECT_TRUE(IsValid); -+ EXPECT_FALSE(IsAlias); -+} -+ -+} // end namespace llvm --- -2.26.2 - diff --git a/SOURCES/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch b/SOURCES/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch deleted file mode 100644 index 80d6a1e..0000000 --- a/SOURCES/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch +++ /dev/null @@ -1,166 +0,0 @@ -From d851495f2fe614c4c860bda1bd3c80bfbe48360b Mon Sep 17 00:00:00 2001 -From: Jonas Paulsson -Date: Thu, 8 Oct 2020 13:18:29 +0200 -Subject: [PATCH] [SystemZ] Use LA instead of AGR in eliminateFrameIndex(). - -Since AGR clobbers CC it should not be used here. - -Fixes https://bugs.llvm.org/show_bug.cgi?id=47736. - -Review: Ulrich Weigand -Differential Revision: https://reviews.llvm.org/D89034 ---- - .../Target/SystemZ/SystemZRegisterInfo.cpp | 4 +-- - llvm/test/CodeGen/SystemZ/frame-14.ll | 26 +++++++++---------- - llvm/test/CodeGen/SystemZ/frame-16.ll | 4 +-- - 3 files changed, 17 insertions(+), 17 deletions(-) - -diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp -index 53b06c6e7e6d..88212e52460f 100644 ---- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp -+++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp -@@ -322,8 +322,8 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, - // Load the high offset into the scratch register and use it as - // an index. - TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); -- BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg) -- .addReg(ScratchReg, RegState::Kill).addReg(BasePtr); -+ BuildMI(MBB, MI, DL, TII->get(SystemZ::LA), ScratchReg) -+ .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg); - } - - // Use the scratch register as the base. It then dies here. -diff --git a/llvm/test/CodeGen/SystemZ/frame-14.ll b/llvm/test/CodeGen/SystemZ/frame-14.ll -index e70731249b42..193ff81123c5 100644 ---- a/llvm/test/CodeGen/SystemZ/frame-14.ll -+++ b/llvm/test/CodeGen/SystemZ/frame-14.ll -@@ -85,13 +85,13 @@ define void @f3() { - define void @f4() { - ; CHECK-NOFP-LABEL: f4: - ; CHECK-NOFP: llilh %r1, 8 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mvi 0(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f4: - ; CHECK-FP: llilh %r1, 8 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mvi 0(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [524104 x i8], align 8 -@@ -108,13 +108,13 @@ define void @f4() { - define void @f5() { - ; CHECK-NOFP-LABEL: f5: - ; CHECK-NOFP: llilh %r1, 8 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mvi 4095(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f5: - ; CHECK-FP: llilh %r1, 8 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mvi 4095(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [524104 x i8], align 8 -@@ -130,13 +130,13 @@ define void @f5() { - define void @f6() { - ; CHECK-NOFP-LABEL: f6: - ; CHECK-NOFP: llilh %r1, 8 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mviy 4096(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f6: - ; CHECK-FP: llilh %r1, 8 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mviy 4096(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [524104 x i8], align 8 -@@ -155,13 +155,13 @@ define void @f6() { - define void @f7() { - ; CHECK-NOFP-LABEL: f7: - ; CHECK-NOFP: llilh %r1, 23 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mviy 65535(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f7: - ; CHECK-FP: llilh %r1, 23 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mviy 65535(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [1048400 x i8], align 8 -@@ -178,13 +178,13 @@ define void @f7() { - define void @f8() { - ; CHECK-NOFP-LABEL: f8: - ; CHECK-NOFP: llilh %r1, 24 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mvi 7(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f8: - ; CHECK-FP: llilh %r1, 24 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mvi 7(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [1048408 x i8], align 8 -@@ -233,7 +233,7 @@ define void @f10(i32 *%vptr) { - ; CHECK-NOFP-LABEL: f10: - ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) - ; CHECK-NOFP: llilh [[REGISTER]], 8 --; CHECK-NOFP: agr [[REGISTER]], %r15 -+; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15) - ; CHECK-NOFP: mvi 0([[REGISTER]]), 42 - ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) - ; CHECK-NOFP: br %r14 -@@ -241,7 +241,7 @@ define void @f10(i32 *%vptr) { - ; CHECK-FP-LABEL: f10: - ; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) - ; CHECK-FP: llilh [[REGISTER]], 8 --; CHECK-FP: agr [[REGISTER]], %r11 -+; CHECK-FP: la [[REGISTER]], 0([[REGISTER]],%r11) - ; CHECK-FP: mvi 0([[REGISTER]]), 42 - ; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) - ; CHECK-FP: br %r14 -@@ -273,7 +273,7 @@ define void @f11(i32 *%vptr) { - ; CHECK-NOFP: stmg %r6, %r15, - ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) - ; CHECK-NOFP: llilh [[REGISTER]], 8 --; CHECK-NOFP: agr [[REGISTER]], %r15 -+; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15) - ; CHECK-NOFP: mvi 0([[REGISTER]]), 42 - ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) - ; CHECK-NOFP: lmg %r6, %r15, -diff --git a/llvm/test/CodeGen/SystemZ/frame-16.ll b/llvm/test/CodeGen/SystemZ/frame-16.ll -index ae8a041ae110..a95c58207afb 100644 ---- a/llvm/test/CodeGen/SystemZ/frame-16.ll -+++ b/llvm/test/CodeGen/SystemZ/frame-16.ll -@@ -311,13 +311,13 @@ define void @f11(i32 *%vptr, i8 %byte) { - define void @f12(i8 %byte, i64 %index) { - ; CHECK-NOFP-LABEL: f12: - ; CHECK-NOFP: llilh %r1, 8 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: stc %r2, 0(%r3,%r1) - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f12: - ; CHECK-FP: llilh %r1, 8 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: stc %r2, 0(%r3,%r1) - ; CHECK-FP: br %r14 - %region1 = alloca [524104 x i8], align 8 --- -2.26.2 - diff --git a/SOURCES/error-opening-permission.patch b/SOURCES/error-opening-permission.patch index faf09f0..b83a128 100644 --- a/SOURCES/error-opening-permission.patch +++ b/SOURCES/error-opening-permission.patch @@ -9,4 +9,4 @@ diff -Naur a/llvm/test/tools/llvm-ar/error-opening-permission.test b/llvm/test/t +# RUN: echo > %t/permission.b || not llvm-ar p %t/permission.b 2>&1 | \ # RUN: FileCheck %s --check-prefix=NO-PERMISSION -DARCHIVE=%t/permission.b - # NO-PERMISSION: error: unable to open '[[ARCHIVE]]': {{[pP]}}ermission denied + # NO-PERMISSION: error: unable to open '[[ARCHIVE]]': {{.*}}{{[pP]}}ermission denied diff --git a/SOURCES/llvm-11.0.1.src.tar.xz.sig b/SOURCES/llvm-11.0.1.src.tar.xz.sig deleted file mode 100644 index f8d90a1c627de83961f3c6999c83925e74df8699..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 566 zcmV-60?GY}0y6{v0SEvc79j*jP9iaCzek0rjBbvi$CRmtL7j>P0$=qj^8gA75TeJF zsfIzFij|WO{S&G9!y3P(>g1O*5(6^(!7+n<`p7r{yMNVtGz^%BO@4 zz(n`g1yT)Lu$=*tQo=}oDwvS}@b<>}gf~eBECNkdB;@A}N719@7ZEeQf+>mNRo^PL zBrvd}RZ}4zR`ZdQxWNIGh_F2tGrXCD2)1+lt`D7&FUCZBCeL7-sHOD&aqEsmeTJ;E!dc^o(&nNFlyKBm(Au~h36E>DvebRe|oehf+S%LewM#ofmE)1r#D>? zhXw$L;#ZU=|EJc61;360qu9219>$M9T%c-uF_XUh ze6^Dm@vS+q_o+n~F;rApA8pxxl z!_^7h@p;&Pa>A1V*Z>)fP8Q8u#Jt6pES*A1W=}=!a|j%?Fn%KfXKZuLNpZ7@iceTi zeOR@yBx91ygnj5dnvaZ?XPRDY_#TZRyTcb)xmw;SxWynh{s_0BgRV6PWOsB`QbcT5U0&q#N^Q=z6DQsmZ{hZGDQgH3_UV( za)6|51{`x%Q!gF@6&Jv!l4#Jh^1&en&Q18g!ddNbG8vQ4dwciN1U&cN7NcPp9S{)} E?kD#Tr~m)} diff --git a/SOURCES/llvm-12.0.1.src.tar.xz.sig b/SOURCES/llvm-12.0.1.src.tar.xz.sig new file mode 100644 index 0000000000000000000000000000000000000000..efeaeb8dfbb59378172cc954d50fbc06eb969604 GIT binary patch literal 566 zcmV-60?GY}0y6{v0SEvc79j*jP9iaCzek0rjBbvi$CRmtL7j>P0$}Ie&j1Pu5TeJF zsfIzFiayN{0Dz=2b);u*e0Yl8rsEWmqvIfEBc9fP< z-q3JJGOL!w>ow;|V~Zzu=w8`ZM|J>~H^>w_QrCaLDwTV&sJR2apg}~wWYlY``H0<0 zH@8GVRH)sYHC}#sV16ls)wUgLV|(?eAPBsE51r{-u>5vd*^dhRhDOSx%OqOKEwX;zCs6l;=jWw03hb@bVD{z z2s3bPOUv2`Zj7hF3&kNN*W&HQh2Q~WGs - 11.0.1-2 -- Backport bpftrace fix +* Thu Sep 02 2021 sguelton@redhat.com - 12.0.1-2 +- Correctly set ldflags -* Wed Sep 01 2021 Tom Stellard - 11.0.1-1 -- 11.0.1 Release +* Fri Jul 16 2021 sguelton@redhat.com - 12.0.1-1 +- 12.0.1 release -* Mon Jul 19 2021 Tom Stellard - 11.0.0-3 +* Fri Jul 02 2021 Tom Stellard - 12.0.0-2 - Stop installing lit tests +* Tue May 25 2021 sguelton@redhat.com - 12.0.0-1 +- Remove obsolete patch + * Thu Oct 29 2020 sguelton@redhat.com - 11.0.0-2 - Remove obsolete patch