import llvm-11.0.0-2.module+el8.4.0+8598+a071fcd5
This commit is contained in:
parent
80ebe294ad
commit
405b406207
3
.gitignore
vendored
3
.gitignore
vendored
@ -1 +1,2 @@
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SOURCES/llvm-11.0.0rc2.src.tar.xz
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SOURCES/hans-gpg-key.asc
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SOURCES/llvm-11.0.0.src.tar.xz
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@ -1 +1,2 @@
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18d3831e22c0059a31b82c2c571d2aaec5a194e2 SOURCES/llvm-11.0.0rc2.src.tar.xz
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32fa4b0193960f05064f2ab31b5a89c7cf48a0b9 SOURCES/hans-gpg-key.asc
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5723ae20d1e6e9ccfda208cb9a8cf2f87c3a6107 SOURCES/llvm-11.0.0.src.tar.xz
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@ -1,99 +0,0 @@
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From cbea17568f4301582c1d5d43990f089ca6cff522 Mon Sep 17 00:00:00 2001
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From: Kai Luo <lkail@cn.ibm.com>
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Date: Fri, 28 Aug 2020 01:56:12 +0000
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Subject: [PATCH] [PowerPC] PPCBoolRetToInt: Don't translate Constant's
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operands
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When collecting `i1` values via `findAllDefs`, ignore Constant's
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operands, since Constant's operands might not be `i1`.
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Fixes https://bugs.llvm.org/show_bug.cgi?id=46923 which causes ICE
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```
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llvm-project/llvm/lib/IR/Constants.cpp:1924: static llvm::Constant *llvm::ConstantExpr::getZExt(llvm::Constant *, llvm::Type *, bool): Assertion `C->getType()->getScalarSizeInBits() < Ty->getScalarSizeInBits()&& "SrcTy must be smaller than DestTy for ZExt!"' failed.
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```
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Differential Revision: https://reviews.llvm.org/D85007
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---
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llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp | 15 ++++++-----
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llvm/test/CodeGen/PowerPC/pr46923.ll | 29 +++++++++++++++++++++
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2 files changed, 38 insertions(+), 6 deletions(-)
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create mode 100644 llvm/test/CodeGen/PowerPC/pr46923.ll
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diff --git a/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp b/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
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index acc8b317a22..172f1346c50 100644
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--- a/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
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+++ b/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
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@@ -78,9 +78,9 @@ class PPCBoolRetToInt : public FunctionPass {
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Value *Curr = WorkList.back();
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WorkList.pop_back();
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auto *CurrUser = dyn_cast<User>(Curr);
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- // Operands of CallInst are skipped because they may not be Bool type,
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- // and their positions are defined by ABI.
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- if (CurrUser && !isa<CallInst>(Curr))
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+ // Operands of CallInst/Constant are skipped because they may not be Bool
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+ // type. For CallInst, their positions are defined by ABI.
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+ if (CurrUser && !isa<CallInst>(Curr) && !isa<Constant>(Curr))
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for (auto &Op : CurrUser->operands())
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if (Defs.insert(Op).second)
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WorkList.push_back(Op);
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@@ -90,6 +90,9 @@ class PPCBoolRetToInt : public FunctionPass {
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// Translate a i1 value to an equivalent i32/i64 value:
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Value *translate(Value *V) {
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+ assert(V->getType() == Type::getInt1Ty(V->getContext()) &&
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+ "Expect an i1 value");
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+
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Type *IntTy = ST->isPPC64() ? Type::getInt64Ty(V->getContext())
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: Type::getInt32Ty(V->getContext());
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@@ -252,9 +255,9 @@ class PPCBoolRetToInt : public FunctionPass {
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auto *First = dyn_cast<User>(Pair.first);
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auto *Second = dyn_cast<User>(Pair.second);
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assert((!First || Second) && "translated from user to non-user!?");
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- // Operands of CallInst are skipped because they may not be Bool type,
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- // and their positions are defined by ABI.
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- if (First && !isa<CallInst>(First))
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+ // Operands of CallInst/Constant are skipped because they may not be Bool
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+ // type. For CallInst, their positions are defined by ABI.
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+ if (First && !isa<CallInst>(First) && !isa<Constant>(First))
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for (unsigned i = 0; i < First->getNumOperands(); ++i)
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Second->setOperand(i, BoolToIntMap[First->getOperand(i)]);
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}
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diff --git a/llvm/test/CodeGen/PowerPC/pr46923.ll b/llvm/test/CodeGen/PowerPC/pr46923.ll
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new file mode 100644
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index 00000000000..3e9faa60422
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--- /dev/null
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+++ b/llvm/test/CodeGen/PowerPC/pr46923.ll
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@@ -0,0 +1,29 @@
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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
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+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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+
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+@bar = external constant i64, align 8
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+
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+define i1 @foo() {
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+; CHECK-LABEL: foo:
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+; CHECK: # %bb.0: # %entry
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+; CHECK-NEXT: li r3, 0
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+; CHECK-NEXT: isel r3, 0, r3, 4*cr5+lt
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+; CHECK-NEXT: blr
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+entry:
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+ br label %next
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+
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+next:
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+ br i1 undef, label %true, label %false
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+
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+true:
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+ br label %end
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+
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+false:
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+ br label %end
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+
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+end:
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+ %a = phi i1 [ icmp ugt (i64 0, i64 ptrtoint (i64* @bar to i64)), %true ],
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+ [ icmp ugt (i64 0, i64 2), %false ]
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+ ret i1 %a
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+}
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--
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2.25.2
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@ -0,0 +1,166 @@
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From d851495f2fe614c4c860bda1bd3c80bfbe48360b Mon Sep 17 00:00:00 2001
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From: Jonas Paulsson <paulsson@linux.vnet.ibm.com>
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Date: Thu, 8 Oct 2020 13:18:29 +0200
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Subject: [PATCH] [SystemZ] Use LA instead of AGR in eliminateFrameIndex().
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Since AGR clobbers CC it should not be used here.
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Fixes https://bugs.llvm.org/show_bug.cgi?id=47736.
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Review: Ulrich Weigand
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Differential Revision: https://reviews.llvm.org/D89034
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---
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.../Target/SystemZ/SystemZRegisterInfo.cpp | 4 +--
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llvm/test/CodeGen/SystemZ/frame-14.ll | 26 +++++++++----------
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llvm/test/CodeGen/SystemZ/frame-16.ll | 4 +--
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3 files changed, 17 insertions(+), 17 deletions(-)
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diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
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index 53b06c6e7e6d..88212e52460f 100644
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--- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
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+++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
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@@ -322,8 +322,8 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
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// Load the high offset into the scratch register and use it as
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// an index.
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TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
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- BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
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- .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
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+ BuildMI(MBB, MI, DL, TII->get(SystemZ::LA), ScratchReg)
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+ .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg);
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}
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// Use the scratch register as the base. It then dies here.
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diff --git a/llvm/test/CodeGen/SystemZ/frame-14.ll b/llvm/test/CodeGen/SystemZ/frame-14.ll
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index e70731249b42..193ff81123c5 100644
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--- a/llvm/test/CodeGen/SystemZ/frame-14.ll
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+++ b/llvm/test/CodeGen/SystemZ/frame-14.ll
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@@ -85,13 +85,13 @@ define void @f3() {
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define void @f4() {
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; CHECK-NOFP-LABEL: f4:
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; CHECK-NOFP: llilh %r1, 8
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mvi 0(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f4:
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; CHECK-FP: llilh %r1, 8
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mvi 0(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [524104 x i8], align 8
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@@ -108,13 +108,13 @@ define void @f4() {
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define void @f5() {
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; CHECK-NOFP-LABEL: f5:
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; CHECK-NOFP: llilh %r1, 8
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mvi 4095(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f5:
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; CHECK-FP: llilh %r1, 8
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mvi 4095(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [524104 x i8], align 8
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@@ -130,13 +130,13 @@ define void @f5() {
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define void @f6() {
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; CHECK-NOFP-LABEL: f6:
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; CHECK-NOFP: llilh %r1, 8
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mviy 4096(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f6:
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; CHECK-FP: llilh %r1, 8
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mviy 4096(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [524104 x i8], align 8
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@@ -155,13 +155,13 @@ define void @f6() {
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define void @f7() {
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; CHECK-NOFP-LABEL: f7:
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; CHECK-NOFP: llilh %r1, 23
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mviy 65535(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f7:
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; CHECK-FP: llilh %r1, 23
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mviy 65535(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [1048400 x i8], align 8
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@@ -178,13 +178,13 @@ define void @f7() {
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define void @f8() {
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; CHECK-NOFP-LABEL: f8:
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; CHECK-NOFP: llilh %r1, 24
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mvi 7(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f8:
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; CHECK-FP: llilh %r1, 24
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mvi 7(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [1048408 x i8], align 8
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@@ -233,7 +233,7 @@ define void @f10(i32 *%vptr) {
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; CHECK-NOFP-LABEL: f10:
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; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
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; CHECK-NOFP: llilh [[REGISTER]], 8
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-; CHECK-NOFP: agr [[REGISTER]], %r15
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+; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15)
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; CHECK-NOFP: mvi 0([[REGISTER]]), 42
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; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15)
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; CHECK-NOFP: br %r14
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@@ -241,7 +241,7 @@ define void @f10(i32 *%vptr) {
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; CHECK-FP-LABEL: f10:
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; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11)
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; CHECK-FP: llilh [[REGISTER]], 8
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-; CHECK-FP: agr [[REGISTER]], %r11
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+; CHECK-FP: la [[REGISTER]], 0([[REGISTER]],%r11)
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; CHECK-FP: mvi 0([[REGISTER]]), 42
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; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11)
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; CHECK-FP: br %r14
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@@ -273,7 +273,7 @@ define void @f11(i32 *%vptr) {
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; CHECK-NOFP: stmg %r6, %r15,
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; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
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; CHECK-NOFP: llilh [[REGISTER]], 8
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-; CHECK-NOFP: agr [[REGISTER]], %r15
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+; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15)
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; CHECK-NOFP: mvi 0([[REGISTER]]), 42
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; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15)
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; CHECK-NOFP: lmg %r6, %r15,
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diff --git a/llvm/test/CodeGen/SystemZ/frame-16.ll b/llvm/test/CodeGen/SystemZ/frame-16.ll
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index ae8a041ae110..a95c58207afb 100644
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--- a/llvm/test/CodeGen/SystemZ/frame-16.ll
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+++ b/llvm/test/CodeGen/SystemZ/frame-16.ll
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@@ -311,13 +311,13 @@ define void @f11(i32 *%vptr, i8 %byte) {
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define void @f12(i8 %byte, i64 %index) {
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; CHECK-NOFP-LABEL: f12:
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; CHECK-NOFP: llilh %r1, 8
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: stc %r2, 0(%r3,%r1)
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f12:
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; CHECK-FP: llilh %r1, 8
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: stc %r2, 0(%r3,%r1)
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; CHECK-FP: br %r14
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%region1 = alloca [524104 x i8], align 8
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--
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2.26.2
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|
@ -1,7 +0,0 @@
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<html>
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<head><title>404 Not Found</title></head>
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<body bgcolor="white">
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<center><h1>404 Not Found</h1></center>
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<hr><center>nginx/1.4.6 (Ubuntu)</center>
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</body>
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</html>
|
BIN
SOURCES/llvm-11.0.0.src.tar.xz.sig
Normal file
BIN
SOURCES/llvm-11.0.0.src.tar.xz.sig
Normal file
Binary file not shown.
Binary file not shown.
@ -12,8 +12,8 @@
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%global llvm_libdir %{_libdir}/%{name}
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%global build_llvm_libdir %{buildroot}%{llvm_libdir}
|
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%global rc_ver 2
|
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%global baserelease 0.6
|
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#%%global rc_ver 6
|
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%global baserelease 2
|
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%global llvm_srcdir llvm-%{version}%{?rc_ver:rc%{rc_ver}}.src
|
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%global maj_ver 11
|
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%global min_ver 0
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@ -60,9 +60,10 @@ Source3: run-lit-tests
|
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Source4: lit.fedora.cfg.py
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%endif
|
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|
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# Fix coreos-installer test crash on s390x (rhbz#1883457), https://reviews.llvm.org/D89034
|
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Patch1: 0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch
|
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Patch2: 0001-CMake-Split-static-library-exports-into-their-own-ex.patch
|
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Patch3: 0001-CMake-Split-test-binary-exports-into-their-own-expor.patch
|
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Patch5: 0001-PowerPC-PPCBoolRetToInt-Don-t-translate-Constant-s-o.patch
|
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# RHEL-specific patches.
|
||||
Patch101: 0001-Deactivate-markdown-doc.patch
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@ -210,7 +211,7 @@ cd _build
|
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#
|
||||
# -DCMAKE_INSTALL_RPATH=";" is a workaround for llvm manually setting the
|
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# rpath of libraries and binaries. llvm will skip the manual setting
|
||||
# if CAMKE_INSTALL_RPATH is set to a value, but cmake interprets this value
|
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# if CMAKE_INSTALL_RPATH is set to a value, but cmake interprets this value
|
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# as nothing, so it sets the rpath to "" when installing.
|
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%cmake .. -G Ninja \
|
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-DBUILD_SHARED_LIBS:BOOL=OFF \
|
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@ -556,6 +557,12 @@ fi
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%endif
|
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|
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%changelog
|
||||
* Thu Oct 29 2020 sguelton@redhat.com - 11.0.0-2
|
||||
- Remove obsolete patch
|
||||
|
||||
* Wed Sep 30 2020 sguelton@redhat.com - 11.0.0-1
|
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- 11.0.1 final release
|
||||
|
||||
* Wed Sep 30 2020 sguelton@redhat.com - 11.0.0-0.6.rc2
|
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- Restore default CI behavior wrt. number of threads
|
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|
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|
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