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Apply backports from rust-lang/llvm#55, #57

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Josh Stone 2016-11-29 23:40:15 -08:00
parent ba4dd40fc4
commit 0c3be08960
3 changed files with 211 additions and 1 deletions
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9
llvm.spec
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@ -7,7 +7,7 @@
Name: llvm Name: llvm
Version: 3.9.0 Version: 3.9.0
Release: 6%{?dist} Release: 7%{?dist}
Summary: The Low Level Virtual Machine Summary: The Low Level Virtual Machine
License: NCSA License: NCSA
@ -32,6 +32,8 @@ Patch48: rust-lang-llvm-pr48.patch
Patch51: rust-lang-llvm-pr51.patch Patch51: rust-lang-llvm-pr51.patch
Patch53: rust-lang-llvm-pr53.patch Patch53: rust-lang-llvm-pr53.patch
Patch54: rust-lang-llvm-pr54.patch Patch54: rust-lang-llvm-pr54.patch
Patch55: rust-lang-llvm-pr55.patch
Patch57: rust-lang-llvm-pr57.patch
BuildRequires: cmake BuildRequires: cmake
BuildRequires: zlib-devel BuildRequires: zlib-devel
@ -94,6 +96,8 @@ Static libraries for the LLVM compiler infrastructure.
%patch51 -p1 -b .rust51 %patch51 -p1 -b .rust51
%patch53 -p1 -b .rust53 %patch53 -p1 -b .rust53
%patch54 -p1 -b .rust54 %patch54 -p1 -b .rust54
%patch55 -p1 -b .rust55
%patch57 -p1 -b .rust57
%build %build
mkdir -p _build mkdir -p _build
@ -209,6 +213,9 @@ make check-all || :
%{_libdir}/*.a %{_libdir}/*.a
%changelog %changelog
* Tue Nov 29 2016 Josh Stone <jistone@redhat.com> - 3.9.0-7
- Apply backports from rust-lang/llvm#55, #57
* Tue Nov 01 2016 Dave Airlie <airlied@gmail.com - 3.9.0-6 * Tue Nov 01 2016 Dave Airlie <airlied@gmail.com - 3.9.0-6
- rebuild for new arches - rebuild for new arches

85
rust-lang-llvm-pr55.patch Normal file
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@ -0,0 +1,85 @@
From eff5dc809ed54701f2bb3e15c58d01881299cedf Mon Sep 17 00:00:00 2001
From: David Majnemer <david.majnemer@gmail.com>
Date: Tue, 11 Oct 2016 01:00:45 +0000
Subject: [rust-lang/llvm#55] [InstCombine] Transform !range metadata to
!nonnull when combining loads
When combining an integer load with !range metadata that does not include 0 to a pointer load, make sure emit !nonnull metadata on the newly-created pointer load. This prevents the !nonnull metadata from being dropped during a ptrtoint/inttoptr pair.
This fixes PR30597.
Patch by Ariel Ben-Yehuda!
Differential Revision: https://reviews.llvm.org/D25215
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283836 91177308-0d34-0410-b5e6-96231b3b80d8
---
.../InstCombine/InstCombineLoadStoreAlloca.cpp | 12 ++++++--
test/Transforms/InstCombine/PR30597.ll | 32 ++++++++++++++++++++++
2 files changed, 42 insertions(+), 2 deletions(-)
create mode 100644 test/Transforms/InstCombine/PR30597.ll
diff --git a/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp b/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
index d312983ed51b..26f4e764501a 100644
--- a/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+++ b/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
@@ -380,8 +380,16 @@ static LoadInst *combineLoadToNewType(InstCombiner &IC, LoadInst &LI, Type *NewT
break;
case LLVMContext::MD_range:
// FIXME: It would be nice to propagate this in some way, but the type
- // conversions make it hard. If the new type is a pointer, we could
- // translate it to !nonnull metadata.
+ // conversions make it hard.
+
+ // If it's a pointer now and the range does not contain 0, make it !nonnull.
+ if (NewTy->isPointerTy()) {
+ unsigned BitWidth = IC.getDataLayout().getTypeSizeInBits(NewTy);
+ if (!getConstantRangeFromMetadata(*N).contains(APInt(BitWidth, 0))) {
+ MDNode *NN = MDNode::get(LI.getContext(), None);
+ NewLoad->setMetadata(LLVMContext::MD_nonnull, NN);
+ }
+ }
break;
}
}
diff --git a/test/Transforms/InstCombine/PR30597.ll b/test/Transforms/InstCombine/PR30597.ll
new file mode 100644
index 000000000000..c0803ed71204
--- /dev/null
+++ b/test/Transforms/InstCombine/PR30597.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Function Attrs: readonly uwtable
+define i1 @dot_ref_s(i32** noalias nocapture readonly dereferenceable(8)) {
+entry-block:
+ %loadedptr = load i32*, i32** %0, align 8, !nonnull !0
+ %ptrtoint = ptrtoint i32* %loadedptr to i64
+ %inttoptr = inttoptr i64 %ptrtoint to i32*
+ %switchtmp = icmp eq i32* %inttoptr, null
+ ret i1 %switchtmp
+
+; CHECK-LABEL: @dot_ref_s
+; CHECK-NEXT: entry-block:
+; CHECK-NEXT: ret i1 false
+}
+
+; Function Attrs: readonly uwtable
+define i64* @function(i64* noalias nocapture readonly dereferenceable(8)) {
+entry-block:
+ %loaded = load i64, i64* %0, align 8, !range !1
+ %inttoptr = inttoptr i64 %loaded to i64*
+ ret i64* %inttoptr
+; CHECK-LABEL: @function
+; CHECK: %{{.+}} = load i64*, i64** %{{.+}}, align 8, !nonnull
+}
+
+
+!0 = !{}
+!1 = !{i64 1, i64 140737488355327}
--
2.9.3

118
rust-lang-llvm-pr57.patch Normal file
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@ -0,0 +1,118 @@
From 5ac4f80be3e8b5d42475aeaba246455e0016c7ef Mon Sep 17 00:00:00 2001
From: Anthony Ramine <n.oxyde@gmail.com>
Date: Sun, 27 Nov 2016 16:28:12 +0100
Subject: [rust-lang/llvm#57] Backport rL277331
---
lib/Target/AArch64/AArch64InstrInfo.cpp | 3 +
.../MIR/AArch64/inst-size-tlsdesc-callseq.mir | 84 ++++++++++++++++++++++
2 files changed, 87 insertions(+)
create mode 100644 test/CodeGen/MIR/AArch64/inst-size-tlsdesc-callseq.mir
diff --git a/lib/Target/AArch64/AArch64InstrInfo.cpp b/lib/Target/AArch64/AArch64InstrInfo.cpp
index 0aa4708f35ac..d39542a8e4eb 100644
--- a/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -56,6 +56,9 @@ unsigned AArch64InstrInfo::GetInstSizeInBytes(const MachineInstr &MI) const {
case TargetOpcode::IMPLICIT_DEF:
case TargetOpcode::KILL:
return 0;
+ case AArch64::TLSDESC_CALLSEQ:
+ // This gets lowered to an instruction sequence which takes 16 bytes
+ return 16;
}
llvm_unreachable("GetInstSizeInBytes()- Unable to determin insn size");
diff --git a/test/CodeGen/MIR/AArch64/inst-size-tlsdesc-callseq.mir b/test/CodeGen/MIR/AArch64/inst-size-tlsdesc-callseq.mir
new file mode 100644
index 000000000000..2d966ece768e
--- /dev/null
+++ b/test/CodeGen/MIR/AArch64/inst-size-tlsdesc-callseq.mir
@@ -0,0 +1,84 @@
+# RUN: llc -mtriple=aarch64-unknown -run-pass aarch64-branch-relax -aarch64-tbz-offset-bits=4 %s -o - | FileCheck %s
+--- |
+ ; ModuleID = 'test.ll'
+ source_filename = "test.ll"
+ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+ target triple = "aarch64-unknown"
+
+ @ThreadLocalGlobal = external thread_local local_unnamed_addr global i32, align 8
+
+ define i32 @test_tlsdesc_callseq_length(i32 %in) {
+ %val = and i32 %in, 1
+ %tst = icmp eq i32 %val, 0
+ br i1 %tst, label %true, label %false
+
+ true: ; preds = %0
+ %1 = load i32, i32* @ThreadLocalGlobal, align 8
+ ret i32 %1
+
+ false: ; preds = %0
+ ret i32 0
+ }
+
+...
+---
+# CHECK-LABEL: name:{{.*}}test_tlsdesc_callseq_length
+# If the size of TLSDESC_CALLSEQ is computed correctly, that will push
+# the bb.2.false block too far away from the TBNZW, so the branch will
+# have to be relaxed (note that we're using -aarch64-tbz-offset-bits to
+# constrain the range that can be reached with the TBNZW to something smaller
+# than what TLSDESC_CALLSEQ is lowered to).
+# CHECK: TBZW killed %w0, 0, %bb.1.true
+# CHECK: B %bb.2.false
+name: test_tlsdesc_callseq_length
+alignment: 2
+exposesReturnsTwice: false
+hasInlineAsm: false
+allVRegsAllocated: true
+isSSA: false
+tracksRegLiveness: false
+tracksSubRegLiveness: false
+liveins:
+ - { reg: '%w0' }
+frameInfo:
+ isFrameAddressTaken: false
+ isReturnAddressTaken: false
+ hasStackMap: false
+ hasPatchPoint: false
+ stackSize: 16
+ offsetAdjustment: 0
+ maxAlignment: 16
+ adjustsStack: false
+ hasCalls: true
+ maxCallFrameSize: 0
+ hasOpaqueSPAdjustment: false
+ hasVAStart: false
+ hasMustTailInVarArgFunc: false
+stack:
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%lr' }
+body: |
+ bb.0 (%ir-block.0):
+ successors: %bb.1.true, %bb.2.false
+ liveins: %w0, %lr
+
+ TBNZW killed %w0, 0, %bb.2.false
+
+ bb.1.true:
+ liveins: %lr
+
+ early-clobber %sp = frame-setup STRXpre killed %lr, %sp, -16 :: (store 8 into %stack.0)
+ frame-setup CFI_INSTRUCTION def_cfa_offset 16
+ frame-setup CFI_INSTRUCTION offset %w30, -16
+ TLSDESC_CALLSEQ target-flags(aarch64-tls) @ThreadLocalGlobal, implicit-def dead %lr, implicit-def %x0, implicit-def dead %x1
+ %x8 = MRS 56962
+ %w0 = LDRWroX killed %x8, killed %x0, 0, 0 :: (load 4 from @ThreadLocalGlobal, align 8)
+ early-clobber %sp, %lr = LDRXpost %sp, 16 :: (load 8 from %stack.0)
+ RET killed %lr, implicit killed %w0
+
+ bb.2.false:
+ liveins: %lr
+
+ %w0 = ORRWrs %wzr, %wzr, 0
+ RET killed %lr, implicit killed %w0
+
+...
--
2.9.3