93 lines
3.0 KiB
Diff
93 lines
3.0 KiB
Diff
From: Prerna Saxena <prerna@linux.vnet.ibm.com>
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Date: Tue, 4 Nov 2014 22:58:33 +0530
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Subject: [PATCH] PowerPC:Improve PVR handling to fall back to cpu generation.
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IBM Power processors differ uniquely across generations (such as power6,
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power7, power8). Each generation signifies a new PowerISA version
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that exhibits features unique to that generation.
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The higher 16 bits of PVR for IBM Power processors encode the CPU
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generation, while the CPU chip (sub)version is encoded in lower 16 bits.
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For all practical purposes of launching a VM, we care about the
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generation which the vCPU will belong to, and not specifically the chip
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version. This patch updates the libvirt PVR check to reflect this
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relationship. It allows libvirt to select the right CPU generation
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in case the exact match for a a specific CPU is not found.
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Hence, there will no longer be a need to add each PowerPC CPU model to
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cpu_map.xml; just adding entry for the matching ISA generation will
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suffice.
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It also contains changes to cpu_map.xml since processor generations
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as understood by QEMU compat mode go as "power6", "power7" or "power8"
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[Reference : QEMU commit 8dfa3a5e85 ]
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Signed-off-by: Prerna Saxena <prerna@linux.vnet.ibm.com>
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Signed-off-by: Pradipta Kr. Banerjee <bpradip@in.ibm.com>
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Signed-off-by: Anton Blanchard <anton@samba.org>
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Reviewed-by: Michal Privoznik <mprivozn@redhat.com>
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(cherry picked from commit 1e911742287d964055f33ab76d53e673a9b4477f)
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---
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src/cpu/cpu_map.xml | 30 ++++++++++++++++++++++++++++++
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src/cpu/cpu_powerpc.c | 8 ++++++++
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2 files changed, 38 insertions(+)
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diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
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index 18c7b0d..bd9b056 100644
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--- a/src/cpu/cpu_map.xml
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+++ b/src/cpu/cpu_map.xml
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@@ -627,5 +627,35 @@
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<pvr value='0x004b0100'/>
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</model>
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+ <model name='power6'>
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+ <vendor name='IBM'/>
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+ <compat isa='2.05'/>
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+ <pvr value='0x003e0000'/>
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+ </model>
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+
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+ <model name='power7'>
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+ <vendor name='IBM'/>
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+ <compat isa='2.06'/>
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+ <pvr value='0x003f0000'/>
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+ </model>
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+
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+ <model name='power7+'>
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+ <vendor name='IBM'/>
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+ <compat isa='2.06B'/>
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+ <pvr value='0x004a0000'/>
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+ </model>
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+
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+ <model name='power8e'>
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+ <vendor name='IBM'/>
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+ <compat isa='2.07'/>
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+ <pvr value='0x004b0000'/>
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+ </model>
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+
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+ <model name='power8'>
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+ <vendor name='IBM'/>
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+ <compat isa='2.07'/>
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+ <pvr value='0x004d0000'/>
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+ </model>
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+
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</arch>
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</cpus>
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diff --git a/src/cpu/cpu_powerpc.c b/src/cpu/cpu_powerpc.c
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index 4ea1835..531868c 100644
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--- a/src/cpu/cpu_powerpc.c
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+++ b/src/cpu/cpu_powerpc.c
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@@ -99,6 +99,14 @@ ppcModelFindPVR(const struct ppc_map *map,
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model = model->next;
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}
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+ /* PowerPC Processor Version Register is interpreted as follows :
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+ * Higher order 16 bits : Power ISA generation.
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+ * Lower order 16 bits : CPU chip version number.
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+ * If the exact CPU isnt found, return the nearest matching CPU generation
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+ */
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+ if (pvr & 0x0000FFFFul)
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+ return ppcModelFindPVR(map, (pvr & 0xFFFF0000ul));
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+
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return NULL;
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}
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