220 lines
8.9 KiB
Diff
220 lines
8.9 KiB
Diff
From 051451a1b9cefa42ecfd6d27dcb6a12ef49de072 Mon Sep 17 00:00:00 2001
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Message-Id: <051451a1b9cefa42ecfd6d27dcb6a12ef49de072@dist-git>
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From: Daniel Henrique Barboza <danielhb413@gmail.com>
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Date: Fri, 3 May 2019 13:54:51 +0200
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Subject: [PATCH] qemu_domain: add a PPC64 memLockLimit helper
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There is a lot of documentation in the comments about how PPC64 handles
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passthrough VFIO devices to calculate the @memLockLimit. And more will
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be added with the PPC64 NVLink2 support code.
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Let's remove the PPC64 code from qemuDomainGetMemLockLimitBytes()
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body and put it into a helper function. This will simplify the
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flow of qemuDomainGetMemLockLimitBytes() that handles all the other
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platforms and improves readability of the PPC64 specifics.
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Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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Reviewed-by: Erik Skultety <eskultet@redhat.com>
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(cherry picked from commit 7a686fd2eae8d5674bb1213d8517dc5814fa6bf3)
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https: //bugzilla.redhat.com/show_bug.cgi?id=1505998
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Signed-off-by: Erik Skultety <eskultet@redhat.com>
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Message-Id: <ccdf9fefeb624585559606d00b6ac19b574733b3.1556884443.git.eskultet@redhat.com>
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Reviewed-by: Andrea Bolognani <abologna@redhat.com>
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---
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src/qemu/qemu_domain.c | 171 ++++++++++++++++++++++-------------------
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1 file changed, 93 insertions(+), 78 deletions(-)
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diff --git a/src/qemu/qemu_domain.c b/src/qemu/qemu_domain.c
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index d936090d87..f91de0b743 100644
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--- a/src/qemu/qemu_domain.c
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+++ b/src/qemu/qemu_domain.c
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@@ -9805,6 +9805,97 @@ qemuDomainUpdateCurrentMemorySize(virQEMUDriverPtr driver,
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}
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+/**
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+ * getPPC64MemLockLimitBytes:
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+ * @def: domain definition
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+ *
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+ * A PPC64 helper that calculates the memory locking limit in order for
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+ * the guest to operate properly.
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+ */
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+static unsigned long long
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+getPPC64MemLockLimitBytes(virDomainDefPtr def)
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+{
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+ unsigned long long memKB = 0;
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+ unsigned long long baseLimit = 0;
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+ unsigned long long memory = 0;
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+ unsigned long long maxMemory = 0;
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+ unsigned long long passthroughLimit = 0;
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+ size_t i, nPCIHostBridges = 0;
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+ bool usesVFIO = false;
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+
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+ for (i = 0; i < def->ncontrollers; i++) {
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+ virDomainControllerDefPtr cont = def->controllers[i];
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+
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+ if (!virDomainControllerIsPSeriesPHB(cont))
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+ continue;
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+
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+ nPCIHostBridges++;
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+ }
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+
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+ for (i = 0; i < def->nhostdevs; i++) {
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+ virDomainHostdevDefPtr dev = def->hostdevs[i];
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+
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+ if (dev->mode == VIR_DOMAIN_HOSTDEV_MODE_SUBSYS &&
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+ dev->source.subsys.type == VIR_DOMAIN_HOSTDEV_SUBSYS_TYPE_PCI &&
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+ dev->source.subsys.u.pci.backend == VIR_DOMAIN_HOSTDEV_PCI_BACKEND_VFIO) {
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+ usesVFIO = true;
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+ break;
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+ }
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+ }
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+
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+ memory = virDomainDefGetMemoryTotal(def);
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+
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+ if (def->mem.max_memory)
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+ maxMemory = def->mem.max_memory;
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+ else
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+ maxMemory = memory;
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+
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+ /* baseLimit := maxMemory / 128 (a)
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+ * + 4 MiB * #PHBs + 8 MiB (b)
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+ *
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+ * (a) is the hash table
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+ *
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+ * (b) is accounting for the 32-bit DMA window - it could be either the
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+ * KVM accelerated TCE tables for emulated devices, or the VFIO
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+ * userspace view. The 4 MiB per-PHB (including the default one) covers
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+ * a 2GiB DMA window: default is 1GiB, but it's possible it'll be
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+ * increased to help performance. The 8 MiB extra should be plenty for
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+ * the TCE table index for any reasonable number of PHBs and several
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+ * spapr-vlan or spapr-vscsi devices (512kB + a tiny bit each) */
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+ baseLimit = maxMemory / 128 +
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+ 4096 * nPCIHostBridges +
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+ 8192;
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+
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+ /* passthroughLimit := max( 2 GiB * #PHBs, (c)
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+ * memory (d)
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+ * + memory * 1/512 * #PHBs + 8 MiB ) (e)
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+ *
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+ * (c) is the pre-DDW VFIO DMA window accounting. We're allowing 2 GiB
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+ * rather than 1 GiB
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+ *
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+ * (d) is the with-DDW (and memory pre-registration and related
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+ * features) DMA window accounting - assuming that we only account RAM
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+ * once, even if mapped to multiple PHBs
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+ *
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+ * (e) is the with-DDW userspace view and overhead for the 64-bit DMA
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+ * window. This is based a bit on expected guest behaviour, but there
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+ * really isn't a way to completely avoid that. We assume the guest
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+ * requests a 64-bit DMA window (per PHB) just big enough to map all
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+ * its RAM. 4 kiB page size gives the 1/512; it will be less with 64
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+ * kiB pages, less still if the guest is mapped with hugepages (unlike
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+ * the default 32-bit DMA window, DDW windows can use large IOMMU
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+ * pages). 8 MiB is for second and further level overheads, like (b) */
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+ if (usesVFIO)
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+ passthroughLimit = MAX(2 * 1024 * 1024 * nPCIHostBridges,
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+ memory +
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+ memory / 512 * nPCIHostBridges + 8192);
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+
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+ memKB = baseLimit + passthroughLimit;
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+
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+ return memKB << 10;
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+}
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+
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+
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/**
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* qemuDomainGetMemLockLimitBytes:
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* @def: domain definition
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@@ -9836,84 +9927,8 @@ qemuDomainGetMemLockLimitBytes(virDomainDefPtr def)
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if (def->mem.locked)
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return VIR_DOMAIN_MEMORY_PARAM_UNLIMITED;
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- if (ARCH_IS_PPC64(def->os.arch) && def->virtType == VIR_DOMAIN_VIRT_KVM) {
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- unsigned long long maxMemory;
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- unsigned long long memory;
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- unsigned long long baseLimit;
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- unsigned long long passthroughLimit = 0;
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- size_t nPCIHostBridges = 0;
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- bool usesVFIO = false;
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-
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- for (i = 0; i < def->ncontrollers; i++) {
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- virDomainControllerDefPtr cont = def->controllers[i];
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-
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- if (!virDomainControllerIsPSeriesPHB(cont))
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- continue;
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-
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- nPCIHostBridges++;
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- }
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-
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- for (i = 0; i < def->nhostdevs; i++) {
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- virDomainHostdevDefPtr dev = def->hostdevs[i];
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-
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- if (dev->mode == VIR_DOMAIN_HOSTDEV_MODE_SUBSYS &&
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- dev->source.subsys.type == VIR_DOMAIN_HOSTDEV_SUBSYS_TYPE_PCI &&
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- dev->source.subsys.u.pci.backend == VIR_DOMAIN_HOSTDEV_PCI_BACKEND_VFIO) {
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- usesVFIO = true;
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- break;
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- }
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- }
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-
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- memory = virDomainDefGetMemoryTotal(def);
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-
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- if (def->mem.max_memory)
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- maxMemory = def->mem.max_memory;
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- else
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- maxMemory = memory;
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-
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- /* baseLimit := maxMemory / 128 (a)
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- * + 4 MiB * #PHBs + 8 MiB (b)
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- *
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- * (a) is the hash table
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- *
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- * (b) is accounting for the 32-bit DMA window - it could be either the
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- * KVM accelerated TCE tables for emulated devices, or the VFIO
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- * userspace view. The 4 MiB per-PHB (including the default one) covers
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- * a 2GiB DMA window: default is 1GiB, but it's possible it'll be
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- * increased to help performance. The 8 MiB extra should be plenty for
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- * the TCE table index for any reasonable number of PHBs and several
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- * spapr-vlan or spapr-vscsi devices (512kB + a tiny bit each) */
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- baseLimit = maxMemory / 128 +
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- 4096 * nPCIHostBridges +
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- 8192;
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-
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- /* passthroughLimit := max( 2 GiB * #PHBs, (c)
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- * memory (d)
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- * + memory * 1/512 * #PHBs + 8 MiB ) (e)
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- *
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- * (c) is the pre-DDW VFIO DMA window accounting. We're allowing 2 GiB
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- * rather than 1 GiB
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- *
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- * (d) is the with-DDW (and memory pre-registration and related
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- * features) DMA window accounting - assuming that we only account RAM
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- * once, even if mapped to multiple PHBs
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- *
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- * (e) is the with-DDW userspace view and overhead for the 64-bit DMA
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- * window. This is based a bit on expected guest behaviour, but there
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- * really isn't a way to completely avoid that. We assume the guest
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- * requests a 64-bit DMA window (per PHB) just big enough to map all
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- * its RAM. 4 kiB page size gives the 1/512; it will be less with 64
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- * kiB pages, less still if the guest is mapped with hugepages (unlike
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- * the default 32-bit DMA window, DDW windows can use large IOMMU
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- * pages). 8 MiB is for second and further level overheads, like (b) */
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- if (usesVFIO)
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- passthroughLimit = MAX(2 * 1024 * 1024 * nPCIHostBridges,
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- memory +
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- memory / 512 * nPCIHostBridges + 8192);
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-
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- memKB = baseLimit + passthroughLimit;
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- goto done;
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- }
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+ if (ARCH_IS_PPC64(def->os.arch) && def->virtType == VIR_DOMAIN_VIRT_KVM)
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+ return getPPC64MemLockLimitBytes(def);
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/* For device passthrough using VFIO the guest memory and MMIO memory
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* regions need to be locked persistent in order to allow DMA.
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--
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2.21.0
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