92 lines
3.3 KiB
Diff
92 lines
3.3 KiB
Diff
From 8521a431d3da3cc360eb8102eda1c0d649f1ecc3 Mon Sep 17 00:00:00 2001
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Message-Id: <8521a431d3da3cc360eb8102eda1c0d649f1ecc3@dist-git>
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From: Michal Privoznik <mprivozn@redhat.com>
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Date: Wed, 7 Oct 2020 18:45:45 +0200
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Subject: [PATCH] numa_conf: Properly check for caches in
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virDomainNumaDefValidate()
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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When adding support for HMAT, in f0611fe8830 I've introduced a
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check which aims to validate /domain/cpu/numa/interconnects. As a
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part of that, there is a loop which checks whether all <latency/>
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with @cache attribute refer to an existing cache level. For
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instance:
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<cpu mode='host-model' check='partial'>
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<numa>
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<cell id='0' cpus='0-5' memory='512000' unit='KiB' discard='yes'>
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<cache level='1' associativity='direct' policy='writeback'>
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<size value='8' unit='KiB'/>
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<line value='5' unit='B'/>
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</cache>
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</cell>
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<interconnects>
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<latency initiator='0' target='0' cache='1' type='access' value='5'/>
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<bandwidth initiator='0' target='0' type='access' value='204800' unit='KiB'/>
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</interconnects>
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</numa>
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</cpu>
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This XML defines that accessing L1 cache of node #0 from node #0
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has latency of 5ns.
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However, the loop was not written properly. Well, the check in
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it, as it was always checking for the first cache in the target
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node and not the rest. Therefore, the following example errors
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out:
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<cpu mode='host-model' check='partial'>
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<numa>
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<cell id='0' cpus='0-5' memory='512000' unit='KiB' discard='yes'>
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<cache level='3' associativity='direct' policy='writeback'>
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<size value='10' unit='KiB'/>
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<line value='8' unit='B'/>
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</cache>
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<cache level='1' associativity='direct' policy='writeback'>
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<size value='8' unit='KiB'/>
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<line value='5' unit='B'/>
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</cache>
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</cell>
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<interconnects>
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<latency initiator='0' target='0' cache='1' type='access' value='5'/>
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<bandwidth initiator='0' target='0' type='access' value='204800' unit='KiB'/>
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</interconnects>
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</numa>
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</cpu>
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This errors out even though it is a valid configuration. The L1
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cache under node #0 is still present.
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Fixes: f0611fe8830
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Signed-off-by: Michal Privoznik <mprivozn@redhat.com>
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Reviewed-by: Laine Stump <laine@redhat.com>
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(cherry picked from commit e41ac71fca309b50e2c8e6ec142d8fe1280ca2ad)
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Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=1749518
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Signed-off-by: Michal Privoznik <mprivozn@redhat.com>
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Message-Id: <4bb47f9e97ca097cee1259449da4739b55753751.1602087923.git.mprivozn@redhat.com>
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Reviewed-by: Ján Tomko <jtomko@redhat.com>
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---
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src/conf/numa_conf.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/src/conf/numa_conf.c b/src/conf/numa_conf.c
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index 5a92eb35cc..a20398714e 100644
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--- a/src/conf/numa_conf.c
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+++ b/src/conf/numa_conf.c
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@@ -1423,7 +1423,7 @@ virDomainNumaDefValidate(const virDomainNuma *def)
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if (l->cache > 0) {
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for (j = 0; j < def->mem_nodes[l->target].ncaches; j++) {
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- const virDomainNumaCache *cache = def->mem_nodes[l->target].caches;
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+ const virDomainNumaCache *cache = &def->mem_nodes[l->target].caches[j];
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if (l->cache == cache->level)
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break;
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--
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2.29.2
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