diff --git a/SOURCES/libvirt-conf-Introduce-memory-allocation-threads.patch b/SOURCES/libvirt-conf-Introduce-memory-allocation-threads.patch new file mode 100644 index 0000000..76bff0e --- /dev/null +++ b/SOURCES/libvirt-conf-Introduce-memory-allocation-threads.patch @@ -0,0 +1,155 @@ +From e60a964e51cb0aecb060f1a1cc2884586e00ddeb Mon Sep 17 00:00:00 2001 +Message-Id: +From: Michal Privoznik +Date: Mon, 21 Mar 2022 16:49:25 +0100 +Subject: [PATCH] conf: Introduce memory allocation threads + +Since its v5.0.0 release QEMU is capable of specifying number of +threads used to allocate memory. It defaults to 1, which may be +too low for humongous guests with gigantic pages. + +In general, on QEMU cmd line level it is possible to use +different number of threads per each memory-backend-* object, in +practical terms it's not useful. Therefore, use +to set guest wide value and let all memory devices 'inherit' it, +silently. IOW, don't introduce per device knob because that would +only complicate things for a little or no benefit. + +Signed-off-by: Michal Privoznik +Reviewed-by: Martin Kletzander +(cherry picked from commit ba7f98126fa84d354ce72929b77cc111a9a557a9) +Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=2075569 +Signed-off-by: Michal Privoznik +--- + docs/formatdomain.rst | 8 +++++--- + docs/schemas/domaincommon.rng | 19 +++++++++++++------ + src/conf/domain_conf.c | 15 ++++++++++++++- + src/conf/domain_conf.h | 1 + + tests/qemuxml2argvdata/memfd-memory-numa.xml | 2 +- + 5 files changed, 34 insertions(+), 11 deletions(-) + +diff --git a/docs/formatdomain.rst b/docs/formatdomain.rst +index 8128e43da4..17e89a0c0d 100644 +--- a/docs/formatdomain.rst ++++ b/docs/formatdomain.rst +@@ -977,7 +977,7 @@ Memory Backing + + + +- ++ + + + ... +@@ -1026,8 +1026,10 @@ influence how virtual memory pages are backed by host pages. + Using the ``mode`` attribute, specify if the memory is to be "shared" or + "private". This can be overridden per numa node by ``memAccess``. + ``allocation`` +- Using the ``mode`` attribute, specify when to allocate the memory by +- supplying either "immediate" or "ondemand". ++ Using the optional ``mode`` attribute, specify when to allocate the memory by ++ supplying either "immediate" or "ondemand". :since:`Since 8.2.0` it is ++ possible to set the number of threads that hypervisor uses to allocate ++ memory via ``threads`` attribute. + ``discard`` + When set and supported by hypervisor the memory content is discarded just + before guest shuts down (or when DIMM module is unplugged). Please note that +diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng +index 7fa5c2b8b5..c9c1529979 100644 +--- a/docs/schemas/domaincommon.rng ++++ b/docs/schemas/domaincommon.rng +@@ -745,12 +745,19 @@ + + + +- +- +- immediate +- ondemand +- +- ++ ++ ++ ++ immediate ++ ondemand ++ ++ ++ ++ ++ ++ ++ ++ + + + +diff --git a/src/conf/domain_conf.c b/src/conf/domain_conf.c +index 5691b8d2d5..805a15848e 100644 +--- a/src/conf/domain_conf.c ++++ b/src/conf/domain_conf.c +@@ -19095,6 +19095,13 @@ virDomainDefParseMemory(virDomainDef *def, + VIR_FREE(tmp); + } + ++ if (virXPathUInt("string(./memoryBacking/allocation/@threads)", ++ ctxt, &def->mem.allocation_threads) == -2) { ++ virReportError(VIR_ERR_XML_ERROR, "%s", ++ _("Failed to parse memory allocation threads")); ++ return -1; ++ } ++ + if (virXPathNode("./memoryBacking/hugepages", ctxt)) { + /* hugepages will be used */ + if ((n = virXPathNodeSet("./memoryBacking/hugepages/page", ctxt, &nodes)) < 0) { +@@ -27639,6 +27646,7 @@ virDomainMemorybackingFormat(virBuffer *buf, + const virDomainMemtune *mem) + { + g_auto(virBuffer) childBuf = VIR_BUFFER_INIT_CHILD(buf); ++ g_auto(virBuffer) allocAttrBuf = VIR_BUFFER_INITIALIZER; + + if (mem->nhugepages) + virDomainHugepagesFormat(&childBuf, mem->hugepages, mem->nhugepages); +@@ -27653,8 +27661,13 @@ virDomainMemorybackingFormat(virBuffer *buf, + virBufferAsprintf(&childBuf, "\n", + virDomainMemoryAccessTypeToString(mem->access)); + if (mem->allocation) +- virBufferAsprintf(&childBuf, "\n", ++ virBufferAsprintf(&allocAttrBuf, " mode='%s'", + virDomainMemoryAllocationTypeToString(mem->allocation)); ++ if (mem->allocation_threads > 0) ++ virBufferAsprintf(&allocAttrBuf, " threads='%u'", mem->allocation_threads); ++ ++ virXMLFormatElement(&childBuf, "allocation", &allocAttrBuf, NULL); ++ + if (mem->discard) + virBufferAddLit(&childBuf, "\n"); + +diff --git a/src/conf/domain_conf.h b/src/conf/domain_conf.h +index 144ba4dd12..10af94e2e4 100644 +--- a/src/conf/domain_conf.h ++++ b/src/conf/domain_conf.h +@@ -2677,6 +2677,7 @@ struct _virDomainMemtune { + int source; /* enum virDomainMemorySource */ + int access; /* enum virDomainMemoryAccess */ + int allocation; /* enum virDomainMemoryAllocation */ ++ unsigned int allocation_threads; + + virTristateBool discard; + }; +diff --git a/tests/qemuxml2argvdata/memfd-memory-numa.xml b/tests/qemuxml2argvdata/memfd-memory-numa.xml +index 1ebcee8939..1ac87e3aef 100644 +--- a/tests/qemuxml2argvdata/memfd-memory-numa.xml ++++ b/tests/qemuxml2argvdata/memfd-memory-numa.xml +@@ -10,7 +10,7 @@ + + + +- ++ + + 8 + +-- +2.35.1 + diff --git a/SOURCES/libvirt-cpu_map-Disable-cpu64-rhel-for-host-model-and-baseline.patch b/SOURCES/libvirt-cpu_map-Disable-cpu64-rhel-for-host-model-and-baseline.patch new file mode 100644 index 0000000..ba16500 --- /dev/null +++ b/SOURCES/libvirt-cpu_map-Disable-cpu64-rhel-for-host-model-and-baseline.patch @@ -0,0 +1,60 @@ +From d03c369dd75c747f25ecc34af3b9d79adf92ea0c Mon Sep 17 00:00:00 2001 +Message-Id: +From: Jiri Denemark +Date: Tue, 26 Apr 2022 12:50:41 +0200 +Subject: [PATCH] cpu_map: Disable cpu64-rhel* for host-model and baseline + +These ancient RHEL-only CPU models should not really be used by any CPU +definition created by libvirt. We keep them just for backwards +compatibility with domains which might still be using them. + +Signed-off-by: Jiri Denemark +Reviewed-by: Michal Privoznik +(cherry picked from commit d2e4d66be35cd04da72e5f5129a8a4da6a931505) + +https://bugzilla.redhat.com/show_bug.cgi?id=2084030 + +Signed-off-by: Jiri Denemark +--- + src/cpu_map/x86_cpu64-rhel5.xml | 2 +- + src/cpu_map/x86_cpu64-rhel6.xml | 2 +- + tests/cputestdata/x86_64-baseline-no-vendor-result.xml | 3 ++- + 3 files changed, 4 insertions(+), 3 deletions(-) + +diff --git a/src/cpu_map/x86_cpu64-rhel5.xml b/src/cpu_map/x86_cpu64-rhel5.xml +index be6bcdb7a6..7402b7603c 100644 +--- a/src/cpu_map/x86_cpu64-rhel5.xml ++++ b/src/cpu_map/x86_cpu64-rhel5.xml +@@ -1,6 +1,6 @@ + + +- ++ + + + +diff --git a/src/cpu_map/x86_cpu64-rhel6.xml b/src/cpu_map/x86_cpu64-rhel6.xml +index c62b1b5575..061939c733 100644 +--- a/src/cpu_map/x86_cpu64-rhel6.xml ++++ b/src/cpu_map/x86_cpu64-rhel6.xml +@@ -1,6 +1,6 @@ + + +- ++ + + + +diff --git a/tests/cputestdata/x86_64-baseline-no-vendor-result.xml b/tests/cputestdata/x86_64-baseline-no-vendor-result.xml +index 00e03b2152..4b4921cf93 100644 +--- a/tests/cputestdata/x86_64-baseline-no-vendor-result.xml ++++ b/tests/cputestdata/x86_64-baseline-no-vendor-result.xml +@@ -1,3 +1,4 @@ + +- cpu64-rhel6 ++ kvm64 ++ + +-- +2.35.1 + diff --git a/SOURCES/libvirt-cpu_x86-Consolidate-signature-match-in-x86DecodeUseCandidate.patch b/SOURCES/libvirt-cpu_x86-Consolidate-signature-match-in-x86DecodeUseCandidate.patch new file mode 100644 index 0000000..dfd878b --- /dev/null +++ b/SOURCES/libvirt-cpu_x86-Consolidate-signature-match-in-x86DecodeUseCandidate.patch @@ -0,0 +1,75 @@ +From e075af4319c7c30531421e6667845abd30cd28e9 Mon Sep 17 00:00:00 2001 +Message-Id: +From: Jiri Denemark +Date: Tue, 26 Apr 2022 11:58:07 +0200 +Subject: [PATCH] cpu_x86: Consolidate signature match in x86DecodeUseCandidate + +Checking the signature in two different places makes no sense since the +code in between can only mark the candidate as the best option so far, +which is what the second signature match does as well. + +Signed-off-by: Jiri Denemark +Reviewed-by: Michal Privoznik +(cherry picked from commit 35ce086667e68e8f546cf36473591dd7c19c72eb) + +https://bugzilla.redhat.com/show_bug.cgi?id=2084030 + +Signed-off-by: Jiri Denemark +--- + src/cpu/cpu_x86.c | 31 ++++++++++++++----------------- + 1 file changed, 14 insertions(+), 17 deletions(-) + +diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c +index 5cb9caef8a..f007487824 100644 +--- a/src/cpu/cpu_x86.c ++++ b/src/cpu/cpu_x86.c +@@ -2020,15 +2020,22 @@ x86DecodeUseCandidate(virCPUx86Model *current, + } + + /* Ideally we want to select a model with family/model equal to +- * family/model of the real CPU. Once we found such model, we only ++ * family/model of the real CPU and once we found such model, we only + * consider candidates with matching family/model. + */ +- if (signature && +- virCPUx86SignaturesMatch(current->signatures, signature) && +- !virCPUx86SignaturesMatch(candidate->signatures, signature)) { +- VIR_DEBUG("%s differs in signature from matching %s", +- cpuCandidate->model, cpuCurrent->model); +- return 0; ++ if (signature) { ++ if (virCPUx86SignaturesMatch(current->signatures, signature) && ++ !virCPUx86SignaturesMatch(candidate->signatures, signature)) { ++ VIR_DEBUG("%s differs in signature from matching %s", ++ cpuCandidate->model, cpuCurrent->model); ++ return 0; ++ } ++ ++ if (!virCPUx86SignaturesMatch(current->signatures, signature) && ++ virCPUx86SignaturesMatch(candidate->signatures, signature)) { ++ VIR_DEBUG("%s provides matching signature", cpuCandidate->model); ++ return 1; ++ } + } + + if (cpuCurrent->nfeatures > cpuCandidate->nfeatures) { +@@ -2037,16 +2044,6 @@ x86DecodeUseCandidate(virCPUx86Model *current, + return 1; + } + +- /* Prefer a candidate with matching signature even though it would +- * result in longer list of features. +- */ +- if (signature && +- virCPUx86SignaturesMatch(candidate->signatures, signature) && +- !virCPUx86SignaturesMatch(current->signatures, signature)) { +- VIR_DEBUG("%s provides matching signature", cpuCandidate->model); +- return 1; +- } +- + VIR_DEBUG("%s does not result in shorter feature list than %s", + cpuCandidate->model, cpuCurrent->model); + return 0; +-- +2.35.1 + diff --git a/SOURCES/libvirt-cpu_x86-Ignore-enabled-features-for-input-models-in-x86DecodeUseCandidate.patch b/SOURCES/libvirt-cpu_x86-Ignore-enabled-features-for-input-models-in-x86DecodeUseCandidate.patch new file mode 100644 index 0000000..98c9364 --- /dev/null +++ b/SOURCES/libvirt-cpu_x86-Ignore-enabled-features-for-input-models-in-x86DecodeUseCandidate.patch @@ -0,0 +1,272 @@ +From 5b5f684bfceeed923e1733931b6c4c75d5ed4149 Mon Sep 17 00:00:00 2001 +Message-Id: <5b5f684bfceeed923e1733931b6c4c75d5ed4149@dist-git> +From: Jiri Denemark +Date: Fri, 29 Apr 2022 10:35:02 +0200 +Subject: [PATCH] cpu_x86: Ignore enabled features for input models in + x86DecodeUseCandidate + +While we don't want to aim for the shortest list of disabled features in +the baseline result (it would select a very old model), we want to do so +while looking at any of the input models for which we're trying to +compute a baseline CPU model. Given a set of input models, we always +want to take the least capable one of them (i.e., the one with shortest +list of disabled features) or a better model which is not one of the +input models. + +So when considering an input model, we just check whether its list of +disabled features is shorter than the currently best one. When looking +at other models we check both enabled and disabled features while +penalizing disabled features as implemented by the previous patch. + +Signed-off-by: Jiri Denemark +Reviewed-by: Michal Privoznik +(cherry picked from commit bb6cedd2082599323257ee0df18c93a6e0551b0b) + +https://bugzilla.redhat.com/show_bug.cgi?id=2084030 + +Signed-off-by: Jiri Denemark +--- + src/cpu/cpu_x86.c | 66 ++++++++++++------- + ...4-baseline-Westmere+Nehalem-migratable.xml | 8 ++- + ...86_64-baseline-Westmere+Nehalem-result.xml | 8 ++- + ...-cpuid-baseline-Cooperlake+Cascadelake.xml | 13 ++-- + 4 files changed, 64 insertions(+), 31 deletions(-) + +diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c +index ebcd96edb1..7b59dad8bf 100644 +--- a/src/cpu/cpu_x86.c ++++ b/src/cpu/cpu_x86.c +@@ -1975,7 +1975,8 @@ virCPUx86Compare(virCPUDef *host, + + static int + virCPUx86CompareCandidateFeatureList(virCPUDef *cpuCurrent, +- virCPUDef *cpuCandidate) ++ virCPUDef *cpuCandidate, ++ bool isPreferred) + { + size_t current = cpuCurrent->nfeatures; + size_t enabledCurrent = current; +@@ -2017,6 +2018,14 @@ virCPUx86CompareCandidateFeatureList(virCPUDef *cpuCurrent, + return 1; + } + ++ if (isPreferred && disabled < disabledCurrent) { ++ VIR_DEBUG("%s is in the list of preferred models and provides fewer " ++ "disabled features than %s: %zu < %zu", ++ cpuCandidate->model, cpuCurrent->model, ++ disabled, disabledCurrent); ++ return 1; ++ } ++ + VIR_DEBUG("%s is not better than %s: %zu (%zu, %zu) >= %zu (%zu, %zu)", + cpuCandidate->model, cpuCurrent->model, + candidate, enabled, disabled, +@@ -2039,8 +2048,10 @@ x86DecodeUseCandidate(virCPUx86Model *current, + virCPUx86Model *candidate, + virCPUDef *cpuCandidate, + uint32_t signature, +- const char *preferred) ++ const char **preferred) + { ++ bool isPreferred = false; ++ + if (cpuCandidate->type == VIR_CPU_TYPE_HOST && + !candidate->decodeHost) { + VIR_DEBUG("%s is not supposed to be used for host CPU definition", +@@ -2064,9 +2075,13 @@ x86DecodeUseCandidate(virCPUx86Model *current, + } + } + +- if (preferred && STREQ(cpuCandidate->model, preferred)) { +- VIR_DEBUG("%s is the preferred model", cpuCandidate->model); +- return 2; ++ if (preferred) { ++ isPreferred = g_strv_contains(preferred, cpuCandidate->model); ++ ++ if (isPreferred && !preferred[1]) { ++ VIR_DEBUG("%s is the preferred model", cpuCandidate->model); ++ return 2; ++ } + } + + if (!cpuCurrent) { +@@ -2093,7 +2108,8 @@ x86DecodeUseCandidate(virCPUx86Model *current, + } + } + +- return virCPUx86CompareCandidateFeatureList(cpuCurrent, cpuCandidate); ++ return virCPUx86CompareCandidateFeatureList(cpuCurrent, cpuCandidate, ++ isPreferred); + } + + +@@ -2136,7 +2152,7 @@ static int + x86Decode(virCPUDef *cpu, + const virCPUx86Data *cpuData, + virDomainCapsCPUModels *models, +- const char *preferred, ++ const char **preferred, + bool migratable) + { + virCPUx86Map *map; +@@ -2169,6 +2185,9 @@ x86Decode(virCPUDef *cpu, + + x86DataFilterTSX(&data, vendor, map); + ++ if (preferred && !preferred[0]) ++ preferred = NULL; ++ + /* Walk through the CPU models in reverse order to check newest + * models first. + */ +@@ -2176,16 +2195,18 @@ x86Decode(virCPUDef *cpu, + candidate = map->models[i]; + if (models && + !(hvModel = virDomainCapsCPUModelsGet(models, candidate->name))) { +- if (preferred && STREQ(candidate->name, preferred)) { ++ if (preferred && ++ !preferred[1] && ++ STREQ(candidate->name, preferred[0])) { + if (cpu->fallback != VIR_CPU_FALLBACK_ALLOW) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, + _("CPU model %s is not supported by hypervisor"), +- preferred); ++ preferred[0]); + return -1; + } else { + VIR_WARN("Preferred CPU model %s not allowed by" + " hypervisor; closest supported model will be" +- " used", preferred); ++ " used", preferred[0]); + } + } else { + VIR_DEBUG("CPU model %s not allowed by hypervisor; ignoring", +@@ -2793,8 +2814,8 @@ virCPUx86Baseline(virCPUDef **cpus, + size_t i; + virCPUx86Vendor *vendor = NULL; + bool outputVendor = true; +- const char *modelName; +- bool matchingNames = true; ++ g_autofree char **modelNames = NULL; ++ size_t namesLen = 0; + g_autoptr(virCPUData) featData = NULL; + + if (!(map = virCPUx86GetMap())) +@@ -2816,19 +2837,17 @@ virCPUx86Baseline(virCPUDef **cpus, + return NULL; + } + +- modelName = cpus[0]->model; ++ modelNames = g_new0(char *, ncpus + 1); ++ if (cpus[0]->model) ++ modelNames[namesLen++] = cpus[0]->model; ++ + for (i = 1; i < ncpus; i++) { + g_autoptr(virCPUx86Model) model = NULL; + const char *vn = NULL; + +- if (matchingNames && cpus[i]->model) { +- if (!modelName) { +- modelName = cpus[i]->model; +- } else if (STRNEQ(modelName, cpus[i]->model)) { +- modelName = NULL; +- matchingNames = false; +- } +- } ++ if (cpus[i]->model && ++ !g_strv_contains((const char **) modelNames, cpus[i]->model)) ++ modelNames[namesLen++] = cpus[i]->model; + + if (!(model = x86ModelFromCPU(cpus[i], map, -1))) + return NULL; +@@ -2891,10 +2910,11 @@ virCPUx86Baseline(virCPUDef **cpus, + virCPUx86DataAddItem(&base_model->data, &vendor->data) < 0) + return NULL; + +- if (x86Decode(cpu, &base_model->data, models, modelName, migratable) < 0) ++ if (x86Decode(cpu, &base_model->data, models, ++ (const char **) modelNames, migratable) < 0) + return NULL; + +- if (STREQ_NULLABLE(cpu->model, modelName)) ++ if (namesLen == 1 && STREQ(cpu->model, modelNames[0])) + cpu->fallback = VIR_CPU_FALLBACK_FORBID; + + if (!outputVendor) +diff --git a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml +index 775a27de2e..f5846b1619 100644 +--- a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml ++++ b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml +@@ -1,10 +1,14 @@ + +- SandyBridge ++ Westmere + Intel + + ++ + ++ ++ ++ + ++ + +- + +diff --git a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml +index cafca97d62..166833276c 100644 +--- a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml ++++ b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml +@@ -1,11 +1,15 @@ + +- SandyBridge ++ Westmere + Intel + + ++ + ++ ++ ++ + ++ + + +- + +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml +index 46c32c996f..ecac749b97 100644 +--- a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml +@@ -1,17 +1,22 @@ + +- Cooperlake ++ Cascadelake-Server + Intel + + + + +- + ++ + ++ ++ + + + ++ ++ ++ ++ ++ + +- +- + +-- +2.35.1 + diff --git a/SOURCES/libvirt-cpu_x86-Penalize-disabled-features-when-computing-CPU-model.patch b/SOURCES/libvirt-cpu_x86-Penalize-disabled-features-when-computing-CPU-model.patch new file mode 100644 index 0000000..59d8429 --- /dev/null +++ b/SOURCES/libvirt-cpu_x86-Penalize-disabled-features-when-computing-CPU-model.patch @@ -0,0 +1,1231 @@ +From 652e1798991dcb503abc9a2588b0f95c47b8e3df Mon Sep 17 00:00:00 2001 +Message-Id: <652e1798991dcb503abc9a2588b0f95c47b8e3df@dist-git> +From: Jiri Denemark +Date: Tue, 26 Apr 2022 15:06:30 +0200 +Subject: [PATCH] cpu_x86: Penalize disabled features when computing CPU model + +For finding the best matching CPU model for a given set of features +while we don't know the CPU signature (i.e., when computing a baseline +CPU model) we've been using a "shortest list of features" heuristics. +This works well if new CPU models are supersets of older models, but +that's not always the case. As a result it may actually select a new CPU +model as a baseline while removing some features from it to make it +compatible with older models. This is in general worse than using an old +CPU model with a bunch of added features as a guest OS or apps may crash +when using features that were disabled. + +On the other hand we don't want to end up with a very old model which +would guarantee no disabled features as it could stop a guest OS or apps +from using some features provided by the CPU because they would not +expect them on such an old CPU. + +This patch changes the heuristics to something in between. Enabled and +disabled features are counted separately so that a CPU model requiring +some features to be disabled looks worse than a model with fewer +disabled features even if its complete list of features is longer. The +penalty given for each additional disabled feature gets bigger to make +longer list of disabled features look even worse. + +https://bugzilla.redhat.com/show_bug.cgi?id=1851227 + +Signed-off-by: Jiri Denemark +Reviewed-by: Michal Privoznik +(cherry picked from commit 48341b025acdd04a66696a709c7b09b3bfd42acf) + +Conflicts: + tests/domaincapsdata/qemu_2.9.0-tcg.x86_64.xml + tests/domaincapsdata/qemu_2.11.0-tcg.x86_64.xml + tests/domaincapsdata/qemu_2.12.0-tcg.x86_64.xml + tests/domaincapsdata/qemu_3.0.0-tcg.x86_64.xml + - not supported upstream anymore + +https://bugzilla.redhat.com/show_bug.cgi?id=2084030 + +Signed-off-by: Jiri Denemark +--- + src/cpu/cpu_x86.c | 44 ++++++++++++++++--- + .../x86_64-cpuid-Atom-D510-guest.xml | 5 ++- + .../x86_64-cpuid-Atom-N450-guest.xml | 5 ++- + .../x86_64-cpuid-Phenom-B95-json.xml | 21 +++++---- + ...id-baseline-Broadwell-IBRS+Cascadelake.xml | 11 +++-- + ..._64-cpuid-baseline-Cascadelake+Icelake.xml | 13 +++--- + ...puid-baseline-Cascadelake+Skylake-IBRS.xml | 5 ++- + ...6_64-cpuid-baseline-Cooperlake+Icelake.xml | 13 +++--- + .../x86_64-host+guest,models-result.xml | 10 +++-- + .../domaincapsdata/qemu_2.11.0-tcg.x86_64.xml | 34 ++++++++------ + .../domaincapsdata/qemu_2.12.0-tcg.x86_64.xml | 34 ++++++++------ + .../domaincapsdata/qemu_2.9.0-tcg.x86_64.xml | 16 ++++--- + .../domaincapsdata/qemu_3.0.0-tcg.x86_64.xml | 35 +++++++++------ + .../domaincapsdata/qemu_3.1.0-tcg.x86_64.xml | 35 +++++++++------ + .../domaincapsdata/qemu_4.0.0-tcg.x86_64.xml | 36 ++++++++------- + .../domaincapsdata/qemu_4.1.0-tcg.x86_64.xml | 37 +++++++++------- + .../domaincapsdata/qemu_4.2.0-tcg.x86_64.xml | 37 +++++++++------- + .../domaincapsdata/qemu_5.0.0-tcg.x86_64.xml | 36 +++++++++------ + .../domaincapsdata/qemu_5.1.0-tcg.x86_64.xml | 36 +++++++++------ + .../domaincapsdata/qemu_5.2.0-tcg.x86_64.xml | 36 +++++++++------ + .../domaincapsdata/qemu_6.0.0-tcg.x86_64.xml | 36 +++++++++------ + .../domaincapsdata/qemu_6.1.0-tcg.x86_64.xml | 36 +++++++++------ + .../domaincapsdata/qemu_6.2.0-tcg.x86_64.xml | 36 +++++++++------ + tests/qemuxml2argvdata/cpu-fallback.args | 2 +- + .../cpu-host-model-cmt.x86_64-4.0.0.args | 2 +- + .../cpu-host-model-fallback.args | 2 +- + 26 files changed, 382 insertions(+), 231 deletions(-) + +diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c +index 81c2441b8b..ebcd96edb1 100644 +--- a/src/cpu/cpu_x86.c ++++ b/src/cpu/cpu_x86.c +@@ -1970,23 +1970,57 @@ virCPUx86Compare(virCPUDef *host, + } + + ++/* Base penalty for disabled features. */ ++#define BASE_PENALTY 2 ++ + static int + virCPUx86CompareCandidateFeatureList(virCPUDef *cpuCurrent, + virCPUDef *cpuCandidate) + { + size_t current = cpuCurrent->nfeatures; ++ size_t enabledCurrent = current; ++ size_t disabledCurrent = 0; + size_t candidate = cpuCandidate->nfeatures; ++ size_t enabled = candidate; ++ size_t disabled = 0; ++ ++ if (cpuCandidate->type != VIR_CPU_TYPE_HOST) { ++ size_t i; ++ int penalty = BASE_PENALTY; ++ ++ for (i = 0; i < enabledCurrent; i++) { ++ if (cpuCurrent->features[i].policy == VIR_CPU_FEATURE_DISABLE) { ++ enabledCurrent--; ++ disabledCurrent += penalty; ++ penalty++; ++ } ++ } ++ current = enabledCurrent + disabledCurrent; ++ ++ penalty = BASE_PENALTY; ++ for (i = 0; i < enabled; i++) { ++ if (cpuCandidate->features[i].policy == VIR_CPU_FEATURE_DISABLE) { ++ enabled--; ++ disabled += penalty; ++ penalty++; ++ } ++ } ++ candidate = enabled + disabled; ++ } + +- if (candidate < current) { +- VIR_DEBUG("%s is better than %s: %zu < %zu", ++ if (candidate < current || ++ (candidate == current && disabled < disabledCurrent)) { ++ VIR_DEBUG("%s is better than %s: %zu (%zu, %zu) < %zu (%zu, %zu)", + cpuCandidate->model, cpuCurrent->model, +- candidate, current); ++ candidate, enabled, disabled, ++ current, enabledCurrent, disabledCurrent); + return 1; + } + +- VIR_DEBUG("%s is not better than %s: %zu >= %zu", ++ VIR_DEBUG("%s is not better than %s: %zu (%zu, %zu) >= %zu (%zu, %zu)", + cpuCandidate->model, cpuCurrent->model, +- candidate, current); ++ candidate, enabled, disabled, ++ current, enabledCurrent, disabledCurrent); + return 0; + } + +diff --git a/tests/cputestdata/x86_64-cpuid-Atom-D510-guest.xml b/tests/cputestdata/x86_64-cpuid-Atom-D510-guest.xml +index caa0bfd53b..d2f7a79074 100644 +--- a/tests/cputestdata/x86_64-cpuid-Atom-D510-guest.xml ++++ b/tests/cputestdata/x86_64-cpuid-Atom-D510-guest.xml +@@ -1,6 +1,7 @@ + +- core2duo ++ n270 + Intel ++ + + + +@@ -14,6 +15,6 @@ + + + ++ + +- + +diff --git a/tests/cputestdata/x86_64-cpuid-Atom-N450-guest.xml b/tests/cputestdata/x86_64-cpuid-Atom-N450-guest.xml +index e8f5c93881..779faf6cef 100644 +--- a/tests/cputestdata/x86_64-cpuid-Atom-N450-guest.xml ++++ b/tests/cputestdata/x86_64-cpuid-Atom-N450-guest.xml +@@ -1,5 +1,5 @@ + +- core2duo ++ n270 + Intel + + +@@ -15,6 +15,7 @@ + + + ++ ++ + +- + +diff --git a/tests/cputestdata/x86_64-cpuid-Phenom-B95-json.xml b/tests/cputestdata/x86_64-cpuid-Phenom-B95-json.xml +index b4198f66a5..7f6289c6d7 100644 +--- a/tests/cputestdata/x86_64-cpuid-Phenom-B95-json.xml ++++ b/tests/cputestdata/x86_64-cpuid-Phenom-B95-json.xml +@@ -1,22 +1,25 @@ + +- Opteron_G3 ++ athlon + AMD +- ++ ++ ++ ++ + ++ + +- ++ + + +- +- ++ ++ + + ++ ++ ++ + + + + +- +- +- +- + +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml +index 4e3f253e9b..99bce8db87 100644 +--- a/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml +@@ -1,11 +1,14 @@ + +- Skylake-Client-IBRS ++ Broadwell-IBRS + Intel ++ + ++ ++ + ++ + ++ + +- +- +- ++ + +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml +index e372a3e446..071c799ba2 100644 +--- a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml +@@ -1,14 +1,15 @@ + +- Cooperlake ++ Cascadelake-Server + Intel + + + +- + ++ ++ ++ + +- +- +- +- ++ ++ ++ + +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml +index e559e01583..5e42876b39 100644 +--- a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml +@@ -1,12 +1,13 @@ + +- Cascadelake-Server ++ Skylake-Server-IBRS + Intel + + + ++ + + ++ + + +- + +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml +index e372a3e446..071c799ba2 100644 +--- a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml +@@ -1,14 +1,15 @@ + +- Cooperlake ++ Cascadelake-Server + Intel + + + +- + ++ ++ ++ + +- +- +- +- ++ ++ ++ + +diff --git a/tests/cputestdata/x86_64-host+guest,models-result.xml b/tests/cputestdata/x86_64-host+guest,models-result.xml +index 0dd6955898..42664a48b4 100644 +--- a/tests/cputestdata/x86_64-host+guest,models-result.xml ++++ b/tests/cputestdata/x86_64-host+guest,models-result.xml +@@ -1,17 +1,19 @@ + +- Nehalem ++ qemu64 + + + ++ + + ++ + +- ++ + + +- + +- + + ++ ++ + +diff --git a/tests/domaincapsdata/qemu_2.11.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_2.11.0-tcg.x86_64.xml +index cccc6830f9..4a92b5bead 100644 +--- a/tests/domaincapsdata/qemu_2.11.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_2.11.0-tcg.x86_64.xml +@@ -36,34 +36,42 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + + ++ ++ ++ ++ + + +- +- +- +- +- +- +- +- +- +- ++ + +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_2.12.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_2.12.0-tcg.x86_64.xml +index 575506d852..7799a6a7a6 100644 +--- a/tests/domaincapsdata/qemu_2.12.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_2.12.0-tcg.x86_64.xml +@@ -36,34 +36,42 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + + ++ ++ ++ ++ + + +- +- +- +- +- +- +- +- +- +- ++ + +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_2.9.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_2.9.0-tcg.x86_64.xml +index b47c426f1b..fe12641fbe 100644 +--- a/tests/domaincapsdata/qemu_2.9.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_2.9.0-tcg.x86_64.xml +@@ -36,12 +36,19 @@ + + + +- Opteron_G4 ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ + ++ ++ ++ + + + +@@ -61,14 +68,13 @@ + + + ++ + + + +- ++ ++ + +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_3.0.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_3.0.0-tcg.x86_64.xml +index 301101095c..daccacba0e 100644 +--- a/tests/domaincapsdata/qemu_3.0.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_3.0.0-tcg.x86_64.xml +@@ -36,35 +36,42 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- +- + +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_3.1.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_3.1.0-tcg.x86_64.xml +index 1a5bc25b99..2a65cb0ad9 100644 +--- a/tests/domaincapsdata/qemu_3.1.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_3.1.0-tcg.x86_64.xml +@@ -36,35 +36,42 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- +- + +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_4.0.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_4.0.0-tcg.x86_64.xml +index e744ac27ac..a4dc7bafc9 100644 +--- a/tests/domaincapsdata/qemu_4.0.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_4.0.0-tcg.x86_64.xml +@@ -36,36 +36,42 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- +- + +- +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml +index 80b1ce8ef9..b20c02cb68 100644 +--- a/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml +@@ -36,36 +36,43 @@ + + + +- EPYC-IBPB ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- + +- +- +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml +index 91b3ed6f80..d0ee3f7b7a 100644 +--- a/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml +@@ -36,36 +36,43 @@ + + + +- EPYC-IBPB ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- + +- +- +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml +index b8737613e9..d277c96426 100644 +--- a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml +@@ -36,35 +36,43 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- + +- +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_5.1.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_5.1.0-tcg.x86_64.xml +index 034036ca96..4f1ffbb2ba 100644 +--- a/tests/domaincapsdata/qemu_5.1.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_5.1.0-tcg.x86_64.xml +@@ -36,35 +36,43 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- + +- +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_5.2.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_5.2.0-tcg.x86_64.xml +index d3a4b01234..6cff0f815e 100644 +--- a/tests/domaincapsdata/qemu_5.2.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_5.2.0-tcg.x86_64.xml +@@ -36,35 +36,43 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- + +- +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_6.0.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_6.0.0-tcg.x86_64.xml +index 6b85c9c45a..65f4459bcb 100644 +--- a/tests/domaincapsdata/qemu_6.0.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_6.0.0-tcg.x86_64.xml +@@ -36,35 +36,43 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- + +- +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_6.1.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_6.1.0-tcg.x86_64.xml +index 2c761fc1af..40bc875e3c 100644 +--- a/tests/domaincapsdata/qemu_6.1.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_6.1.0-tcg.x86_64.xml +@@ -36,35 +36,43 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + +- +- +- +- +- +- +- +- +- + +- +- +- +- + + + qemu64 +diff --git a/tests/domaincapsdata/qemu_6.2.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_6.2.0-tcg.x86_64.xml +index 8db840faac..a439dda190 100644 +--- a/tests/domaincapsdata/qemu_6.2.0-tcg.x86_64.xml ++++ b/tests/domaincapsdata/qemu_6.2.0-tcg.x86_64.xml +@@ -36,36 +36,44 @@ + + + +- EPYC ++ Opteron_G3 + AMD + + ++ + ++ ++ ++ ++ ++ ++ ++ + ++ ++ ++ ++ ++ + + ++ ++ + ++ + + + ++ ++ ++ ++ + + ++ + + +- +- +- +- +- +- +- +- +- + +- +- +- +- + + + qemu64 +diff --git a/tests/qemuxml2argvdata/cpu-fallback.args b/tests/qemuxml2argvdata/cpu-fallback.args +index 1b1769d420..53667dfa3a 100644 +--- a/tests/qemuxml2argvdata/cpu-fallback.args ++++ b/tests/qemuxml2argvdata/cpu-fallback.args +@@ -13,7 +13,7 @@ QEMU_AUDIO_DRV=none \ + -object secret,id=masterKey0,format=raw,file=/tmp/lib/domain--1-QEMUGuest1/master-key.aes \ + -machine pc,usb=off,dump-guest-core=off \ + -accel kvm \ +--cpu Penryn,sse4.1=off,sse4.2=off,popcnt=off,aes=off \ ++-cpu Conroe,cx16=on,sse4.1=off,sse4.2=off,popcnt=off,aes=off \ + -m 214 \ + -realtime mlock=off \ + -smp 6,sockets=6,cores=1,threads=1 \ +diff --git a/tests/qemuxml2argvdata/cpu-host-model-cmt.x86_64-4.0.0.args b/tests/qemuxml2argvdata/cpu-host-model-cmt.x86_64-4.0.0.args +index 3ff226a289..0de09e1d88 100644 +--- a/tests/qemuxml2argvdata/cpu-host-model-cmt.x86_64-4.0.0.args ++++ b/tests/qemuxml2argvdata/cpu-host-model-cmt.x86_64-4.0.0.args +@@ -13,7 +13,7 @@ QEMU_AUDIO_DRV=none \ + -object secret,id=masterKey0,format=raw,file=/tmp/lib/domain--1-QEMUGuest1/master-key.aes \ + -machine pc-i440fx-4.0,usb=off,dump-guest-core=off \ + -accel tcg \ +--cpu EPYC,acpi=on,ss=on,monitor=on,hypervisor=on,erms=on,mpx=on,pcommit=on,clwb=on,pku=on,la57=on,3dnowext=on,3dnow=on,npt=on,vme=off,fma=off,avx=off,f16c=off,rdrand=off,avx2=off,rdseed=off,sha-ni=off,xsavec=off,fxsr-opt=off,misalignsse=off,3dnowprefetch=off,osvw=off,topoext=off,nrip-save=off \ ++-cpu Opteron_G3,acpi=on,ss=on,pclmulqdq=on,monitor=on,ssse3=on,sse4.1=on,sse4.2=on,movbe=on,aes=on,xsave=on,hypervisor=on,arat=on,fsgsbase=on,bmi1=on,smep=on,bmi2=on,erms=on,mpx=on,adx=on,smap=on,pcommit=on,clflushopt=on,clwb=on,pku=on,la57=on,xsaveopt=on,xgetbv1=on,mmxext=on,pdpe1gb=on,3dnowext=on,3dnow=on,cr8legacy=on,npt=on,misalignsse=off \ + -m 214 \ + -overcommit mem-lock=off \ + -smp 6,sockets=6,cores=1,threads=1 \ +diff --git a/tests/qemuxml2argvdata/cpu-host-model-fallback.args b/tests/qemuxml2argvdata/cpu-host-model-fallback.args +index e90b781da4..763e630120 100644 +--- a/tests/qemuxml2argvdata/cpu-host-model-fallback.args ++++ b/tests/qemuxml2argvdata/cpu-host-model-fallback.args +@@ -13,7 +13,7 @@ QEMU_AUDIO_DRV=none \ + -object secret,id=masterKey0,format=raw,file=/tmp/lib/domain--1-QEMUGuest1/master-key.aes \ + -machine pc,usb=off,dump-guest-core=off \ + -accel tcg \ +--cpu Penryn,vme=on,ds=on,acpi=on,ss=on,ht=on,tm=on,pbe=on,monitor=on,ds-cpl=on,vmx=on,est=on,tm2=on,xtpr=on,sse4.1=off,cx16=on,lahf-lm=on \ ++-cpu Conroe,vme=on,ds=on,acpi=on,ss=on,ht=on,tm=on,pbe=on,monitor=on,ds-cpl=on,vmx=on,est=on,tm2=on,cx16=on,xtpr=on,lahf-lm=on \ + -m 214 \ + -realtime mlock=off \ + -smp 6,sockets=6,cores=1,threads=1 \ +-- +2.35.1 + diff --git a/SOURCES/libvirt-cpu_x86-Refactor-feature-list-comparison-in-x86DecodeUseCandidate.patch b/SOURCES/libvirt-cpu_x86-Refactor-feature-list-comparison-in-x86DecodeUseCandidate.patch new file mode 100644 index 0000000..caf14d8 --- /dev/null +++ b/SOURCES/libvirt-cpu_x86-Refactor-feature-list-comparison-in-x86DecodeUseCandidate.patch @@ -0,0 +1,73 @@ +From d9736516378d1fbac451dd80a93bf25c85e74b50 Mon Sep 17 00:00:00 2001 +Message-Id: +From: Jiri Denemark +Date: Tue, 26 Apr 2022 15:02:51 +0200 +Subject: [PATCH] cpu_x86: Refactor feature list comparison in + x86DecodeUseCandidate + +It will become more complicated and so it deserves to be separated into +a new function. + +Signed-off-by: Jiri Denemark +Reviewed-by: Michal Privoznik +(cherry picked from commit 1d6ca40ac23c039abc4392b668f256d0eda33280) + +https://bugzilla.redhat.com/show_bug.cgi?id=2084030 + +Signed-off-by: Jiri Denemark +--- + src/cpu/cpu_x86.c | 31 ++++++++++++++++++++++--------- + 1 file changed, 22 insertions(+), 9 deletions(-) + +diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c +index f007487824..81c2441b8b 100644 +--- a/src/cpu/cpu_x86.c ++++ b/src/cpu/cpu_x86.c +@@ -1970,6 +1970,27 @@ virCPUx86Compare(virCPUDef *host, + } + + ++static int ++virCPUx86CompareCandidateFeatureList(virCPUDef *cpuCurrent, ++ virCPUDef *cpuCandidate) ++{ ++ size_t current = cpuCurrent->nfeatures; ++ size_t candidate = cpuCandidate->nfeatures; ++ ++ if (candidate < current) { ++ VIR_DEBUG("%s is better than %s: %zu < %zu", ++ cpuCandidate->model, cpuCurrent->model, ++ candidate, current); ++ return 1; ++ } ++ ++ VIR_DEBUG("%s is not better than %s: %zu >= %zu", ++ cpuCandidate->model, cpuCurrent->model, ++ candidate, current); ++ return 0; ++} ++ ++ + /* + * Checks whether a candidate model is a better fit for the CPU data than the + * current model. +@@ -2038,15 +2059,7 @@ x86DecodeUseCandidate(virCPUx86Model *current, + } + } + +- if (cpuCurrent->nfeatures > cpuCandidate->nfeatures) { +- VIR_DEBUG("%s results in shorter feature list than %s", +- cpuCandidate->model, cpuCurrent->model); +- return 1; +- } +- +- VIR_DEBUG("%s does not result in shorter feature list than %s", +- cpuCandidate->model, cpuCurrent->model); +- return 0; ++ return virCPUx86CompareCandidateFeatureList(cpuCurrent, cpuCandidate); + } + + +-- +2.35.1 + diff --git a/SOURCES/libvirt-cputest-Add-some-real-world-baseline-tests.patch b/SOURCES/libvirt-cputest-Add-some-real-world-baseline-tests.patch new file mode 100644 index 0000000..01a9d1b --- /dev/null +++ b/SOURCES/libvirt-cputest-Add-some-real-world-baseline-tests.patch @@ -0,0 +1,498 @@ +From 8f7e267c7b98b378e301519b10aa3d18f0ceb45c Mon Sep 17 00:00:00 2001 +Message-Id: <8f7e267c7b98b378e301519b10aa3d18f0ceb45c@dist-git> +From: Jiri Denemark +Date: Thu, 21 Apr 2022 18:25:15 +0200 +Subject: [PATCH] cputest: Add some real world baseline tests + +Signed-off-by: Jiri Denemark +Reviewed-by: Michal Privoznik +(cherry picked from commit 63d633b9a4fc42da7e2acaf45501914607d968a5) + +https://bugzilla.redhat.com/show_bug.cgi?id=2084030 + +Signed-off-by: Jiri Denemark +--- + tests/cputest.c | 118 +++++++++++++++--- + ...id-baseline-Broadwell-IBRS+Cascadelake.xml | 11 ++ + ..._64-cpuid-baseline-Cascadelake+Icelake.xml | 14 +++ + ...puid-baseline-Cascadelake+Skylake-IBRS.xml | 12 ++ + ..._64-cpuid-baseline-Cascadelake+Skylake.xml | 8 ++ + ...-cpuid-baseline-Cooperlake+Cascadelake.xml | 17 +++ + ...6_64-cpuid-baseline-Cooperlake+Icelake.xml | 14 +++ + .../x86_64-cpuid-baseline-EPYC+Rome.xml | 13 ++ + .../x86_64-cpuid-baseline-Haswell+Skylake.xml | 14 +++ + ...-baseline-Haswell-noTSX-IBRS+Broadwell.xml | 14 +++ + ...seline-Haswell-noTSX-IBRS+Skylake-IBRS.xml | 14 +++ + ...id-baseline-Haswell-noTSX-IBRS+Skylake.xml | 14 +++ + .../x86_64-cpuid-baseline-Ryzen+Rome.xml | 13 ++ + ...4-cpuid-baseline-Skylake-Client+Server.xml | 9 ++ + 14 files changed, 271 insertions(+), 14 deletions(-) + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml + create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml + +diff --git a/tests/cputest.c b/tests/cputest.c +index b939e20718..b39ec7e18b 100644 +--- a/tests/cputest.c ++++ b/tests/cputest.c +@@ -58,6 +58,8 @@ struct data { + const char *name; + virDomainCapsCPUModels *models; + const char *modelsName; ++ const char **cpus; ++ int ncpus; + unsigned int flags; + int result; + }; +@@ -561,6 +563,60 @@ cpuTestCPUID(bool guest, const void *arg) + } + + ++static int ++cpuTestCPUIDBaseline(const void *arg) ++{ ++ const struct data *data = arg; ++ int ret = -1; ++ virCPUDef **cpus = NULL; ++ virCPUDef *baseline = NULL; ++ g_autofree char *result = NULL; ++ size_t i; ++ ++ cpus = g_new0(virCPUDef *, data->ncpus); ++ for (i = 0; i < data->ncpus; i++) { ++ g_autofree char *name = NULL; ++ ++ name = g_strdup_printf("cpuid-%s-json", data->cpus[i]); ++ if (!(cpus[i] = cpuTestLoadXML(data->arch, name))) ++ goto cleanup; ++ } ++ ++ baseline = virCPUBaseline(data->arch, cpus, data->ncpus, NULL, NULL, false); ++ if (!baseline) ++ goto cleanup; ++ ++ result = g_strdup_printf("cpuid-baseline-%s", data->name); ++ ++ if (cpuTestCompareXML(data->arch, baseline, result) < 0) ++ goto cleanup; ++ ++ for (i = 0; i < data->ncpus; i++) { ++ virCPUCompareResult cmp; ++ ++ cmp = virCPUCompare(data->arch, cpus[i], baseline, false); ++ if (cmp != VIR_CPU_COMPARE_SUPERSET && ++ cmp != VIR_CPU_COMPARE_IDENTICAL) { ++ VIR_TEST_VERBOSE("\nbaseline CPU is incompatible with CPU %zu", i); ++ VIR_TEST_VERBOSE("%74s", "... "); ++ ret = -1; ++ goto cleanup; ++ } ++ } ++ ++ ret = 0; ++ ++ cleanup: ++ if (cpus) { ++ for (i = 0; i < data->ncpus; i++) ++ virCPUDefFree(cpus[i]); ++ VIR_FREE(cpus); ++ } ++ virCPUDefFree(baseline); ++ return ret; ++} ++ ++ + static int + cpuTestHostCPUID(const void *arg) + { +@@ -888,13 +944,13 @@ mymain(void) + goto cleanup; + } + +-#define DO_TEST(arch, api, name, host, cpu, \ ++#define DO_TEST(arch, api, name, host, cpu, cpus, ncpus, \ + models, flags, result) \ + do { \ + struct data data = { \ + arch, host, cpu, models, \ + models == NULL ? NULL : #models, \ +- flags, result \ ++ cpus, ncpus, flags, result \ + }; \ + g_autofree char *testLabel = NULL; \ + \ +@@ -907,12 +963,12 @@ mymain(void) + #define DO_TEST_COMPARE(arch, host, cpu, result) \ + DO_TEST(arch, cpuTestCompare, \ + host "/" cpu " (" #result ")", \ +- host, cpu, NULL, 0, result) ++ host, cpu, NULL, 0, NULL, 0, result) + + #define DO_TEST_UPDATE_ONLY(arch, host, cpu) \ + DO_TEST(arch, cpuTestUpdate, \ + cpu " on " host, \ +- host, cpu, NULL, 0, 0) ++ host, cpu, NULL, 0, NULL, 0, 0) + + #define DO_TEST_UPDATE(arch, host, cpu, result) \ + do { \ +@@ -930,31 +986,31 @@ mymain(void) + suffix = " (migratable)"; \ + label = g_strdup_printf("%s%s", name, suffix); \ + DO_TEST(arch, cpuTestBaseline, label, NULL, \ +- "baseline-" name, NULL, flags, result); \ ++ "baseline-" name, NULL, 0, NULL, flags, result); \ + } while (0) + + #define DO_TEST_HASFEATURE(arch, host, feature, result) \ + DO_TEST(arch, cpuTestHasFeature, \ + host "/" feature " (" #result ")", \ +- host, feature, NULL, 0, result) ++ host, feature, NULL, 0, NULL, 0, result) + + #define DO_TEST_GUESTCPU(arch, host, cpu, models, result) \ + DO_TEST(arch, cpuTestGuestCPU, \ + host "/" cpu " (" #models ")", \ +- host, cpu, models, 0, result) ++ host, cpu, NULL, 0, models, 0, result) + + #if WITH_QEMU + # define DO_TEST_JSON(arch, host, json) \ + do { \ + if (json == JSON_MODELS) { \ + DO_TEST(arch, cpuTestGuestCPUID, host, host, \ +- NULL, NULL, 0, 0); \ ++ NULL, NULL, 0, NULL, 0, 0); \ + } \ + if (json != JSON_NONE) { \ + DO_TEST(arch, cpuTestJSONCPUID, host, host, \ +- NULL, NULL, json, 0); \ ++ NULL, NULL, 0, NULL, json, 0); \ + DO_TEST(arch, cpuTestJSONSignature, host, host, \ +- NULL, NULL, 0, 0); \ ++ NULL, NULL, 0, NULL, 0, 0); \ + } \ + } while (0) + #else +@@ -964,18 +1020,26 @@ mymain(void) + #define DO_TEST_CPUID(arch, host, json) \ + do { \ + DO_TEST(arch, cpuTestHostCPUID, host, host, \ +- NULL, NULL, 0, 0); \ ++ NULL, NULL, 0, NULL, 0, 0); \ + DO_TEST(arch, cpuTestGuestCPUID, host, host, \ +- NULL, NULL, json, 0); \ ++ NULL, NULL, 0, NULL, json, 0); \ + DO_TEST(arch, cpuTestCPUIDSignature, host, host, \ +- NULL, NULL, 0, 0); \ ++ NULL, NULL, 0, NULL, 0, 0); \ + DO_TEST_JSON(arch, host, json); \ + if (json != JSON_NONE) { \ + DO_TEST(arch, cpuTestUpdateLive, host, host, \ +- NULL, NULL, json, 0); \ ++ NULL, NULL, 0, NULL, json, 0); \ + } \ + } while (0) + ++#define DO_TEST_CPUID_BASELINE(arch, label, cpu1, cpu2) \ ++ do { \ ++ const char *cpus[] = {cpu1, cpu2}; \ ++ DO_TEST(arch, cpuTestCPUIDBaseline, \ ++ label " (" cpu1 ", " cpu2 ")", \ ++ NULL, label, cpus, 2, NULL, 0, 0); \ ++ } while (0) ++ + /* host to host comparison */ + DO_TEST_COMPARE(VIR_ARCH_X86_64, "host", "host", VIR_CPU_COMPARE_IDENTICAL); + DO_TEST_COMPARE(VIR_ARCH_X86_64, "host", "host-better", VIR_CPU_COMPARE_INCOMPATIBLE); +@@ -1157,6 +1221,32 @@ mymain(void) + DO_TEST_CPUID(VIR_ARCH_X86_64, "Ice-Lake-Server", JSON_MODELS); + DO_TEST_CPUID(VIR_ARCH_X86_64, "Cooperlake", JSON_MODELS); + ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Ryzen+Rome", ++ "Ryzen-7-1800X-Eight-Core", "Ryzen-9-3900X-12-Core"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "EPYC+Rome", ++ "EPYC-7601-32-Core", "EPYC-7502-32-Core"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell-noTSX-IBRS+Skylake", ++ "Xeon-E5-2609-v3", "Xeon-Gold-6148"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell-noTSX-IBRS+Skylake-IBRS", ++ "Xeon-E5-2609-v3", "Xeon-Gold-6130"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Broadwell-IBRS+Cascadelake", ++ "Xeon-E5-2623-v4", "Xeon-Platinum-8268"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cascadelake+Skylake-IBRS", ++ "Xeon-Platinum-8268", "Xeon-Gold-6130"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cascadelake+Skylake", ++ "Xeon-Platinum-9242", "Xeon-Gold-6148"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cascadelake+Icelake", ++ "Xeon-Platinum-9242", "Ice-Lake-Server"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cooperlake+Icelake", ++ "Cooperlake", "Ice-Lake-Server"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cooperlake+Cascadelake", ++ "Cooperlake", "Xeon-Platinum-9242"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Skylake-Client+Server", ++ "Core-i5-6600", "Xeon-Gold-6148"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell-noTSX-IBRS+Broadwell", ++ "Xeon-E5-2609-v3", "Xeon-E5-2650-v4"); ++ DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell+Skylake", ++ "Xeon-E7-8890-v3", "Xeon-Gold-5115"); + cleanup: + #if WITH_QEMU + qemuTestDriverFree(&driver); +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml +new file mode 100644 +index 0000000000..4e3f253e9b +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml +@@ -0,0 +1,11 @@ ++ ++ Skylake-Client-IBRS ++ Intel ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml +new file mode 100644 +index 0000000000..e372a3e446 +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml +@@ -0,0 +1,14 @@ ++ ++ Cooperlake ++ Intel ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml +new file mode 100644 +index 0000000000..e559e01583 +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml +@@ -0,0 +1,12 @@ ++ ++ Cascadelake-Server ++ Intel ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml +new file mode 100644 +index 0000000000..906259df0b +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml +@@ -0,0 +1,8 @@ ++ ++ Skylake-Server ++ Intel ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml +new file mode 100644 +index 0000000000..46c32c996f +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml +@@ -0,0 +1,17 @@ ++ ++ Cooperlake ++ Intel ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml +new file mode 100644 +index 0000000000..e372a3e446 +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml +@@ -0,0 +1,14 @@ ++ ++ Cooperlake ++ Intel ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml b/tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml +new file mode 100644 +index 0000000000..e1984b2890 +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml +@@ -0,0 +1,13 @@ ++ ++ EPYC ++ AMD ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml +new file mode 100644 +index 0000000000..e687a679b3 +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml +@@ -0,0 +1,14 @@ ++ ++ Haswell ++ Intel ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml +new file mode 100644 +index 0000000000..651457b17a +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml +@@ -0,0 +1,14 @@ ++ ++ Haswell-noTSX ++ Intel ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml +new file mode 100644 +index 0000000000..8bda1c02e2 +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml +@@ -0,0 +1,14 @@ ++ ++ Haswell-noTSX-IBRS ++ Intel ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml +new file mode 100644 +index 0000000000..651457b17a +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml +@@ -0,0 +1,14 @@ ++ ++ Haswell-noTSX ++ Intel ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml b/tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml +new file mode 100644 +index 0000000000..051402b9d5 +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml +@@ -0,0 +1,13 @@ ++ ++ EPYC ++ AMD ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml b/tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml +new file mode 100644 +index 0000000000..d46ff26eeb +--- /dev/null ++++ b/tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml +@@ -0,0 +1,9 @@ ++ ++ Skylake-Client ++ Intel ++ ++ ++ ++ ++ ++ +-- +2.35.1 + diff --git a/SOURCES/libvirt-cputest-Drop-some-old-artificial-baseline-tests.patch b/SOURCES/libvirt-cputest-Drop-some-old-artificial-baseline-tests.patch new file mode 100644 index 0000000..e602981 --- /dev/null +++ b/SOURCES/libvirt-cputest-Drop-some-old-artificial-baseline-tests.patch @@ -0,0 +1,334 @@ +From 039e6627a7ee53973da64405b79cc0c0f6111fc7 Mon Sep 17 00:00:00 2001 +Message-Id: <039e6627a7ee53973da64405b79cc0c0f6111fc7@dist-git> +From: Jiri Denemark +Date: Wed, 4 May 2022 16:21:38 +0200 +Subject: [PATCH] cputest: Drop some old artificial baseline tests + +Signed-off-by: Jiri Denemark +Reviewed-by: Michal Privoznik +(cherry picked from commit 6aff36019bbaf643f451779621c6c88cab0e64a7) + +https://bugzilla.redhat.com/show_bug.cgi?id=2084030 + +Signed-off-by: Jiri Denemark +--- + tests/cputest.c | 6 --- + .../cputestdata/x86_64-baseline-1-result.xml | 5 -- + tests/cputestdata/x86_64-baseline-1.xml | 20 -------- + .../cputestdata/x86_64-baseline-2-result.xml | 4 -- + tests/cputestdata/x86_64-baseline-2.xml | 22 --------- + .../x86_64-baseline-5-expanded.xml | 47 ------------------- + .../cputestdata/x86_64-baseline-5-result.xml | 10 ---- + tests/cputestdata/x86_64-baseline-5.xml | 35 -------------- + .../cputestdata/x86_64-baseline-7-result.xml | 4 -- + tests/cputestdata/x86_64-baseline-7.xml | 24 ---------- + .../cputestdata/x86_64-baseline-8-result.xml | 4 -- + tests/cputestdata/x86_64-baseline-8.xml | 28 ----------- + 12 files changed, 209 deletions(-) + delete mode 100644 tests/cputestdata/x86_64-baseline-1-result.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-1.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-2-result.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-2.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-5-expanded.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-5-result.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-5.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-7-result.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-7.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-8-result.xml + delete mode 100644 tests/cputestdata/x86_64-baseline-8.xml + +diff --git a/tests/cputest.c b/tests/cputest.c +index 0f0621292a..20d56836be 100644 +--- a/tests/cputest.c ++++ b/tests/cputest.c +@@ -1051,18 +1051,12 @@ mymain(void) + DO_TEST_BASELINE(VIR_ARCH_X86_64, "incompatible-vendors", 0, -1); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "no-vendor", 0, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "some-vendors", 0, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "1", 0, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "2", 0, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "3", 0, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "3", VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "4", 0, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "4", VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "5", 0, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "5", VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "6", 0, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "6", VIR_CONNECT_BASELINE_CPU_MIGRATABLE, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "7", 0, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "8", 0, 0); + + DO_TEST_BASELINE(VIR_ARCH_PPC64, "incompatible-vendors", 0, -1); + DO_TEST_BASELINE(VIR_ARCH_PPC64, "no-vendor", 0, 0); +diff --git a/tests/cputestdata/x86_64-baseline-1-result.xml b/tests/cputestdata/x86_64-baseline-1-result.xml +deleted file mode 100644 +index 96c4f43b3d..0000000000 +--- a/tests/cputestdata/x86_64-baseline-1-result.xml ++++ /dev/null +@@ -1,5 +0,0 @@ +- +- Conroe +- Intel +- +- +diff --git a/tests/cputestdata/x86_64-baseline-1.xml b/tests/cputestdata/x86_64-baseline-1.xml +deleted file mode 100644 +index 509e6a85d2..0000000000 +--- a/tests/cputestdata/x86_64-baseline-1.xml ++++ /dev/null +@@ -1,20 +0,0 @@ +- +- +- x86_64 +- Penryn +- Intel +- +- +- +- x86_64 +- Conroe +- Intel +- +- +- +- x86_64 +- core2duo +- Intel +- +- +- +diff --git a/tests/cputestdata/x86_64-baseline-2-result.xml b/tests/cputestdata/x86_64-baseline-2-result.xml +deleted file mode 100644 +index a11352d0b1..0000000000 +--- a/tests/cputestdata/x86_64-baseline-2-result.xml ++++ /dev/null +@@ -1,4 +0,0 @@ +- +- core2duo +- +- +diff --git a/tests/cputestdata/x86_64-baseline-2.xml b/tests/cputestdata/x86_64-baseline-2.xml +deleted file mode 100644 +index 055223fd34..0000000000 +--- a/tests/cputestdata/x86_64-baseline-2.xml ++++ /dev/null +@@ -1,22 +0,0 @@ +- +- +- x86_64 +- core2duo +- +- +- +- x86_64 +- pentiumpro +- +- +- +- +- +- +- +- +- +- +- +- +- +diff --git a/tests/cputestdata/x86_64-baseline-5-expanded.xml b/tests/cputestdata/x86_64-baseline-5-expanded.xml +deleted file mode 100644 +index 2c1b400150..0000000000 +--- a/tests/cputestdata/x86_64-baseline-5-expanded.xml ++++ /dev/null +@@ -1,47 +0,0 @@ +- +- SandyBridge +- Intel +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +diff --git a/tests/cputestdata/x86_64-baseline-5-result.xml b/tests/cputestdata/x86_64-baseline-5-result.xml +deleted file mode 100644 +index 775a27de2e..0000000000 +--- a/tests/cputestdata/x86_64-baseline-5-result.xml ++++ /dev/null +@@ -1,10 +0,0 @@ +- +- SandyBridge +- Intel +- +- +- +- +- +- +- +diff --git a/tests/cputestdata/x86_64-baseline-5.xml b/tests/cputestdata/x86_64-baseline-5.xml +deleted file mode 100644 +index 80cd533ca4..0000000000 +--- a/tests/cputestdata/x86_64-baseline-5.xml ++++ /dev/null +@@ -1,35 +0,0 @@ +- +- +- x86_64 +- Westmere +- Intel +- +- +- +- +- +- +- +- +- +- +- +- +- +- x86_64 +- Nehalem +- Intel +- +- +- +- +- +- +- +- +- +- +- +- +- +- +diff --git a/tests/cputestdata/x86_64-baseline-7-result.xml b/tests/cputestdata/x86_64-baseline-7-result.xml +deleted file mode 100644 +index 2af549e77a..0000000000 +--- a/tests/cputestdata/x86_64-baseline-7-result.xml ++++ /dev/null +@@ -1,4 +0,0 @@ +- +- Haswell-noTSX +- Intel +- +diff --git a/tests/cputestdata/x86_64-baseline-7.xml b/tests/cputestdata/x86_64-baseline-7.xml +deleted file mode 100644 +index b7e61b160c..0000000000 +--- a/tests/cputestdata/x86_64-baseline-7.xml ++++ /dev/null +@@ -1,24 +0,0 @@ +- +- +- x86_64 +- SandyBridge +- Intel +- +- +- +- +- +- +- +- +- +- +- +- +- +- x86_64 +- Haswell-noTSX +- Intel +- +- +- +diff --git a/tests/cputestdata/x86_64-baseline-8-result.xml b/tests/cputestdata/x86_64-baseline-8-result.xml +deleted file mode 100644 +index 88226b3dab..0000000000 +--- a/tests/cputestdata/x86_64-baseline-8-result.xml ++++ /dev/null +@@ -1,4 +0,0 @@ +- +- Broadwell-noTSX +- Intel +- +diff --git a/tests/cputestdata/x86_64-baseline-8.xml b/tests/cputestdata/x86_64-baseline-8.xml +deleted file mode 100644 +index f1ee67d542..0000000000 +--- a/tests/cputestdata/x86_64-baseline-8.xml ++++ /dev/null +@@ -1,28 +0,0 @@ +- +- +- x86_64 +- SandyBridge +- Intel +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- +- x86_64 +- Broadwell-noTSX +- Intel +- +- +- +-- +2.35.1 + diff --git a/SOURCES/libvirt-cputest-Give-better-names-to-baseline-tests.patch b/SOURCES/libvirt-cputest-Give-better-names-to-baseline-tests.patch new file mode 100644 index 0000000..a127f6a --- /dev/null +++ b/SOURCES/libvirt-cputest-Give-better-names-to-baseline-tests.patch @@ -0,0 +1,97 @@ +From 89272567fd9e2b87133333f5565c1d9e2befb350 Mon Sep 17 00:00:00 2001 +Message-Id: <89272567fd9e2b87133333f5565c1d9e2befb350@dist-git> +From: Jiri Denemark +Date: Wed, 4 May 2022 16:28:03 +0200 +Subject: [PATCH] cputest: Give better names to baseline tests + +Signed-off-by: Jiri Denemark +Reviewed-by: Michal Privoznik +(cherry picked from commit 3daa68e26514dc114d71f4c44f7d728e93a53cd0) + +https://bugzilla.redhat.com/show_bug.cgi?id=2084030 + +Signed-off-by: Jiri Denemark +--- + tests/cputest.c | 12 ++++++------ + ... x86_64-baseline-Westmere+Nehalem-migratable.xml} | 0 + ...l => x86_64-baseline-Westmere+Nehalem-result.xml} | 0 + ...ne-6.xml => x86_64-baseline-Westmere+Nehalem.xml} | 0 + ...ded.xml => x86_64-baseline-features-expanded.xml} | 0 + ...esult.xml => x86_64-baseline-features-result.xml} | 0 + ...4-baseline-4.xml => x86_64-baseline-features.xml} | 0 + ...anded.xml => x86_64-baseline-simple-expanded.xml} | 0 + ...-result.xml => x86_64-baseline-simple-result.xml} | 0 + ..._64-baseline-3.xml => x86_64-baseline-simple.xml} | 0 + 10 files changed, 6 insertions(+), 6 deletions(-) + rename tests/cputestdata/{x86_64-baseline-6-migratable.xml => x86_64-baseline-Westmere+Nehalem-migratable.xml} (100%) + rename tests/cputestdata/{x86_64-baseline-6-result.xml => x86_64-baseline-Westmere+Nehalem-result.xml} (100%) + rename tests/cputestdata/{x86_64-baseline-6.xml => x86_64-baseline-Westmere+Nehalem.xml} (100%) + rename tests/cputestdata/{x86_64-baseline-4-expanded.xml => x86_64-baseline-features-expanded.xml} (100%) + rename tests/cputestdata/{x86_64-baseline-4-result.xml => x86_64-baseline-features-result.xml} (100%) + rename tests/cputestdata/{x86_64-baseline-4.xml => x86_64-baseline-features.xml} (100%) + rename tests/cputestdata/{x86_64-baseline-3-expanded.xml => x86_64-baseline-simple-expanded.xml} (100%) + rename tests/cputestdata/{x86_64-baseline-3-result.xml => x86_64-baseline-simple-result.xml} (100%) + rename tests/cputestdata/{x86_64-baseline-3.xml => x86_64-baseline-simple.xml} (100%) + +diff --git a/tests/cputest.c b/tests/cputest.c +index 20d56836be..b939e20718 100644 +--- a/tests/cputest.c ++++ b/tests/cputest.c +@@ -1051,12 +1051,12 @@ mymain(void) + DO_TEST_BASELINE(VIR_ARCH_X86_64, "incompatible-vendors", 0, -1); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "no-vendor", 0, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "some-vendors", 0, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "3", 0, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "3", VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "4", 0, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "4", VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "6", 0, 0); +- DO_TEST_BASELINE(VIR_ARCH_X86_64, "6", VIR_CONNECT_BASELINE_CPU_MIGRATABLE, 0); ++ DO_TEST_BASELINE(VIR_ARCH_X86_64, "simple", 0, 0); ++ DO_TEST_BASELINE(VIR_ARCH_X86_64, "simple", VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES, 0); ++ DO_TEST_BASELINE(VIR_ARCH_X86_64, "features", 0, 0); ++ DO_TEST_BASELINE(VIR_ARCH_X86_64, "features", VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES, 0); ++ DO_TEST_BASELINE(VIR_ARCH_X86_64, "Westmere+Nehalem", 0, 0); ++ DO_TEST_BASELINE(VIR_ARCH_X86_64, "Westmere+Nehalem", VIR_CONNECT_BASELINE_CPU_MIGRATABLE, 0); + + DO_TEST_BASELINE(VIR_ARCH_PPC64, "incompatible-vendors", 0, -1); + DO_TEST_BASELINE(VIR_ARCH_PPC64, "no-vendor", 0, 0); +diff --git a/tests/cputestdata/x86_64-baseline-6-migratable.xml b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml +similarity index 100% +rename from tests/cputestdata/x86_64-baseline-6-migratable.xml +rename to tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml +diff --git a/tests/cputestdata/x86_64-baseline-6-result.xml b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml +similarity index 100% +rename from tests/cputestdata/x86_64-baseline-6-result.xml +rename to tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml +diff --git a/tests/cputestdata/x86_64-baseline-6.xml b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem.xml +similarity index 100% +rename from tests/cputestdata/x86_64-baseline-6.xml +rename to tests/cputestdata/x86_64-baseline-Westmere+Nehalem.xml +diff --git a/tests/cputestdata/x86_64-baseline-4-expanded.xml b/tests/cputestdata/x86_64-baseline-features-expanded.xml +similarity index 100% +rename from tests/cputestdata/x86_64-baseline-4-expanded.xml +rename to tests/cputestdata/x86_64-baseline-features-expanded.xml +diff --git a/tests/cputestdata/x86_64-baseline-4-result.xml b/tests/cputestdata/x86_64-baseline-features-result.xml +similarity index 100% +rename from tests/cputestdata/x86_64-baseline-4-result.xml +rename to tests/cputestdata/x86_64-baseline-features-result.xml +diff --git a/tests/cputestdata/x86_64-baseline-4.xml b/tests/cputestdata/x86_64-baseline-features.xml +similarity index 100% +rename from tests/cputestdata/x86_64-baseline-4.xml +rename to tests/cputestdata/x86_64-baseline-features.xml +diff --git a/tests/cputestdata/x86_64-baseline-3-expanded.xml b/tests/cputestdata/x86_64-baseline-simple-expanded.xml +similarity index 100% +rename from tests/cputestdata/x86_64-baseline-3-expanded.xml +rename to tests/cputestdata/x86_64-baseline-simple-expanded.xml +diff --git a/tests/cputestdata/x86_64-baseline-3-result.xml b/tests/cputestdata/x86_64-baseline-simple-result.xml +similarity index 100% +rename from tests/cputestdata/x86_64-baseline-3-result.xml +rename to tests/cputestdata/x86_64-baseline-simple-result.xml +diff --git a/tests/cputestdata/x86_64-baseline-3.xml b/tests/cputestdata/x86_64-baseline-simple.xml +similarity index 100% +rename from tests/cputestdata/x86_64-baseline-3.xml +rename to tests/cputestdata/x86_64-baseline-simple.xml +-- +2.35.1 + diff --git a/SOURCES/libvirt-qemu_capabilities-Detect-memory-backend-.prealloc-threads-property.patch b/SOURCES/libvirt-qemu_capabilities-Detect-memory-backend-.prealloc-threads-property.patch new file mode 100644 index 0000000..91d50fc --- /dev/null +++ b/SOURCES/libvirt-qemu_capabilities-Detect-memory-backend-.prealloc-threads-property.patch @@ -0,0 +1,314 @@ +From 9f9fcbc842846c6f2579ca52190f506060e191d8 Mon Sep 17 00:00:00 2001 +Message-Id: <9f9fcbc842846c6f2579ca52190f506060e191d8@dist-git> +From: Michal Privoznik +Date: Mon, 21 Mar 2022 16:55:05 +0100 +Subject: [PATCH] qemu_capabilities: Detect memory-backend-*.prealloc-threads + property + +The prealloc-threads is property of memory-backend class which is +parent to the other three classes memory-backend-{ram,file,memfd}. +Therefore the property is present for all, or none if QEMU is +older than v5.0.0-rc0~75^2~1^2~3 which introduced the property. + +Anyway, the .reserve property is the same story, and we chose +memory-backend-file to detect it, so stick with our earlier +decision and use the same backend to detect this new property. + +Signed-off-by: Michal Privoznik +Reviewed-by: Martin Kletzander +(cherry picked from commit a30dac15dcdb7a6c7a3e9b6cfc5cd77bae185081) + +Conflicts: +src/qemu/qemu_capabilities.c: Context +src/qemu/qemu_capabilities.h +tests/qemucapabilitiesdata/caps_5.2.0.aarch64.xml +tests/qemucapabilitiesdata/caps_5.2.0.ppc64.xml +tests/qemucapabilitiesdata/caps_5.2.0.riscv64.xml +tests/qemucapabilitiesdata/caps_5.2.0.s390x.xml +tests/qemucapabilitiesdata/caps_5.2.0.x86_64.xml +tests/qemucapabilitiesdata/caps_6.0.0.aarch64.xml +tests/qemucapabilitiesdata/caps_6.0.0.s390x.xml +tests/qemucapabilitiesdata/caps_6.0.0.x86_64.xml +tests/qemucapabilitiesdata/caps_6.1.0.x86_64.xml +tests/qemucapabilitiesdata/caps_6.2.0.aarch64.xml +tests/qemucapabilitiesdata/caps_6.2.0.ppc64.xml +tests/qemucapabilitiesdata/caps_6.2.0.x86_64.xml +tests/qemucapabilitiesdata/caps_7.0.0.ppc64.xml +tests/qemucapabilitiesdata/caps_7.0.0.x86_64.xml + +Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=2075569 +Signed-off-by: Michal Privoznik +--- + src/qemu/qemu_capabilities.c | 2 ++ + src/qemu/qemu_capabilities.h | 1 + + tests/qemucapabilitiesdata/caps_5.0.0.aarch64.xml | 1 + + tests/qemucapabilitiesdata/caps_5.0.0.ppc64.xml | 1 + + tests/qemucapabilitiesdata/caps_5.0.0.riscv64.xml | 1 + + tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml | 1 + + tests/qemucapabilitiesdata/caps_5.1.0.sparc.xml | 1 + + tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml | 1 + + tests/qemucapabilitiesdata/caps_5.2.0.aarch64.xml | 1 + + tests/qemucapabilitiesdata/caps_5.2.0.ppc64.xml | 1 + + tests/qemucapabilitiesdata/caps_5.2.0.riscv64.xml | 1 + + tests/qemucapabilitiesdata/caps_5.2.0.s390x.xml | 1 + + tests/qemucapabilitiesdata/caps_5.2.0.x86_64.xml | 1 + + tests/qemucapabilitiesdata/caps_6.0.0.aarch64.xml | 1 + + tests/qemucapabilitiesdata/caps_6.0.0.s390x.xml | 1 + + tests/qemucapabilitiesdata/caps_6.0.0.x86_64.xml | 1 + + tests/qemucapabilitiesdata/caps_6.1.0.x86_64.xml | 1 + + tests/qemucapabilitiesdata/caps_6.2.0.aarch64.xml | 1 + + tests/qemucapabilitiesdata/caps_6.2.0.ppc64.xml | 1 + + tests/qemucapabilitiesdata/caps_6.2.0.x86_64.xml | 1 + + 20 files changed, 21 insertions(+) + +diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c +index 8ae80ef8d7..c4f7db55c8 100644 +--- a/src/qemu/qemu_capabilities.c ++++ b/src/qemu/qemu_capabilities.c +@@ -657,6 +657,7 @@ VIR_ENUM_IMPL(virQEMUCaps, + + /* 420 */ + "blockdev-reopen.__com.redhat_rhel-av-8_2_0-api", /* QEMU_CAPS_BLOCKDEV_REOPEN_COM_REDHAT_AV_8_2_0_API */ ++ "memory-backend-file.prealloc-threads", /* QEMU_CAPS_MEMORY_BACKEND_PREALLOC_THREADS */ + ); + + +@@ -1713,6 +1714,7 @@ static struct virQEMUCapsStringFlags virQEMUCapsObjectPropsMemoryBackendFile[] = + * released qemu versions. */ + { "x-use-canonical-path-for-ramblock-id", QEMU_CAPS_X_USE_CANONICAL_PATH_FOR_RAMBLOCK_ID }, + { "reserve", QEMU_CAPS_MEMORY_BACKEND_RESERVE }, ++ { "prealloc-threads", QEMU_CAPS_MEMORY_BACKEND_PREALLOC_THREADS }, + }; + + static struct virQEMUCapsStringFlags virQEMUCapsObjectPropsMemoryBackendMemfd[] = { +diff --git a/src/qemu/qemu_capabilities.h b/src/qemu/qemu_capabilities.h +index cde6c18b4c..8e65635e0d 100644 +--- a/src/qemu/qemu_capabilities.h ++++ b/src/qemu/qemu_capabilities.h +@@ -636,6 +636,7 @@ typedef enum { /* virQEMUCapsFlags grouping marker for syntax-check */ + + /* 420 */ + QEMU_CAPS_BLOCKDEV_REOPEN_COM_REDHAT_AV_8_2_0_API, /* downstream support for blockdev reopen in rhel-av-8.2.0 */ ++ QEMU_CAPS_MEMORY_BACKEND_PREALLOC_THREADS, /* -object memory-backend-*.prealloc-threads */ + + QEMU_CAPS_LAST /* this must always be the last item */ + } virQEMUCapsFlags; +diff --git a/tests/qemucapabilitiesdata/caps_5.0.0.aarch64.xml b/tests/qemucapabilitiesdata/caps_5.0.0.aarch64.xml +index bb6a7d5ee7..3b18f160db 100644 +--- a/tests/qemucapabilitiesdata/caps_5.0.0.aarch64.xml ++++ b/tests/qemucapabilitiesdata/caps_5.0.0.aarch64.xml +@@ -179,6 +179,7 @@ + + + ++ + 5000000 + 0 + 61700241 +diff --git a/tests/qemucapabilitiesdata/caps_5.0.0.ppc64.xml b/tests/qemucapabilitiesdata/caps_5.0.0.ppc64.xml +index f8317c1117..c90f2be296 100644 +--- a/tests/qemucapabilitiesdata/caps_5.0.0.ppc64.xml ++++ b/tests/qemucapabilitiesdata/caps_5.0.0.ppc64.xml +@@ -187,6 +187,7 @@ + + + ++ + 5000000 + 0 + 42900241 +diff --git a/tests/qemucapabilitiesdata/caps_5.0.0.riscv64.xml b/tests/qemucapabilitiesdata/caps_5.0.0.riscv64.xml +index 58c7eb6651..8fbe8f114f 100644 +--- a/tests/qemucapabilitiesdata/caps_5.0.0.riscv64.xml ++++ b/tests/qemucapabilitiesdata/caps_5.0.0.riscv64.xml +@@ -171,6 +171,7 @@ + + + ++ + 5000000 + 0 + 0 +diff --git a/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml +index 69f49020e7..b76c4346a4 100644 +--- a/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml ++++ b/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml +@@ -221,6 +221,7 @@ + + + ++ + 5000000 + 0 + 43100241 +diff --git a/tests/qemucapabilitiesdata/caps_5.1.0.sparc.xml b/tests/qemucapabilitiesdata/caps_5.1.0.sparc.xml +index 58af90b29f..7de7c291f5 100644 +--- a/tests/qemucapabilitiesdata/caps_5.1.0.sparc.xml ++++ b/tests/qemucapabilitiesdata/caps_5.1.0.sparc.xml +@@ -90,6 +90,7 @@ + + + ++ + 5001000 + 0 + 0 +diff --git a/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml +index 578e16e8b0..9b5cb3cd7a 100644 +--- a/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml ++++ b/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml +@@ -224,6 +224,7 @@ + + + ++ + 5001000 + 0 + 43100242 +diff --git a/tests/qemucapabilitiesdata/caps_5.2.0.aarch64.xml b/tests/qemucapabilitiesdata/caps_5.2.0.aarch64.xml +index b943eaedaf..020c04c1c4 100644 +--- a/tests/qemucapabilitiesdata/caps_5.2.0.aarch64.xml ++++ b/tests/qemucapabilitiesdata/caps_5.2.0.aarch64.xml +@@ -184,6 +184,7 @@ + + + ++ + 5002000 + 0 + 61700243 +diff --git a/tests/qemucapabilitiesdata/caps_5.2.0.ppc64.xml b/tests/qemucapabilitiesdata/caps_5.2.0.ppc64.xml +index ec64e1cacf..5346b1552c 100644 +--- a/tests/qemucapabilitiesdata/caps_5.2.0.ppc64.xml ++++ b/tests/qemucapabilitiesdata/caps_5.2.0.ppc64.xml +@@ -190,6 +190,7 @@ + + + ++ + 5002000 + 0 + 42900243 +diff --git a/tests/qemucapabilitiesdata/caps_5.2.0.riscv64.xml b/tests/qemucapabilitiesdata/caps_5.2.0.riscv64.xml +index a11d15f91a..9f6974f85d 100644 +--- a/tests/qemucapabilitiesdata/caps_5.2.0.riscv64.xml ++++ b/tests/qemucapabilitiesdata/caps_5.2.0.riscv64.xml +@@ -174,6 +174,7 @@ + + + ++ + 5002000 + 0 + 0 +diff --git a/tests/qemucapabilitiesdata/caps_5.2.0.s390x.xml b/tests/qemucapabilitiesdata/caps_5.2.0.s390x.xml +index 552e1d43c9..44753b64c3 100644 +--- a/tests/qemucapabilitiesdata/caps_5.2.0.s390x.xml ++++ b/tests/qemucapabilitiesdata/caps_5.2.0.s390x.xml +@@ -141,6 +141,7 @@ + + + ++ + 5002000 + 0 + 39100243 +diff --git a/tests/qemucapabilitiesdata/caps_5.2.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_5.2.0.x86_64.xml +index bcc262551a..db11c99739 100644 +--- a/tests/qemucapabilitiesdata/caps_5.2.0.x86_64.xml ++++ b/tests/qemucapabilitiesdata/caps_5.2.0.x86_64.xml +@@ -227,6 +227,7 @@ + + + ++ + 5002000 + 0 + 43100243 +diff --git a/tests/qemucapabilitiesdata/caps_6.0.0.aarch64.xml b/tests/qemucapabilitiesdata/caps_6.0.0.aarch64.xml +index 0fefe64537..5f9a97df43 100644 +--- a/tests/qemucapabilitiesdata/caps_6.0.0.aarch64.xml ++++ b/tests/qemucapabilitiesdata/caps_6.0.0.aarch64.xml +@@ -192,6 +192,7 @@ + + + ++ + 6000000 + 0 + 61700242 +diff --git a/tests/qemucapabilitiesdata/caps_6.0.0.s390x.xml b/tests/qemucapabilitiesdata/caps_6.0.0.s390x.xml +index 61685066b8..46bd1d3d2d 100644 +--- a/tests/qemucapabilitiesdata/caps_6.0.0.s390x.xml ++++ b/tests/qemucapabilitiesdata/caps_6.0.0.s390x.xml +@@ -149,6 +149,7 @@ + + + ++ + 6000000 + 0 + 39100242 +diff --git a/tests/qemucapabilitiesdata/caps_6.0.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_6.0.0.x86_64.xml +index 0d6763e9a3..99bbb6e237 100644 +--- a/tests/qemucapabilitiesdata/caps_6.0.0.x86_64.xml ++++ b/tests/qemucapabilitiesdata/caps_6.0.0.x86_64.xml +@@ -236,6 +236,7 @@ + + + ++ + 6000000 + 0 + 43100242 +diff --git a/tests/qemucapabilitiesdata/caps_6.1.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_6.1.0.x86_64.xml +index 228f397c67..ff0715e605 100644 +--- a/tests/qemucapabilitiesdata/caps_6.1.0.x86_64.xml ++++ b/tests/qemucapabilitiesdata/caps_6.1.0.x86_64.xml +@@ -240,6 +240,7 @@ + + + ++ + 6001000 + 0 + 43100243 +diff --git a/tests/qemucapabilitiesdata/caps_6.2.0.aarch64.xml b/tests/qemucapabilitiesdata/caps_6.2.0.aarch64.xml +index 6bf9933bc5..dd6f0e6919 100644 +--- a/tests/qemucapabilitiesdata/caps_6.2.0.aarch64.xml ++++ b/tests/qemucapabilitiesdata/caps_6.2.0.aarch64.xml +@@ -203,6 +203,7 @@ + + + ++ + 6001050 + 0 + 61700244 +diff --git a/tests/qemucapabilitiesdata/caps_6.2.0.ppc64.xml b/tests/qemucapabilitiesdata/caps_6.2.0.ppc64.xml +index 06cd7fb396..2646cdf88f 100644 +--- a/tests/qemucapabilitiesdata/caps_6.2.0.ppc64.xml ++++ b/tests/qemucapabilitiesdata/caps_6.2.0.ppc64.xml +@@ -199,6 +199,7 @@ + + + ++ + 6001050 + 0 + 42900244 +diff --git a/tests/qemucapabilitiesdata/caps_6.2.0.x86_64.xml b/tests/qemucapabilitiesdata/caps_6.2.0.x86_64.xml +index 75aaeed03c..f25ec1b84a 100644 +--- a/tests/qemucapabilitiesdata/caps_6.2.0.x86_64.xml ++++ b/tests/qemucapabilitiesdata/caps_6.2.0.x86_64.xml +@@ -241,6 +241,7 @@ + + + ++ + 6002000 + 0 + 43100244 +-- +2.35.1 + diff --git a/SOURCES/libvirt-qemu_command-Generate-prealloc-threads-property.patch b/SOURCES/libvirt-qemu_command-Generate-prealloc-threads-property.patch new file mode 100644 index 0000000..16b656c --- /dev/null +++ b/SOURCES/libvirt-qemu_command-Generate-prealloc-threads-property.patch @@ -0,0 +1,66 @@ +From f9c8097e8a836052239c51552d943a76b8164de3 Mon Sep 17 00:00:00 2001 +Message-Id: +From: Michal Privoznik +Date: Mon, 21 Mar 2022 17:10:15 +0100 +Subject: [PATCH] qemu_command: Generate prealloc-threads property + +Let's generate prealloc-threads property onto the cmd line if +domain configuration requests so. + +Signed-off-by: Michal Privoznik +Reviewed-by: Martin Kletzander +(cherry picked from commit b8d6ecc70c8a8e9c90bab48b6829b42d8b77c748) + +Conflicts: +tests/qemuxml2argvdata/memfd-memory-numa.x86_64-latest.args: +Upstream has moved some cmd line arguments +(v8.0.0-260-gaf23241cfe) but that is not backported. + +Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=2075569 +Signed-off-by: Michal Privoznik +--- + src/qemu/qemu_command.c | 5 ++++- + tests/qemuxml2argvdata/memfd-memory-numa.x86_64-latest.args | 4 ++-- + 2 files changed, 6 insertions(+), 3 deletions(-) + +diff --git a/src/qemu/qemu_command.c b/src/qemu/qemu_command.c +index 2acdcca2ff..d23af97e0c 100644 +--- a/src/qemu/qemu_command.c ++++ b/src/qemu/qemu_command.c +@@ -3856,7 +3856,10 @@ qemuBuildMemoryBackendProps(virJSONValue **backendProps, + return -1; + } else { + if (!priv->memPrealloc && +- virJSONValueObjectAdd(&props, "B:prealloc", prealloc, NULL) < 0) ++ virJSONValueObjectAdd(&props, ++ "B:prealloc", prealloc, ++ "p:prealloc-threads", def->mem.allocation_threads, ++ NULL) < 0) + return -1; + } + +diff --git a/tests/qemuxml2argvdata/memfd-memory-numa.x86_64-latest.args b/tests/qemuxml2argvdata/memfd-memory-numa.x86_64-latest.args +index 04a320d469..9b2e6086c3 100644 +--- a/tests/qemuxml2argvdata/memfd-memory-numa.x86_64-latest.args ++++ b/tests/qemuxml2argvdata/memfd-memory-numa.x86_64-latest.args +@@ -16,7 +16,7 @@ XDG_CONFIG_HOME=/tmp/lib/domain--1-instance-00000092/.config \ + -m size=14680064k,slots=16,maxmem=1099511627776k \ + -overcommit mem-lock=off \ + -smp 8,sockets=1,dies=1,cores=8,threads=1 \ +--object '{"qom-type":"memory-backend-memfd","id":"ram-node0","hugetlb":true,"hugetlbsize":2097152,"share":true,"prealloc":true,"size":15032385536,"host-nodes":[3],"policy":"preferred"}' \ ++-object '{"qom-type":"memory-backend-memfd","id":"ram-node0","hugetlb":true,"hugetlbsize":2097152,"share":true,"prealloc":true,"prealloc-threads":8,"size":15032385536,"host-nodes":[3],"policy":"preferred"}' \ + -numa node,nodeid=0,cpus=0-7,memdev=ram-node0 \ + -uuid 126f2720-6f8e-45ab-a886-ec9277079a67 \ + -display none \ +@@ -29,7 +29,7 @@ XDG_CONFIG_HOME=/tmp/lib/domain--1-instance-00000092/.config \ + -no-acpi \ + -boot strict=on \ + -device piix3-usb-uhci,id=usb,bus=pci.0,addr=0x1.0x2 \ +--object '{"qom-type":"memory-backend-file","id":"memnvdimm0","mem-path":"/tmp/nvdimm","share":true,"prealloc":true,"size":536870912,"host-nodes":[3],"policy":"preferred"}' \ ++-object '{"qom-type":"memory-backend-file","id":"memnvdimm0","mem-path":"/tmp/nvdimm","share":true,"prealloc":true,"prealloc-threads":8,"size":536870912,"host-nodes":[3],"policy":"preferred"}' \ + -device nvdimm,node=0,memdev=memnvdimm0,id=nvdimm0,slot=0 \ + -audiodev '{"id":"audio1","driver":"none"}' \ + -device virtio-balloon-pci,id=balloon0,bus=pci.0,addr=0x3 \ +-- +2.35.1 + diff --git a/SOURCES/libvirt-qemu_validate-Validate-prealloc-threads-against-qemuCpas.patch b/SOURCES/libvirt-qemu_validate-Validate-prealloc-threads-against-qemuCpas.patch new file mode 100644 index 0000000..979286d --- /dev/null +++ b/SOURCES/libvirt-qemu_validate-Validate-prealloc-threads-against-qemuCpas.patch @@ -0,0 +1,39 @@ +From d1a1a95343946fbe0736a14073b63831320d55d2 Mon Sep 17 00:00:00 2001 +Message-Id: +From: Michal Privoznik +Date: Mon, 21 Mar 2022 17:09:40 +0100 +Subject: [PATCH] qemu_validate: Validate prealloc threads against qemuCpas + +Only fairly new QEMUs are capable of user provided number of +preallocation threads. Validate this assumption. + +Signed-off-by: Michal Privoznik +Reviewed-by: Martin Kletzander +(cherry picked from commit 75a4e0165ef199809974e97b507d3953e1de01d1) +Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=2075569 +Signed-off-by: Michal Privoznik +--- + src/qemu/qemu_validate.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/src/qemu/qemu_validate.c b/src/qemu/qemu_validate.c +index 3a69733f81..7bc14293d6 100644 +--- a/src/qemu/qemu_validate.c ++++ b/src/qemu/qemu_validate.c +@@ -739,6 +739,13 @@ qemuValidateDomainDefMemory(const virDomainDef *def, + return -1; + } + ++ if (mem->allocation_threads > 0 && ++ !virQEMUCapsGet(qemuCaps, QEMU_CAPS_MEMORY_BACKEND_PREALLOC_THREADS)) { ++ virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s", ++ _("preallocation threads are unsupported with this QEMU")); ++ return -1; ++ } ++ + if (mem->source == VIR_DOMAIN_MEMORY_SOURCE_ANONYMOUS) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s", + _("hugepages are not allowed with anonymous " +-- +2.35.1 + diff --git a/SPECS/libvirt.spec b/SPECS/libvirt.spec index d6e9abf..0d357d8 100644 --- a/SPECS/libvirt.spec +++ b/SPECS/libvirt.spec @@ -210,7 +210,7 @@ Summary: Library providing a simple virtualization API Name: libvirt Version: 8.0.0 -Release: 5%{?dist}%{?extra_release} +Release: 5.2%{?dist}%{?extra_release} License: LGPLv2+ URL: https://libvirt.org/ @@ -238,6 +238,18 @@ Patch15: libvirt-qemu_command-Generate-memory-only-after-controllers.patch Patch16: libvirt-qemu-Validate-domain-definition-even-on-migration.patch Patch17: libvirt-node_device-Rework-udevKludgeStorageType.patch Patch18: libvirt-node_device-Treat-NVMe-disks-as-regular-disks.patch +Patch19: libvirt-conf-Introduce-memory-allocation-threads.patch +Patch20: libvirt-qemu_capabilities-Detect-memory-backend-.prealloc-threads-property.patch +Patch21: libvirt-qemu_validate-Validate-prealloc-threads-against-qemuCpas.patch +Patch22: libvirt-qemu_command-Generate-prealloc-threads-property.patch +Patch23: libvirt-cpu_map-Disable-cpu64-rhel-for-host-model-and-baseline.patch +Patch24: libvirt-cputest-Drop-some-old-artificial-baseline-tests.patch +Patch25: libvirt-cputest-Give-better-names-to-baseline-tests.patch +Patch26: libvirt-cputest-Add-some-real-world-baseline-tests.patch +Patch27: libvirt-cpu_x86-Consolidate-signature-match-in-x86DecodeUseCandidate.patch +Patch28: libvirt-cpu_x86-Refactor-feature-list-comparison-in-x86DecodeUseCandidate.patch +Patch29: libvirt-cpu_x86-Penalize-disabled-features-when-computing-CPU-model.patch +Patch30: libvirt-cpu_x86-Ignore-enabled-features-for-input-models-in-x86DecodeUseCandidate.patch Requires: libvirt-daemon = %{version}-%{release} Requires: libvirt-daemon-config-network = %{version}-%{release} @@ -2111,6 +2123,22 @@ exit 0 %changelog +* Tue May 17 2022 Jiri Denemark - 8.0.0-5.2.el8 +- cpu_map: Disable cpu64-rhel* for host-model and baseline (rhbz#2084030) +- cputest: Drop some old artificial baseline tests (rhbz#2084030) +- cputest: Give better names to baseline tests (rhbz#2084030) +- cputest: Add some real world baseline tests (rhbz#2084030) +- cpu_x86: Consolidate signature match in x86DecodeUseCandidate (rhbz#2084030) +- cpu_x86: Refactor feature list comparison in x86DecodeUseCandidate (rhbz#2084030) +- cpu_x86: Penalize disabled features when computing CPU model (rhbz#2084030) +- cpu_x86: Ignore enabled features for input models in x86DecodeUseCandidate (rhbz#2084030) + +* Wed Apr 27 2022 Jiri Denemark - 8.0.0-5.1.el8 +- conf: Introduce memory allocation threads (rhbz#2075569) +- qemu_capabilities: Detect memory-backend-*.prealloc-threads property (rhbz#2075569) +- qemu_validate: Validate prealloc threads against qemuCpas (rhbz#2075569) +- qemu_command: Generate prealloc-threads property (rhbz#2075569) + * Fri Feb 25 2022 Jiri Denemark - 8.0.0-5 - node_device: Rework udevKludgeStorageType() (rhbz#2056673) - node_device: Treat NVMe disks as regular disks (rhbz#2056673)