45 lines
1.8 KiB
Diff
45 lines
1.8 KiB
Diff
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From 7107f739398cd96600b039fd748cb1c4822bb400 Mon Sep 17 00:00:00 2001
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From: Guillaume Gardet <guillaume.gardet@arm.com>
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Date: Fri, 21 Jan 2022 09:26:07 +0100
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Subject: [PATCH] Add BTI landing pads for aarch64
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When Branch Target Identifier (BTI) is enabled on aarch64,
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any software which run libglvnd will fail with SIGILL, Illegal instruction.
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This is because some assembler code misses the BTI landing pads.
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See: https://developer.arm.com/documentation/102433/0100/Jump-oriented-programming
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"hint #34" is the same thing as "BTI C" landing pad, but keep
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compatibility with systems without BTI enabled.
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---
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src/GLX/glvnd_genentry.c | 1 +
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src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c | 1 +
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2 files changed, 2 insertions(+)
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diff --git a/src/GLX/glvnd_genentry.c b/src/GLX/glvnd_genentry.c
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index 7bbe811..b82aa14 100644
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--- a/src/GLX/glvnd_genentry.c
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+++ b/src/GLX/glvnd_genentry.c
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@@ -90,6 +90,7 @@ extern char glx_entrypoint_end[];
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#define STUB_SIZE 16
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#define STUB_ASM_ARCH(slot) \
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+ "hint #34\n" \
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"adrp x16, entrypointFunctions + " slot "*8\n" \
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"ldr x16, [x16, #:lo12:(entrypointFunctions + " slot "*8)]\n" \
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"br x16\n"
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diff --git a/src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c b/src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c
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index ae80131..a4652e0 100644
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--- a/src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c
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+++ b/src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c
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@@ -69,6 +69,7 @@
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* table then does a branch without link to the function address.
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*/
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#define STUB_ASM_CODE(slot) \
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+ "hint #34\n\t" \
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"stp x1, x0, [sp, #-16]!\n\t" \
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"adrp x0, :got:_glapi_Current\n\t" \
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"ldr x0, [x0, #:got_lo12:_glapi_Current]\n\t" \
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--
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GitLab
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