Intel CET support by H. J. Lu
This commit is contained in:
Tomas Mraz
parent
402a3b5f2e
commit
8c18517a25
348
libgcrypt-1.8.5-intel-cet.patch
Normal file
348
libgcrypt-1.8.5-intel-cet.patch
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@ -0,0 +1,348 @@
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diff -up libgcrypt-1.8.5/cipher/camellia-aesni-avx2-amd64.S.intel-cet libgcrypt-1.8.5/cipher/camellia-aesni-avx2-amd64.S
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--- libgcrypt-1.8.5/cipher/camellia-aesni-avx2-amd64.S.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/cipher/camellia-aesni-avx2-amd64.S 2020-01-23 15:36:44.148972045 +0100
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@@ -18,8 +18,9 @@
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* License along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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-#ifdef __x86_64
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#include <config.h>
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+
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+#ifdef __x86_64
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#if (defined(HAVE_COMPATIBLE_GCC_AMD64_PLATFORM_AS) || \
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defined(HAVE_COMPATIBLE_GCC_WIN64_PLATFORM_AS)) && \
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defined(ENABLE_AESNI_SUPPORT) && defined(ENABLE_AVX2_SUPPORT)
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diff -up libgcrypt-1.8.5/cipher/camellia-aesni-avx-amd64.S.intel-cet libgcrypt-1.8.5/cipher/camellia-aesni-avx-amd64.S
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--- libgcrypt-1.8.5/cipher/camellia-aesni-avx-amd64.S.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/cipher/camellia-aesni-avx-amd64.S 2020-01-23 15:36:44.145972088 +0100
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@@ -18,8 +18,9 @@
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* License along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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-#ifdef __x86_64
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#include <config.h>
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+
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+#ifdef __x86_64
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#if (defined(HAVE_COMPATIBLE_GCC_AMD64_PLATFORM_AS) || \
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defined(HAVE_COMPATIBLE_GCC_WIN64_PLATFORM_AS)) && \
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defined(ENABLE_AESNI_SUPPORT) && defined(ENABLE_AVX_SUPPORT)
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diff -up libgcrypt-1.8.5/cipher/chacha20-avx2-amd64.S.intel-cet libgcrypt-1.8.5/cipher/chacha20-avx2-amd64.S
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--- libgcrypt-1.8.5/cipher/chacha20-avx2-amd64.S.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/cipher/chacha20-avx2-amd64.S 2020-01-23 15:36:16.780250066 +0100
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@@ -48,6 +48,9 @@
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.globl _gcry_chacha20_amd64_avx2_blocks
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ELF(.type _gcry_chacha20_amd64_avx2_blocks,@function;)
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_gcry_chacha20_amd64_avx2_blocks:
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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.Lchacha_blocks_avx2_local:
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vzeroupper
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pushq %rbx
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diff -up libgcrypt-1.8.5/cipher/chacha20-sse2-amd64.S.intel-cet libgcrypt-1.8.5/cipher/chacha20-sse2-amd64.S
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--- libgcrypt-1.8.5/cipher/chacha20-sse2-amd64.S.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/cipher/chacha20-sse2-amd64.S 2020-01-23 15:36:16.783250095 +0100
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@@ -41,6 +41,9 @@
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.globl _gcry_chacha20_amd64_sse2_blocks
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ELF(.type _gcry_chacha20_amd64_sse2_blocks,@function;)
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_gcry_chacha20_amd64_sse2_blocks:
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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.Lchacha_blocks_sse2_local:
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pushq %rbx
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pushq %rbp
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diff -up libgcrypt-1.8.5/cipher/poly1305-avx2-amd64.S.intel-cet libgcrypt-1.8.5/cipher/poly1305-avx2-amd64.S
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--- libgcrypt-1.8.5/cipher/poly1305-avx2-amd64.S.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/cipher/poly1305-avx2-amd64.S 2020-01-23 15:36:16.784250105 +0100
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@@ -43,6 +43,9 @@
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.globl _gcry_poly1305_amd64_avx2_init_ext
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ELF(.type _gcry_poly1305_amd64_avx2_init_ext,@function;)
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_gcry_poly1305_amd64_avx2_init_ext:
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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.Lpoly1305_init_ext_avx2_local:
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xor %edx, %edx
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vzeroupper
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@@ -406,6 +409,9 @@ ELF(.size _gcry_poly1305_amd64_avx2_init
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.globl _gcry_poly1305_amd64_avx2_blocks
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ELF(.type _gcry_poly1305_amd64_avx2_blocks,@function;)
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_gcry_poly1305_amd64_avx2_blocks:
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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.Lpoly1305_blocks_avx2_local:
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vzeroupper
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pushq %rbp
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@@ -732,6 +738,9 @@ ELF(.size _gcry_poly1305_amd64_avx2_bloc
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.globl _gcry_poly1305_amd64_avx2_finish_ext
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ELF(.type _gcry_poly1305_amd64_avx2_finish_ext,@function;)
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_gcry_poly1305_amd64_avx2_finish_ext:
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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.Lpoly1305_finish_ext_avx2_local:
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vzeroupper
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pushq %rbp
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diff -up libgcrypt-1.8.5/cipher/poly1305-sse2-amd64.S.intel-cet libgcrypt-1.8.5/cipher/poly1305-sse2-amd64.S
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--- libgcrypt-1.8.5/cipher/poly1305-sse2-amd64.S.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/cipher/poly1305-sse2-amd64.S 2020-01-23 15:36:16.787250134 +0100
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@@ -42,6 +42,9 @@
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.globl _gcry_poly1305_amd64_sse2_init_ext
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ELF(.type _gcry_poly1305_amd64_sse2_init_ext,@function;)
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_gcry_poly1305_amd64_sse2_init_ext:
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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.Lpoly1305_init_ext_x86_local:
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xor %edx, %edx
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pushq %r12
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@@ -288,6 +291,9 @@ ELF(.size _gcry_poly1305_amd64_sse2_init
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.globl _gcry_poly1305_amd64_sse2_finish_ext
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ELF(.type _gcry_poly1305_amd64_sse2_finish_ext,@function;)
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_gcry_poly1305_amd64_sse2_finish_ext:
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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.Lpoly1305_finish_ext_x86_local:
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pushq %rbp
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movq %rsp, %rbp
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@@ -439,6 +445,9 @@ ELF(.size _gcry_poly1305_amd64_sse2_fini
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.globl _gcry_poly1305_amd64_sse2_blocks
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ELF(.type _gcry_poly1305_amd64_sse2_blocks,@function;)
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_gcry_poly1305_amd64_sse2_blocks:
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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.Lpoly1305_blocks_x86_local:
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pushq %rbp
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movq %rsp, %rbp
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diff -up libgcrypt-1.8.5/cipher/serpent-avx2-amd64.S.intel-cet libgcrypt-1.8.5/cipher/serpent-avx2-amd64.S
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--- libgcrypt-1.8.5/cipher/serpent-avx2-amd64.S.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/cipher/serpent-avx2-amd64.S 2020-01-23 15:36:44.151972003 +0100
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@@ -18,8 +18,9 @@
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* License along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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-#ifdef __x86_64
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#include <config.h>
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+
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+#ifdef __x86_64
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#if (defined(HAVE_COMPATIBLE_GCC_AMD64_PLATFORM_AS) || \
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defined(HAVE_COMPATIBLE_GCC_WIN64_PLATFORM_AS)) && defined(USE_SERPENT) && \
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defined(ENABLE_AVX2_SUPPORT)
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diff -up libgcrypt-1.8.5/configure.ac.intel-cet libgcrypt-1.8.5/configure.ac
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--- libgcrypt-1.8.5/configure.ac.intel-cet 2019-08-29 15:00:08.000000000 +0200
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+++ libgcrypt-1.8.5/configure.ac 2020-01-23 15:35:28.147774463 +0100
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@@ -95,6 +95,12 @@ AH_TOP([
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AH_BOTTOM([
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#define _GCRYPT_IN_LIBGCRYPT 1
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+/* Add .note.gnu.property section for Intel CET in assembler sources
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+ when CET is enabled. */
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+#if defined(__ASSEMBLER__) && defined(__CET__)
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+# include <cet.h>
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+#endif
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+
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/* If the configure check for endianness has been disabled, get it from
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OS macros. This is intended for making fat binary builds on OS X. */
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#ifdef DISABLED_ENDIAN_CHECK
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diff -up libgcrypt-1.8.5/mpi/config.links.intel-cet libgcrypt-1.8.5/mpi/config.links
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--- libgcrypt-1.8.5/mpi/config.links.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/mpi/config.links 2020-01-23 15:35:46.398952954 +0100
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@@ -382,6 +382,16 @@ if test x"$mpi_cpu_arch" = x ; then
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mpi_cpu_arch="unknown"
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fi
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+# Add .note.gnu.property section for Intel CET in assembler sources
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+# when CET is enabled. */
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+if test x"$mpi_cpu_arch" = xx86 ; then
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+ cat <<EOF >> ./mpi/asm-syntax.h
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+
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+#if defined(__ASSEMBLER__) && defined(__CET__)
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+# include <cet.h>
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+#endif
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+EOF
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+fi
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# Make sysdep.h
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echo '/* created by config.links - do not edit */' >./mpi/sysdep.h
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diff -up libgcrypt-1.8.5/mpi/i386/mpih-add1.S.intel-cet libgcrypt-1.8.5/mpi/i386/mpih-add1.S
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--- libgcrypt-1.8.5/mpi/i386/mpih-add1.S.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/mpi/i386/mpih-add1.S 2020-01-23 15:37:40.470175379 +0100
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@@ -52,6 +52,10 @@ C_SYMBOL_NAME(_gcry_mpih_add_n:)
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movl 20(%esp),%edx /* s2_ptr */
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movl 24(%esp),%ecx /* size */
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+#if defined __CET__ && (__CET__ & 1) != 0
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+ pushl %ebx
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+#endif
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+
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movl %ecx,%eax
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shrl $3,%ecx /* compute count for unrolled loop */
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negl %eax
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@@ -63,6 +67,9 @@ C_SYMBOL_NAME(_gcry_mpih_add_n:)
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subl %eax,%esi /* ... by a constant when we ... */
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subl %eax,%edx /* ... enter the loop */
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shrl $2,%eax /* restore previous value */
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+#if defined __CET__ && (__CET__ & 1) != 0
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+ leal -4(,%eax,4),%ebx /* Count for 4-byte endbr32 */
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+#endif
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#ifdef PIC
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/* Calculate start address in loop for PIC. Due to limitations in some
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assemblers, Loop-L0-3 cannot be put into the leal */
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@@ -75,29 +82,53 @@ L0: leal (%eax,%eax,8),%eax
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/* Calculate start address in loop for non-PIC. */
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leal (Loop - 3)(%eax,%eax,8),%eax
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#endif
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+#if defined __CET__ && (__CET__ & 1) != 0
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+ addl %ebx,%eax /* Adjust for endbr32 */
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+#endif
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jmp *%eax /* jump into loop */
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ALIGN (3)
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Loop: movl (%esi),%eax
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adcl (%edx),%eax
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movl %eax,(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 4(%esi),%eax
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adcl 4(%edx),%eax
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movl %eax,4(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 8(%esi),%eax
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adcl 8(%edx),%eax
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movl %eax,8(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 12(%esi),%eax
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adcl 12(%edx),%eax
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movl %eax,12(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 16(%esi),%eax
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adcl 16(%edx),%eax
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movl %eax,16(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 20(%esi),%eax
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adcl 20(%edx),%eax
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movl %eax,20(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 24(%esi),%eax
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adcl 24(%edx),%eax
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movl %eax,24(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 28(%esi),%eax
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adcl 28(%edx),%eax
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movl %eax,28(%edi)
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@@ -110,6 +141,10 @@ Loop: movl (%esi),%eax
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sbbl %eax,%eax
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negl %eax
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+#if defined __CET__ && (__CET__ & 1) != 0
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+ popl %ebx
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+#endif
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+
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popl %esi
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popl %edi
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ret
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diff -up libgcrypt-1.8.5/mpi/i386/mpih-sub1.S.intel-cet libgcrypt-1.8.5/mpi/i386/mpih-sub1.S
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--- libgcrypt-1.8.5/mpi/i386/mpih-sub1.S.intel-cet 2017-11-23 19:16:58.000000000 +0100
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+++ libgcrypt-1.8.5/mpi/i386/mpih-sub1.S 2020-01-23 15:37:40.472175351 +0100
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@@ -53,6 +53,10 @@ C_SYMBOL_NAME(_gcry_mpih_sub_n:)
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movl 20(%esp),%edx /* s2_ptr */
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movl 24(%esp),%ecx /* size */
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+#if defined __CET__ && (__CET__ & 1) != 0
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+ pushl %ebx
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+#endif
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+
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movl %ecx,%eax
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shrl $3,%ecx /* compute count for unrolled loop */
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negl %eax
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@@ -64,6 +68,9 @@ C_SYMBOL_NAME(_gcry_mpih_sub_n:)
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subl %eax,%esi /* ... by a constant when we ... */
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subl %eax,%edx /* ... enter the loop */
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shrl $2,%eax /* restore previous value */
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+#if defined __CET__ && (__CET__ & 1) != 0
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+ leal -4(,%eax,4),%ebx /* Count for 4-byte endbr32 */
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+#endif
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#ifdef PIC
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/* Calculate start address in loop for PIC. Due to limitations in some
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assemblers, Loop-L0-3 cannot be put into the leal */
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@@ -76,29 +83,53 @@ L0: leal (%eax,%eax,8),%eax
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/* Calculate start address in loop for non-PIC. */
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leal (Loop - 3)(%eax,%eax,8),%eax
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#endif
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+#if defined __CET__ && (__CET__ & 1) != 0
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+ addl %ebx,%eax /* Adjust for endbr32 */
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+#endif
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jmp *%eax /* jump into loop */
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ALIGN (3)
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Loop: movl (%esi),%eax
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sbbl (%edx),%eax
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movl %eax,(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 4(%esi),%eax
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sbbl 4(%edx),%eax
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movl %eax,4(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 8(%esi),%eax
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sbbl 8(%edx),%eax
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movl %eax,8(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 12(%esi),%eax
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sbbl 12(%edx),%eax
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movl %eax,12(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 16(%esi),%eax
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sbbl 16(%edx),%eax
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movl %eax,16(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 20(%esi),%eax
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sbbl 20(%edx),%eax
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movl %eax,20(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 24(%esi),%eax
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sbbl 24(%edx),%eax
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movl %eax,24(%edi)
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+#ifdef _CET_ENDBR
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+ _CET_ENDBR
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+#endif
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movl 28(%esi),%eax
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sbbl 28(%edx),%eax
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movl %eax,28(%edi)
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@@ -111,6 +142,10 @@ Loop: movl (%esi),%eax
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sbbl %eax,%eax
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negl %eax
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+#if defined __CET__ && (__CET__ & 1) != 0
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+ popl %ebx
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+#endif
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+
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popl %esi
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popl %edi
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ret
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@ -1,6 +1,6 @@
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Name: libgcrypt
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Version: 1.8.5
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Release: 1%{?dist}
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Release: 2%{?dist}
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URL: http://www.gnupg.org/
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Source0: libgcrypt-%{version}-hobbled.tar.xz
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# The original libgcrypt sources now contain potentially patented ECC
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@ -43,6 +43,8 @@ Patch25: libgcrypt-1.8.3-cmac-selftest.patch
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Patch26: libgcrypt-1.8.3-fips-enttest.patch
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# Disable non-approved FIPS hashes in the enforced FIPS mode
|
||||
Patch27: libgcrypt-1.8.3-md-fips-enforce.patch
|
||||
# Intel CET support, in upstream master
|
||||
Patch28: libgcrypt-1.8.5-intel-cet.patch
|
||||
|
||||
%define gcrylibdir %{_libdir}
|
||||
|
||||
@ -89,6 +91,7 @@ applications using libgcrypt.
|
||||
%patch25 -p1 -b .cmac-selftest
|
||||
%patch26 -p1 -b .fips-enttest
|
||||
%patch27 -p1 -b .fips-enforce
|
||||
%patch28 -p1 -b .intel-cet
|
||||
|
||||
cp %{SOURCE4} cipher/
|
||||
cp %{SOURCE5} %{SOURCE6} tests/
|
||||
@ -188,6 +191,9 @@ install -m644 %{SOURCE7} $RPM_BUILD_ROOT/etc/gcrypt/random.conf
|
||||
%license COPYING
|
||||
|
||||
%changelog
|
||||
* Thu Jan 23 2020 Tomáš Mráz <tmraz@redhat.com> 1.8.5-2
|
||||
- Intel CET support by H. J. Lu
|
||||
|
||||
* Tue Sep 3 2019 Tomáš Mráz <tmraz@redhat.com> 1.8.5-1
|
||||
- new upstream version 1.8.5
|
||||
- add CMAC selftest for FIPS POST
|
||||
|
||||
Loading…
Reference in New Issue
Block a user