33 lines
1.1 KiB
Diff
33 lines
1.1 KiB
Diff
From c8a437f4c76527b3c8385699ccee07f35fe3f166 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel.daenzer@amd.com>
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Date: Tue, 26 Nov 2013 18:16:03 +0900
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Subject: [PATCH 1/2] radeon: Update unaligned offset for 2D->1D tiling
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transition on SI
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71983
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Tested-by: Arek Ruśniak <arek.rusi@gmail.com>
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---
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radeon/radeon_surface.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
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index b528a48..dcbbfdc 100644
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--- a/radeon/radeon_surface.c
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+++ b/radeon/radeon_surface.c
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@@ -1667,7 +1667,7 @@ static int si_surface_init_2d(struct radeon_surface_manager *surf_man,
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return si_surface_init_1d(surf_man, surf, level, bpe, tile_mode, offset, i);
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}
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/* level0 and first mipmap need to have alignment */
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- aligned_offset = surf->bo_size;
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+ aligned_offset = offset = surf->bo_size;
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if ((i == 0)) {
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aligned_offset = ALIGN(aligned_offset, surf->bo_alignment);
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}
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--
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1.8.3.1
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