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- rebase to latest upstream release - drop carried patches

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This commit is contained in:
Dave Airlie 2009-09-25 02:03:11 +00:00
parent 0a1c4cefe6
commit 2b8e977086
5 changed files with 2 additions and 262 deletions
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2
.cvsignore
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@ -1 +1 @@
libdrm-20090820.tar.bz2
libdrm-2.4.14.tar.bz2

131
intel-busy.patch
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@ -1,131 +0,0 @@
From 8214a65ad1f4ccd4966e0def0d43f0c4289e4bc6 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 27 Aug 2009 18:32:07 -0700
Subject: [PATCH] Add drm_intel_bo_busy to query whether mapping a BO would block.
---
libdrm/intel/intel_bufmgr.c | 7 +++++++
libdrm/intel/intel_bufmgr.h | 1 +
libdrm/intel/intel_bufmgr_gem.c | 28 +++++++++++++++++++---------
libdrm/intel/intel_bufmgr_priv.h | 8 +++++++-
4 files changed, 34 insertions(+), 10 deletions(-)
diff --git a/libdrm/intel/intel_bufmgr.c b/libdrm/intel/intel_bufmgr.c
index f170e7f..219c761 100644
--- a/libdrm/intel/intel_bufmgr.c
+++ b/libdrm/intel/intel_bufmgr.c
@@ -220,6 +220,13 @@ int drm_intel_bo_disable_reuse(drm_intel_bo *bo)
return 0;
}
+int drm_intel_bo_busy(drm_intel_bo *bo)
+{
+ if (bo->bufmgr->bo_busy)
+ return bo->bufmgr->bo_busy(bo);
+ return 0;
+}
+
int
drm_intel_get_pipe_from_crtc_id (drm_intel_bufmgr *bufmgr, int crtc_id)
{
diff --git a/libdrm/intel/intel_bufmgr.h b/libdrm/intel/intel_bufmgr.h
index 758558d..218b759 100644
--- a/libdrm/intel/intel_bufmgr.h
+++ b/libdrm/intel/intel_bufmgr.h
@@ -107,6 +107,7 @@ int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t *tiling_mode,
int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t *tiling_mode,
uint32_t *swizzle_mode);
int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t *name);
+int drm_intel_bo_busy(drm_intel_bo *bo);
int drm_intel_bo_disable_reuse(drm_intel_bo *bo);
diff --git a/libdrm/intel/intel_bufmgr_gem.c b/libdrm/intel/intel_bufmgr_gem.c
index 737ceae..baa0ee6 100644
--- a/libdrm/intel/intel_bufmgr_gem.c
+++ b/libdrm/intel/intel_bufmgr_gem.c
@@ -314,6 +314,22 @@ drm_intel_setup_reloc_list(drm_intel_bo *bo)
return 0;
}
+static int
+drm_intel_gem_bo_busy(drm_intel_bo *bo)
+{
+ drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
+ drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
+ struct drm_i915_gem_busy busy;
+ int ret;
+
+ memset(&busy, 0, sizeof(busy));
+ busy.handle = bo_gem->gem_handle;
+
+ ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_BUSY, &busy);
+
+ return (ret == 0 && busy.busy);
+}
+
static drm_intel_bo *
drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr, const char *name,
unsigned long size, unsigned int alignment,
@@ -344,8 +360,6 @@ drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr, const char *name,
pthread_mutex_lock(&bufmgr_gem->lock);
/* Get a buffer out of the cache if available */
if (bucket != NULL && bucket->num_entries > 0) {
- struct drm_i915_gem_busy busy;
-
if (for_render) {
/* Allocate new render-target BOs from the tail (MRU)
* of the list, as it will likely be hot in the GPU cache
@@ -364,13 +378,8 @@ drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr, const char *name,
*/
bo_gem = DRMLISTENTRY(drm_intel_bo_gem, bucket->head.next, head);
- memset(&busy, 0, sizeof(busy));
- busy.handle = bo_gem->gem_handle;
-
- ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_BUSY, &busy);
- alloc_from_cache = (ret == 0 && busy.busy == 0);
-
- if (alloc_from_cache) {
+ if (!drm_intel_gem_bo_busy(&bo_gem->bo)) {
+ alloc_from_cache = 1;
DRMLISTDEL(&bo_gem->head);
bucket->num_entries--;
}
@@ -1491,6 +1500,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
bufmgr_gem->bufmgr.bo_set_tiling = drm_intel_gem_bo_set_tiling;
bufmgr_gem->bufmgr.bo_flink = drm_intel_gem_bo_flink;
bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec;
+ bufmgr_gem->bufmgr.bo_busy = drm_intel_gem_bo_busy;
bufmgr_gem->bufmgr.destroy = drm_intel_bufmgr_gem_destroy;
bufmgr_gem->bufmgr.debug = 0;
bufmgr_gem->bufmgr.check_aperture_space = drm_intel_gem_check_aperture_space;
diff --git a/libdrm/intel/intel_bufmgr_priv.h b/libdrm/intel/intel_bufmgr_priv.h
index 0098076..af17c12 100644
--- a/libdrm/intel/intel_bufmgr_priv.h
+++ b/libdrm/intel/intel_bufmgr_priv.h
@@ -177,6 +177,12 @@ struct _drm_intel_bufmgr {
*/
int (*bo_flink)(drm_intel_bo *bo, uint32_t *name);
+ /**
+ * Returns 1 if mapping the buffer for write could cause the process
+ * to block, due to the object being active in the GPU.
+ */
+ int (*bo_busy)(drm_intel_bo *bo);
+
int (*check_aperture_space)(drm_intel_bo **bo_array, int count);
/**
@@ -200,7 +206,7 @@ struct _drm_intel_bufmgr {
* \param crtc_id the crtc identifier
*/
int (*get_pipe_from_crtc_id)(drm_intel_bufmgr *bufmgr, int crtc_id);
-
+
int debug; /**< Enables verbose debugging printouts */
};
--
1.6.4

2
libdrm.spec
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@ -22,14 +22,12 @@ BuildRequires: libudev-devel
Source2: 91-drm-modeset.rules
Patch2: radeon-busy.patch
# hardcode the 666 instead of 660 for device nodes
Patch3: libdrm-make-dri-perms-okay.patch
# remove backwards compat not needed on Fedora
Patch4: libdrm-2.4.0-no-bc.patch
Patch5: libdrm-page-flip.patch
Patch6: intel-busy.patch
%description

127
radeon-busy.patch
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@ -1,127 +0,0 @@
diff --git a/libdrm/radeon/radeon_bo.h b/libdrm/radeon/radeon_bo.h
index 09ad068..1e2e6c2 100644
--- a/libdrm/radeon/radeon_bo.h
+++ b/libdrm/radeon/radeon_bo.h
@@ -73,6 +73,7 @@ struct radeon_bo_funcs {
uint32_t pitch);
int (*bo_get_tiling)(struct radeon_bo *bo, uint32_t *tiling_flags,
uint32_t *pitch);
+ int (*bo_is_busy)(struct radeon_bo *bo, uint32_t *domain);
};
struct radeon_bo_manager {
@@ -166,6 +167,15 @@ static inline int _radeon_bo_wait(struct radeon_bo *bo,
return bo->bom->funcs->bo_wait(bo);
}
+static inline int _radeon_bo_is_busy(struct radeon_bo *bo,
+ uint32_t *domain,
+ const char *file,
+ const char *func,
+ int line)
+{
+ return bo->bom->funcs->bo_is_busy(bo, domain);
+}
+
static inline int radeon_bo_set_tiling(struct radeon_bo *bo,
uint32_t tiling_flags, uint32_t pitch)
{
@@ -199,5 +209,7 @@ static inline int radeon_bo_is_static(struct radeon_bo *bo)
_radeon_bo_debug(bo, opcode, __FILE__, __FUNCTION__, __LINE__)
#define radeon_bo_wait(bo) \
_radeon_bo_wait(bo, __FILE__, __func__, __LINE__)
+#define radeon_bo_is_busy(bo, domain) \
+ _radeon_bo_is_busy(bo, domain, __FILE__, __func__, __LINE__)
#endif
diff --git a/libdrm/radeon/radeon_bo_gem.c b/libdrm/radeon/radeon_bo_gem.c
index cf59a35..76d80e7 100644
--- a/libdrm/radeon/radeon_bo_gem.c
+++ b/libdrm/radeon/radeon_bo_gem.c
@@ -209,6 +209,21 @@ static int bo_wait(struct radeon_bo *bo)
return ret;
}
+static int bo_is_busy(struct radeon_bo *bo, uint32_t *domain)
+{
+ struct drm_radeon_gem_busy args;
+ int ret;
+
+ args.handle = bo->handle;
+ args.domain = 0;
+
+ ret = drmCommandWriteRead(bo->bom->fd, DRM_RADEON_GEM_BUSY,
+ &args, sizeof(args));
+
+ *domain = args.domain;
+ return ret;
+}
+
static int bo_set_tiling(struct radeon_bo *bo, uint32_t tiling_flags,
uint32_t pitch)
{
@@ -257,6 +272,7 @@ static struct radeon_bo_funcs bo_gem_funcs = {
NULL,
bo_set_tiling,
bo_get_tiling,
+ bo_is_busy,
};
struct radeon_bo_manager *radeon_bo_manager_gem_ctor(int fd)
diff --git a/shared-core/drm.h b/shared-core/drm.h
index 42a6c23..d97844f 100644
--- a/shared-core/drm.h
+++ b/shared-core/drm.h
@@ -795,7 +795,6 @@ struct drm_gem_open {
#define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, uint32_t)
-#define DRM_IOCTL_MODE_REPLACEFB DRM_IOWR(0xB0, struct drm_mode_fb_cmd)
/*@}*/
diff --git a/shared-core/radeon_drm.h b/shared-core/radeon_drm.h
index 3745ac5..47f1952 100644
--- a/shared-core/radeon_drm.h
+++ b/shared-core/radeon_drm.h
@@ -505,6 +505,7 @@ typedef struct {
#define DRM_RADEON_INFO 0x27
#define DRM_RADEON_GEM_SET_TILING 0x28
#define DRM_RADEON_GEM_GET_TILING 0x29
+#define DRM_RADEON_GEM_BUSY 0x2a
#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
@@ -545,6 +546,7 @@ typedef struct {
#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info)
#define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)
#define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)
+#define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy)
typedef struct drm_radeon_init {
enum {
@@ -704,6 +706,7 @@ typedef struct drm_radeon_indirect {
#define RADEON_PARAM_FB_LOCATION 14 /* FB location */
#define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */
#define RADEON_PARAM_DEVICE_ID 16
+#define RADEON_PARAM_NUM_Z_PIPES 17 /* num Z pipes */
typedef struct drm_radeon_getparam {
int param;
@@ -835,7 +838,7 @@ struct drm_radeon_gem_wait_idle {
struct drm_radeon_gem_busy {
uint32_t handle;
- uint32_t busy;
+ uint32_t domain;
};
struct drm_radeon_gem_pread {
@@ -892,6 +895,7 @@ struct drm_radeon_cs {
#define RADEON_INFO_DEVICE_ID 0x00
#define RADEON_INFO_NUM_GB_PIPES 0x01
+#define RADEON_INFO_NUM_Z_PIPES 0x02
struct drm_radeon_info {
uint32_t request;

2
sources
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@ -1 +1 @@
5809b178402f94c8ae1eadb9c3afdecb libdrm-20090820.tar.bz2
e785b6a6ebd6b8a49dd8210cd8742842 libdrm-2.4.14.tar.bz2