2009-02-17 23:46:52 +00:00
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diff -up libdrm-2.4.4/configure.ac.nouveau libdrm-2.4.4/configure.ac
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--- libdrm-2.4.4/configure.ac.nouveau 2009-02-18 09:37:36.000000000 +1000
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+++ libdrm-2.4.4/configure.ac 2009-02-18 09:37:42.000000000 +1000
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@@ -126,6 +126,8 @@ AC_OUTPUT([
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2009-02-07 00:28:39 +00:00
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libdrm/intel/Makefile
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libdrm/radeon/Makefile
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2009-02-17 23:46:52 +00:00
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libdrm/radeon/libdrm_radeon.pc
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2009-02-07 00:28:39 +00:00
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+ libdrm/nouveau/Makefile
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+ libdrm/nouveau/libdrm_nouveau.pc
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shared-core/Makefile
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tests/Makefile
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tests/modeprint/Makefile
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diff -Nur libdrm-2.4.4.orig/libdrm/Makefile.am libdrm-2.4.4/libdrm/Makefile.am
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--- libdrm-2.4.4.orig/libdrm/Makefile.am 2009-02-05 15:18:37.000000000 +1000
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+++ libdrm-2.4.4/libdrm/Makefile.am 2009-02-05 15:19:56.000000000 +1000
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@@ -18,7 +18,7 @@
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# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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-SUBDIRS = . intel radeon
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+SUBDIRS = . intel radeon nouveau
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libdrm_la_LTLIBRARIES = libdrm.la
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libdrm_ladir = $(libdir)
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diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/libdrm_nouveau.pc.in libdrm-2.4.4/libdrm/nouveau/libdrm_nouveau.pc.in
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--- libdrm-2.4.4.orig/libdrm/nouveau/libdrm_nouveau.pc.in 1970-01-01 10:00:00.000000000 +1000
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+++ libdrm-2.4.4/libdrm/nouveau/libdrm_nouveau.pc.in 2009-02-05 15:19:56.000000000 +1000
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@@ -0,0 +1,10 @@
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+prefix=@prefix@
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+exec_prefix=@exec_prefix@
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+libdir=@libdir@
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+includedir=@includedir@
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+
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+Name: libdrm_nouveau
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+Description: Userspace interface to nouveau kernel DRM services
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+Version: 0.5
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+Libs: -L${libdir} -ldrm_nouveau
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+Cflags: -I${includedir} -I${includedir}/drm -I${includedir}/nouveau
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diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/Makefile.am libdrm-2.4.4/libdrm/nouveau/Makefile.am
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--- libdrm-2.4.4.orig/libdrm/nouveau/Makefile.am 1970-01-01 10:00:00.000000000 +1000
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+++ libdrm-2.4.4/libdrm/nouveau/Makefile.am 2009-02-05 15:19:56.000000000 +1000
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@@ -0,0 +1,40 @@
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+AM_CFLAGS = \
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+ $(WARN_CFLAGS) \
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+ -I$(top_srcdir)/libdrm \
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+ -I$(top_srcdir)/libdrm/nouveau \
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+ $(PTHREADSTUBS_CFLAGS) \
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+ -I$(top_srcdir)/shared-core
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+
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+libdrm_nouveau_la_LTLIBRARIES = libdrm_nouveau.la
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+libdrm_nouveau_ladir = $(libdir)
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+libdrm_nouveau_la_LDFLAGS = -version-number 1:0:0 -no-undefined
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+libdrm_nouveau_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
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+
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+libdrm_nouveau_la_SOURCES = \
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+ nouveau_device.c \
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+ nouveau_channel.c \
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+ nouveau_pushbuf.c \
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+ nouveau_grobj.c \
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+ nouveau_notifier.c \
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+ nouveau_bo.c \
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+ nouveau_resource.c \
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+ nouveau_dma.c \
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+ nouveau_fence.c
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+
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+libdrm_nouveaucommonincludedir = ${includedir}/nouveau
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+libdrm_nouveaucommoninclude_HEADERS = \
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+ nouveau_device.h \
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+ nouveau_channel.h \
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+ nouveau_grobj.h \
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+ nouveau_notifier.h \
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+ nouveau_pushbuf.h \
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+ nouveau_bo.h \
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+ nouveau_resource.h \
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+ nouveau_class.h
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+
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+libdrm_nouveauincludedir = ${includedir}/drm
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+libdrm_nouveauinclude_HEADERS = \
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+ nouveau_drmif.h
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+
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+pkgconfigdir = @pkgconfigdir@
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+pkgconfig_DATA = libdrm_nouveau.pc
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diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_bo.c libdrm-2.4.4/libdrm/nouveau/nouveau_bo.c
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--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_bo.c 1970-01-01 10:00:00.000000000 +1000
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+++ libdrm-2.4.4/libdrm/nouveau/nouveau_bo.c 2009-02-05 15:19:56.000000000 +1000
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@@ -0,0 +1,838 @@
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+/*
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+ * Copyright 2007 Nouveau Project
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+ *
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+ * Permission is hereby granted, free of charge, to any person obtaining a
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+ * copy of this software and associated documentation files (the "Software"),
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+ * to deal in the Software without restriction, including without limitation
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+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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+ * and/or sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be included in
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+ * all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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+ * SOFTWARE.
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+ */
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+
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+#include <stdint.h>
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+#include <stdlib.h>
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+#include <errno.h>
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+#include <assert.h>
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+
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+#include <sys/mman.h>
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+#include <sys/ioctl.h>
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+
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+#include "nouveau_private.h"
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+
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+int
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+nouveau_bo_init(struct nouveau_device *dev)
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+{
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+ return 0;
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+}
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+
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+void
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+nouveau_bo_takedown(struct nouveau_device *dev)
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+{
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+}
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+
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+static int
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+nouveau_bo_allocated(struct nouveau_bo_priv *nvbo)
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+{
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+ if (nvbo->sysmem || nvbo->handle || (nvbo->flags & NOUVEAU_BO_PIN))
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+ return 1;
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+ return 0;
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+}
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+
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+static int
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+nouveau_bo_ualloc(struct nouveau_bo_priv *nvbo)
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+{
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+ if (nvbo->user || nvbo->sysmem) {
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+ assert(nvbo->sysmem);
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+ return 0;
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+ }
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+
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+ nvbo->sysmem = malloc(nvbo->size);
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+ if (!nvbo->sysmem)
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+ return -ENOMEM;
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+
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+ return 0;
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+}
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+
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+static void
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+nouveau_bo_ufree(struct nouveau_bo_priv *nvbo)
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+{
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+ if (nvbo->sysmem) {
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+ if (!nvbo->user)
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+ free(nvbo->sysmem);
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+ nvbo->sysmem = NULL;
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+ }
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+}
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+
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+static void
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+nouveau_bo_kfree_nomm(struct nouveau_bo_priv *nvbo)
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+{
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+ struct nouveau_device_priv *nvdev = nouveau_device(nvbo->base.device);
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+ struct drm_nouveau_mem_free req;
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+
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+ if (nvbo->map) {
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+ drmUnmap(nvbo->map, nvbo->size);
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+ nvbo->map = NULL;
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+ }
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+
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+ req.offset = nvbo->offset;
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+ if (nvbo->domain & NOUVEAU_BO_GART)
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+ req.flags = NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI;
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+ else
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+ if (nvbo->domain & NOUVEAU_BO_VRAM)
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+ req.flags = NOUVEAU_MEM_FB;
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+ drmCommandWrite(nvdev->fd, DRM_NOUVEAU_MEM_FREE, &req, sizeof(req));
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+
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+ nvbo->handle = 0;
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+}
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+
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+static void
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+nouveau_bo_kfree(struct nouveau_bo_priv *nvbo)
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+{
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+ struct nouveau_device_priv *nvdev = nouveau_device(nvbo->base.device);
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+ struct drm_gem_close req;
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+
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+ if (!nvbo->handle)
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+ return;
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+
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+ if (!nvdev->mm_enabled) {
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+ nouveau_bo_kfree_nomm(nvbo);
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+ return;
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+ }
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+
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+ if (nvbo->map) {
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+ munmap(nvbo->map, nvbo->size);
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+ nvbo->map = NULL;
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+ }
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+
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+ req.handle = nvbo->handle;
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+ nvbo->handle = 0;
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+ ioctl(nvdev->fd, DRM_IOCTL_GEM_CLOSE, &req);
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+}
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+
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+static int
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+nouveau_bo_kalloc_nomm(struct nouveau_bo_priv *nvbo)
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+{
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+ struct nouveau_device_priv *nvdev = nouveau_device(nvbo->base.device);
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+ struct drm_nouveau_mem_alloc req;
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+ int ret;
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+
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+ if (nvbo->handle)
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+ return 0;
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+
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+ if (!(nvbo->flags & (NOUVEAU_BO_VRAM|NOUVEAU_BO_GART)))
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+ nvbo->flags |= (NOUVEAU_BO_GART | NOUVEAU_BO_VRAM);
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+
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+ req.size = nvbo->size;
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+ req.alignment = nvbo->align;
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+ req.flags = 0;
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+ if (nvbo->flags & NOUVEAU_BO_VRAM)
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+ req.flags |= NOUVEAU_MEM_FB;
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+ if (nvbo->flags & NOUVEAU_BO_GART)
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+ req.flags |= (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI);
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+ if (nvbo->flags & NOUVEAU_BO_TILED) {
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+ req.flags |= NOUVEAU_MEM_TILE;
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+ if (nvbo->flags & NOUVEAU_BO_ZTILE)
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+ req.flags |= NOUVEAU_MEM_TILE_ZETA;
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+ }
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+ req.flags |= NOUVEAU_MEM_MAPPED;
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+
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+ ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_MEM_ALLOC,
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+ &req, sizeof(req));
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+ if (ret)
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+ return ret;
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+
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+ nvbo->handle = req.map_handle;
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+ nvbo->size = req.size;
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+ nvbo->offset = req.offset;
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+ if (req.flags & (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI))
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+ nvbo->domain = NOUVEAU_BO_GART;
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+ else
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+ if (req.flags & NOUVEAU_MEM_FB)
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+ nvbo->domain = NOUVEAU_BO_VRAM;
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+
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+ return 0;
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+}
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+
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+static int
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+nouveau_bo_kalloc(struct nouveau_bo_priv *nvbo, struct nouveau_channel *chan)
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+{
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+ struct nouveau_device_priv *nvdev = nouveau_device(nvbo->base.device);
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+ struct drm_nouveau_gem_new req;
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+ int ret;
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+
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+ if (nvbo->handle || (nvbo->flags & NOUVEAU_BO_PIN))
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+ return 0;
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+
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+ if (!nvdev->mm_enabled)
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+ return nouveau_bo_kalloc_nomm(nvbo);
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+
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+ req.channel_hint = chan ? chan->id : 0;
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+
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+ req.size = nvbo->size;
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+ req.align = nvbo->align;
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+
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+ req.domain = 0;
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+
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+ if (nvbo->flags & NOUVEAU_BO_VRAM)
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+ req.domain |= NOUVEAU_GEM_DOMAIN_VRAM;
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+
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+ if (nvbo->flags & NOUVEAU_BO_GART)
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+ req.domain |= NOUVEAU_GEM_DOMAIN_GART;
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+
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+ if (nvbo->flags & NOUVEAU_BO_TILED) {
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+ req.domain |= NOUVEAU_GEM_DOMAIN_TILE;
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+ if (nvbo->flags & NOUVEAU_BO_ZTILE)
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+ req.domain |= NOUVEAU_GEM_DOMAIN_TILE_ZETA;
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+ }
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+
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+ if (!req.domain) {
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+ req.domain |= (NOUVEAU_GEM_DOMAIN_VRAM |
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+ NOUVEAU_GEM_DOMAIN_GART);
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+ }
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+
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+ ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GEM_NEW,
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+ &req, sizeof(req));
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+ if (ret)
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+ return ret;
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+ nvbo->handle = nvbo->base.handle = req.handle;
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+ nvbo->size = req.size;
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+ nvbo->domain = req.domain;
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+ nvbo->offset = req.offset;
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+
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+ return 0;
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+}
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+
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+static int
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+nouveau_bo_kmap_nomm(struct nouveau_bo_priv *nvbo)
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+{
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+ struct nouveau_device_priv *nvdev = nouveau_device(nvbo->base.device);
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+ int ret;
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+
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+ ret = drmMap(nvdev->fd, nvbo->handle, nvbo->size, &nvbo->map);
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+ if (ret) {
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+ nvbo->map = NULL;
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+ return ret;
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+ }
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+
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+ return 0;
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+}
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+
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+static int
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+nouveau_bo_kmap(struct nouveau_bo_priv *nvbo)
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+{
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+ struct nouveau_device_priv *nvdev = nouveau_device(nvbo->base.device);
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+ struct drm_nouveau_gem_mmap req;
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+ int ret;
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+
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+ if (nvbo->map)
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+ return 0;
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+
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+ if (!nvbo->handle)
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+ return -EINVAL;
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+
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+ if (!nvdev->mm_enabled)
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+ return nouveau_bo_kmap_nomm(nvbo);
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|
+
|
|
|
|
+ req.handle = nvbo->handle;
|
|
|
|
+ ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GEM_MMAP,
|
|
|
|
+ &req, sizeof(req));
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ nvbo->map = (void *)(unsigned long)req.vaddr;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align,
|
|
|
|
+ int size, struct nouveau_bo **bo)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_bo_priv *nvbo;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!dev || !bo || *bo)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ nvbo = calloc(1, sizeof(struct nouveau_bo_priv));
|
|
|
|
+ if (!nvbo)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+ nvbo->base.device = dev;
|
|
|
|
+ nvbo->base.size = size;
|
|
|
|
+
|
|
|
|
+ nvbo->refcount = 1;
|
|
|
|
+ /* Don't set NOUVEAU_BO_PIN here, or nouveau_bo_allocated() will
|
|
|
|
+ * decided the buffer's already allocated when it's not. The
|
|
|
|
+ * call to nouveau_bo_pin() later will set this flag.
|
|
|
|
+ */
|
|
|
|
+ nvbo->flags = (flags & ~NOUVEAU_BO_PIN);
|
|
|
|
+ nvbo->size = size;
|
|
|
|
+ nvbo->align = align;
|
|
|
|
+
|
|
|
|
+ /*XXX: murder me violently */
|
|
|
|
+ if (flags & NOUVEAU_BO_TILED) {
|
|
|
|
+ nvbo->base.tiled = 1;
|
|
|
|
+ if (flags & NOUVEAU_BO_ZTILE)
|
|
|
|
+ nvbo->base.tiled |= 2;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (flags & NOUVEAU_BO_PIN) {
|
|
|
|
+ ret = nouveau_bo_pin((void *)nvbo, nvbo->flags);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_bo_ref(NULL, (void *)nvbo);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ *bo = &nvbo->base;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_user(struct nouveau_device *dev, void *ptr, int size,
|
|
|
|
+ struct nouveau_bo **bo)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_bo_priv *nvbo;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_new(dev, 0, 0, size, bo);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+ nvbo = nouveau_bo(*bo);
|
|
|
|
+
|
|
|
|
+ nvbo->sysmem = ptr;
|
|
|
|
+ nvbo->user = 1;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_fake(struct nouveau_device *dev, uint64_t offset, uint32_t flags,
|
|
|
|
+ uint32_t size, void *map, struct nouveau_bo **bo)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_bo_priv *nvbo;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_new(dev, flags & ~NOUVEAU_BO_PIN, 0, size, bo);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+ nvbo = nouveau_bo(*bo);
|
|
|
|
+
|
|
|
|
+ nvbo->flags = flags | NOUVEAU_BO_PIN;
|
|
|
|
+ nvbo->domain = (flags & (NOUVEAU_BO_VRAM|NOUVEAU_BO_GART));
|
|
|
|
+ nvbo->offset = offset;
|
|
|
|
+ nvbo->size = nvbo->base.size = size;
|
|
|
|
+ nvbo->map = map;
|
|
|
|
+ nvbo->base.flags = nvbo->flags;
|
|
|
|
+ nvbo->base.offset = nvbo->offset;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_handle_get(struct nouveau_bo *bo, uint32_t *handle)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!bo || !handle)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ if (!nvdev->mm_enabled)
|
|
|
|
+ return -ENODEV;
|
|
|
|
+
|
|
|
|
+ if (!nvbo->global_handle) {
|
|
|
|
+ struct drm_gem_flink req;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_kalloc(nvbo, NULL);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ req.handle = nvbo->handle;
|
|
|
|
+ ret = ioctl(nvdev->fd, DRM_IOCTL_GEM_FLINK, &req);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_bo_kfree(nvbo);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nvbo->global_handle = req.name;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ *handle = nvbo->global_handle;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_handle_ref(struct nouveau_device *dev, uint32_t handle,
|
|
|
|
+ struct nouveau_bo **bo)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(dev);
|
|
|
|
+ struct nouveau_bo_priv *nvbo;
|
|
|
|
+ struct drm_gem_open req;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_new(dev, 0, 0, 0, bo);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+ nvbo = nouveau_bo(*bo);
|
|
|
|
+
|
|
|
|
+ if (!nvdev->mm_enabled) {
|
|
|
|
+ nvbo->handle = 0;
|
|
|
|
+ nvbo->offset = handle;
|
|
|
|
+ nvbo->domain = NOUVEAU_BO_VRAM;
|
|
|
|
+ nvbo->flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN;
|
|
|
|
+ nvbo->base.offset = nvbo->offset;
|
|
|
|
+ nvbo->base.flags = nvbo->flags;
|
|
|
|
+ } else {
|
|
|
|
+ req.name = handle;
|
|
|
|
+ ret = ioctl(nvdev->fd, DRM_IOCTL_GEM_OPEN, &req);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_bo_ref(NULL, bo);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nvbo->size = req.size;
|
|
|
|
+ nvbo->handle = req.handle;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void
|
|
|
|
+nouveau_bo_del_cb(void *priv)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_bo_priv *nvbo = priv;
|
|
|
|
+
|
|
|
|
+ nouveau_bo_kfree(nvbo);
|
|
|
|
+ free(nvbo);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void
|
|
|
|
+nouveau_bo_del(struct nouveau_bo **bo)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_bo_priv *nvbo;
|
|
|
|
+
|
|
|
|
+ if (!bo || !*bo)
|
|
|
|
+ return;
|
|
|
|
+ nvbo = nouveau_bo(*bo);
|
|
|
|
+ *bo = NULL;
|
|
|
|
+
|
|
|
|
+ if (--nvbo->refcount)
|
|
|
|
+ return;
|
|
|
|
+
|
|
|
|
+ if (nvbo->pending) {
|
|
|
|
+ nvbo->pending = NULL;
|
|
|
|
+ nouveau_pushbuf_flush(nvbo->pending_channel, 0);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nouveau_bo_ufree(nvbo);
|
|
|
|
+ if (!nouveau_device(nvbo->base.device)->mm_enabled && nvbo->fence)
|
|
|
|
+ nouveau_fence_signal_cb(nvbo->fence, nouveau_bo_del_cb, nvbo);
|
|
|
|
+ else
|
|
|
|
+ nouveau_bo_del_cb(nvbo);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_ref(struct nouveau_bo *ref, struct nouveau_bo **pbo)
|
|
|
|
+{
|
|
|
|
+ if (!pbo)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ if (ref)
|
|
|
|
+ nouveau_bo(ref)->refcount++;
|
|
|
|
+
|
|
|
|
+ if (*pbo)
|
|
|
|
+ nouveau_bo_del(pbo);
|
|
|
|
+
|
|
|
|
+ *pbo = ref;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int
|
|
|
|
+nouveau_bo_wait_nomm(struct nouveau_bo *bo, int cpu_write)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+ int ret = 0;
|
|
|
|
+
|
|
|
|
+ if (cpu_write)
|
|
|
|
+ ret = nouveau_fence_wait(&nvbo->fence);
|
|
|
|
+ else
|
|
|
|
+ ret = nouveau_fence_wait(&nvbo->wr_fence);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ nvbo->write_marker = 0;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int
|
|
|
|
+nouveau_bo_wait(struct nouveau_bo *bo, int cpu_write)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+ struct drm_nouveau_gem_cpu_prep req;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!nvbo->global_handle && !nvbo->write_marker && !cpu_write)
|
|
|
|
+ return 0;
|
|
|
|
+
|
|
|
|
+ if (nvbo->pending &&
|
|
|
|
+ (nvbo->pending->write_domains || cpu_write)) {
|
|
|
|
+ nvbo->pending = NULL;
|
|
|
|
+ nouveau_pushbuf_flush(nvbo->pending_channel, 0);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (!nvdev->mm_enabled)
|
|
|
|
+ return nouveau_bo_wait_nomm(bo, cpu_write);
|
|
|
|
+
|
|
|
|
+ req.handle = nvbo->handle;
|
|
|
|
+ ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_CPU_PREP,
|
|
|
|
+ &req, sizeof(req));
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ nvbo->write_marker = 0;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_map(struct nouveau_bo *bo, uint32_t flags)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!nvbo || bo->map)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ if (!nouveau_bo_allocated(nvbo)) {
|
|
|
|
+ if (nvbo->flags & (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)) {
|
|
|
|
+ ret = nouveau_bo_kalloc(nvbo, NULL);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (!nouveau_bo_allocated(nvbo)) {
|
|
|
|
+ ret = nouveau_bo_ualloc(nvbo);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (nvbo->sysmem) {
|
|
|
|
+ bo->map = nvbo->sysmem;
|
|
|
|
+ } else {
|
|
|
|
+ ret = nouveau_bo_kmap(nvbo);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_wait(bo, (flags & NOUVEAU_BO_WR));
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ bo->map = nvbo->map;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_bo_unmap(struct nouveau_bo *bo)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+
|
|
|
|
+ if (nvdev->mm_enabled && bo->map && !nvbo->sysmem) {
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
|
|
|
|
+ struct drm_nouveau_gem_cpu_fini req;
|
|
|
|
+
|
|
|
|
+ req.handle = nvbo->handle;
|
|
|
|
+ drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_CPU_FINI,
|
|
|
|
+ &req, sizeof(req));
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ bo->map = NULL;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_validate_nomm(struct nouveau_bo_priv *nvbo, uint32_t flags)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_bo *new = NULL;
|
|
|
|
+ uint32_t t_handle, t_domain, t_offset, t_size;
|
|
|
|
+ void *t_map;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if ((flags & NOUVEAU_BO_VRAM) && nvbo->domain == NOUVEAU_BO_VRAM)
|
|
|
|
+ return 0;
|
|
|
|
+ if ((flags & NOUVEAU_BO_GART) && nvbo->domain == NOUVEAU_BO_GART)
|
|
|
|
+ return 0;
|
|
|
|
+ assert(flags & (NOUVEAU_BO_VRAM|NOUVEAU_BO_GART));
|
|
|
|
+
|
|
|
|
+ /* Keep tiling info */
|
|
|
|
+ flags |= (nvbo->flags & (NOUVEAU_BO_TILED|NOUVEAU_BO_ZTILE));
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_new(nvbo->base.device, flags, 0, nvbo->size, &new);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_kalloc(nouveau_bo(new), NULL);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_bo_ref(NULL, &new);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (nvbo->handle || nvbo->sysmem) {
|
|
|
|
+ nouveau_bo_kmap(nouveau_bo(new));
|
|
|
|
+
|
|
|
|
+ if (!nvbo->base.map) {
|
|
|
|
+ nouveau_bo_map(&nvbo->base, NOUVEAU_BO_RD);
|
|
|
|
+ memcpy(nouveau_bo(new)->map, nvbo->base.map, nvbo->base.size);
|
|
|
|
+ nouveau_bo_unmap(&nvbo->base);
|
|
|
|
+ } else {
|
|
|
|
+ memcpy(nouveau_bo(new)->map, nvbo->base.map, nvbo->base.size);
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ t_handle = nvbo->handle;
|
|
|
|
+ t_domain = nvbo->domain;
|
|
|
|
+ t_offset = nvbo->offset;
|
|
|
|
+ t_size = nvbo->size;
|
|
|
|
+ t_map = nvbo->map;
|
|
|
|
+
|
|
|
|
+ nvbo->handle = nouveau_bo(new)->handle;
|
|
|
|
+ nvbo->domain = nouveau_bo(new)->domain;
|
|
|
|
+ nvbo->offset = nouveau_bo(new)->offset;
|
|
|
|
+ nvbo->size = nouveau_bo(new)->size;
|
|
|
|
+ nvbo->map = nouveau_bo(new)->map;
|
|
|
|
+
|
|
|
|
+ nouveau_bo(new)->handle = t_handle;
|
|
|
|
+ nouveau_bo(new)->domain = t_domain;
|
|
|
|
+ nouveau_bo(new)->offset = t_offset;
|
|
|
|
+ nouveau_bo(new)->size = t_size;
|
|
|
|
+ nouveau_bo(new)->map = t_map;
|
|
|
|
+
|
|
|
|
+ nouveau_bo_ref(NULL, &new);
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int
|
|
|
|
+nouveau_bo_pin_nomm(struct nouveau_bo *bo, uint32_t flags)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!nvbo->handle) {
|
|
|
|
+ if (!(flags & (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_validate_nomm(nvbo, flags & ~NOUVEAU_BO_PIN);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nvbo->pinned = 1;
|
|
|
|
+
|
|
|
|
+ /* Fill in public nouveau_bo members */
|
|
|
|
+ bo->flags = nvbo->domain;
|
|
|
|
+ bo->offset = nvbo->offset;
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_pin(struct nouveau_bo *bo, uint32_t flags)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+ struct drm_nouveau_gem_pin req;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (nvbo->pinned)
|
|
|
|
+ return 0;
|
|
|
|
+
|
|
|
|
+ if (!nvdev->mm_enabled)
|
|
|
|
+ return nouveau_bo_pin_nomm(bo, flags);
|
|
|
|
+
|
|
|
|
+ /* Ensure we have a kernel object... */
|
|
|
|
+ if (!nvbo->handle) {
|
|
|
|
+ if (!(flags & (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)))
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ nvbo->flags = flags;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_kalloc(nvbo, NULL);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* Now force it to stay put :) */
|
|
|
|
+ req.handle = nvbo->handle;
|
|
|
|
+ req.domain = 0;
|
|
|
|
+ if (nvbo->flags & NOUVEAU_BO_VRAM)
|
|
|
|
+ req.domain |= NOUVEAU_GEM_DOMAIN_VRAM;
|
|
|
|
+ if (nvbo->flags & NOUVEAU_BO_GART)
|
|
|
|
+ req.domain |= NOUVEAU_GEM_DOMAIN_GART;
|
|
|
|
+
|
|
|
|
+ ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GEM_PIN, &req,
|
|
|
|
+ sizeof(struct drm_nouveau_gem_pin));
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+ nvbo->offset = req.offset;
|
|
|
|
+ nvbo->domain = req.domain;
|
|
|
|
+ nvbo->pinned = 1;
|
|
|
|
+ nvbo->flags |= NOUVEAU_BO_PIN;
|
|
|
|
+
|
|
|
|
+ /* Fill in public nouveau_bo members */
|
|
|
|
+ if (nvbo->domain & NOUVEAU_GEM_DOMAIN_VRAM)
|
|
|
|
+ bo->flags = NOUVEAU_BO_VRAM;
|
|
|
|
+ if (nvbo->domain & NOUVEAU_GEM_DOMAIN_GART)
|
|
|
|
+ bo->flags = NOUVEAU_BO_GART;
|
|
|
|
+ bo->offset = nvbo->offset;
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_bo_unpin(struct nouveau_bo *bo)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+ struct drm_nouveau_gem_unpin req;
|
|
|
|
+
|
|
|
|
+ if (!nvbo->pinned)
|
|
|
|
+ return;
|
|
|
|
+
|
|
|
|
+ if (nvdev->mm_enabled) {
|
|
|
|
+ req.handle = nvbo->handle;
|
|
|
|
+ drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_UNPIN,
|
|
|
|
+ &req, sizeof(req));
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nvbo->pinned = bo->offset = bo->flags = 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_tile(struct nouveau_bo *bo, uint32_t flags, uint32_t delta,
|
|
|
|
+ uint32_t size)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+ uint32_t kern_flags = 0;
|
|
|
|
+ int ret = 0;
|
|
|
|
+
|
|
|
|
+ if (flags & NOUVEAU_BO_TILED) {
|
|
|
|
+ kern_flags |= NOUVEAU_MEM_TILE;
|
|
|
|
+ if (flags & NOUVEAU_BO_ZTILE)
|
|
|
|
+ kern_flags |= NOUVEAU_MEM_TILE_ZETA;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (nvdev->mm_enabled) {
|
|
|
|
+ struct drm_nouveau_gem_tile req;
|
|
|
|
+
|
|
|
|
+ req.handle = nvbo->handle;
|
|
|
|
+ req.delta = delta;
|
|
|
|
+ req.size = size;
|
|
|
|
+ req.flags = kern_flags;
|
|
|
|
+ ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_TILE,
|
|
|
|
+ &req, sizeof(req));
|
|
|
|
+ } else {
|
|
|
|
+ struct drm_nouveau_mem_tile req;
|
|
|
|
+
|
|
|
|
+ req.offset = nvbo->offset;
|
|
|
|
+ req.delta = delta;
|
|
|
|
+ req.size = size;
|
|
|
|
+ req.flags = kern_flags;
|
|
|
|
+
|
|
|
|
+ if (flags & NOUVEAU_BO_VRAM)
|
|
|
|
+ req.flags |= NOUVEAU_MEM_FB;
|
|
|
|
+ if (flags & NOUVEAU_BO_GART)
|
|
|
|
+ req.flags |= NOUVEAU_MEM_AGP;
|
|
|
|
+
|
|
|
|
+ ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_MEM_TILE,
|
|
|
|
+ &req, sizeof(req));
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_busy(struct nouveau_bo *bo, uint32_t access)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+
|
|
|
|
+ if (!nvdev->mm_enabled) {
|
|
|
|
+ struct nouveau_fence *fence;
|
|
|
|
+
|
|
|
|
+ if (nvbo->pending && (nvbo->pending->write_domains ||
|
|
|
|
+ (access & NOUVEAU_BO_WR)))
|
|
|
|
+ return 1;
|
|
|
|
+
|
|
|
|
+ if (access & NOUVEAU_BO_WR)
|
|
|
|
+ fence = nvbo->fence;
|
|
|
|
+ else
|
|
|
|
+ fence = nvbo->wr_fence;
|
|
|
|
+ return !nouveau_fence(fence)->signalled;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 1;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+#include <stdio.h>
|
|
|
|
+struct drm_nouveau_gem_pushbuf_bo *
|
|
|
|
+nouveau_bo_emit_buffer(struct nouveau_channel *chan, struct nouveau_bo *bo)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf);
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_bo *pbbo;
|
|
|
|
+ struct nouveau_bo *ref = NULL;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (nvbo->pending)
|
|
|
|
+ return nvbo->pending;
|
|
|
|
+
|
|
|
|
+ if (!nvbo->handle) {
|
|
|
|
+ ret = nouveau_bo_kalloc(nvbo, chan);
|
|
|
|
+ if (ret)
|
|
|
|
+ return NULL;
|
|
|
|
+
|
|
|
|
+ if (nvbo->sysmem) {
|
|
|
|
+ void *sysmem_tmp = nvbo->sysmem;
|
|
|
|
+
|
|
|
|
+ nvbo->sysmem = NULL;
|
|
|
|
+ ret = nouveau_bo_map(bo, NOUVEAU_BO_WR);
|
|
|
|
+ if (ret)
|
|
|
|
+ return NULL;
|
|
|
|
+ nvbo->sysmem = sysmem_tmp;
|
|
|
|
+
|
|
|
|
+ memcpy(bo->map, nvbo->sysmem, nvbo->base.size);
|
|
|
|
+ nouveau_bo_unmap(bo);
|
|
|
|
+ nouveau_bo_ufree(nvbo);
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (nvpb->nr_buffers >= NOUVEAU_PUSHBUF_MAX_BUFFERS)
|
|
|
|
+ return NULL;
|
|
|
|
+ pbbo = nvpb->buffers + nvpb->nr_buffers++;
|
|
|
|
+ nvbo->pending = pbbo;
|
|
|
|
+ nvbo->pending_channel = chan;
|
|
|
|
+
|
|
|
|
+ nouveau_bo_ref(bo, &ref);
|
|
|
|
+ pbbo->user_priv = (uint64_t)(unsigned long)ref;
|
|
|
|
+ pbbo->handle = nvbo->handle;
|
|
|
|
+ pbbo->valid_domains = NOUVEAU_GEM_DOMAIN_VRAM | NOUVEAU_GEM_DOMAIN_GART;
|
|
|
|
+ pbbo->read_domains = 0;
|
|
|
|
+ pbbo->write_domains = 0;
|
|
|
|
+ pbbo->presumed_domain = nvbo->domain;
|
|
|
|
+ pbbo->presumed_offset = nvbo->offset;
|
|
|
|
+ pbbo->presumed_ok = 1;
|
|
|
|
+ return pbbo;
|
|
|
|
+}
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_bo.h libdrm-2.4.4/libdrm/nouveau/nouveau_bo.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_bo.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_bo.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,97 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_BO_H__
|
|
|
|
+#define __NOUVEAU_BO_H__
|
|
|
|
+
|
|
|
|
+/* Relocation/Buffer type flags */
|
|
|
|
+#define NOUVEAU_BO_VRAM (1 << 0)
|
|
|
|
+#define NOUVEAU_BO_GART (1 << 1)
|
|
|
|
+#define NOUVEAU_BO_RD (1 << 2)
|
|
|
|
+#define NOUVEAU_BO_WR (1 << 3)
|
|
|
|
+#define NOUVEAU_BO_RDWR (NOUVEAU_BO_RD | NOUVEAU_BO_WR)
|
|
|
|
+#define NOUVEAU_BO_MAP (1 << 4)
|
|
|
|
+#define NOUVEAU_BO_PIN (1 << 5)
|
|
|
|
+#define NOUVEAU_BO_LOW (1 << 6)
|
|
|
|
+#define NOUVEAU_BO_HIGH (1 << 7)
|
|
|
|
+#define NOUVEAU_BO_OR (1 << 8)
|
|
|
|
+#define NOUVEAU_BO_LOCAL (1 << 9)
|
|
|
|
+#define NOUVEAU_BO_TILED (1 << 10)
|
|
|
|
+#define NOUVEAU_BO_ZTILE (1 << 11)
|
|
|
|
+#define NOUVEAU_BO_DUMMY (1 << 31)
|
|
|
|
+
|
|
|
|
+struct nouveau_bo {
|
|
|
|
+ struct nouveau_device *device;
|
|
|
|
+ uint32_t handle;
|
|
|
|
+
|
|
|
|
+ uint64_t size;
|
|
|
|
+ void *map;
|
|
|
|
+
|
|
|
|
+ int tiled;
|
|
|
|
+
|
|
|
|
+ /* Available when buffer is pinned *only* */
|
|
|
|
+ uint32_t flags;
|
|
|
|
+ uint64_t offset;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_new(struct nouveau_device *, uint32_t flags, int align, int size,
|
|
|
|
+ struct nouveau_bo **);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_user(struct nouveau_device *, void *ptr, int size,
|
|
|
|
+ struct nouveau_bo **);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_fake(struct nouveau_device *dev, uint64_t offset, uint32_t flags,
|
|
|
|
+ uint32_t size, void *map, struct nouveau_bo **);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_handle_get(struct nouveau_bo *, uint32_t *);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_handle_ref(struct nouveau_device *, uint32_t handle,
|
|
|
|
+ struct nouveau_bo **);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_ref(struct nouveau_bo *, struct nouveau_bo **);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_map(struct nouveau_bo *, uint32_t flags);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_bo_unmap(struct nouveau_bo *);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_pin(struct nouveau_bo *, uint32_t flags);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_bo_unpin(struct nouveau_bo *);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_tile(struct nouveau_bo *, uint32_t flags, uint32_t delta,
|
|
|
|
+ uint32_t size);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_busy(struct nouveau_bo *, uint32_t access);
|
|
|
|
+
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_channel.c libdrm-2.4.4/libdrm/nouveau/nouveau_channel.c
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_channel.c 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_channel.c 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,167 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#include <stdlib.h>
|
|
|
|
+#include <string.h>
|
|
|
|
+#include <errno.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_private.h"
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_channel_alloc(struct nouveau_device *dev, uint32_t fb_ctxdma,
|
|
|
|
+ uint32_t tt_ctxdma, struct nouveau_channel **chan)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(dev);
|
|
|
|
+ struct nouveau_channel_priv *nvchan;
|
|
|
|
+ unsigned i;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!nvdev || !chan || *chan)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ nvchan = calloc(1, sizeof(struct nouveau_channel_priv));
|
|
|
|
+ if (!nvchan)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+ nvchan->base.device = dev;
|
|
|
|
+
|
|
|
|
+ nvchan->drm.fb_ctxdma_handle = fb_ctxdma;
|
|
|
|
+ nvchan->drm.tt_ctxdma_handle = tt_ctxdma;
|
|
|
|
+ ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_CHANNEL_ALLOC,
|
|
|
|
+ &nvchan->drm, sizeof(nvchan->drm));
|
|
|
|
+ if (ret) {
|
|
|
|
+ free(nvchan);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nvchan->base.id = nvchan->drm.channel;
|
|
|
|
+ if (nouveau_grobj_ref(&nvchan->base, nvchan->drm.fb_ctxdma_handle,
|
|
|
|
+ &nvchan->base.vram) ||
|
|
|
|
+ nouveau_grobj_ref(&nvchan->base, nvchan->drm.tt_ctxdma_handle,
|
|
|
|
+ &nvchan->base.gart)) {
|
|
|
|
+ nouveau_channel_free((void *)&nvchan);
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* Mark all DRM-assigned subchannels as in-use */
|
|
|
|
+ for (i = 0; i < nvchan->drm.nr_subchan; i++) {
|
|
|
|
+ struct nouveau_grobj_priv *gr = calloc(1, sizeof(*gr));
|
|
|
|
+
|
|
|
|
+ gr->base.bound = NOUVEAU_GROBJ_BOUND_EXPLICIT;
|
|
|
|
+ gr->base.subc = i;
|
|
|
|
+ gr->base.handle = nvchan->drm.subchan[i].handle;
|
|
|
|
+ gr->base.grclass = nvchan->drm.subchan[i].grclass;
|
|
|
|
+ gr->base.channel = &nvchan->base;
|
|
|
|
+
|
|
|
|
+ nvchan->base.subc[i].gr = &gr->base;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ ret = drmMap(nvdev->fd, nvchan->drm.notifier, nvchan->drm.notifier_size,
|
|
|
|
+ (drmAddressPtr)&nvchan->notifier_block);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_channel_free((void *)&nvchan);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ ret = nouveau_grobj_alloc(&nvchan->base, 0x00000000, 0x0030,
|
|
|
|
+ &nvchan->base.nullobj);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_channel_free((void *)&nvchan);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (!nvdev->mm_enabled) {
|
|
|
|
+ ret = drmMap(nvdev->fd, nvchan->drm.ctrl, nvchan->drm.ctrl_size,
|
|
|
|
+ (void*)&nvchan->user);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_channel_free((void *)&nvchan);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+ nvchan->put = &nvchan->user[0x40/4];
|
|
|
|
+ nvchan->get = &nvchan->user[0x44/4];
|
|
|
|
+ nvchan->ref_cnt = &nvchan->user[0x48/4];
|
|
|
|
+
|
|
|
|
+ ret = drmMap(nvdev->fd, nvchan->drm.cmdbuf,
|
|
|
|
+ nvchan->drm.cmdbuf_size, (void*)&nvchan->pushbuf);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_channel_free((void *)&nvchan);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nouveau_dma_channel_init(&nvchan->base);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nouveau_pushbuf_init(&nvchan->base);
|
|
|
|
+
|
|
|
|
+ if (!nvdev->mm_enabled && dev->chipset < 0x10) {
|
|
|
|
+ ret = nouveau_grobj_alloc(&nvchan->base, 0xbeef3904, 0x5039,
|
|
|
|
+ &nvchan->fence_grobj);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_channel_free((void *)&nvchan);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ ret = nouveau_notifier_alloc(&nvchan->base, 0xbeef3905, 1,
|
|
|
|
+ &nvchan->fence_ntfy);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_channel_free((void *)&nvchan);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ BEGIN_RING(&nvchan->base, nvchan->fence_grobj, 0x0180, 1);
|
|
|
|
+ OUT_RING (&nvchan->base, nvchan->fence_ntfy->handle);
|
|
|
|
+ nvchan->fence_grobj->bound = NOUVEAU_GROBJ_BOUND_EXPLICIT;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ *chan = &nvchan->base;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_channel_free(struct nouveau_channel **chan)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan;
|
|
|
|
+ struct nouveau_device_priv *nvdev;
|
|
|
|
+ struct drm_nouveau_channel_free cf;
|
|
|
|
+
|
|
|
|
+ if (!chan || !*chan)
|
|
|
|
+ return;
|
|
|
|
+ nvchan = nouveau_channel(*chan);
|
|
|
|
+ *chan = NULL;
|
|
|
|
+ nvdev = nouveau_device(nvchan->base.device);
|
|
|
|
+
|
|
|
|
+ FIRE_RING(&nvchan->base);
|
|
|
|
+
|
|
|
|
+ if (nvchan->notifier_block)
|
|
|
|
+ drmUnmap(nvchan->notifier_block, nvchan->drm.notifier_size);
|
|
|
|
+
|
|
|
|
+ nouveau_grobj_free(&nvchan->base.vram);
|
|
|
|
+ nouveau_grobj_free(&nvchan->base.gart);
|
|
|
|
+ nouveau_grobj_free(&nvchan->base.nullobj);
|
|
|
|
+ nouveau_grobj_free(&nvchan->fence_grobj);
|
|
|
|
+ nouveau_notifier_free(&nvchan->fence_ntfy);
|
|
|
|
+
|
|
|
|
+ cf.channel = nvchan->drm.channel;
|
|
|
|
+ drmCommandWrite(nvdev->fd, DRM_NOUVEAU_CHANNEL_FREE, &cf, sizeof(cf));
|
|
|
|
+ free(nvchan);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_channel.h libdrm-2.4.4/libdrm/nouveau/nouveau_channel.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_channel.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_channel.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,56 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_CHANNEL_H__
|
|
|
|
+#define __NOUVEAU_CHANNEL_H__
|
|
|
|
+
|
|
|
|
+struct nouveau_subchannel {
|
|
|
|
+ struct nouveau_grobj *gr;
|
|
|
|
+ unsigned sequence;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct nouveau_channel {
|
|
|
|
+ struct nouveau_device *device;
|
|
|
|
+ int id;
|
|
|
|
+
|
|
|
|
+ struct nouveau_pushbuf *pushbuf;
|
|
|
|
+
|
|
|
|
+ struct nouveau_grobj *nullobj;
|
|
|
|
+ struct nouveau_grobj *vram;
|
|
|
|
+ struct nouveau_grobj *gart;
|
|
|
|
+
|
|
|
|
+ void *user_private;
|
|
|
|
+ void (*hang_notify)(struct nouveau_channel *);
|
|
|
|
+ void (*flush_notify)(struct nouveau_channel *);
|
|
|
|
+
|
|
|
|
+ struct nouveau_subchannel subc[8];
|
|
|
|
+ unsigned subc_sequence;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_channel_alloc(struct nouveau_device *, uint32_t fb, uint32_t tt,
|
|
|
|
+ struct nouveau_channel **);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_channel_free(struct nouveau_channel **);
|
|
|
|
+
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_class.h libdrm-2.4.4/libdrm/nouveau/nouveau_class.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_class.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_class.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,8006 @@
|
|
|
|
+/*************************************************************************
|
|
|
|
+
|
|
|
|
+ Autogenerated file, do not edit !
|
|
|
|
+
|
|
|
|
+**************************************************************************
|
|
|
|
+
|
|
|
|
+ Copyright (C) 2006-2008 :
|
|
|
|
+ Dmitry Baryshkov,
|
|
|
|
+ Laurent Carlier,
|
|
|
|
+ Matthieu Castet,
|
|
|
|
+ Dawid Gajownik,
|
|
|
|
+ Jeremy Kolb,
|
|
|
|
+ Stephane Loeuillet,
|
|
|
|
+ Patrice Mandin,
|
|
|
|
+ Stephane Marchesin,
|
|
|
|
+ Serge Martin,
|
|
|
|
+ Sylvain Munaut,
|
|
|
|
+ Simon Raffeiner,
|
|
|
|
+ Ben Skeggs,
|
|
|
|
+ Erik Waling,
|
|
|
|
+ koala_br,
|
|
|
|
+
|
|
|
|
+All Rights Reserved.
|
|
|
|
+
|
|
|
|
+Permission is hereby granted, free of charge, to any person obtaining
|
|
|
|
+a copy of this software and associated documentation files (the
|
|
|
|
+"Software"), to deal in the Software without restriction, including
|
|
|
|
+without limitation the rights to use, copy, modify, merge, publish,
|
|
|
|
+distribute, sublicense, and/or sell copies of the Software, and to
|
|
|
|
+permit persons to whom the Software is furnished to do so, subject to
|
|
|
|
+the following conditions:
|
|
|
|
+
|
|
|
|
+The above copyright notice and this permission notice (including the
|
|
|
|
+next paragraph) shall be included in all copies or substantial
|
|
|
|
+portions of the Software.
|
|
|
|
+
|
|
|
|
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
|
|
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
|
|
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
|
|
+IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
|
|
+LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
|
|
+OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
|
|
+WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
|
|
+
|
|
|
|
+*************************************************************************/
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#ifndef NOUVEAU_REG_H
|
|
|
|
+#define NOUVEAU_REG_H 1
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_ROOT 0x00000001
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_CONTEXT_DMA 0x00000002
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_DEVICE 0x00000003
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_TIMER 0x00000004
|
|
|
|
+
|
|
|
|
+#define NV01_TIMER_SYNCHRONIZE 0x00000100
|
|
|
|
+#define NV01_TIMER_STOP_ALARM 0x00000104
|
|
|
|
+#define NV01_TIMER_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_TIMER_TIME(x) (0x00000300+((x)*4))
|
|
|
|
+#define NV01_TIMER_TIME__SIZE 0x00000002
|
|
|
|
+#define NV01_TIMER_ALARM_NOTIFY 0x00000308
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV_IMAGE_STENCIL 0x00000010
|
|
|
|
+
|
|
|
|
+#define NV_IMAGE_STENCIL_NOTIFY 0x00000104
|
|
|
|
+#define NV_IMAGE_STENCIL_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV_IMAGE_STENCIL_IMAGE_OUTPUT 0x00000200
|
|
|
|
+#define NV_IMAGE_STENCIL_IMAGE_INPUT(x) (0x00000204+((x)*4))
|
|
|
|
+#define NV_IMAGE_STENCIL_IMAGE_INPUT__SIZE 0x00000002
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV_IMAGE_BLEND_AND 0x00000011
|
|
|
|
+
|
|
|
|
+#define NV_IMAGE_BLEND_AND_NOP 0x00000100
|
|
|
|
+#define NV_IMAGE_BLEND_AND_NOTIFY 0x00000104
|
|
|
|
+#define NV_IMAGE_BLEND_AND_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV_IMAGE_BLEND_AND_IMAGE_OUTPUT 0x00000200
|
|
|
|
+#define NV_IMAGE_BLEND_AND_BETA_INPUT 0x00000204
|
|
|
|
+#define NV_IMAGE_BLEND_AND_IMAGE_INPUT 0x00000208
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_CONTEXT_BETA1 0x00000012
|
|
|
|
+
|
|
|
|
+#define NV01_CONTEXT_BETA1_NOP 0x00000100
|
|
|
|
+#define NV01_CONTEXT_BETA1_NOTIFY 0x00000104
|
|
|
|
+#define NV01_CONTEXT_BETA1_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_CONTEXT_BETA1_BETA_1D31 0x00000300
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV_IMAGE_ROP_AND 0x00000013
|
|
|
|
+
|
|
|
|
+#define NV_IMAGE_ROP_AND_NOTIFY 0x00000104
|
|
|
|
+#define NV_IMAGE_ROP_AND_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV_IMAGE_ROP_AND_IMAGE_OUTPUT 0x00000200
|
|
|
|
+#define NV_IMAGE_ROP_AND_ROP_INPUT 0x00000204
|
|
|
|
+#define NV_IMAGE_ROP_AND_IMAGE_INPUT(x) (0x00000208+((x)*4))
|
|
|
|
+#define NV_IMAGE_ROP_AND_IMAGE_INPUT__SIZE 0x00000002
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV_IMAGE_COLOR_KEY 0x00000015
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY 0x00000017
|
|
|
|
+
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_NOP 0x00000100
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_NOTIFY 0x00000104
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16A8Y8 0x00000001
|
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|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X24Y8 0x00000002
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16A1R5G5B5 0x00000003
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X17R5G5B5 0x00000004
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_A8R8G8B8 0x00000005
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X8R8G8B8 0x00000006
|
|
|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_A16Y16 0x00000007
|
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|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16Y16 0x00000008
|
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|
|
+#define NV01_CONTEXT_COLOR_KEY_COLOR 0x00000304
|
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+
|
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+
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|
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+#define NV01_CONTEXT_PATTERN 0x00000018
|
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+
|
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|
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+#define NV01_CONTEXT_PATTERN_NOP 0x00000100
|
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|
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+#define NV01_CONTEXT_PATTERN_NOTIFY 0x00000104
|
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|
|
+#define NV01_CONTEXT_PATTERN_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_CONTEXT_PATTERN_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV01_CONTEXT_PATTERN_MONOCHROME_FORMAT 0x00000304
|
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|
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+#define NV01_CONTEXT_PATTERN_SHAPE 0x00000308
|
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|
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+#define NV01_CONTEXT_PATTERN_COLOR(x) (0x00000310+((x)*4))
|
|
|
|
+#define NV01_CONTEXT_PATTERN_COLOR__SIZE 0x00000002
|
|
|
|
+#define NV01_CONTEXT_PATTERN_PATTERN(x) (0x00000318+((x)*4))
|
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|
|
+#define NV01_CONTEXT_PATTERN_PATTERN__SIZE 0x00000002
|
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+
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+
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+#define NV01_CONTEXT_CLIP_RECTANGLE 0x00000019
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+
|
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|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_NOP 0x00000100
|
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|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_NOTIFY 0x00000104
|
|
|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_POINT 0x00000300
|
|
|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_X_SHIFT 0
|
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|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_X_MASK 0x0000ffff
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|
|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_Y_SHIFT 16
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|
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+#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_Y_MASK 0xffff0000
|
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|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE 0x00000304
|
|
|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_W_SHIFT 0
|
|
|
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+#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_H_SHIFT 16
|
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|
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+#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_H_MASK 0xffff0000
|
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+
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+
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|
|
+#define NV01_RENDER_SOLID_LINE 0x0000001c
|
|
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+
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_NOP 0x00000100
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_NOTIFY 0x00000104
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_PATCH 0x0000010c
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_CLIP_RECTANGLE 0x00000184
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_PATTERN 0x00000188
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_ROP 0x0000018c
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_BETA1 0x00000190
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_SURFACE 0x00000194
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_OPERATION 0x000002fc
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY_AND 0x00000000
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_OPERATION_ROP_AND 0x00000001
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_OPERATION_BLEND_AND 0x00000002
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY 0x00000003
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY_PREMULT 0x00000004
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_OPERATION_BLEND_PREMULT 0x00000005
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16A8Y8 0x00000001
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X24Y8 0x00000002
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16A1R5G5B5 0x00000003
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X17R5G5B5 0x00000004
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_A8R8G8B8 0x00000005
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X8R8G8B8 0x00000006
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_A16Y16 0x00000007
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16Y16 0x00000008
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_COLOR 0x00000304
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT0(x) (0x00000400+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT0__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT0_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT0_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT0_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT0_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT1(x) (0x00000404+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT1__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT1_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT1_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT1_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE_POINT1_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_X(x) (0x00000480+((x)*16))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_X__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_Y(x) (0x00000484+((x)*16))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_Y__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_X(x) (0x00000488+((x)*16))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_X__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_Y(x) (0x0000048c+((x)*16))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_Y__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE(x) (0x00000500+((x)*4))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE__SIZE 0x00000020
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_X(x) (0x00000580+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_X__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_Y(x) (0x00000584+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_Y__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_CPOLYLINE_COLOR(x) (0x00000600+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_CPOLYLINE_COLOR__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT(x) (0x00000604+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_Y_MASK 0xffff0000
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE 0x0000001d
|
|
|
|
+
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_NOP 0x00000100
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_NOTIFY 0x00000104
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_PATCH 0x0000010c
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CLIP_RECTANGLE 0x00000184
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_PATTERN 0x00000188
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_ROP 0x0000018c
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_BETA1 0x00000190
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_SURFACE 0x00000194
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_OPERATION 0x000002fc
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY_AND 0x00000000
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_ROP_AND 0x00000001
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_BLEND_AND 0x00000002
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY 0x00000003
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY_PREMULT 0x00000004
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_BLEND_PREMULT 0x00000005
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_COLOR 0x00000304
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0 0x00000310
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1 0x00000314
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2 0x00000318
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT0_X 0x00000320
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT0_Y 0x00000324
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT1_X 0x00000328
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT1_Y 0x0000032c
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT2_X 0x00000330
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT2_Y 0x00000334
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH(x) (0x00000400+((x)*4))
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH__SIZE 0x00000020
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_X(x) (0x00000480+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_X__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_Y(x) (0x00000484+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_Y__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_COLOR(x) (0x00000500+((x)*16))
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_COLOR__SIZE 0x00000008
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0(x) (0x00000504+((x)*16))
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0__SIZE 0x00000008
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1(x) (0x00000508+((x)*16))
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1__SIZE 0x00000008
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2(x) (0x0000050c+((x)*16))
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2__SIZE 0x00000008
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_COLOR(x) (0x00000580+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_COLOR__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT(x) (0x00000584+((x)*8))
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT__SIZE 0x00000010
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_X_SHIFT 0
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_Y_SHIFT 16
|
|
|
|
+#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_Y_MASK 0xffff0000
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE 0x0000001e
|
|
|
|
+
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_NOP 0x00000100
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_NOTIFY 0x00000104
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_PATCH 0x0000010c
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_CLIP_RECTANGLE 0x00000184
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_PATTERN 0x00000188
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_ROP 0x0000018c
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_BETA1 0x00000190
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_SURFACE 0x00000194
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_OPERATION 0x000002fc
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY_AND 0x00000000
|
|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_ROP_AND 0x00000001
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+#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_BLEND_AND 0x00000002
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|
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+#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY 0x00000003
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+#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY_PREMULT 0x00000004
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+#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_BLEND_PREMULT 0x00000005
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|
|
|
+#define NV01_RENDER_SOLID_RECTANGLE_COLOR_FORMAT 0x00000300
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+#define NV01_RENDER_SOLID_RECTANGLE_COLOR 0x00000304
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT(x) (0x00000400+((x)*8))
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT__SIZE 0x00000010
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_X_SHIFT 0
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|
+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_X_MASK 0x0000ffff
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_Y_SHIFT 16
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_Y_MASK 0xffff0000
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE(x) (0x00000404+((x)*8))
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE__SIZE 0x00000010
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_W_SHIFT 0
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_W_MASK 0x0000ffff
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_H_SHIFT 16
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+#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_H_MASK 0xffff0000
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+
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+
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+#define NV01_IMAGE_BLIT 0x0000001f
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+
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|
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+#define NV01_IMAGE_BLIT_NOP 0x00000100
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|
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+#define NV01_IMAGE_BLIT_NOTIFY 0x00000104
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|
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+#define NV01_IMAGE_BLIT_PATCH 0x0000010c
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|
|
|
+#define NV01_IMAGE_BLIT_DMA_NOTIFY 0x00000180
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|
|
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+#define NV01_IMAGE_BLIT_COLOR_KEY 0x00000184
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|
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+#define NV01_IMAGE_BLIT_CLIP_RECTANGLE 0x00000188
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+#define NV01_IMAGE_BLIT_PATTERN 0x0000018c
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|
|
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+#define NV01_IMAGE_BLIT_ROP 0x00000190
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|
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+#define NV01_IMAGE_BLIT_BETA1 0x00000194
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|
|
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+#define NV01_IMAGE_BLIT_SURFACE 0x0000019c
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|
|
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+#define NV01_IMAGE_BLIT_OPERATION 0x000002fc
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|
|
|
+#define NV01_IMAGE_BLIT_IMAGE_INPUT 0x00000204
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|
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+#define NV01_IMAGE_BLIT_POINT_IN 0x00000300
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|
|
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+#define NV01_IMAGE_BLIT_POINT_IN_X_SHIFT 0
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|
|
|
+#define NV01_IMAGE_BLIT_POINT_IN_X_MASK 0x0000ffff
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|
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+#define NV01_IMAGE_BLIT_POINT_IN_Y_SHIFT 16
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|
|
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+#define NV01_IMAGE_BLIT_POINT_IN_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_IMAGE_BLIT_POINT_OUT 0x00000304
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|
|
|
+#define NV01_IMAGE_BLIT_POINT_OUT_X_SHIFT 0
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|
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+#define NV01_IMAGE_BLIT_POINT_OUT_X_MASK 0x0000ffff
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|
|
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+#define NV01_IMAGE_BLIT_POINT_OUT_Y_SHIFT 16
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+#define NV01_IMAGE_BLIT_POINT_OUT_Y_MASK 0xffff0000
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|
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|
+#define NV01_IMAGE_BLIT_SIZE 0x00000308
|
|
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|
+#define NV01_IMAGE_BLIT_SIZE_W_SHIFT 0
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|
|
|
+#define NV01_IMAGE_BLIT_SIZE_W_MASK 0x0000ffff
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|
|
|
+#define NV01_IMAGE_BLIT_SIZE_H_SHIFT 16
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+#define NV01_IMAGE_BLIT_SIZE_H_MASK 0xffff0000
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+
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+
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|
|
+#define NV01_IMAGE_FROM_CPU 0x00000021
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+
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|
|
+#define NV01_IMAGE_FROM_CPU_NOP 0x00000100
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|
|
|
+#define NV01_IMAGE_FROM_CPU_NOTIFY 0x00000104
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_PATCH 0x0000010c
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_COLOR_KEY 0x00000184
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_CLIP_RECTANGLE 0x00000188
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_PATTERN 0x0000018c
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_ROP 0x00000190
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_BETA1 0x00000194
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SURFACE 0x00000198
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_OPERATION 0x000002fc
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY_AND 0x00000000
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_OPERATION_ROP_AND 0x00000001
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_OPERATION_BLEND_AND 0x00000002
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY 0x00000003
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY_PREMULT 0x00000004
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_OPERATION_BLEND_PREMULT 0x00000005
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_Y8 0x00000001
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_A1R5G5B5 0x00000002
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_X1R5G5B5 0x00000003
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_A8R8G8B8 0x00000004
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_X8R8G8B8 0x00000005
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_POINT 0x00000304
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_POINT_X_SHIFT 0
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_POINT_Y_SHIFT 16
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_POINT_Y_MASK 0xffff0000
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_OUT 0x00000308
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_OUT_W_SHIFT 0
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_OUT_W_MASK 0x0000ffff
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_OUT_H_SHIFT 16
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_OUT_H_MASK 0xffff0000
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_IN 0x0000030c
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_IN_W_SHIFT 0
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_IN_W_MASK 0x0000ffff
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_IN_H_SHIFT 16
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_SIZE_IN_H_MASK 0xffff0000
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_COLOR(x) (0x00000400+((x)*4))
|
|
|
|
+#define NV01_IMAGE_FROM_CPU_COLOR__SIZE 0x00000020
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_NULL 0x00000030
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU 0x00000036
|
|
|
|
+
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_NOP 0x00000100
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_NOTIFY 0x00000104
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_PATCH 0x0000010c
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR_KEY 0x00000184
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_PATTERN 0x00000188
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_ROP 0x0000018c
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_BETA1 0x00000190
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_SURFACE 0x00000194
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_OPERATION 0x000002fc
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN 0x00000304
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_W_SHIFT 0
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_H_SHIFT 16
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_H_MASK 0xffff0000
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_DX_DU 0x00000308
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_DY_DV 0x0000030c
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT 0x00000310
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_X_SHIFT 0
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_Y_SHIFT 16
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_Y_MASK 0xffff0000
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE 0x00000314
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_W_SHIFT 0
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_H_SHIFT 16
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4 0x00000318
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_X_SHIFT 0
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_X_MASK 0x0000ffff
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_Y_SHIFT 16
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_Y_MASK 0xffff0000
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR(x) (0x00000400+((x)*4))
|
|
|
|
+#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR__SIZE 0x00000020
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY 0x00000037
|
|
|
|
+
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_NOP 0x00000100
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_NOTIFY 0x00000104
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE 0x00000184
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_PATTERN 0x00000188
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_ROP 0x0000018c
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_BETA1 0x00000190
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_SURFACE 0x00000194
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5 0x00000001
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X1R5G5B5 0x00000002
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8 0x00000003
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8 0x00000004
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_V8YB8U8YA8 0x00000005
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_YB8V8YA8U8 0x00000006
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5 0x00000007
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8 0x00000008
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8 0x00000009
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION 0x00000304
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_AND 0x00000000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_ROP_AND 0x00000001
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_AND 0x00000002
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY 0x00000003
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_PREMULT 0x00000004
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_PREMULT 0x00000005
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT 0x00000308
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_SHIFT 0
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT 16
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_MASK 0xffff0000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE 0x0000030c
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_SHIFT 0
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT 16
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT 0x00000310
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_X_SHIFT 0
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_Y_SHIFT 16
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_Y_MASK 0xffff0000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE 0x00000314
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_W_SHIFT 0
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_H_SHIFT 16
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_DELTA_DU_DX 0x00000318
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_DELTA_DV_DY 0x0000031c
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE 0x00000400
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_W_SHIFT 0
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_H_SHIFT 16
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT 0x00000404
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_PITCH_SHIFT 0
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_PITCH_MASK 0x0000ffff
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_SHIFT 16
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_MASK 0x00ff0000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_CENTER 0x00010000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_CORNER 0x00020000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_INTERPOLATOR_SHIFT 24
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_INTERPOLATOR_MASK 0xff000000
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_OFFSET 0x00000408
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT 0x0000040c
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_U_SHIFT 0
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_U_MASK 0x0000ffff
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_V_SHIFT 16
|
|
|
|
+#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_V_MASK 0xffff0000
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_DVD_SUBPICTURE 0x00000038
|
|
|
|
+
|
|
|
|
+#define NV04_DVD_SUBPICTURE_NOP 0x00000100
|
|
|
|
+#define NV04_DVD_SUBPICTURE_NOTIFY 0x00000104
|
|
|
|
+#define NV04_DVD_SUBPICTURE_WAIT_FOR_IDLE 0x00000108
|
|
|
|
+#define NV04_DVD_SUBPICTURE_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_DVD_SUBPICTURE_DMA_OVERLAY 0x00000184
|
|
|
|
+#define NV04_DVD_SUBPICTURE_DMA_IMAGEIN 0x00000188
|
|
|
|
+#define NV04_DVD_SUBPICTURE_DMA_IMAGEOUT 0x0000018c
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT 0x00000300
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_X_SHIFT 0
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_Y_SHIFT 16
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_Y_MASK 0xffff0000
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE 0x00000304
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_W_SHIFT 0
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_H_SHIFT 16
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT 0x00000308
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_PITCH_SHIFT 0
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_PITCH_MASK 0x0000ffff
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_COLOR_SHIFT 16
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_COLOR_MASK 0xffff0000
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEOUT_OFFSET 0x0000030c
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_DELTA_DU_DX 0x00000310
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_DELTA_DV_DY 0x00000314
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE 0x00000318
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_W_SHIFT 0
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_H_SHIFT 16
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT 0x0000031c
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_PITCH_SHIFT 0
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_PITCH_MASK 0x0000ffff
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_COLOR_SHIFT 16
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_COLOR_MASK 0xffff0000
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_OFFSET 0x00000320
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT 0x00000324
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_U_SHIFT 0
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_U_MASK 0x0000ffff
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_V_SHIFT 16
|
|
|
|
+#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_V_MASK 0xffff0000
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_DELTA_DU_DX 0x00000328
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_DELTA_DV_DY 0x0000032c
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE 0x00000330
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_W_SHIFT 0
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_H_SHIFT 16
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT 0x00000334
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_PITCH_SHIFT 0
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_PITCH_MASK 0x0000ffff
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_COLOR_SHIFT 16
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_COLOR_MASK 0xffff0000
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_OFFSET 0x00000338
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_POINT 0x0000033c
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_U_SHIFT 0
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_U_MASK 0x0000ffff
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_V_SHIFT 16
|
|
|
|
+#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_V_MASK 0xffff0000
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT 0x00000039
|
|
|
|
+
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_NOP 0x00000100
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN 0x00000184
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_OUT 0x00000188
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT 0x00000310
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_PITCH_IN 0x00000314
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_PITCH_OUT 0x00000318
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_LINE_LENGTH_IN 0x0000031c
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_LINE_COUNT 0x00000320
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT 0x00000324
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_INPUT_INC_SHIFT 0
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_INPUT_INC_MASK 0x0000000f
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_OUTPUT_INC_SHIFT 8
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_OUTPUT_INC_MASK 0x00000f00
|
|
|
|
+#define NV04_MEMORY_TO_MEMORY_FORMAT_BUF_NOTIFY 0x00000328
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_MEMORY_LOCAL_BANKED 0x0000003d
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_MAPPING_SYSTEM 0x0000003e
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_MEMORY_LOCAL_CURSOR 0x0000003f
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_MEMORY_LOCAL_LINEAR 0x00000040
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_MAPPING_LOCAL 0x00000041
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D 0x00000042
|
|
|
|
+
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_NOP 0x00000100
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_NOTIFY 0x00000104
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_PM_TRIGGER 0x00000140
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE 0x00000184
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_DESTIN 0x00000188
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT 0x00000300
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_Y8 0x00000001
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1R5G5B5_Z1R5G5B5 0x00000002
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1R5G5B5_X1R5G5B5 0x00000003
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5 0x00000004
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_Y16 0x00000005
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_X8R8G8B8_Z8R8G8B8 0x00000006
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_X8R8G8B8_X8R8G8B8 0x00000007
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1A7R8G8B8_Z1A7R8G8B8 0x00000008
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1A7R8G8B8_X1A7R8G8B8 0x00000009
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8 0x0000000a
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_FORMAT_Y32 0x0000000b
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_PITCH 0x00000304
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_PITCH_SOURCE_SHIFT 0
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_PITCH_SOURCE_MASK 0x0000ffff
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_PITCH_DESTIN_SHIFT 16
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_PITCH_DESTIN_MASK 0xffff0000
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_OFFSET_SOURCE 0x00000308
|
|
|
|
+#define NV04_CONTEXT_SURFACES_2D_OFFSET_DESTIN 0x0000030c
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_CONTEXT_ROP 0x00000043
|
|
|
|
+
|
|
|
|
+#define NV03_CONTEXT_ROP_NOP 0x00000100
|
|
|
|
+#define NV03_CONTEXT_ROP_NOTIFY 0x00000104
|
|
|
|
+#define NV03_CONTEXT_ROP_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP 0x00000300
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_SHIFT 0
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_MASK 0x0000000f
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_CLEAR 0x00000000
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NOR 0x00000001
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND_INVERTED 0x00000002
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_COPY_INVERTED 0x00000003
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND_REVERSE 0x00000004
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_INVERT 0x00000005
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_XOR 0x00000006
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NAND 0x00000007
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND 0x00000008
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_EQUI 0x00000009
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NOOP 0x0000000a
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR_INVERTED 0x0000000b
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_COPY 0x0000000c
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR_REVERSE 0x0000000d
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR 0x0000000e
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_SET 0x0000000f
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_SHIFT 4
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_MASK 0x000000f0
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_CLEAR 0x00000000
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NOR 0x00000010
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND_INVERTED 0x00000020
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_COPY_INVERTED 0x00000030
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND_REVERSE 0x00000040
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_INVERT 0x00000050
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_XOR 0x00000060
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NAND 0x00000070
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND 0x00000080
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_EQUI 0x00000090
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NOOP 0x000000a0
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR_INVERTED 0x000000b0
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_COPY 0x000000c0
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR_REVERSE 0x000000d0
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR 0x000000e0
|
|
|
|
+#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_SET 0x000000f0
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_IMAGE_PATTERN 0x00000044
|
|
|
|
+
|
|
|
|
+#define NV04_IMAGE_PATTERN_NOP 0x00000100
|
|
|
|
+#define NV04_IMAGE_PATTERN_NOTIFY 0x00000104
|
|
|
|
+#define NV04_IMAGE_PATTERN_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_IMAGE_PATTERN_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV04_IMAGE_PATTERN_COLOR_FORMAT_A16R5G6B5 0x00000001
|
|
|
|
+#define NV04_IMAGE_PATTERN_COLOR_FORMAT_X16A1R5G5B5 0x00000002
|
|
|
|
+#define NV04_IMAGE_PATTERN_COLOR_FORMAT_A8R8G8B8 0x00000003
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_FORMAT 0x00000304
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_FORMAT_CGA6 0x00000001
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_FORMAT_LE 0x00000002
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE 0x00000308
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_8X8 0x00000000
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_64X1 0x00000001
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_1X64 0x00000002
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_SELECT 0x0000030c
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_SELECT_MONO 0x00000001
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_SELECT_COLOR 0x00000002
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_COLOR0 0x00000310
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_COLOR1 0x00000314
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_PATTERN0 0x00000318
|
|
|
|
+#define NV04_IMAGE_PATTERN_MONOCHROME_PATTERN1 0x0000031c
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8(x) (0x00000400+((x)*4))
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8__SIZE 0x00000010
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y0_SHIFT 0
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y0_MASK 0x000000ff
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y1_SHIFT 8
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y1_MASK 0x0000ff00
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y2_SHIFT 16
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y2_MASK 0x00ff0000
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y3_SHIFT 24
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y3_MASK 0xff000000
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5(x) (0x00000500+((x)*4))
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5__SIZE 0x00000020
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B0_SHIFT 0
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B0_MASK 0x0000001f
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G0_SHIFT 5
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G0_MASK 0x000007e0
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R0_SHIFT 11
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R0_MASK 0x0000f800
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B1_SHIFT 16
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B1_MASK 0x001f0000
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G1_SHIFT 21
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G1_MASK 0x07e00000
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R1_SHIFT 27
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R1_MASK 0xf8000000
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5(x) (0x00000600+((x)*4))
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5__SIZE 0x00000020
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B0_SHIFT 0
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B0_MASK 0x0000001f
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G0_SHIFT 5
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G0_MASK 0x000003e0
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R0_SHIFT 10
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R0_MASK 0x00007c00
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B1_SHIFT 16
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B1_MASK 0x001f0000
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G1_SHIFT 21
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G1_MASK 0x03e00000
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R1_SHIFT 26
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R1_MASK 0x7c000000
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8(x) (0x00000700+((x)*4))
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8__SIZE 0x00000040
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_B_SHIFT 0
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_B_MASK 0x000000ff
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_G_SHIFT 8
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_G_MASK 0x0000ff00
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_R_SHIFT 16
|
|
|
|
+#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_R_MASK 0x00ff0000
|
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+
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+
|
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|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC 0x00000046
|
|
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|
+
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SYNCHRONIZE 0x00000100
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_STOP_IMAGE 0x00000104
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_STOP_CURSOR 0x00000108
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_STOP_DAC 0x0000010c
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_IMAGE(x) (0x00000184+((x)*4))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_IMAGE__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_LUT(x) (0x0000018c+((x)*4))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_LUT__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_CURSOR(x) (0x00000194+((x)*4))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_CURSOR__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_GET 0x000002fc
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_OFFSET(x) (0x00000300+((x)*8))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_OFFSET__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT(x) (0x00000304+((x)*8))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_PITCH_SHIFT 0
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_PITCH_MASK 0x0000ffff
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_COLOR_SHIFT 16
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_COLOR_MASK 0x0fff0000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_NOTIFY_SHIFT 28
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_NOTIFY_MASK 0xf0000000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_OFFSET(x) (0x00000340+((x)*12))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_OFFSET__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT(x) (0x00000344+((x)*12))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_X_SHIFT 0
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_X_MASK 0x0000ffff
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_Y_SHIFT 16
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_Y_MASK 0xffff0000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_FORMAT(x) (0x00000348+((x)*12))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_FORMAT__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A 0x00000358
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_X_SHIFT 0
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_X_MASK 0x0000ffff
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_Y_SHIFT 16
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_Y_MASK 0xffff0000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE(x) (0x00000380+((x)*16))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_W_SHIFT 0
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_H_SHIFT 16
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC(x) (0x00000384+((x)*16))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_START_SHIFT 0
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_START_MASK 0x0000ffff
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_WIDTH_SHIFT 16
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_WIDTH_MASK 0x0fff0000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_POLARITY_SHIFT 28
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_POLARITY_MASK 0xf0000000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC(x) (0x00000388+((x)*16))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_START_SHIFT 0
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_START_MASK 0x0000ffff
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_WIDTH_SHIFT 16
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_WIDTH_MASK 0x0fff0000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_POLARITY_SHIFT 28
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_POLARITY_MASK 0xf0000000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE(x) (0x0000038c+((x)*16))
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE__SIZE 0x00000002
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_WIDTH_SHIFT 0
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_WIDTH_MASK 0x0000ffff
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_HEIGHT_SHIFT 16
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_HEIGHT_MASK 0x0fff0000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_NOTIFY_SHIFT 28
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_NOTIFY_MASK 0xf0000000
|
|
|
|
+#define NV03_VIDEO_LUT_CURSOR_DAC_SET_PIXEL_CLOCK 0x000003a0
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE 0x00000048
|
|
|
|
+
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_NOP 0x00000100
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_NOTIFY 0x00000104
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_PATCH 0x0000010c
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_DMA_TEXTURE 0x00000184
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CLIP_RECTANGLE 0x00000188
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SURFACE 0x0000018c
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_OFFSET 0x00000304
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT 0x00000308
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_MASK_SHIFT 0
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_MASK_MASK 0x0000ffff
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_ENABLE_SHIFT 16
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_ENABLE_MASK 0x000f0000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_SHIFT 20
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_MASK 0x00f00000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MIN_SHIFT 24
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MIN_MASK 0x0f000000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MAX_SHIFT 28
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MAX_MASK 0xf0000000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FILTER 0x0000030c
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_X_SHIFT 0
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_X_MASK 0x0000001f
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_Y_SHIFT 8
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_Y_MASK 0x00001f00
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SIZE_ADJUST_SHIFT 16
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SIZE_ADJUST_MASK 0x00ff0000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR 0x00000310
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_B_SHIFT 0
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_G_SHIFT 8
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_R_SHIFT 16
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT 0x00000314
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_SHIFT 0
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_MASK 0x0000000f
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_SHIFT 4
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_MASK 0x00000030
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_SHIFT 6
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_MASK 0x000000c0
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_SOURCE_COLOR_SHIFT 8
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_SOURCE_COLOR_MASK 0x00000f00
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_CULLING_SHIFT 12
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_CULLING_MASK 0x00007000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_PERSPECTIVE_ENABLE (1 << 15)
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_FUNC_SHIFT 16
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_FUNC_MASK 0x000f0000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_WRITE_ENABLE_SHIFT 20
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_WRITE_ENABLE_MASK 0x00f00000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_COLOR_WRITE_ENABLE_SHIFT 24
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_COLOR_WRITE_ENABLE_MASK 0x07000000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_ROP_SHIFT 27
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_ROP_MASK 0x18000000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_BETA (1 << 29)
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_DST_BLEND (1 << 30)
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_SRC_BLEND (1 << 31)
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL 0x00000318
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_REF_SHIFT 0
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_REF_MASK 0x000000ff
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_FUNC_SHIFT 8
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_FUNC_MASK 0xffffff00
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR(x) (0x00001000+((x)*32))
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR__SIZE 0x00000040
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I0_SHIFT 0
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I0_MASK 0x0000000f
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I1_SHIFT 4
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I1_MASK 0x000000f0
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I2_SHIFT 8
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I2_MASK 0x00000f00
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I3_SHIFT 12
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I3_MASK 0x0000f000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I4_SHIFT 16
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I4_MASK 0x000f0000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I5_SHIFT 20
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I5_MASK 0x00f00000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_FOG_SHIFT 24
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_FOG_MASK 0xff000000
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_COLOR(x) (0x00001004+((x)*32))
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_COLOR__SIZE 0x00000040
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_X(x) (0x00001008+((x)*32))
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_X__SIZE 0x00000040
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_Y(x) (0x0000100c+((x)*32))
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_Y__SIZE 0x00000040
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_Z(x) (0x00001010+((x)*32))
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_Z__SIZE 0x00000040
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_M(x) (0x00001014+((x)*32))
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_M__SIZE 0x00000040
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_U(x) (0x00001018+((x)*32))
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_U__SIZE 0x00000040
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_V(x) (0x0000101c+((x)*32))
|
|
|
|
+#define NV03_DX3_TEXTURED_TRIANGLE_V__SIZE 0x00000040
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT 0x0000004a
|
|
|
|
+
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_NOP 0x00000100
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_NOTIFY 0x00000104
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_PATCH 0x0000010c
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_PM_TRIGGER 0x00000140
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_DMA_FONTS 0x00000184
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_PATTERN 0x00000188
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_ROP 0x0000018c
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_BETA1 0x00000190
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_BETA4 0x00000194
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+#define NV04_GDI_RECTANGLE_TEXT_SURFACE 0x00000198
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+#define NV04_GDI_RECTANGLE_TEXT_OPERATION 0x000002fc
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+#define NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY_AND 0x00000000
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+#define NV04_GDI_RECTANGLE_TEXT_OPERATION_ROP_AND 0x00000001
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+#define NV04_GDI_RECTANGLE_TEXT_OPERATION_BLEND_AND 0x00000002
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+#define NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY 0x00000003
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+#define NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY_PREMULT 0x00000004
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+#define NV04_GDI_RECTANGLE_TEXT_OPERATION_BLEND_PREMULT 0x00000005
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+#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT 0x00000300
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+#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5 0x00000001
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+#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_X16A1R5G5B5 0x00000002
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+#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8 0x00000003
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+#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT 0x00000304
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+#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_CGA6 0x00000001
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+#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE 0x00000002
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+#define NV04_GDI_RECTANGLE_TEXT_COLOR1_A 0x000003fc
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT(x) (0x00000400+((x)*8))
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT__SIZE 0x00000020
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_MASK 0xffff0000
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE(x) (0x00000404+((x)*8))
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE__SIZE 0x00000020
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_MASK 0xffff0000
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0 0x000005f4
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_L_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_L_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_T_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_T_MASK 0xffff0000
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1 0x000005f8
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_R_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_R_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_B_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_B_MASK 0xffff0000
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+#define NV04_GDI_RECTANGLE_TEXT_COLOR1_B 0x000005fc
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0(x) (0x00000600+((x)*8))
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0__SIZE 0x00000020
|
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_MASK 0xffff0000
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1(x) (0x00000604+((x)*8))
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1__SIZE 0x00000020
|
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_MASK 0xffff0000
|
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0 0x000007ec
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_MASK 0xffff0000
|
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1 0x000007f0
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_MASK 0xffff0000
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+#define NV04_GDI_RECTANGLE_TEXT_COLOR1_C 0x000007f4
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+#define NV04_GDI_RECTANGLE_TEXT_SIZE_C 0x000007f8
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+#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_W_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_W_MASK 0x0000ffff
|
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+#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_H_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_H_MASK 0xffff0000
|
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+#define NV04_GDI_RECTANGLE_TEXT_POINT_C 0x000007fc
|
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+#define NV04_GDI_RECTANGLE_TEXT_POINT_C_X_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_POINT_C_X_MASK 0x0000ffff
|
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+#define NV04_GDI_RECTANGLE_TEXT_POINT_C_Y_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_POINT_C_Y_MASK 0xffff0000
|
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|
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+#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C(x) (0x00000800+((x)*4))
|
|
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|
+#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C__SIZE 0x00000080
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0 0x00000be4
|
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_SHIFT 0
|
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_MASK 0x0000ffff
|
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_MASK 0xffff0000
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1 0x00000be8
|
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_SHIFT 16
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+#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_MASK 0xffff0000
|
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|
|
+#define NV04_GDI_RECTANGLE_TEXT_COLOR0_E 0x00000bec
|
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|
+#define NV04_GDI_RECTANGLE_TEXT_COLOR1_E 0x00000bf0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E 0x00000bf4
|
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|
+#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_SHIFT 0
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+#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_MASK 0x0000ffff
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+#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_SHIFT 16
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|
+#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_MASK 0xffff0000
|
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|
+#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E 0x00000bf8
|
|
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+#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_SHIFT 0
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|
+#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_MASK 0x0000ffff
|
|
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|
+#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_SHIFT 16
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_MASK 0xffff0000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_POINT_E 0x00000bfc
|
|
|
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+#define NV04_GDI_RECTANGLE_TEXT_POINT_E_X_SHIFT 0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_POINT_E_X_MASK 0x0000ffff
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_POINT_E_Y_SHIFT 16
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_POINT_E_Y_MASK 0xffff0000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E(x) (0x00000c00+((x)*4))
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E__SIZE 0x00000080
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_F 0x00000ff0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_F_OFFSET_SHIFT 0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_F_OFFSET_MASK 0x0fffffff
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_F_PITCH_SHIFT 28
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_F_PITCH_MASK 0xf0000000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0 0x00000ff4
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_L_SHIFT 0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_L_MASK 0x0000ffff
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_T_SHIFT 16
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_T_MASK 0xffff0000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1 0x00000ff8
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_R_SHIFT 0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_R_MASK 0x0000ffff
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_B_SHIFT 16
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_B_MASK 0xffff0000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_COLOR1_F 0x00000ffc
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F(x) (0x00001000+((x)*4))
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F__SIZE 0x00000100
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_INDEX_SHIFT 0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_INDEX_MASK 0x000000ff
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_X_SHIFT 8
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_X_MASK 0x000fff00
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_Y_SHIFT 20
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_Y_MASK 0xfff00000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_G 0x000017f0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_G_OFFSET_SHIFT 0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_G_OFFSET_MASK 0x0fffffff
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_G_PITCH_SHIFT 28
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_FONT_G_PITCH_MASK 0xf0000000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0 0x000017f4
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_L_SHIFT 0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_L_MASK 0x0000ffff
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_T_SHIFT 16
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_T_MASK 0xffff0000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1 0x000017f8
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_R_SHIFT 0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_R_MASK 0x0000ffff
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_B_SHIFT 16
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_B_MASK 0xffff0000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_COLOR1_G 0x000017fc
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT(x) (0x00001800+((x)*8))
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT__SIZE 0x00000100
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_X_SHIFT 0
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_Y_SHIFT 16
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_Y_MASK 0xffff0000
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_INDEX(x) (0x00001804+((x)*8))
|
|
|
|
+#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_INDEX__SIZE 0x00000100
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT 0x0000004b
|
|
|
|
+
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_NOP 0x00000100
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_NOTIFY 0x00000104
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_PATTERN 0x00000184
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_ROP 0x00000188
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_BETA1 0x0000018c
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SURFACE 0x00000190
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_OPERATION 0x000002fc
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT 0x00000304
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_COLOR1_A 0x000003fc
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT 0x00000400
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE 0x00000404
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B 0x000007f4
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_L_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_L_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_T_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_T_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B 0x000007f8
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_R_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_R_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_B_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_B_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_COLOR1_B 0x000007fc
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0 0x00000800
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1 0x00000804
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_MASK 0x0000ffff
|
|
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+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_SHIFT 16
|
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|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_MASK 0xffff0000
|
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+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0 0x00000bec
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+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_SHIFT 0
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+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_MASK 0x0000ffff
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+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_SHIFT 16
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|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_MASK 0xffff0000
|
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+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1 0x00000bf0
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+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_SHIFT 0
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+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_MASK 0x0000ffff
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+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_SHIFT 16
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|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_COLOR1_C 0x00000bf4
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|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_C 0x00000bf8
|
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+#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_W_SHIFT 0
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+#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_W_MASK 0x0000ffff
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+#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_H_SHIFT 16
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+#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_H_MASK 0xffff0000
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|
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+#define NV03_GDI_RECTANGLE_TEXT_POINT_C 0x00000bfc
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+#define NV03_GDI_RECTANGLE_TEXT_POINT_C_X_SHIFT 0
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+#define NV03_GDI_RECTANGLE_TEXT_POINT_C_X_MASK 0x0000ffff
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+#define NV03_GDI_RECTANGLE_TEXT_POINT_C_Y_SHIFT 16
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+#define NV03_GDI_RECTANGLE_TEXT_POINT_C_Y_MASK 0xffff0000
|
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|
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+#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C(x) (0x00000c00+((x)*4))
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C__SIZE 0x00000020
|
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|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0 0x00000fe8
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_L_SHIFT 0
|
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|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_L_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_T_SHIFT 16
|
|
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|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_T_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1 0x00000fec
|
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|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_R_SHIFT 0
|
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|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_R_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_B_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_B_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_COLOR1_D 0x00000ff0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D 0x00000ff4
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_W_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_H_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_H_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D 0x00000ff8
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_W_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_H_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_H_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_D 0x00000ffc
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_D_X_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_D_X_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_D_Y_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_D_Y_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_D(x) (0x00001000+((x)*4))
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_D__SIZE 0x00000020
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0 0x000013e4
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1 0x000013e8
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_COLOR0_E 0x000013ec
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_COLOR1_E 0x000013f0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E 0x000013f4
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E 0x000013f8
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_E 0x000013fc
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_E_X_SHIFT 0
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_E_X_MASK 0x0000ffff
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_E_Y_SHIFT 16
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_POINT_E_Y_MASK 0xffff0000
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E(x) (0x00001400+((x)*4))
|
|
|
|
+#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E__SIZE 0x00000020
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_SWIZZLED_SURFACE 0x00000052
|
|
|
|
+
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_NOP 0x00000100
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_NOTIFY 0x00000104
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_DMA_IMAGE 0x00000184
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT 0x00000300
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_SHIFT 0
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_MASK 0x000000ff
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y8 0x00000001
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1R5G5B5_Z1R5G5B5 0x00000002
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1R5G5B5_X1R5G5B5 0x00000003
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_R5G6B5 0x00000004
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y16 0x00000005
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X8R8G8B8_Z8R8G8B8 0x00000006
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X8R8G8B8_X8R8G8B8 0x00000007
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1A7R8G8B8_Z1A7R8G8B8 0x00000008
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1A7R8G8B8_X1A7R8G8B8 0x00000009
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_A8R8G8B8 0x0000000a
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y32 0x0000000b
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT 16
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_MASK 0x00ff0000
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT 24
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_MASK 0xff000000
|
|
|
|
+#define NV04_SWIZZLED_SURFACE_OFFSET 0x00000304
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D 0x00000053
|
|
|
|
+
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_NOP 0x00000100
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_NOTIFY 0x00000104
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_DMA_COLOR 0x00000184
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_DMA_ZETA 0x00000188
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL 0x000002f8
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_X_SHIFT 0
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_X_MASK 0x0000ffff
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_W_SHIFT 16
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_W_MASK 0xffff0000
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL 0x000002fc
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_Y_SHIFT 0
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_Y_MASK 0x0000ffff
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_H_SHIFT 16
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_H_MASK 0xffff0000
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT 0x00000300
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_SHIFT 0
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_MASK 0x000000ff
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1R5G5B5_Z1R5G5B5 0x00000001
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1R5G5B5_X1R5G5B5 0x00000002
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_R5G6B5 0x00000003
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X8R8G8B8_Z8R8G8B8 0x00000004
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X8R8G8B8_X8R8G8B8 0x00000005
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1A7R8G8B8_Z1A7R8G8B8 0x00000006
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1A7R8G8B8_X1A7R8G8B8 0x00000007
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_A8R8G8B8 0x00000008
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_SHIFT 8
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_MASK 0x0000ff00
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_PITCH 0x00000100
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_SWIZZLE 0x00000200
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_U_SHIFT 16
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_U_MASK 0x00ff0000
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_V_SHIFT 24
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_V_MASK 0xff000000
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE 0x00000304
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_W_SHIFT 0
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_H_SHIFT 16
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_PITCH 0x00000308
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_PITCH_COLOR_SHIFT 0
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_PITCH_COLOR_MASK 0x0000ffff
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_PITCH_ZETA_SHIFT 16
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_PITCH_ZETA_MASK 0xffff0000
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_OFFSET_COLOR 0x0000030c
|
|
|
|
+#define NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA 0x00000310
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE 0x00000054
|
|
|
|
+
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_NOP 0x00000100
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_NOTIFY 0x00000104
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_DMA_A 0x00000184
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_DMA_B 0x00000188
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_SURFACE 0x0000018c
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_COLORKEY 0x00000300
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_OFFSET 0x00000304
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT 0x00000308
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_DMA_SHIFT 0
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_DMA_MASK 0x00000003
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_KEY_MATCH_SHIFT 2
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_KEY_MATCH_MASK 0x0000000c
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_SHIFT 4
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_MASK 0x00000030
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_CENTER 0x00000010
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_CORNER 0x00000020
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_SHIFT 6
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_MASK 0x000000c0
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_CENTER 0x00000040
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_CORNER 0x00000080
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_SHIFT 8
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_MASK 0x00000f00
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_Y8 0x00000100
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_A1R5G5B5 0x00000200
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_X1R5G5B5 0x00000300
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_A4R4G4B4 0x00000400
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_R5G6B5 0x00000500
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_A8R8G8B8 0x00000600
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_X8R8G8B8 0x00000700
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_MIPMAP_LEVELS_SHIFT 12
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_MIPMAP_LEVELS_MASK 0x0000f000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT 16
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_MASK 0x000f0000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT 20
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_MASK 0x00f00000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_SHIFT 24
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_MASK 0x07000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_REPEAT 0x01000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_MIRRORED_REPEAT 0x02000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP_TO_EDGE 0x03000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP_TO_BORDER 0x04000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP 0x05000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_WRAPU (1 << 27)
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_SHIFT 28
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_MASK 0x70000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_REPEAT 0x10000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_MIRRORED_REPEAT 0x20000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP_TO_EDGE 0x30000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP_TO_BORDER 0x40000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP 0x50000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_WRAPV (1 << 31)
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER 0x0000030c
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_X_SHIFT 0
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_X_MASK 0x000000ff
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_Y_SHIFT 8
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_Y_MASK 0x00007f00
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MIPMAP_DITHER_ENABLE (1 << 15)
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MIPMAP_LODBIAS_SHIFT 16
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MIPMAP_LODBIAS_MASK 0x00ff0000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_SHIFT 24
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_MASK 0x07000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST 0x01000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR 0x02000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x03000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x04000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x05000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x06000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_ANISOTROPIC_MINIFY_ENABLE (1 << 27)
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_SHIFT 28
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_MASK 0x70000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_NEAREST 0x10000000
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_LINEAR 0x20000000
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+#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_ANISOTROPIC_MAGNIFY_ENABLE (1 << 31)
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+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND 0x00000310
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_MAP_SHIFT 0
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+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_MAP_MASK 0x0000000f
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+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_MASK_BIT_SHIFT 4
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+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_MASK_BIT_MASK 0x00000030
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+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_SHIFT 6
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+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_MASK 0x000000c0
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_FLAT 0x00000040
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_GOURAUD 0x00000080
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_PHONG 0x000000c0
|
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_SHIFT 8
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_MASK 0x00000f00
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT 12
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK 0x0000f000
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE_SHIFT 16
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE_MASK 0x000f0000
|
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_ALPHA_ENABLE_SHIFT 20
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_ALPHA_ENABLE_MASK 0x00f00000
|
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SRC_SHIFT 24
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|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SRC_MASK 0x0f000000
|
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_DST_SHIFT 28
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|
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_DST_MASK 0xf0000000
|
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|
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+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL 0x00000314
|
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+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_REF_SHIFT 0
|
|
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_REF_MASK 0x000000ff
|
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_FUNC_SHIFT 8
|
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_FUNC_MASK 0x00000f00
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_TEST_ENABLE (1 << 12)
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ORIGIN (1 << 13)
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_ENABLE_SHIFT 14
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|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_ENABLE_MASK 0x0000c000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FUNC_SHIFT 16
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FUNC_MASK 0x000f0000
|
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_SHIFT 20
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_MASK 0x00300000
|
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|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_DITHER_ENABLE (1 << 22)
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|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_PERSPECTIVE_ENABLE (1 << 23)
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_WRITE_ENABLE_SHIFT 24
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_WRITE_ENABLE_MASK 0x3f000000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FORMAT_SHIFT 30
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FORMAT_MASK 0xc0000000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR 0x00000318
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_B_SHIFT 0
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_G_SHIFT 8
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_R_SHIFT 16
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_A_SHIFT 24
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_A_MASK 0xff000000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(x) (0x00000400+((x)*32))
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX__SIZE 0x00000010
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SY(x) (0x00000404+((x)*32))
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SY__SIZE 0x00000010
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SZ(x) (0x00000408+((x)*32))
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SZ__SIZE 0x00000010
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_RHW(x) (0x0000040c+((x)*32))
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_RHW__SIZE 0x00000010
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR(x) (0x00000410+((x)*32))
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR__SIZE 0x00000010
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_B_SHIFT 0
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_G_SHIFT 8
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_R_SHIFT 16
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_A_SHIFT 24
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR(x) (0x00000414+((x)*32))
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR__SIZE 0x00000010
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_B_SHIFT 0
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_B_MASK 0x000000ff
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_G_SHIFT 8
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_G_MASK 0x0000ff00
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_R_SHIFT 16
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_R_MASK 0x00ff0000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_SHIFT 24
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_MASK 0xff000000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TU(x) (0x00000418+((x)*32))
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TU__SIZE 0x00000010
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TV(x) (0x0000041c+((x)*32))
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TV__SIZE 0x00000010
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE(x) (0x00000600+((x)*4))
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE__SIZE 0x00000040
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I0_SHIFT 0
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I0_MASK 0x0000000f
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I1_SHIFT 4
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I1_MASK 0x000000f0
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I2_SHIFT 8
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I2_MASK 0x00000f00
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I3_SHIFT 12
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I3_MASK 0x0000f000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I4_SHIFT 16
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I4_MASK 0x000f0000
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I5_SHIFT 20
|
|
|
|
+#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I5_MASK 0x00f00000
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE 0x00000055
|
|
|
|
+
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_NOP 0x00000100
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_NOTIFY 0x00000104
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_DMA_A 0x00000184
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_DMA_B 0x00000188
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_SURFACE 0x0000018c
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_OFFSET(x) (0x00000308+((x)*4))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_OFFSET__SIZE 0x00000002
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT(x) (0x00000310+((x)*4))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT__SIZE 0x00000002
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_DMA_SHIFT 0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_DMA_MASK 0x0000000f
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_ZOH_SHIFT 4
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_ZOH_MASK 0x00000030
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_FOH_SHIFT 6
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_FOH_MASK 0x000000c0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_COLOR_SHIFT 8
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_COLOR_MASK 0x00000f00
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_MIPMAP_LEVELS_SHIFT 12
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_MIPMAP_LEVELS_MASK 0x0000f000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT 16
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_U_MASK 0x000f0000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT 20
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_V_MASK 0x00f00000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSU_SHIFT 24
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSU_MASK 0x07000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_WRAPU (1 << 27)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSV_SHIFT 28
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSV_MASK 0x70000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_WRAPV (1 << 31)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER(x) (0x00000318+((x)*4))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER__SIZE 0x00000002
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_X_SHIFT 0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_X_MASK 0x000000ff
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_Y_SHIFT 8
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_Y_MASK 0x00007f00
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MIPMAP_DITHER_ENABLE (1 << 15)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MIPMAP_LODBIAS_SHIFT 16
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MIPMAP_LODBIAS_MASK 0x00ff0000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MINIFY_SHIFT 24
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MINIFY_MASK 0x07000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_ANISOTROPIC_MINIFY_ENABLE (1 << 27)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MAGNIFY_SHIFT 28
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MAGNIFY_MASK 0x70000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_ANISOTROPIC_MAGNIFY_ENABLE (1 << 31)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA 0x00000320
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE0 (1 << 0)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA0 (1 << 1)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT0_SHIFT 2
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT0_MASK 0x000000fc
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE1 (1 << 8)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA1 (1 << 9)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT1_SHIFT 10
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT1_MASK 0x0000fc00
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE2 (1 << 16)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA2 (1 << 17)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT2_SHIFT 18
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT2_MASK 0x00fc0000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE3 (1 << 24)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA3 (1 << 25)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT3_SHIFT 26
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT3_MASK 0x1c000000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_OPERATION_SHIFT 29
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_OPERATION_MASK 0xe0000000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR 0x00000324
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE0 (1 << 0)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA0 (1 << 1)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT0_SHIFT 2
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT0_MASK 0x000000fc
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE1 (1 << 8)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA1 (1 << 9)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT1_SHIFT 10
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT1_MASK 0x0000fc00
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE2 (1 << 16)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA2 (1 << 17)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT2_SHIFT 18
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT2_MASK 0x00fc0000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE3 (1 << 24)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA3 (1 << 25)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT3_SHIFT 26
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT3_MASK 0x1c000000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_OPERATION_SHIFT 29
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_OPERATION_MASK 0xe0000000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA 0x0000032c
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE0 (1 << 0)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA0 (1 << 1)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT0_SHIFT 2
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT0_MASK 0x000000fc
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE1 (1 << 8)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA1 (1 << 9)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT1_SHIFT 10
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT1_MASK 0x0000fc00
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE2 (1 << 16)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA2 (1 << 17)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT2_SHIFT 18
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT2_MASK 0x00fc0000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE3 (1 << 24)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA3 (1 << 25)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT3_SHIFT 26
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT3_MASK 0x1c000000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_OPERATION_SHIFT 29
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_OPERATION_MASK 0xe0000000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR 0x00000330
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE0 (1 << 0)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA0 (1 << 1)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT0_SHIFT 2
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT0_MASK 0x000000fc
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE1 (1 << 8)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA1 (1 << 9)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT1_SHIFT 10
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT1_MASK 0x0000fc00
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE2 (1 << 16)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA2 (1 << 17)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT2_SHIFT 18
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT2_MASK 0x00fc0000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE3 (1 << 24)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA3 (1 << 25)
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT3_SHIFT 26
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT3_MASK 0x1c000000
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|
+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_OPERATION_SHIFT 29
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_OPERATION_MASK 0xe0000000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR 0x00000334
|
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_B_SHIFT 0
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_B_MASK 0x000000ff
|
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_G_SHIFT 8
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_G_MASK 0x0000ff00
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_R_SHIFT 16
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_R_MASK 0x00ff0000
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_A_SHIFT 24
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+#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_A_MASK 0xff000000
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|
|
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+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND 0x00000338
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|
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|
+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_MASK_BIT_SHIFT 4
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+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_MASK_BIT_MASK 0x00000030
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+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_SHIFT 6
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+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_MASK 0x000000c0
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|
+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_SHIFT 8
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+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_MASK 0x00000f00
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|
+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT 12
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+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK 0x0000f000
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|
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+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE_SHIFT 16
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|
+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE_MASK 0x000f0000
|
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|
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+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_ALPHA_ENABLE_SHIFT 20
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|
+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_ALPHA_ENABLE_MASK 0x00f00000
|
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|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SRC_SHIFT 24
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|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SRC_MASK 0x0f000000
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|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_DST_SHIFT 28
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|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_DST_MASK 0xf0000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0 0x0000033c
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_REF_SHIFT 0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_REF_MASK 0x000000ff
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_FUNC_SHIFT 8
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_FUNC_MASK 0x00000f00
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_TEST_ENABLE (1 << 12)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ORIGIN (1 << 13)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_ENABLE_SHIFT 14
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|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_ENABLE_MASK 0x0000c000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FUNC_SHIFT 16
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|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FUNC_MASK 0x000f0000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_SHIFT 20
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_MASK 0x00300000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_DITHER_ENABLE (1 << 22)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_PERSPECTIVE_ENABLE (1 << 23)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_WRITE_ENABLE (1 << 24)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_STENCIL_WRITE_ENABLE (1 << 25)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_WRITE_ENABLE (1 << 26)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_RED_WRITE_ENABLE (1 << 27)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_GREEN_WRITE_ENABLE (1 << 28)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_BLUE_WRITE_ENABLE (1 << 29)
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FORMAT_SHIFT 30
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FORMAT_MASK 0xc0000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1 0x00000340
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_TEST_ENABLE_SHIFT 0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_TEST_ENABLE_MASK 0x0000000f
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_FUNC_SHIFT 4
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_FUNC_MASK 0x000000f0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_REF_SHIFT 8
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_REF_MASK 0x0000ff00
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_READ_SHIFT 16
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_READ_MASK 0x00ff0000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_WRITE_SHIFT 24
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_WRITE_MASK 0xff000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2 0x00000344
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_FAIL_SHIFT 0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_FAIL_MASK 0x0000000f
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZFAIL_SHIFT 4
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZFAIL_MASK 0x000000f0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZPASS_SHIFT 8
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZPASS_MASK 0x00000f00
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR 0x00000348
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_B_SHIFT 0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_G_SHIFT 8
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_R_SHIFT 16
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_A_SHIFT 24
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_A_MASK 0xff000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SX(x) (0x00000400+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SX__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SY(x) (0x00000404+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SY__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SZ(x) (0x00000408+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SZ__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_RHW(x) (0x0000040c+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_RHW__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR(x) (0x00000410+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_B_SHIFT 0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_G_SHIFT 8
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_R_SHIFT 16
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_A_SHIFT 24
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR(x) (0x00000414+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_B_SHIFT 0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_B_MASK 0x000000ff
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_G_SHIFT 8
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_G_MASK 0x0000ff00
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_R_SHIFT 16
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_R_MASK 0x00ff0000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_FOG_SHIFT 24
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_FOG_MASK 0xff000000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU0(x) (0x00000418+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU0__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV0(x) (0x0000041c+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV0__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU1(x) (0x00000420+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU1__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV1(x) (0x00000424+((x)*40))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV1__SIZE 0x00000008
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE(x) (0x00000540+((x)*4))
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE__SIZE 0x00000030
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I0_SHIFT 0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I0_MASK 0x0000000f
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I1_SHIFT 4
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I1_MASK 0x000000f0
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I2_SHIFT 8
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I2_MASK 0x00000f00
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I3_SHIFT 12
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I3_MASK 0x0000f000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I4_SHIFT 16
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I4_MASK 0x000f0000
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I5_SHIFT 20
|
|
|
|
+#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I5_MASK 0x00f00000
|
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|
|
+
|
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+
|
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|
|
+#define NV10_DX5_TEXTURED_TRIANGLE 0x00000094
|
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|
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+
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|
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+
|
|
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|
+
|
|
|
|
+#define NV10TCL 0x00000056
|
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|
|
+
|
|
|
|
+#define NV10TCL_NOP 0x00000100
|
|
|
|
+#define NV10TCL_NOTIFY 0x00000104
|
|
|
|
+#define NV10TCL_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV10TCL_DMA_IN_MEMORY0 0x00000184
|
|
|
|
+#define NV10TCL_DMA_IN_MEMORY1 0x00000188
|
|
|
|
+#define NV10TCL_DMA_VTXBUF0 0x0000018c
|
|
|
|
+#define NV10TCL_DMA_IN_MEMORY2 0x00000194
|
|
|
|
+#define NV10TCL_DMA_IN_MEMORY3 0x00000198
|
|
|
|
+#define NV10TCL_RT_HORIZ 0x00000200
|
|
|
|
+#define NV10TCL_RT_HORIZ_X_SHIFT 0
|
|
|
|
+#define NV10TCL_RT_HORIZ_X_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_RT_HORIZ_W_SHIFT 16
|
|
|
|
+#define NV10TCL_RT_HORIZ_W_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_RT_VERT 0x00000204
|
|
|
|
+#define NV10TCL_RT_VERT_Y_SHIFT 0
|
|
|
|
+#define NV10TCL_RT_VERT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_RT_VERT_H_SHIFT 16
|
|
|
|
+#define NV10TCL_RT_VERT_H_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_RT_FORMAT 0x00000208
|
|
|
|
+#define NV10TCL_RT_FORMAT_TYPE_SHIFT 8
|
|
|
|
+#define NV10TCL_RT_FORMAT_TYPE_MASK 0x00000f00
|
|
|
|
+#define NV10TCL_RT_FORMAT_TYPE_LINEAR 0x00000100
|
|
|
|
+#define NV10TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200
|
|
|
|
+#define NV10TCL_RT_FORMAT_COLOR_SHIFT 0
|
|
|
|
+#define NV10TCL_RT_FORMAT_COLOR_MASK 0x0000001f
|
|
|
|
+#define NV10TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003
|
|
|
|
+#define NV10TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005
|
|
|
|
+#define NV10TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008
|
|
|
|
+#define NV10TCL_RT_FORMAT_COLOR_B8 0x00000009
|
|
|
|
+#define NV10TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d
|
|
|
|
+#define NV10TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f
|
|
|
|
+#define NV10TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010
|
|
|
|
+#define NV10TCL_RT_PITCH 0x0000020c
|
|
|
|
+#define NV10TCL_RT_PITCH_COLOR_PITCH_SHIFT 0
|
|
|
|
+#define NV10TCL_RT_PITCH_COLOR_PITCH_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_RT_PITCH_ZETA_PITCH_SHIFT 16
|
|
|
|
+#define NV10TCL_RT_PITCH_ZETA_PITCH_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_COLOR_OFFSET 0x00000210
|
|
|
|
+#define NV10TCL_ZETA_OFFSET 0x00000214
|
|
|
|
+#define NV10TCL_TX_OFFSET(x) (0x00000218+((x)*4))
|
|
|
|
+#define NV10TCL_TX_OFFSET__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_FORMAT(x) (0x00000220+((x)*4))
|
|
|
|
+#define NV10TCL_TX_FORMAT__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_FORMAT_DMA0 (1 << 0)
|
|
|
|
+#define NV10TCL_TX_FORMAT_DMA1 (1 << 1)
|
|
|
|
+#define NV10TCL_TX_FORMAT_CUBE_MAP (1 << 2)
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_SHIFT 7
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_MASK 0x00000780
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_L8 0x00000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A8 0x00000080
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000100
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000180
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000200
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000280
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000300
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000380
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_INDEX8 0x00000580
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_DXT1 0x00000600
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_DXT3 0x00000700
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_DXT5 0x00000780
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00000800
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00000880
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00000900
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_L8_RECT 0x00000980
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A8L8 0x00000d00
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00000d80
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00000e80
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00000f00
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00001000
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_DSDT 0x00001400
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A16 0x00001900
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_HILO16 0x00001980
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_A16_RECT 0x00001a80
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00001b00
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_HILO8 0x00002200
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00002280
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00002300
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00002380
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00002500
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00002580
|
|
|
|
+#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00002600
|
|
|
|
+#define NV10TCL_TX_FORMAT_NPOT (1 << 11)
|
|
|
|
+#define NV10TCL_TX_FORMAT_MIPMAP (1 << 15)
|
|
|
|
+#define NV10TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 16
|
|
|
|
+#define NV10TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x000f0000
|
|
|
|
+#define NV10TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 20
|
|
|
|
+#define NV10TCL_TX_FORMAT_BASE_SIZE_V_MASK 0x00f00000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_S_SHIFT 24
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_S_MASK 0x0f000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_S_REPEAT 0x01000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_S_MIRRORED_REPEAT 0x02000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_EDGE 0x03000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_BORDER 0x04000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_S_CLAMP 0x05000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_T_SHIFT 28
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_T_MASK 0xf0000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_T_REPEAT 0x10000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_T_MIRRORED_REPEAT 0x20000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_T_CLAMP_TO_EDGE 0x30000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_T_CLAMP_TO_BORDER 0x40000000
|
|
|
|
+#define NV10TCL_TX_FORMAT_WRAP_T_CLAMP 0x50000000
|
|
|
|
+#define NV10TCL_TX_ENABLE(x) (0x00000228+((x)*4))
|
|
|
|
+#define NV10TCL_TX_ENABLE__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_ENABLE_ANISOTROPY_SHIFT 4
|
|
|
|
+#define NV10TCL_TX_ENABLE_ANISOTROPY_MASK 0x00000030
|
|
|
|
+#define NV10TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14
|
|
|
|
+#define NV10TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000
|
|
|
|
+#define NV10TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26
|
|
|
|
+#define NV10TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000
|
|
|
|
+#define NV10TCL_TX_ENABLE_ENABLE (1 << 30)
|
|
|
|
+#define NV10TCL_TX_NPOT_PITCH(x) (0x00000230+((x)*4))
|
|
|
|
+#define NV10TCL_TX_NPOT_PITCH__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_NPOT_PITCH_PITCH_SHIFT 16
|
|
|
|
+#define NV10TCL_TX_NPOT_PITCH_PITCH_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_TX_NPOT_SIZE(x) (0x00000240+((x)*4))
|
|
|
|
+#define NV10TCL_TX_NPOT_SIZE__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_NPOT_SIZE_H_SHIFT 0
|
|
|
|
+#define NV10TCL_TX_NPOT_SIZE_H_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_TX_NPOT_SIZE_W_SHIFT 16
|
|
|
|
+#define NV10TCL_TX_NPOT_SIZE_W_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_TX_FILTER(x) (0x00000248+((x)*4))
|
|
|
|
+#define NV10TCL_TX_FILTER__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_FILTER_LOD_BIAS_SHIFT 8
|
|
|
|
+#define NV10TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00
|
|
|
|
+#define NV10TCL_TX_FILTER_MINIFY_SHIFT 24
|
|
|
|
+#define NV10TCL_TX_FILTER_MINIFY_MASK 0x0f000000
|
|
|
|
+#define NV10TCL_TX_FILTER_MINIFY_NEAREST 0x01000000
|
|
|
|
+#define NV10TCL_TX_FILTER_MINIFY_LINEAR 0x02000000
|
|
|
|
+#define NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x03000000
|
|
|
|
+#define NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x04000000
|
|
|
|
+#define NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x05000000
|
|
|
|
+#define NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x06000000
|
|
|
|
+#define NV10TCL_TX_FILTER_MAGNIFY_SHIFT 28
|
|
|
|
+#define NV10TCL_TX_FILTER_MAGNIFY_MASK 0xf0000000
|
|
|
|
+#define NV10TCL_TX_FILTER_MAGNIFY_NEAREST 0x10000000
|
|
|
|
+#define NV10TCL_TX_FILTER_MAGNIFY_LINEAR 0x20000000
|
|
|
|
+#define NV10TCL_TX_PALETTE_OFFSET(x) (0x00000250+((x)*4))
|
|
|
|
+#define NV10TCL_TX_PALETTE_OFFSET__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA(x) (0x00000260+((x)*4))
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_SHIFT 0
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_FOG 0x00000003
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE (1 << 4)
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA 0x00000010
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_SHIFT 5
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_MASK 0x000000e0
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL_NV 0x00000040
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE_NV 0x00000060
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_SHIFT 8
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_FOG 0x00000300
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_SHIFT 13
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_SHIFT 16
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_FOG 0x00030000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1_ARB 0x00090000
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|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_SHIFT 21
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_SHIFT 24
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_FOG 0x03000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_SHIFT 29
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL_NV 0x40000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV10TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB(x) (0x00000268+((x)*4))
|
|
|
|
+#define NV10TCL_RC_IN_RGB__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_SHIFT 0
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_FOG 0x00000003
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_INPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE (1 << 4)
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA 0x00000010
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_SHIFT 5
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_MASK 0x000000e0
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL_NV 0x00000040
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE_NV 0x00000060
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0
|
|
|
|
+#define NV10TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_SHIFT 8
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_FOG 0x00000300
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_SHIFT 13
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_SHIFT 16
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_FOG 0x00030000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE1_ARB 0x00090000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_SHIFT 21
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_SHIFT 24
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_FOG 0x03000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_SHIFT 29
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL_NV 0x40000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV10TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000
|
|
|
|
+#define NV10TCL_RC_COLOR(x) (0x00000270+((x)*4))
|
|
|
|
+#define NV10TCL_RC_COLOR__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_RC_COLOR_B_SHIFT 0
|
|
|
|
+#define NV10TCL_RC_COLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV10TCL_RC_COLOR_G_SHIFT 8
|
|
|
|
+#define NV10TCL_RC_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_RC_COLOR_R_SHIFT 16
|
|
|
|
+#define NV10TCL_RC_COLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV10TCL_RC_COLOR_A_SHIFT 24
|
|
|
|
+#define NV10TCL_RC_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA(x) (0x00000278+((x)*4))
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT 0
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG 0x00000003
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT 4
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG 0x00000030
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0_ARB 0x00000080
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1_ARB 0x00000090
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_NV 0x000000c0
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1_NV 0x000000d0
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F_NV 0x000000f0
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT 8
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK 0x00000f00
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG 0x00000300
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT (1 << 12)
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT (1 << 13)
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_MUX_SUM (1 << 14)
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_BIAS (1 << 15)
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_BIAS_NONE 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SCALE_SHIFT 17
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SCALE_MASK 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SCALE_NONE 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO_NV 0x00020000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR_NV 0x00040000
|
|
|
|
+#define NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB(x) (0x00000280+((x)*4))
|
|
|
|
+#define NV10TCL_RC_OUT_RGB__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT 0
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_FOG 0x00000003
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT 4
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_FOG 0x00000030
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0_ARB 0x00000080
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1_ARB 0x00000090
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_NV 0x000000c0
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1_NV 0x000000d0
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F_NV 0x000000f0
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT 8
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_MASK 0x00000f00
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_FOG 0x00000300
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_CD_DOT_PRODUCT (1 << 12)
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_AB_DOT_PRODUCT (1 << 13)
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_MUX_SUM (1 << 14)
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_BIAS (1 << 15)
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_BIAS_NONE 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SCALE_SHIFT 17
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SCALE_MASK 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SCALE_NONE 0x00000000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO_NV 0x00020000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR_NV 0x00040000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_OPERATION_SHIFT 27
|
|
|
|
+#define NV10TCL_RC_OUT_RGB_OPERATION_MASK 0x38000000
|
|
|
|
+#define NV10TCL_RC_FINAL0 0x00000288
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_SHIFT 0
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_FOG 0x00000003
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_INPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_COMPONENT_USAGE (1 << 4)
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA 0x00000010
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_SHIFT 5
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_MASK 0x000000e0
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL_NV 0x00000040
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE_NV 0x00000060
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0
|
|
|
|
+#define NV10TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_SHIFT 8
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_FOG 0x00000300
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_SHIFT 13
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV10TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_SHIFT 16
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_FOG 0x00030000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_TEXTURE1_ARB 0x00090000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_SHIFT 21
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV10TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_SHIFT 24
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_FOG 0x03000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_SHIFT 29
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL_NV 0x40000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV10TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000
|
|
|
|
+#define NV10TCL_RC_FINAL1 0x0000028c
|
|
|
|
+#define NV10TCL_RC_FINAL1_COLOR_SUM_CLAMP (1 << 7)
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_SHIFT 8
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_FOG 0x00000300
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_SHIFT 13
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV10TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_SHIFT 16
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_FOG 0x00030000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_TEXTURE1_ARB 0x00090000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_SHIFT 21
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV10TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_SHIFT 24
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_FOG 0x03000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_SHIFT 29
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL_NV 0x40000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE_NV 0xe0000000
|
|
|
|
+#define NV10TCL_LIGHT_MODEL 0x00000294
|
|
|
|
+#define NV10TCL_LIGHT_MODEL_COLOR_CONTROL (1 << 1)
|
|
|
|
+#define NV10TCL_LIGHT_MODEL_LOCAL_VIEWER (1 << 16)
|
|
|
|
+#define NV10TCL_COLOR_MATERIAL_ENABLE 0x00000298
|
|
|
|
+#define NV10TCL_COLOR_MATERIAL_ENABLE_SPECULAR (1 << 0)
|
|
|
|
+#define NV10TCL_COLOR_MATERIAL_ENABLE_DIFFUSE (1 << 1)
|
|
|
|
+#define NV10TCL_COLOR_MATERIAL_ENABLE_AMBIENT (1 << 2)
|
|
|
|
+#define NV10TCL_COLOR_MATERIAL_ENABLE_EMISSION (1 << 3)
|
|
|
|
+#define NV10TCL_FOG_MODE 0x0000029c
|
|
|
|
+#define NV10TCL_FOG_MODE_EXP 0x00000800
|
|
|
|
+#define NV10TCL_FOG_MODE_EXP_2 0x00000802
|
|
|
|
+#define NV10TCL_FOG_MODE_EXP2 0x00000803
|
|
|
|
+#define NV10TCL_FOG_MODE_LINEAR 0x00000804
|
|
|
|
+#define NV10TCL_FOG_MODE_LINEAR_2 0x00002601
|
|
|
|
+#define NV10TCL_FOG_COORD_DIST 0x000002a0
|
|
|
|
+#define NV10TCL_FOG_COORD_DIST_COORD_FALSE 0x00000000
|
|
|
|
+#define NV10TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_RADIAL_NV 0x00000001
|
|
|
|
+#define NV10TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_PLANE_ABSOLUTE_NV 0x00000002
|
|
|
|
+#define NV10TCL_FOG_COORD_DIST_COORD_FOG 0x00000003
|
|
|
|
+#define NV10TCL_FOG_ENABLE 0x000002a4
|
|
|
|
+#define NV10TCL_FOG_COLOR 0x000002a8
|
|
|
|
+#define NV10TCL_FOG_COLOR_R_SHIFT 0
|
|
|
|
+#define NV10TCL_FOG_COLOR_R_MASK 0x000000ff
|
|
|
|
+#define NV10TCL_FOG_COLOR_G_SHIFT 8
|
|
|
|
+#define NV10TCL_FOG_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_FOG_COLOR_B_SHIFT 16
|
|
|
|
+#define NV10TCL_FOG_COLOR_B_MASK 0x00ff0000
|
|
|
|
+#define NV10TCL_FOG_COLOR_A_SHIFT 24
|
|
|
|
+#define NV10TCL_FOG_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_MODE 0x000002b4
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*4))
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_L_SHIFT 0
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_L_MASK 0x000007ff
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_LEFT_ENABLE (1 << 11)
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_R_SHIFT 16
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_R_MASK 0x07ff0000
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_RIGHT_ENABLE (1 << 27)
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_VERT(x) (0x000002e0+((x)*4))
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_T_SHIFT 0
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_T_MASK 0x000007ff
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_TOP_ENABLE (1 << 11)
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_B_SHIFT 16
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_B_MASK 0x07ff0000
|
|
|
|
+#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_BOTTOM_ENABLE (1 << 27)
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_ENABLE 0x00000300
|
|
|
|
+#define NV10TCL_BLEND_FUNC_ENABLE 0x00000304
|
|
|
|
+#define NV10TCL_CULL_FACE_ENABLE 0x00000308
|
|
|
|
+#define NV10TCL_DEPTH_TEST_ENABLE 0x0000030c
|
|
|
|
+#define NV10TCL_DITHER_ENABLE 0x00000310
|
|
|
|
+#define NV10TCL_LIGHTING_ENABLE 0x00000314
|
|
|
|
+#define NV10TCL_POINT_PARAMETERS_ENABLE 0x00000318
|
|
|
|
+#define NV10TCL_POINT_SMOOTH_ENABLE 0x0000031c
|
|
|
|
+#define NV10TCL_LINE_SMOOTH_ENABLE 0x00000320
|
|
|
|
+#define NV10TCL_POLYGON_SMOOTH_ENABLE 0x00000324
|
|
|
|
+#define NV10TCL_VERTEX_WEIGHT_ENABLE 0x00000328
|
|
|
|
+#define NV10TCL_STENCIL_ENABLE 0x0000032c
|
|
|
|
+#define NV10TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000330
|
|
|
|
+#define NV10TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000334
|
|
|
|
+#define NV10TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000338
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC 0x0000033c
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV10TCL_ALPHA_FUNC_REF 0x00000340
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC 0x00000344
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_ONE 0x00000001
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_SRC_COLOR 0x00000300
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_DST_ALPHA 0x00000304
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_DST_COLOR 0x00000306
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST 0x00000348
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_ONE 0x00000001
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_SRC_COLOR 0x00000300
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_DST_ALPHA 0x00000304
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_DST_COLOR 0x00000306
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV10TCL_BLEND_COLOR 0x0000034c
|
|
|
|
+#define NV10TCL_BLEND_COLOR_B_SHIFT 0
|
|
|
|
+#define NV10TCL_BLEND_COLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV10TCL_BLEND_COLOR_G_SHIFT 8
|
|
|
|
+#define NV10TCL_BLEND_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_BLEND_COLOR_R_SHIFT 16
|
|
|
|
+#define NV10TCL_BLEND_COLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV10TCL_BLEND_COLOR_A_SHIFT 24
|
|
|
|
+#define NV10TCL_BLEND_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV10TCL_BLEND_EQUATION 0x00000350
|
|
|
|
+#define NV10TCL_BLEND_EQUATION_FUNC_ADD 0x00008006
|
|
|
|
+#define NV10TCL_BLEND_EQUATION_MIN 0x00008007
|
|
|
|
+#define NV10TCL_BLEND_EQUATION_MAX 0x00008008
|
|
|
|
+#define NV10TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a
|
|
|
|
+#define NV10TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b
|
|
|
|
+#define NV10TCL_DEPTH_FUNC 0x00000354
|
|
|
|
+#define NV10TCL_DEPTH_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV10TCL_DEPTH_FUNC_LESS 0x00000201
|
|
|
|
+#define NV10TCL_DEPTH_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV10TCL_DEPTH_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV10TCL_DEPTH_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV10TCL_DEPTH_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV10TCL_DEPTH_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV10TCL_DEPTH_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV10TCL_DEPTH_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV10TCL_COLOR_MASK 0x00000358
|
|
|
|
+#define NV10TCL_COLOR_MASK_B (1 << 0)
|
|
|
|
+#define NV10TCL_COLOR_MASK_G (1 << 8)
|
|
|
|
+#define NV10TCL_COLOR_MASK_R (1 << 16)
|
|
|
|
+#define NV10TCL_COLOR_MASK_A (1 << 24)
|
|
|
|
+#define NV10TCL_DEPTH_WRITE_ENABLE 0x0000035c
|
|
|
|
+#define NV10TCL_STENCIL_MASK 0x00000360
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC 0x00000364
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_REF 0x00000368
|
|
|
|
+#define NV10TCL_STENCIL_FUNC_MASK 0x0000036c
|
|
|
|
+#define NV10TCL_STENCIL_OP_FAIL 0x00000370
|
|
|
|
+#define NV10TCL_STENCIL_OP_FAIL_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_STENCIL_OP_FAIL_INVERT 0x0000150a
|
|
|
|
+#define NV10TCL_STENCIL_OP_FAIL_KEEP 0x00001e00
|
|
|
|
+#define NV10TCL_STENCIL_OP_FAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV10TCL_STENCIL_OP_FAIL_INCR 0x00001e02
|
|
|
|
+#define NV10TCL_STENCIL_OP_FAIL_DECR 0x00001e03
|
|
|
|
+#define NV10TCL_STENCIL_OP_FAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV10TCL_STENCIL_OP_FAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZFAIL 0x00000374
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZFAIL_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZFAIL_INVERT 0x0000150a
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZFAIL_KEEP 0x00001e00
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZFAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZFAIL_INCR 0x00001e02
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZFAIL_DECR 0x00001e03
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZFAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZFAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZPASS 0x00000378
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZPASS_ZERO 0x00000000
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZPASS_INVERT 0x0000150a
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZPASS_KEEP 0x00001e00
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZPASS_REPLACE 0x00001e01
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZPASS_INCR 0x00001e02
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZPASS_DECR 0x00001e03
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZPASS_INCR_WRAP 0x00008507
|
|
|
|
+#define NV10TCL_STENCIL_OP_ZPASS_DECR_WRAP 0x00008508
|
|
|
|
+#define NV10TCL_SHADE_MODEL 0x0000037c
|
|
|
|
+#define NV10TCL_SHADE_MODEL_FLAT 0x00001d00
|
|
|
|
+#define NV10TCL_SHADE_MODEL_SMOOTH 0x00001d01
|
|
|
|
+#define NV10TCL_LINE_WIDTH 0x00000380
|
|
|
|
+#define NV10TCL_POLYGON_OFFSET_FACTOR 0x00000384
|
|
|
|
+#define NV10TCL_POLYGON_OFFSET_UNITS 0x00000388
|
|
|
|
+#define NV10TCL_POLYGON_MODE_FRONT 0x0000038c
|
|
|
|
+#define NV10TCL_POLYGON_MODE_FRONT_POINT 0x00001b00
|
|
|
|
+#define NV10TCL_POLYGON_MODE_FRONT_LINE 0x00001b01
|
|
|
|
+#define NV10TCL_POLYGON_MODE_FRONT_FILL 0x00001b02
|
|
|
|
+#define NV10TCL_POLYGON_MODE_BACK 0x00000390
|
|
|
|
+#define NV10TCL_POLYGON_MODE_BACK_POINT 0x00001b00
|
|
|
|
+#define NV10TCL_POLYGON_MODE_BACK_LINE 0x00001b01
|
|
|
|
+#define NV10TCL_POLYGON_MODE_BACK_FILL 0x00001b02
|
|
|
|
+#define NV10TCL_DEPTH_RANGE_NEAR 0x00000394
|
|
|
|
+#define NV10TCL_DEPTH_RANGE_FAR 0x00000398
|
|
|
|
+#define NV10TCL_CULL_FACE 0x0000039c
|
|
|
|
+#define NV10TCL_CULL_FACE_FRONT 0x00000404
|
|
|
|
+#define NV10TCL_CULL_FACE_BACK 0x00000405
|
|
|
|
+#define NV10TCL_CULL_FACE_FRONT_AND_BACK 0x00000408
|
|
|
|
+#define NV10TCL_FRONT_FACE 0x000003a0
|
|
|
|
+#define NV10TCL_FRONT_FACE_CW 0x00000900
|
|
|
|
+#define NV10TCL_FRONT_FACE_CCW 0x00000901
|
|
|
|
+#define NV10TCL_NORMALIZE_ENABLE 0x000003a4
|
|
|
|
+#define NV10TCL_COLOR_MATERIAL_R 0x000003a8
|
|
|
|
+#define NV10TCL_COLOR_MATERIAL_G 0x000003ac
|
|
|
|
+#define NV10TCL_COLOR_MATERIAL_B 0x000003b0
|
|
|
|
+#define NV10TCL_COLOR_MATERIAL_A 0x000003b4
|
|
|
|
+#define NV10TCL_COLOR_CONTROL 0x000003b8
|
|
|
|
+#define NV10TCL_ENABLED_LIGHTS 0x000003bc
|
|
|
|
+#define NV10TCL_ENABLED_LIGHTS_LIGHT0 (1 << 0)
|
|
|
|
+#define NV10TCL_ENABLED_LIGHTS_LIGHT1 (1 << 2)
|
|
|
|
+#define NV10TCL_ENABLED_LIGHTS_LIGHT2 (1 << 4)
|
|
|
|
+#define NV10TCL_ENABLED_LIGHTS_LIGHT3 (1 << 6)
|
|
|
|
+#define NV10TCL_ENABLED_LIGHTS_LIGHT4 (1 << 8)
|
|
|
|
+#define NV10TCL_ENABLED_LIGHTS_LIGHT5 (1 << 10)
|
|
|
|
+#define NV10TCL_ENABLED_LIGHTS_LIGHT6 (1 << 12)
|
|
|
|
+#define NV10TCL_ENABLED_LIGHTS_LIGHT7 (1 << 14)
|
|
|
|
+#define NV10TCL_TX_GEN_S(x) (0x000003c0+((x)*16))
|
|
|
|
+#define NV10TCL_TX_GEN_S__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_GEN_S_FALSE 0x00000000
|
|
|
|
+#define NV10TCL_TX_GEN_S_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV10TCL_TX_GEN_S_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV10TCL_TX_GEN_S_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV10TCL_TX_GEN_S_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV10TCL_TX_GEN_S_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV10TCL_TX_GEN_T(x) (0x000003c4+((x)*16))
|
|
|
|
+#define NV10TCL_TX_GEN_T__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_GEN_T_FALSE 0x00000000
|
|
|
|
+#define NV10TCL_TX_GEN_T_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV10TCL_TX_GEN_T_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV10TCL_TX_GEN_T_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV10TCL_TX_GEN_T_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV10TCL_TX_GEN_T_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV10TCL_TX_GEN_R(x) (0x000003c8+((x)*16))
|
|
|
|
+#define NV10TCL_TX_GEN_R__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_GEN_R_FALSE 0x00000000
|
|
|
|
+#define NV10TCL_TX_GEN_R_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV10TCL_TX_GEN_R_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV10TCL_TX_GEN_R_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV10TCL_TX_GEN_R_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV10TCL_TX_GEN_R_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV10TCL_TX_GEN_Q(x) (0x000003cc+((x)*16))
|
|
|
|
+#define NV10TCL_TX_GEN_Q__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_TX_GEN_Q_FALSE 0x00000000
|
|
|
|
+#define NV10TCL_TX_GEN_Q_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV10TCL_TX_GEN_Q_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV10TCL_TX_GEN_Q_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV10TCL_TX_GEN_Q_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV10TCL_TX_GEN_Q_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV10TCL_TX_MATRIX_ENABLE(x) (0x000003e0+((x)*4))
|
|
|
|
+#define NV10TCL_TX_MATRIX_ENABLE__SIZE 0x00000002
|
|
|
|
+#define NV10TCL_VIEW_MATRIX_ENABLE 0x000003e8
|
|
|
|
+#define NV10TCL_VIEW_MATRIX_ENABLE_MODELVIEW1 (1 << 0)
|
|
|
|
+#define NV10TCL_VIEW_MATRIX_ENABLE_MODELVIEW0 (1 << 1)
|
|
|
|
+#define NV10TCL_VIEW_MATRIX_ENABLE_PROJECTION (1 << 2)
|
|
|
|
+#define NV10TCL_POINT_SIZE 0x000003ec
|
|
|
|
+#define NV10TCL_MODELVIEW0_MATRIX(x) (0x00000400+((x)*4))
|
|
|
|
+#define NV10TCL_MODELVIEW0_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV10TCL_MODELVIEW1_MATRIX(x) (0x00000440+((x)*4))
|
|
|
|
+#define NV10TCL_MODELVIEW1_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV10TCL_INVERSE_MODELVIEW0_MATRIX(x) (0x00000480+((x)*4))
|
|
|
|
+#define NV10TCL_INVERSE_MODELVIEW0_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV10TCL_INVERSE_MODELVIEW1_MATRIX(x) (0x000004c0+((x)*4))
|
|
|
|
+#define NV10TCL_INVERSE_MODELVIEW1_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV10TCL_PROJECTION_MATRIX(x) (0x00000500+((x)*4))
|
|
|
|
+#define NV10TCL_PROJECTION_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV10TCL_TX0_MATRIX(x) (0x00000540+((x)*4))
|
|
|
|
+#define NV10TCL_TX0_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV10TCL_TX1_MATRIX(x) (0x00000580+((x)*4))
|
|
|
|
+#define NV10TCL_TX1_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV10TCL_CLIP_PLANE_A(x) (0x00000600+((x)*16))
|
|
|
|
+#define NV10TCL_CLIP_PLANE_A__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_CLIP_PLANE_B(x) (0x00000604+((x)*16))
|
|
|
|
+#define NV10TCL_CLIP_PLANE_B__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_CLIP_PLANE_C(x) (0x00000608+((x)*16))
|
|
|
|
+#define NV10TCL_CLIP_PLANE_C__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_CLIP_PLANE_D(x) (0x0000060c+((x)*16))
|
|
|
|
+#define NV10TCL_CLIP_PLANE_D__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_FOG_EQUATION_CONSTANT 0x00000680
|
|
|
|
+#define NV10TCL_FOG_EQUATION_LINEAR 0x00000684
|
|
|
|
+#define NV10TCL_FOG_EQUATION_QUADRATIC 0x00000688
|
|
|
|
+#define NV10TCL_FRONT_MATERIAL_SHININESS(x) (0x000006a0+((x)*4))
|
|
|
|
+#define NV10TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006
|
|
|
|
+#define NV10TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x000006c4
|
|
|
|
+#define NV10TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x000006c8
|
|
|
|
+#define NV10TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x000006cc
|
|
|
|
+#define NV10TCL_VIEWPORT_SCALE_X 0x000006e8
|
|
|
|
+#define NV10TCL_VIEWPORT_SCALE_Y 0x000006ec
|
|
|
|
+#define NV10TCL_VIEWPORT_SCALE_Z 0x000006f0
|
|
|
|
+#define NV10TCL_VIEWPORT_SCALE_W 0x000006f4
|
|
|
|
+#define NV10TCL_POINT_PARAMETER(x) (0x000006f8+((x)*4))
|
|
|
|
+#define NV10TCL_POINT_PARAMETER__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x) (0x00000800+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x) (0x00000804+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x) (0x00000808+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x) (0x0000080c+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x) (0x00000810+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x) (0x00000814+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x) (0x00000818+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x) (0x0000081c+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x) (0x00000820+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_HALF_VECTOR_X(x) (0x00000828+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_HALF_VECTOR_X__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_HALF_VECTOR_Y(x) (0x0000082c+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_HALF_VECTOR_Y__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_HALF_VECTOR_Z(x) (0x00000830+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_HALF_VECTOR_Z__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_DIRECTION_X(x) (0x00000834+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_DIRECTION_X__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_DIRECTION_Y(x) (0x00000838+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_DIRECTION_Y__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_DIRECTION_Z(x) (0x0000083c+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_DIRECTION_Z__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_CUTOFF_A(x) (0x00000840+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_CUTOFF_A__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_CUTOFF_B(x) (0x00000844+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_CUTOFF_B__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_CUTOFF_C(x) (0x00000848+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_CUTOFF_C__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_DIR_X(x) (0x0000084c+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_DIR_X__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_DIR_Y(x) (0x00000850+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_DIR_Y__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_DIR_Z(x) (0x00000854+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_DIR_Z__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_CUTOFF_D(x) (0x00000858+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_SPOT_CUTOFF_D__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_POSITION_X(x) (0x0000085c+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_POSITION_X__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_POSITION_Y(x) (0x00000860+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_POSITION_Y__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_POSITION_Z(x) (0x00000864+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_POSITION_Z__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_ATTENUATION_CONSTANT(x) (0x00000868+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_ATTENUATION_CONSTANT__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_ATTENUATION_LINEAR(x) (0x0000086c+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_ATTENUATION_LINEAR__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_LIGHT_ATTENUATION_QUADRATIC(x) (0x00000870+((x)*128))
|
|
|
|
+#define NV10TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_VERTEX_POS_3F_X 0x00000c00
|
|
|
|
+#define NV10TCL_VERTEX_POS_3F_Y 0x00000c04
|
|
|
|
+#define NV10TCL_VERTEX_POS_3F_Z 0x00000c08
|
|
|
|
+#define NV10TCL_VERTEX_POS_4F_X 0x00000c18
|
|
|
|
+#define NV10TCL_VERTEX_POS_4F_Y 0x00000c1c
|
|
|
|
+#define NV10TCL_VERTEX_POS_4F_Z 0x00000c20
|
|
|
|
+#define NV10TCL_VERTEX_POS_4F_W 0x00000c24
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3F_X 0x00000c30
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3F_Y 0x00000c34
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3F_Z 0x00000c38
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3I_XY 0x00000c40
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3I_XY_X_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3I_XY_X_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3I_XY_Y_SHIFT 16
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3I_XY_Y_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3I_Z 0x00000c44
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3I_Z_Z_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_NOR_3I_Z_Z_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VERTEX_COL_4F_R 0x00000c50
|
|
|
|
+#define NV10TCL_VERTEX_COL_4F_G 0x00000c54
|
|
|
|
+#define NV10TCL_VERTEX_COL_4F_B 0x00000c58
|
|
|
|
+#define NV10TCL_VERTEX_COL_4F_A 0x00000c5c
|
|
|
|
+#define NV10TCL_VERTEX_COL_3F_R 0x00000c60
|
|
|
|
+#define NV10TCL_VERTEX_COL_3F_G 0x00000c64
|
|
|
|
+#define NV10TCL_VERTEX_COL_3F_B 0x00000c68
|
|
|
|
+#define NV10TCL_VERTEX_COL_4I 0x00000c6c
|
|
|
|
+#define NV10TCL_VERTEX_COL_4I_R_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_COL_4I_R_MASK 0x000000ff
|
|
|
|
+#define NV10TCL_VERTEX_COL_4I_G_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_COL_4I_G_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_COL_4I_B_SHIFT 16
|
|
|
|
+#define NV10TCL_VERTEX_COL_4I_B_MASK 0x00ff0000
|
|
|
|
+#define NV10TCL_VERTEX_COL_4I_A_SHIFT 24
|
|
|
|
+#define NV10TCL_VERTEX_COL_4I_A_MASK 0xff000000
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3F_R 0x00000c80
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3F_G 0x00000c84
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3F_B 0x00000c88
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3I 0x00000c8c
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3I_R_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3I_R_MASK 0x000000ff
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3I_G_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3I_G_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3I_B_SHIFT 16
|
|
|
|
+#define NV10TCL_VERTEX_COL2_3I_B_MASK 0x00ff0000
|
|
|
|
+#define NV10TCL_VERTEX_TX0_2F_S 0x00000c90
|
|
|
|
+#define NV10TCL_VERTEX_TX0_2F_T 0x00000c94
|
|
|
|
+#define NV10TCL_VERTEX_TX0_2I 0x00000c98
|
|
|
|
+#define NV10TCL_VERTEX_TX0_2I_S_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_TX0_2I_S_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VERTEX_TX0_2I_T_SHIFT 16
|
|
|
|
+#define NV10TCL_VERTEX_TX0_2I_T_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4F_S 0x00000ca0
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4F_T 0x00000ca4
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4F_R 0x00000ca8
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4F_Q 0x00000cac
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_ST 0x00000cb0
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_ST_S_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_ST_S_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_ST_T_SHIFT 16
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_ST_T_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_RQ 0x00000cb4
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_RQ_R_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_RQ_R_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_RQ_Q_SHIFT 16
|
|
|
|
+#define NV10TCL_VERTEX_TX0_4I_RQ_Q_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_VERTEX_TX1_2F_S 0x00000cb8
|
|
|
|
+#define NV10TCL_VERTEX_TX1_2F_T 0x00000cbc
|
|
|
|
+#define NV10TCL_VERTEX_TX1_2I 0x00000cc0
|
|
|
|
+#define NV10TCL_VERTEX_TX1_2I_S_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_TX1_2I_S_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VERTEX_TX1_2I_T_SHIFT 16
|
|
|
|
+#define NV10TCL_VERTEX_TX1_2I_T_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4F_S 0x00000cc8
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4F_T 0x00000ccc
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4F_R 0x00000cd0
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4F_Q 0x00000cd4
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_ST 0x00000cd8
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_ST_S_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_ST_S_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_ST_T_SHIFT 16
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_ST_T_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_RQ 0x00000cdc
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_RQ_R_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_RQ_R_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_RQ_Q_SHIFT 16
|
|
|
|
+#define NV10TCL_VERTEX_TX1_4I_RQ_Q_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_VERTEX_FOG_1F 0x00000ce0
|
|
|
|
+#define NV10TCL_VERTEX_WGH_1F 0x00000ce4
|
|
|
|
+#define NV10TCL_EDGEFLAG_ENABLE 0x00000cec
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_VALIDATE 0x00000cf0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET(x) (0x00000d00+((x)*8))
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT(x) (0x00000d04+((x)*8))
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT__SIZE 0x00000008
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_TYPE_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_FIELDS_SHIFT 4
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_FIELDS_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_STRIDE_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_OFFSET_POS 0x00000d00
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS 0x00000d04
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_SHIFT 4
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_OFFSET_COL 0x00000d08
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL 0x00000d0c
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_SHIFT 4
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_OFFSET_COL2 0x00000d10
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2 0x00000d14
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_SHIFT 4
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_OFFSET_TX0 0x00000d18
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0 0x00000d1c
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_SHIFT 4
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_OFFSET_TX1 0x00000d20
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1 0x00000d24
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_SHIFT 4
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_OFFSET_NOR 0x00000d28
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR 0x00000d2c
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_SHIFT 4
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_OFFSET_WGH 0x00000d30
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH 0x00000d34
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_SHIFT 4
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_OFFSET_FOG 0x00000d38
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG 0x00000d3c
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_SHIFT 4
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_MASK 0x000000f0
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_SHIFT 8
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END 0x00000dfc
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_STOP 0x00000000
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_POINTS 0x00000001
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_LINES 0x00000002
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_LINE_LOOP 0x00000003
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_LINE_STRIP 0x00000004
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_TRIANGLES 0x00000005
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP 0x00000006
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_TRIANGLE_FAN 0x00000007
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_QUADS 0x00000008
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_QUAD_STRIP 0x00000009
|
|
|
|
+#define NV10TCL_VERTEX_BEGIN_END_POLYGON 0x0000000a
|
|
|
|
+#define NV10TCL_VB_ELEMENT_U16 0x00000e00
|
|
|
|
+#define NV10TCL_VB_ELEMENT_U16_I0_SHIFT 0
|
|
|
|
+#define NV10TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VB_ELEMENT_U16_I1_SHIFT 16
|
|
|
|
+#define NV10TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000
|
|
|
|
+#define NV10TCL_VB_ELEMENT_U32 0x00001100
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END 0x000013fc
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_STOP 0x00000000
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_POINTS 0x00000001
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_LINES 0x00000002
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_LINE_LOOP 0x00000003
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_LINE_STRIP 0x00000004
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLES 0x00000005
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLE_STRIP 0x00000006
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLE_FAN 0x00000007
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_QUADS 0x00000008
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_QUAD_STRIP 0x00000009
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_BEGIN_END_POLYGON 0x0000000a
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS 0x00001400
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_FIRST_SHIFT 0
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_FIRST_MASK 0x0000ffff
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_LAST_SHIFT 24
|
|
|
|
+#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_LAST_MASK 0xff000000
|
|
|
|
+#define NV10TCL_VERTEX_ARRAY_DATA 0x00001800
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_CONTEXT_COLOR_KEY 0x00000057
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D 0x00000058
|
|
|
|
+
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_SYNCHRONIZE 0x00000100
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_DMA_SOURCE 0x00000184
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_DMA_DESTIN 0x00000188
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_PITCH 0x00000304
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_PITCH_SOURCE_SHIFT 0
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_PITCH_SOURCE_MASK 0x0000ffff
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_PITCH_DESTIN_SHIFT 16
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_PITCH_DESTIN_MASK 0xffff0000
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_OFFSET_SOURCE 0x00000308
|
|
|
|
+#define NV03_CONTEXT_SURFACES_2D_OFFSET_DESTIN 0x0000030c
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_CONTEXT_SURFACES_3D 0x0000005a
|
|
|
|
+
|
|
|
|
+#define NV03_CONTEXT_SURFACES_3D_SYNCHRONIZE 0x00000100
|
|
|
|
+#define NV03_CONTEXT_SURFACES_3D_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV03_CONTEXT_SURFACES_3D_DMA_SURFACE 0x00000184
|
|
|
|
+#define NV03_CONTEXT_SURFACES_3D_PITCH 0x00000300
|
|
|
|
+#define NV03_CONTEXT_SURFACES_3D_OFFSET_COLOR 0x00000304
|
|
|
|
+#define NV03_CONTEXT_SURFACES_3D_OFFSET_ZETA 0x00000308
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_RENDER_SOLID_LINE 0x0000005c
|
|
|
|
+
|
|
|
|
+#define NV04_RENDER_SOLID_LINE_SURFACE 0x00000198
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_RENDER_SOLID_TRIANGLE 0x0000005d
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_RENDER_SOLID_RECTANGLE 0x0000005e
|
|
|
|
+
|
|
|
|
+#define NV04_RENDER_SOLID_RECTANGLE_SURFACE 0x00000198
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_IMAGE_BLIT 0x0000005f
|
|
|
|
+
|
|
|
|
+#define NV04_IMAGE_BLIT_NOP 0x00000100
|
|
|
|
+#define NV04_IMAGE_BLIT_NOTIFY 0x00000104
|
|
|
|
+#define NV04_IMAGE_BLIT_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_IMAGE_BLIT_COLOR_KEY 0x00000184
|
|
|
|
+#define NV04_IMAGE_BLIT_CLIP_RECTANGLE 0x00000188
|
|
|
|
+#define NV04_IMAGE_BLIT_PATTERN 0x0000018c
|
|
|
|
+#define NV04_IMAGE_BLIT_ROP 0x00000190
|
|
|
|
+#define NV04_IMAGE_BLIT_BETA4 0x00000198
|
|
|
|
+#define NV04_IMAGE_BLIT_SURFACE 0x0000019c
|
|
|
|
+#define NV04_IMAGE_BLIT_OPERATION 0x000002fc
|
|
|
|
+#define NV04_IMAGE_BLIT_OPERATION_SRCCOPY_AND 0x00000000
|
|
|
|
+#define NV04_IMAGE_BLIT_OPERATION_ROP_AND 0x00000001
|
|
|
|
+#define NV04_IMAGE_BLIT_OPERATION_BLEND_AND 0x00000002
|
|
|
|
+#define NV04_IMAGE_BLIT_OPERATION_SRCCOPY 0x00000003
|
|
|
|
+#define NV04_IMAGE_BLIT_OPERATION_SRCCOPY_PREMULT 0x00000004
|
|
|
|
+#define NV04_IMAGE_BLIT_OPERATION_BLEND_PREMULT 0x00000005
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU 0x00000060
|
|
|
|
+
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_NOP 0x00000100
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_NOTIFY 0x00000104
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_PATCH 0x0000010c
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_DMA_LUT 0x00000184
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_COLOR_FORMAT 0x000003e8
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_INDEX_FORMAT 0x000003ec
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_LUT_OFFSET 0x000003f0
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_POINT 0x000003f4
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_SIZE_OUT 0x000003f8
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_SIZE_IN 0x000003fc
|
|
|
|
+#define NV04_INDEXED_IMAGE_FROM_CPU_COLOR 0x00000400
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_IMAGE_FROM_CPU 0x00000061
|
|
|
|
+
|
|
|
|
+#define NV04_IMAGE_FROM_CPU_BETA4 0x00000198
|
|
|
|
+#define NV04_IMAGE_FROM_CPU_SURFACE 0x0000019c
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV10_CONTEXT_SURFACES_2D 0x00000062
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV05_SCALED_IMAGE_FROM_MEMORY 0x00000063
|
|
|
|
+
|
|
|
|
+#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION 0x000002fc
|
|
|
|
+#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_DITHER 0x00000000
|
|
|
|
+#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE 0x00000001
|
|
|
|
+#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_SUBTR_TRUNCATE 0x00000002
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV01_IMAGE_SRCCOPY_AND 0x00000064
|
|
|
|
+
|
|
|
|
+#define NV01_IMAGE_SRCCOPY_AND_NOTIFY 0x00000104
|
|
|
|
+#define NV01_IMAGE_SRCCOPY_AND_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV01_IMAGE_SRCCOPY_AND_IMAGE_OUTPUT 0x00000200
|
|
|
|
+#define NV01_IMAGE_SRCCOPY_AND_IMAGE_INPUT 0x00000204
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU 0x00000064
|
|
|
|
+
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_COLOR_KEY 0x00000188
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_CLIP_RECTANGLE 0x0000018c
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_PATTERN 0x00000190
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_ROP 0x00000194
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_BETA1 0x00000198
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_BETA4 0x0000019c
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_SURFACE 0x000001a0
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_COLOR_CONVERSION 0x000003e0
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_OPERATION 0x000003e4
|
|
|
|
+#define NV05_INDEXED_IMAGE_FROM_CPU_INDICES 0x00000400
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV05_IMAGE_FROM_CPU 0x00000065
|
|
|
|
+
|
|
|
|
+#define NV05_IMAGE_FROM_CPU_BETA4 0x00000198
|
|
|
|
+#define NV05_IMAGE_FROM_CPU_SURFACE 0x0000019c
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV05_STRETCHED_IMAGE_FROM_CPU 0x00000066
|
|
|
|
+
|
|
|
|
+#define NV05_STRETCHED_IMAGE_FROM_CPU_BETA4 0x00000194
|
|
|
|
+#define NV05_STRETCHED_IMAGE_FROM_CPU_SURFACE 0x00000198
|
|
|
|
+#define NV05_STRETCHED_IMAGE_FROM_CPU_COLOR_CONVERSION 0x000002f8
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_IMAGE_BLEND_PREMULT 0x00000067
|
|
|
|
+
|
|
|
|
+#define NV04_IMAGE_BLEND_PREMULT_NOP 0x00000100
|
|
|
|
+#define NV04_IMAGE_BLEND_PREMULT_NOTIFY 0x00000104
|
|
|
|
+#define NV04_IMAGE_BLEND_PREMULT_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_IMAGE_BLEND_PREMULT_IMAGE_OUTPUT 0x00000200
|
|
|
|
+#define NV04_IMAGE_BLEND_PREMULT_BETA_INPUT 0x00000204
|
|
|
|
+#define NV04_IMAGE_BLEND_PREMULT_IMAGE_INPUT 0x00000208
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_CHANNEL_PIO 0x0000006a
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV03_CHANNEL_DMA 0x0000006b
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_BETA_SOLID 0x00000072
|
|
|
|
+
|
|
|
|
+#define NV04_BETA_SOLID_NOP 0x00000100
|
|
|
|
+#define NV04_BETA_SOLID_NOTIFY 0x00000104
|
|
|
|
+#define NV04_BETA_SOLID_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_BETA_SOLID_BETA_OUTPUT 0x00000200
|
|
|
|
+#define NV04_BETA_SOLID_BETA_FACTOR 0x00000300
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_STRETCHED_IMAGE_FROM_CPU 0x00000076
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY 0x00000077
|
|
|
|
+
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_NOP 0x00000100
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_NOTIFY 0x00000104
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE 0x00000184
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_PATTERN 0x00000188
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_ROP 0x0000018c
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_BETA1 0x00000190
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_BETA4 0x00000194
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE 0x00000198
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION 0x000002fc
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_DITHER 0x00000000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE 0x00000001
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_SUBTR_TRUNCATE 0x00000002
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5 0x00000001
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X1R5G5B5 0x00000002
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8 0x00000003
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8 0x00000004
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_V8YB8U8YA8 0x00000005
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_YB8V8YA8U8 0x00000006
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5 0x00000007
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8 0x00000008
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8 0x00000009
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION 0x00000304
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_AND 0x00000000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_ROP_AND 0x00000001
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_AND 0x00000002
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY 0x00000003
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_PREMULT 0x00000004
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_PREMULT 0x00000005
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT 0x00000308
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_SHIFT 0
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT 16
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_MASK 0xffff0000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE 0x0000030c
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_SHIFT 0
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT 16
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT 0x00000310
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_X_SHIFT 0
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_SHIFT 16
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_MASK 0xffff0000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE 0x00000314
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_W_SHIFT 0
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_SHIFT 16
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_DU_DX 0x00000318
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_DV_DY 0x0000031c
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE 0x00000400
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_W_SHIFT 0
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_H_SHIFT 16
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT 0x00000404
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_PITCH_SHIFT 0
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_PITCH_MASK 0x0000ffff
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_SHIFT 16
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_MASK 0x00ff0000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER 0x00010000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CORNER 0x00020000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_SHIFT 24
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_MASK 0xff000000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE 0x00000000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_BILINEAR 0x01000000
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_ADDRESS 0x00000408
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT 0x0000040c
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT_X_SHIFT 0
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT_Y_SHIFT 16
|
|
|
|
+#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT_Y_MASK 0xffff0000
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU 0x0000007b
|
|
|
|
+
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_NOP 0x00000100
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_NOTIFY 0x00000104
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_WAIT_FOR_IDLE 0x00000108
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_PM_TRIGGER 0x00000140
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_SURFACE 0x00000184
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_COLOR_FORMAT 0x00000300
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_POINT 0x00000304
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_POINT_X_SHIFT 0
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_POINT_X_MASK 0x0000ffff
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_POINT_Y_SHIFT 16
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_POINT_Y_MASK 0xffff0000
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_SIZE 0x00000308
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_SIZE_W_SHIFT 0
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_SIZE_W_MASK 0x0000ffff
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_SIZE_H_SHIFT 16
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_SIZE_H_MASK 0xffff0000
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL 0x0000030c
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_X_SHIFT 0
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_X_MASK 0x0000ffff
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_W_SHIFT 16
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_W_MASK 0xffff0000
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL 0x00000310
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_Y_SHIFT 0
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_Y_MASK 0x0000ffff
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_H_SHIFT 16
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_H_MASK 0xffff0000
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_COLOR(x) (0x00000400+((x)*4))
|
|
|
|
+#define NV10_TEXTURE_FROM_CPU_COLOR__SIZE 0x00000700
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV10_VIDEO_DISPLAY 0x0000007c
|
|
|
|
+
|
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|
|
+
|
|
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+
|
|
|
|
+#define NV10_DVD_SUBPICTURE 0x00000088
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV10_SCALED_IMAGE_FROM_MEMORY 0x00000089
|
|
|
|
+
|
|
|
|
+#define NV10_SCALED_IMAGE_FROM_MEMORY_WAIT_FOR_IDLE 0x00000108
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV10_IMAGE_FROM_CPU 0x0000008a
|
|
|
|
+
|
|
|
|
+#define NV10_IMAGE_FROM_CPU_COLOR_CONVERSION 0x000002f8
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV10_CONTEXT_SURFACES_3D 0x00000093
|
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+
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+
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|
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+
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|
|
|
+#define NV10_DX5_TEXTURE_TRIANGLE 0x00000094
|
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|
+
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|
+
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+
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|
|
+#define NV10_DX6_MULTI_TEXTURE_TRIANGLE 0x00000095
|
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+
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+
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+
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|
|
|
+#define NV11TCL 0x00000096
|
|
|
|
+
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_ENABLE 0x00000d40
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP 0x00000d44
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_CLEAR 0x00001500
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_AND 0x00001501
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_AND_REVERSE 0x00001502
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_COPY 0x00001503
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_AND_INVERTED 0x00001504
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_NOOP 0x00001505
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_XOR 0x00001506
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_OR 0x00001507
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_NOR 0x00001508
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_EQUIV 0x00001509
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_INVERT 0x0000150a
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_OR_REVERSE 0x0000150b
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED 0x0000150c
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_OR_INVERTED 0x0000150d
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_NAND 0x0000150e
|
|
|
|
+#define NV11TCL_COLOR_LOGIC_OP_OP_SET 0x0000150f
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV20TCL 0x00000097
|
|
|
|
+
|
|
|
|
+#define NV20TCL_NOP 0x00000100
|
|
|
|
+#define NV20TCL_NOTIFY 0x00000104
|
|
|
|
+#define NV20TCL_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV20TCL_DMA_TEXTURE0 0x00000184
|
|
|
|
+#define NV20TCL_DMA_TEXTURE1 0x00000188
|
|
|
|
+#define NV20TCL_DMA_COLOR 0x00000194
|
|
|
|
+#define NV20TCL_DMA_ZETA 0x00000198
|
|
|
|
+#define NV20TCL_DMA_VTXBUF0 0x0000019c
|
|
|
|
+#define NV20TCL_DMA_VTXBUF1 0x000001a0
|
|
|
|
+#define NV20TCL_DMA_FENCE 0x000001a4
|
|
|
|
+#define NV20TCL_DMA_QUERY 0x000001a8
|
|
|
|
+#define NV20TCL_RT_HORIZ 0x00000200
|
|
|
|
+#define NV20TCL_RT_HORIZ_X_SHIFT 0
|
|
|
|
+#define NV20TCL_RT_HORIZ_X_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_RT_HORIZ_W_SHIFT 16
|
|
|
|
+#define NV20TCL_RT_HORIZ_W_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_RT_VERT 0x00000204
|
|
|
|
+#define NV20TCL_RT_VERT_Y_SHIFT 0
|
|
|
|
+#define NV20TCL_RT_VERT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_RT_VERT_H_SHIFT 16
|
|
|
|
+#define NV20TCL_RT_VERT_H_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_RT_FORMAT 0x00000208
|
|
|
|
+#define NV20TCL_RT_FORMAT_TYPE_SHIFT 8
|
|
|
|
+#define NV20TCL_RT_FORMAT_TYPE_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_RT_FORMAT_TYPE_LINEAR 0x00000100
|
|
|
|
+#define NV20TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200
|
|
|
|
+#define NV20TCL_RT_FORMAT_COLOR_SHIFT 0
|
|
|
|
+#define NV20TCL_RT_FORMAT_COLOR_MASK 0x0000001f
|
|
|
|
+#define NV20TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003
|
|
|
|
+#define NV20TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005
|
|
|
|
+#define NV20TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008
|
|
|
|
+#define NV20TCL_RT_FORMAT_COLOR_B8 0x00000009
|
|
|
|
+#define NV20TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d
|
|
|
|
+#define NV20TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f
|
|
|
|
+#define NV20TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010
|
|
|
|
+#define NV20TCL_RT_PITCH 0x0000020c
|
|
|
|
+#define NV20TCL_RT_PITCH_COLOR_PITCH_SHIFT 0
|
|
|
|
+#define NV20TCL_RT_PITCH_COLOR_PITCH_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_RT_PITCH_ZETA_PITCH_SHIFT 16
|
|
|
|
+#define NV20TCL_RT_PITCH_ZETA_PITCH_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_COLOR_OFFSET 0x00000210
|
|
|
|
+#define NV20TCL_ZETA_OFFSET 0x00000214
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA(x) (0x00000260+((x)*4))
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_SHIFT 0
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_MASK 0x0000000f
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_FOG 0x00000003
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE (1 << 4)
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA 0x00000010
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_SHIFT 5
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_MASK 0x000000e0
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL_NV 0x00000040
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE_NV 0x00000060
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_SHIFT 8
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_FOG 0x00000300
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_SHIFT 13
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_SHIFT 16
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_FOG 0x00030000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1_ARB 0x00090000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_SHIFT 21
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_SHIFT 24
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_FOG 0x03000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_SHIFT 29
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL_NV 0x40000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV20TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000
|
|
|
|
+#define NV20TCL_RC_FINAL0 0x00000288
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_SHIFT 0
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_MASK 0x0000000f
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_FOG 0x00000003
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR_NV 0x00000005
|
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|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_TEXTURE0_ARB 0x00000008
|
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|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_INPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_COMPONENT_USAGE (1 << 4)
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA 0x00000010
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_SHIFT 5
|
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|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_MASK 0x000000e0
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL_NV 0x00000040
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE_NV 0x00000060
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0
|
|
|
|
+#define NV20TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_SHIFT 8
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_FOG 0x00000300
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_SHIFT 13
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV20TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_SHIFT 16
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_FOG 0x00030000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_TEXTURE1_ARB 0x00090000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_SHIFT 21
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV20TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_SHIFT 24
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_FOG 0x03000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_SHIFT 29
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL_NV 0x40000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV20TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000
|
|
|
|
+#define NV20TCL_RC_FINAL1 0x0000028c
|
|
|
|
+#define NV20TCL_RC_FINAL1_COLOR_SUM_CLAMP (1 << 7)
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_SHIFT 8
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_FOG 0x00000300
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_SHIFT 13
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV20TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_SHIFT 16
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_FOG 0x00030000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_TEXTURE1_ARB 0x00090000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_SHIFT 21
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV20TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_SHIFT 24
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_FOG 0x03000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_SHIFT 29
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL_NV 0x40000000
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|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE_NV 0x60000000
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|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
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|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
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|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
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|
|
|
+#define NV20TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE_NV 0xe0000000
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|
|
|
+#define NV20TCL_LIGHT_CONTROL 0x00000294
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|
|
|
+#define NV20TCL_FOG_MODE 0x0000029c
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|
|
|
+#define NV20TCL_FOG_MODE_EXP 0x00000800
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|
|
|
+#define NV20TCL_FOG_MODE_EXP_2 0x00000802
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|
|
|
+#define NV20TCL_FOG_MODE_EXP2 0x00000803
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|
|
|
+#define NV20TCL_FOG_MODE_LINEAR 0x00000804
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|
|
|
+#define NV20TCL_FOG_MODE_LINEAR_2 0x00002601
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|
|
|
+#define NV20TCL_FOG_COORD_DIST 0x000002a0
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|
|
|
+#define NV20TCL_FOG_COORD_DIST_COORD_FALSE 0x00000000
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|
|
|
+#define NV20TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_RADIAL_NV 0x00000001
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|
|
|
+#define NV20TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_PLANE_ABSOLUTE_NV 0x00000002
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|
|
|
+#define NV20TCL_FOG_COORD_DIST_COORD_FOG 0x00000003
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|
|
|
+#define NV20TCL_FOG_ENABLE 0x000002a4
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|
|
|
+#define NV20TCL_FOG_COLOR 0x000002a8
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|
|
+#define NV20TCL_FOG_COLOR_R_SHIFT 0
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|
|
+#define NV20TCL_FOG_COLOR_R_MASK 0x000000ff
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|
|
+#define NV20TCL_FOG_COLOR_G_SHIFT 8
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|
|
|
+#define NV20TCL_FOG_COLOR_G_MASK 0x0000ff00
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|
|
|
+#define NV20TCL_FOG_COLOR_B_SHIFT 16
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|
|
|
+#define NV20TCL_FOG_COLOR_B_MASK 0x00ff0000
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|
|
|
+#define NV20TCL_FOG_COLOR_A_SHIFT 24
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|
|
|
+#define NV20TCL_FOG_COLOR_A_MASK 0xff000000
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|
|
|
+#define NV20TCL_VIEWPORT_CLIP_MODE 0x000002b4
|
|
|
|
+#define NV20TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*4))
|
|
|
|
+#define NV20TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_VIEWPORT_CLIP_VERT(x) (0x000002e0+((x)*4))
|
|
|
|
+#define NV20TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_ENABLE 0x00000300
|
|
|
|
+#define NV20TCL_BLEND_FUNC_ENABLE 0x00000304
|
|
|
|
+#define NV20TCL_CULL_FACE_ENABLE 0x00000308
|
|
|
|
+#define NV20TCL_DEPTH_TEST_ENABLE 0x0000030c
|
|
|
|
+#define NV20TCL_DITHER_ENABLE 0x00000310
|
|
|
|
+#define NV20TCL_LIGHTING_ENABLE 0x00000314
|
|
|
|
+#define NV20TCL_POINT_PARAMETERS_ENABLE 0x00000318
|
|
|
|
+#define NV20TCL_POINT_SMOOTH_ENABLE 0x0000031c
|
|
|
|
+#define NV20TCL_LINE_SMOOTH_ENABLE 0x00000320
|
|
|
|
+#define NV20TCL_POLYGON_SMOOTH_ENABLE 0x00000324
|
|
|
|
+#define NV20TCL_STENCIL_ENABLE 0x0000032c
|
|
|
|
+#define NV20TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000330
|
|
|
|
+#define NV20TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000334
|
|
|
|
+#define NV20TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000338
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC 0x0000033c
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV20TCL_ALPHA_FUNC_REF 0x00000340
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC 0x00000344
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_ONE 0x00000001
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_SRC_COLOR 0x00000300
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_DST_ALPHA 0x00000304
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_DST_COLOR 0x00000306
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST 0x00000348
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_ONE 0x00000001
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_SRC_COLOR 0x00000300
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_DST_ALPHA 0x00000304
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_DST_COLOR 0x00000306
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV20TCL_BLEND_COLOR 0x0000034c
|
|
|
|
+#define NV20TCL_BLEND_COLOR_B_SHIFT 0
|
|
|
|
+#define NV20TCL_BLEND_COLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV20TCL_BLEND_COLOR_G_SHIFT 8
|
|
|
|
+#define NV20TCL_BLEND_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV20TCL_BLEND_COLOR_R_SHIFT 16
|
|
|
|
+#define NV20TCL_BLEND_COLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV20TCL_BLEND_COLOR_A_SHIFT 24
|
|
|
|
+#define NV20TCL_BLEND_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV20TCL_BLEND_EQUATION 0x00000350
|
|
|
|
+#define NV20TCL_BLEND_EQUATION_FUNC_ADD 0x00008006
|
|
|
|
+#define NV20TCL_BLEND_EQUATION_MIN 0x00008007
|
|
|
|
+#define NV20TCL_BLEND_EQUATION_MAX 0x00008008
|
|
|
|
+#define NV20TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a
|
|
|
|
+#define NV20TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b
|
|
|
|
+#define NV20TCL_DEPTH_FUNC 0x00000354
|
|
|
|
+#define NV20TCL_DEPTH_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV20TCL_DEPTH_FUNC_LESS 0x00000201
|
|
|
|
+#define NV20TCL_DEPTH_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV20TCL_DEPTH_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV20TCL_DEPTH_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV20TCL_DEPTH_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV20TCL_DEPTH_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV20TCL_DEPTH_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV20TCL_DEPTH_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV20TCL_COLOR_MASK 0x00000358
|
|
|
|
+#define NV20TCL_COLOR_MASK_B (1 << 0)
|
|
|
|
+#define NV20TCL_COLOR_MASK_G (1 << 8)
|
|
|
|
+#define NV20TCL_COLOR_MASK_R (1 << 16)
|
|
|
|
+#define NV20TCL_COLOR_MASK_A (1 << 24)
|
|
|
|
+#define NV20TCL_DEPTH_WRITE_ENABLE 0x0000035c
|
|
|
|
+#define NV20TCL_STENCIL_MASK 0x00000360
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC 0x00000364
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_REF 0x00000368
|
|
|
|
+#define NV20TCL_STENCIL_FUNC_MASK 0x0000036c
|
|
|
|
+#define NV20TCL_STENCIL_OP_FAIL 0x00000370
|
|
|
|
+#define NV20TCL_STENCIL_OP_FAIL_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_STENCIL_OP_FAIL_INVERT 0x0000150a
|
|
|
|
+#define NV20TCL_STENCIL_OP_FAIL_KEEP 0x00001e00
|
|
|
|
+#define NV20TCL_STENCIL_OP_FAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV20TCL_STENCIL_OP_FAIL_INCR 0x00001e02
|
|
|
|
+#define NV20TCL_STENCIL_OP_FAIL_DECR 0x00001e03
|
|
|
|
+#define NV20TCL_STENCIL_OP_FAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV20TCL_STENCIL_OP_FAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZFAIL 0x00000374
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZFAIL_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZFAIL_INVERT 0x0000150a
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZFAIL_KEEP 0x00001e00
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZFAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZFAIL_INCR 0x00001e02
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZFAIL_DECR 0x00001e03
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZFAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZFAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZPASS 0x00000378
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZPASS_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZPASS_INVERT 0x0000150a
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZPASS_KEEP 0x00001e00
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZPASS_REPLACE 0x00001e01
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZPASS_INCR 0x00001e02
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZPASS_DECR 0x00001e03
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZPASS_INCR_WRAP 0x00008507
|
|
|
|
+#define NV20TCL_STENCIL_OP_ZPASS_DECR_WRAP 0x00008508
|
|
|
|
+#define NV20TCL_SHADE_MODEL 0x0000037c
|
|
|
|
+#define NV20TCL_SHADE_MODEL_FLAT 0x00001d00
|
|
|
|
+#define NV20TCL_SHADE_MODEL_SMOOTH 0x00001d01
|
|
|
|
+#define NV20TCL_LINE_WIDTH 0x00000380
|
|
|
|
+#define NV20TCL_POLYGON_OFFSET_FACTOR 0x00000384
|
|
|
|
+#define NV20TCL_POLYGON_OFFSET_UNITS 0x00000388
|
|
|
|
+#define NV20TCL_POLYGON_MODE_FRONT 0x0000038c
|
|
|
|
+#define NV20TCL_POLYGON_MODE_FRONT_POINT 0x00001b00
|
|
|
|
+#define NV20TCL_POLYGON_MODE_FRONT_LINE 0x00001b01
|
|
|
|
+#define NV20TCL_POLYGON_MODE_FRONT_FILL 0x00001b02
|
|
|
|
+#define NV20TCL_POLYGON_MODE_BACK 0x00000390
|
|
|
|
+#define NV20TCL_POLYGON_MODE_BACK_POINT 0x00001b00
|
|
|
|
+#define NV20TCL_POLYGON_MODE_BACK_LINE 0x00001b01
|
|
|
|
+#define NV20TCL_POLYGON_MODE_BACK_FILL 0x00001b02
|
|
|
|
+#define NV20TCL_DEPTH_RANGE_NEAR 0x00000394
|
|
|
|
+#define NV20TCL_DEPTH_RANGE_FAR 0x00000398
|
|
|
|
+#define NV20TCL_CULL_FACE 0x0000039c
|
|
|
|
+#define NV20TCL_CULL_FACE_FRONT 0x00000404
|
|
|
|
+#define NV20TCL_CULL_FACE_BACK 0x00000405
|
|
|
|
+#define NV20TCL_CULL_FACE_FRONT_AND_BACK 0x00000408
|
|
|
|
+#define NV20TCL_FRONT_FACE 0x000003a0
|
|
|
|
+#define NV20TCL_FRONT_FACE_CW 0x00000900
|
|
|
|
+#define NV20TCL_FRONT_FACE_CCW 0x00000901
|
|
|
|
+#define NV20TCL_NORMALIZE_ENABLE 0x000003a4
|
|
|
|
+#define NV20TCL_COLOR_MATERIAL_FRONT_R 0x000003a8
|
|
|
|
+#define NV20TCL_COLOR_MATERIAL_FRONT_G 0x000003ac
|
|
|
|
+#define NV20TCL_COLOR_MATERIAL_FRONT_B 0x000003b0
|
|
|
|
+#define NV20TCL_COLOR_MATERIAL_FRONT_A 0x000003b4
|
|
|
|
+#define NV20TCL_SEPARATE_SPECULAR_ENABLE 0x000003b8
|
|
|
|
+#define NV20TCL_ENABLED_LIGHTS 0x000003bc
|
|
|
|
+#define NV20TCL_TX_GEN_S(x) (0x000003c0+((x)*16))
|
|
|
|
+#define NV20TCL_TX_GEN_S__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_GEN_S_FALSE 0x00000000
|
|
|
|
+#define NV20TCL_TX_GEN_S_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV20TCL_TX_GEN_S_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV20TCL_TX_GEN_S_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV20TCL_TX_GEN_S_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV20TCL_TX_GEN_S_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV20TCL_TX_GEN_T(x) (0x000003c4+((x)*16))
|
|
|
|
+#define NV20TCL_TX_GEN_T__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_GEN_T_FALSE 0x00000000
|
|
|
|
+#define NV20TCL_TX_GEN_T_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV20TCL_TX_GEN_T_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV20TCL_TX_GEN_T_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV20TCL_TX_GEN_T_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV20TCL_TX_GEN_T_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV20TCL_TX_GEN_R(x) (0x000003c8+((x)*16))
|
|
|
|
+#define NV20TCL_TX_GEN_R__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_GEN_R_FALSE 0x00000000
|
|
|
|
+#define NV20TCL_TX_GEN_R_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV20TCL_TX_GEN_R_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV20TCL_TX_GEN_R_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV20TCL_TX_GEN_R_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV20TCL_TX_GEN_R_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV20TCL_TX_GEN_Q(x) (0x000003cc+((x)*16))
|
|
|
|
+#define NV20TCL_TX_GEN_Q__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_GEN_Q_FALSE 0x00000000
|
|
|
|
+#define NV20TCL_TX_GEN_Q_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV20TCL_TX_GEN_Q_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV20TCL_TX_GEN_Q_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV20TCL_TX_GEN_Q_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV20TCL_TX_GEN_Q_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV20TCL_TX_MATRIX_ENABLE(x) (0x00000420+((x)*4))
|
|
|
|
+#define NV20TCL_TX_MATRIX_ENABLE__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_POINT_SIZE 0x0000043c
|
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|
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+#define NV20TCL_MODELVIEW0_MATRIX(x) (0x00000480+((x)*4))
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+#define NV20TCL_MODELVIEW0_MATRIX__SIZE 0x00000010
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+#define NV20TCL_MODELVIEW1_MATRIX(x) (0x000004c0+((x)*4))
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+#define NV20TCL_MODELVIEW1_MATRIX__SIZE 0x00000010
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+#define NV20TCL_MODELVIEW2_MATRIX(x) (0x00000500+((x)*4))
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+#define NV20TCL_MODELVIEW2_MATRIX__SIZE 0x00000010
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|
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+#define NV20TCL_MODELVIEW3_MATRIX(x) (0x00000540+((x)*4))
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+#define NV20TCL_MODELVIEW3_MATRIX__SIZE 0x00000010
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+#define NV20TCL_INVERSE_MODELVIEW0_MATRIX(x) (0x00000580+((x)*4))
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+#define NV20TCL_INVERSE_MODELVIEW0_MATRIX__SIZE 0x00000010
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|
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+#define NV20TCL_INVERSE_MODELVIEW1_MATRIX(x) (0x000005c0+((x)*4))
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+#define NV20TCL_INVERSE_MODELVIEW1_MATRIX__SIZE 0x00000010
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|
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+#define NV20TCL_INVERSE_MODELVIEW2_MATRIX(x) (0x00000600+((x)*4))
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|
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+#define NV20TCL_INVERSE_MODELVIEW2_MATRIX__SIZE 0x00000010
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|
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+#define NV20TCL_INVERSE_MODELVIEW3_MATRIX(x) (0x00000640+((x)*4))
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+#define NV20TCL_INVERSE_MODELVIEW3_MATRIX__SIZE 0x00000010
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|
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+#define NV20TCL_PROJECTION_MATRIX(x) (0x00000680+((x)*4))
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|
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+#define NV20TCL_PROJECTION_MATRIX__SIZE 0x00000010
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+#define NV20TCL_TX0_MATRIX(x) (0x000006c0+((x)*4))
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|
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+#define NV20TCL_TX0_MATRIX__SIZE 0x00000010
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+#define NV20TCL_TX1_MATRIX(x) (0x00000700+((x)*4))
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+#define NV20TCL_TX1_MATRIX__SIZE 0x00000010
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|
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+#define NV20TCL_TX2_MATRIX(x) (0x00000740+((x)*4))
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+#define NV20TCL_TX2_MATRIX__SIZE 0x00000010
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|
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+#define NV20TCL_TX3_MATRIX(x) (0x00000780+((x)*4))
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|
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+#define NV20TCL_TX3_MATRIX__SIZE 0x00000010
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|
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+#define NV20TCL_TX0_CLIP_PLANE_A(x) (0x00000840+((x)*16))
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+#define NV20TCL_TX0_CLIP_PLANE_A__SIZE 0x00000004
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+#define NV20TCL_TX0_CLIP_PLANE_B(x) (0x00000844+((x)*16))
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+#define NV20TCL_TX0_CLIP_PLANE_B__SIZE 0x00000004
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|
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+#define NV20TCL_TX0_CLIP_PLANE_C(x) (0x00000848+((x)*16))
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|
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+#define NV20TCL_TX0_CLIP_PLANE_C__SIZE 0x00000004
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|
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+#define NV20TCL_TX0_CLIP_PLANE_D(x) (0x0000084c+((x)*16))
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|
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+#define NV20TCL_TX0_CLIP_PLANE_D__SIZE 0x00000004
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|
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+#define NV20TCL_TX1_CLIP_PLANE_A(x) (0x00000880+((x)*16))
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|
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+#define NV20TCL_TX1_CLIP_PLANE_A__SIZE 0x00000004
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|
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+#define NV20TCL_TX1_CLIP_PLANE_B(x) (0x00000884+((x)*16))
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|
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+#define NV20TCL_TX1_CLIP_PLANE_B__SIZE 0x00000004
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|
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+#define NV20TCL_TX1_CLIP_PLANE_C(x) (0x00000888+((x)*16))
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|
|
+#define NV20TCL_TX1_CLIP_PLANE_C__SIZE 0x00000004
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|
|
+#define NV20TCL_TX1_CLIP_PLANE_D(x) (0x0000088c+((x)*16))
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|
|
+#define NV20TCL_TX1_CLIP_PLANE_D__SIZE 0x00000004
|
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|
|
+#define NV20TCL_TX2_CLIP_PLANE_A(x) (0x000008c0+((x)*16))
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|
|
+#define NV20TCL_TX2_CLIP_PLANE_A__SIZE 0x00000004
|
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|
|
+#define NV20TCL_TX2_CLIP_PLANE_B(x) (0x000008c4+((x)*16))
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|
|
+#define NV20TCL_TX2_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX2_CLIP_PLANE_C(x) (0x000008c8+((x)*16))
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|
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+#define NV20TCL_TX2_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX2_CLIP_PLANE_D(x) (0x000008cc+((x)*16))
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|
|
|
+#define NV20TCL_TX2_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX3_CLIP_PLANE_A(x) (0x00000900+((x)*16))
|
|
|
|
+#define NV20TCL_TX3_CLIP_PLANE_A__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX3_CLIP_PLANE_B(x) (0x00000904+((x)*16))
|
|
|
|
+#define NV20TCL_TX3_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX3_CLIP_PLANE_C(x) (0x00000908+((x)*16))
|
|
|
|
+#define NV20TCL_TX3_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX3_CLIP_PLANE_D(x) (0x0000090c+((x)*16))
|
|
|
|
+#define NV20TCL_TX3_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_FOG_EQUATION_CONSTANT 0x000009c0
|
|
|
|
+#define NV20TCL_FOG_EQUATION_LINEAR 0x000009c4
|
|
|
|
+#define NV20TCL_FOG_EQUATION_QUADRATIC 0x000009c8
|
|
|
|
+#define NV20TCL_FRONT_MATERIAL_SHININESS(x) (0x000009e0+((x)*4))
|
|
|
|
+#define NV20TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006
|
|
|
|
+#define NV20TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x00000a10
|
|
|
|
+#define NV20TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x00000a14
|
|
|
|
+#define NV20TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x00000a18
|
|
|
|
+#define NV20TCL_VIEWPORT_SCALE0_X 0x00000a20
|
|
|
|
+#define NV20TCL_VIEWPORT_SCALE0_Y 0x00000a24
|
|
|
|
+#define NV20TCL_VIEWPORT_SCALE0_Z 0x00000a28
|
|
|
|
+#define NV20TCL_VIEWPORT_SCALE0_W 0x00000a2c
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|
|
|
+#define NV20TCL_POINT_PARAMETER(x) (0x00000a30+((x)*4))
|
|
|
|
+#define NV20TCL_POINT_PARAMETER__SIZE 0x00000008
|
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|
|
+#define NV20TCL_RC_CONSTANT_COLOR0(x) (0x00000a60+((x)*4))
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR0__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR0_B_SHIFT 0
|
|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR0_B_MASK 0x000000ff
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|
|
+#define NV20TCL_RC_CONSTANT_COLOR0_G_SHIFT 8
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR0_G_MASK 0x0000ff00
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|
|
+#define NV20TCL_RC_CONSTANT_COLOR0_R_SHIFT 16
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR0_R_MASK 0x00ff0000
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR0_A_SHIFT 24
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR0_A_MASK 0xff000000
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR1(x) (0x00000a80+((x)*4))
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR1__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR1_B_SHIFT 0
|
|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR1_B_MASK 0x000000ff
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|
|
+#define NV20TCL_RC_CONSTANT_COLOR1_G_SHIFT 8
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR1_G_MASK 0x0000ff00
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR1_R_SHIFT 16
|
|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR1_R_MASK 0x00ff0000
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|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR1_A_SHIFT 24
|
|
|
|
+#define NV20TCL_RC_CONSTANT_COLOR1_A_MASK 0xff000000
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA(x) (0x00000aa0+((x)*4))
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|
|
|
+#define NV20TCL_RC_OUT_ALPHA__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT 0
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|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK 0x0000000f
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|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO 0x00000000
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|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001
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|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG 0x00000003
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|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT 4
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK 0x000000f0
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG 0x00000030
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0_ARB 0x00000080
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1_ARB 0x00000090
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_NV 0x000000c0
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1_NV 0x000000d0
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F_NV 0x000000f0
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT 8
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG 0x00000300
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT (1 << 12)
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT (1 << 13)
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_MUX_SUM (1 << 14)
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_BIAS (1 << 15)
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_BIAS_NONE 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SCALE_SHIFT 17
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SCALE_MASK 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SCALE_NONE 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO_NV 0x00020000
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR_NV 0x00040000
|
|
|
|
+#define NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000
|
|
|
|
+#define NV20TCL_RC_IN_RGB(x) (0x00000ac0+((x)*4))
|
|
|
|
+#define NV20TCL_RC_IN_RGB__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_SHIFT 0
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_MASK 0x0000000f
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_FOG 0x00000003
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_INPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE (1 << 4)
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA 0x00000010
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_SHIFT 5
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_MASK 0x000000e0
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL_NV 0x00000040
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE_NV 0x00000060
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0
|
|
|
|
+#define NV20TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_SHIFT 8
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_FOG 0x00000300
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_SHIFT 13
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_SHIFT 16
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_FOG 0x00030000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE1_ARB 0x00090000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_SHIFT 21
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_SHIFT 24
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_FOG 0x03000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_SHIFT 29
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL_NV 0x40000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV20TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000
|
|
|
|
+#define NV20TCL_VIEWPORT_SCALE1_X 0x00000af0
|
|
|
|
+#define NV20TCL_VIEWPORT_SCALE1_Y 0x00000af4
|
|
|
|
+#define NV20TCL_VIEWPORT_SCALE1_Z 0x00000af8
|
|
|
|
+#define NV20TCL_VIEWPORT_SCALE1_W 0x00000afc
|
|
|
|
+#define NV20TCL_VP_UPLOAD_INST(x) (0x00000b00+((x)*4))
|
|
|
|
+#define NV20TCL_VP_UPLOAD_INST__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_VP_UPLOAD_CONST(x) (0x00000b80+((x)*4))
|
|
|
|
+#define NV20TCL_VP_UPLOAD_CONST__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_R(x) (0x00000c00+((x)*64))
|
|
|
|
+#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_R__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_G(x) (0x00000c04+((x)*64))
|
|
|
|
+#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_G__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_B(x) (0x00000c08+((x)*64))
|
|
|
|
+#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_B__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x) (0x00001000+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x) (0x00001004+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x) (0x00001008+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x) (0x0000100c+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x) (0x00001010+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x) (0x00001014+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x) (0x00001018+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x) (0x0000101c+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x) (0x00001020+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_HALF_VECTOR_X(x) (0x00001028+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_HALF_VECTOR_X__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_HALF_VECTOR_Y(x) (0x0000102c+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_HALF_VECTOR_Y__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_HALF_VECTOR_Z(x) (0x00001030+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_HALF_VECTOR_Z__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_DIRECTION_X(x) (0x00001034+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_DIRECTION_X__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_DIRECTION_Y(x) (0x00001038+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_DIRECTION_Y__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_DIRECTION_Z(x) (0x0000103c+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_DIRECTION_Z__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_POSITION_X(x) (0x0000105c+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_POSITION_X__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_POSITION_Y(x) (0x00001060+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_POSITION_Y__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_POSITION_Z(x) (0x00001064+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_POSITION_Z__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_CONSTANT_ATTENUATION(x) (0x00001068+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_CONSTANT_ATTENUATION__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_LINEAR_ATTENUATION(x) (0x0000106c+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_LINEAR_ATTENUATION__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_LIGHT_QUADRATIC_ATTENUATION(x) (0x00001070+((x)*128))
|
|
|
|
+#define NV20TCL_LIGHT_QUADRATIC_ATTENUATION__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_POLYGON_STIPPLE_ENABLE 0x0000147c
|
|
|
|
+#define NV20TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4))
|
|
|
|
+#define NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020
|
|
|
|
+#define NV20TCL_VERTEX_POS_3F_X 0x00001500
|
|
|
|
+#define NV20TCL_VERTEX_POS_3F_Y 0x00001504
|
|
|
|
+#define NV20TCL_VERTEX_POS_3F_Z 0x00001508
|
|
|
|
+#define NV20TCL_VERTEX_POS_4F_X 0x00001518
|
|
|
|
+#define NV20TCL_VERTEX_POS_4F_Y 0x0000151c
|
|
|
|
+#define NV20TCL_VERTEX_POS_4F_Z 0x00001520
|
|
|
|
+#define NV20TCL_VERTEX_POS_3I_XY 0x00001528
|
|
|
|
+#define NV20TCL_VERTEX_POS_3I_XY_X_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_POS_3I_XY_X_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_POS_3I_XY_Y_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_POS_3I_XY_Y_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_VERTEX_POS_3I_Z 0x0000152c
|
|
|
|
+#define NV20TCL_VERTEX_POS_3I_Z_Z_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_POS_3I_Z_Z_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3F_X 0x00001530
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3F_Y 0x00001534
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3F_Z 0x00001538
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3I_XY 0x00001540
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3I_XY_X_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3I_XY_X_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3I_XY_Y_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3I_XY_Y_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3I_Z 0x00001544
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3I_Z_Z_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_NOR_3I_Z_Z_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_COL_4F_X 0x00001550
|
|
|
|
+#define NV20TCL_VERTEX_COL_4F_Y 0x00001554
|
|
|
|
+#define NV20TCL_VERTEX_COL_4F_Z 0x00001558
|
|
|
|
+#define NV20TCL_VERTEX_COL_4F_W 0x0000155c
|
|
|
|
+#define NV20TCL_VERTEX_COL_3F_X 0x00001560
|
|
|
|
+#define NV20TCL_VERTEX_COL_3F_Y 0x00001564
|
|
|
|
+#define NV20TCL_VERTEX_COL_3F_Z 0x00001568
|
|
|
|
+#define NV20TCL_VERTEX_COL_4I 0x0000156c
|
|
|
|
+#define NV20TCL_VERTEX_COL_4I_R_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_COL_4I_R_MASK 0x000000ff
|
|
|
|
+#define NV20TCL_VERTEX_COL_4I_G_SHIFT 8
|
|
|
|
+#define NV20TCL_VERTEX_COL_4I_G_MASK 0x0000ff00
|
|
|
|
+#define NV20TCL_VERTEX_COL_4I_B_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_COL_4I_B_MASK 0x00ff0000
|
|
|
|
+#define NV20TCL_VERTEX_COL_4I_A_SHIFT 24
|
|
|
|
+#define NV20TCL_VERTEX_COL_4I_A_MASK 0xff000000
|
|
|
|
+#define NV20TCL_VERTEX_COL2_3F_X 0x00001580
|
|
|
|
+#define NV20TCL_VERTEX_COL2_3F_Y 0x00001584
|
|
|
|
+#define NV20TCL_VERTEX_COL2_3F_Z 0x00001588
|
|
|
|
+#define NV20TCL_VERTEX_COL2_4I 0x0000158c
|
|
|
|
+#define NV20TCL_VERTEX_COL2_4I_R_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_COL2_4I_R_MASK 0x000000ff
|
|
|
|
+#define NV20TCL_VERTEX_COL2_4I_G_SHIFT 8
|
|
|
|
+#define NV20TCL_VERTEX_COL2_4I_G_MASK 0x0000ff00
|
|
|
|
+#define NV20TCL_VERTEX_COL2_4I_B_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_COL2_4I_B_MASK 0x00ff0000
|
|
|
|
+#define NV20TCL_VERTEX_COL2_4I_A_SHIFT 24
|
|
|
|
+#define NV20TCL_VERTEX_COL2_4I_A_MASK 0xff000000
|
|
|
|
+#define NV20TCL_VERTEX_TX0_2F_S 0x00001590
|
|
|
|
+#define NV20TCL_VERTEX_TX0_2F_T 0x00001594
|
|
|
|
+#define NV20TCL_VERTEX_TX0_2I 0x00001598
|
|
|
|
+#define NV20TCL_VERTEX_TX0_2I_S_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_TX0_2I_S_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_TX0_2I_T_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_TX0_2I_T_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4F_S 0x000015a0
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4F_T 0x000015a4
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4F_R 0x000015a8
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4F_Q 0x000015ac
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_ST 0x000015b0
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_ST_S_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_ST_S_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_ST_T_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_ST_T_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_RQ 0x000015b4
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_RQ_R_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_RQ_R_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_RQ_Q_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_TX0_4I_RQ_Q_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_VERTEX_TX1_2F_S 0x000015b8
|
|
|
|
+#define NV20TCL_VERTEX_TX1_2F_T 0x000015bc
|
|
|
|
+#define NV20TCL_VERTEX_TX1_2I 0x000015c0
|
|
|
|
+#define NV20TCL_VERTEX_TX1_2I_S_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_TX1_2I_S_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_TX1_2I_T_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_TX1_2I_T_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_VERTEX_TX1_4F_S 0x000015c8
|
|
|
|
+#define NV20TCL_VERTEX_TX1_4F_T 0x000015cc
|
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|
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+#define NV20TCL_VERTEX_TX1_4F_R 0x000015d0
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|
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+#define NV20TCL_VERTEX_TX1_4F_Q 0x000015d4
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+#define NV20TCL_VERTEX_TX1_4I_ST 0x000015d8
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|
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+#define NV20TCL_VERTEX_TX1_4I_ST_S_SHIFT 0
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+#define NV20TCL_VERTEX_TX1_4I_ST_S_MASK 0x0000ffff
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|
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+#define NV20TCL_VERTEX_TX1_4I_ST_T_SHIFT 16
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+#define NV20TCL_VERTEX_TX1_4I_ST_T_MASK 0xffff0000
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|
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+#define NV20TCL_VERTEX_TX1_4I_RQ 0x000015dc
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|
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+#define NV20TCL_VERTEX_TX1_4I_RQ_R_SHIFT 0
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+#define NV20TCL_VERTEX_TX1_4I_RQ_R_MASK 0x0000ffff
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+#define NV20TCL_VERTEX_TX1_4I_RQ_Q_SHIFT 16
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+#define NV20TCL_VERTEX_TX1_4I_RQ_Q_MASK 0xffff0000
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|
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+#define NV20TCL_VERTEX_TX2_2F_S 0x000015e0
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|
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+#define NV20TCL_VERTEX_TX2_2F_T 0x000015e4
|
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|
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+#define NV20TCL_VERTEX_TX2_2I 0x000015e8
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+#define NV20TCL_VERTEX_TX2_2I_S_SHIFT 0
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+#define NV20TCL_VERTEX_TX2_2I_S_MASK 0x0000ffff
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+#define NV20TCL_VERTEX_TX2_2I_T_SHIFT 16
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+#define NV20TCL_VERTEX_TX2_2I_T_MASK 0xffff0000
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|
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+#define NV20TCL_VERTEX_TX2_4F_S 0x000015f0
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|
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+#define NV20TCL_VERTEX_TX2_4F_T 0x000015f4
|
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|
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+#define NV20TCL_VERTEX_TX2_4F_R 0x000015f8
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|
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+#define NV20TCL_VERTEX_TX2_4F_Q 0x000015fc
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|
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+#define NV20TCL_VERTEX_TX2_4I_ST 0x00001600
|
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|
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+#define NV20TCL_VERTEX_TX2_4I_ST_S_SHIFT 0
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+#define NV20TCL_VERTEX_TX2_4I_ST_S_MASK 0x0000ffff
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|
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+#define NV20TCL_VERTEX_TX2_4I_ST_T_SHIFT 16
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|
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+#define NV20TCL_VERTEX_TX2_4I_ST_T_MASK 0xffff0000
|
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|
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+#define NV20TCL_VERTEX_TX2_4I_RQ 0x00001604
|
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|
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+#define NV20TCL_VERTEX_TX2_4I_RQ_R_SHIFT 0
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|
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+#define NV20TCL_VERTEX_TX2_4I_RQ_R_MASK 0x0000ffff
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+#define NV20TCL_VERTEX_TX2_4I_RQ_Q_SHIFT 16
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+#define NV20TCL_VERTEX_TX2_4I_RQ_Q_MASK 0xffff0000
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+#define NV20TCL_VERTEX_TX3_2F_S 0x00001608
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|
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+#define NV20TCL_VERTEX_TX3_2F_T 0x0000160c
|
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|
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+#define NV20TCL_VERTEX_TX3_2I 0x00001610
|
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|
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+#define NV20TCL_VERTEX_TX3_2I_S_SHIFT 0
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|
|
+#define NV20TCL_VERTEX_TX3_2I_S_MASK 0x0000ffff
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|
|
+#define NV20TCL_VERTEX_TX3_2I_T_SHIFT 16
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|
|
+#define NV20TCL_VERTEX_TX3_2I_T_MASK 0xffff0000
|
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|
|
+#define NV20TCL_VERTEX_TX3_4F_S 0x00001620
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4F_T 0x00001624
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4F_R 0x00001628
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4F_Q 0x0000162c
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_ST 0x00001630
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_ST_S_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_ST_S_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_ST_T_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_ST_T_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_RQ 0x00001634
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_RQ_R_SHIFT 0
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_RQ_R_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_RQ_Q_SHIFT 16
|
|
|
|
+#define NV20TCL_VERTEX_TX3_4I_RQ_Q_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_VERTEX_FOG_1F 0x00001698
|
|
|
|
+#define NV20TCL_EDGEFLAG_ENABLE 0x000016bc
|
|
|
|
+#define NV20TCL_VTXBUF_ADDRESS(x) (0x00001720+((x)*4))
|
|
|
|
+#define NV20TCL_VTXBUF_ADDRESS__SIZE 0x00000010
|
|
|
|
+#define NV20TCL_VTXBUF_ADDRESS_DMA1 (1 << 31)
|
|
|
|
+#define NV20TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0
|
|
|
|
+#define NV20TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff
|
|
|
|
+#define NV20TCL_VTXFMT(x) (0x00001760+((x)*4))
|
|
|
|
+#define NV20TCL_VTXFMT__SIZE 0x00000010
|
|
|
|
+#define NV20TCL_VTXFMT_TYPE_SHIFT 0
|
|
|
|
+#define NV20TCL_VTXFMT_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV20TCL_VTXFMT_TYPE_FLOAT 0x00000002
|
|
|
|
+#define NV20TCL_VTXFMT_TYPE_UBYTE 0x00000004
|
|
|
|
+#define NV20TCL_VTXFMT_TYPE_USHORT 0x00000005
|
|
|
|
+#define NV20TCL_VTXFMT_SIZE_SHIFT 4
|
|
|
|
+#define NV20TCL_VTXFMT_SIZE_MASK 0x000000f0
|
|
|
|
+#define NV20TCL_VTXFMT_STRIDE_SHIFT 8
|
|
|
|
+#define NV20TCL_VTXFMT_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV20TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x000017a0
|
|
|
|
+#define NV20TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x000017a4
|
|
|
|
+#define NV20TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x000017a8
|
|
|
|
+#define NV20TCL_COLOR_MATERIAL_BACK_A 0x000017ac
|
|
|
|
+#define NV20TCL_COLOR_MATERIAL_BACK_R 0x000017b0
|
|
|
|
+#define NV20TCL_COLOR_MATERIAL_BACK_G 0x000017b4
|
|
|
|
+#define NV20TCL_COLOR_MATERIAL_BACK_B 0x000017b8
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_ENABLE 0x000017bc
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP 0x000017c0
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_CLEAR 0x00001500
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_AND 0x00001501
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_AND_REVERSE 0x00001502
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_COPY 0x00001503
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_AND_INVERTED 0x00001504
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_NOOP 0x00001505
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_XOR 0x00001506
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_OR 0x00001507
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_NOR 0x00001508
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_EQUIV 0x00001509
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_INVERT 0x0000150a
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_OR_REVERSE 0x0000150b
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED 0x0000150c
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_OR_INVERTED 0x0000150d
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_NAND 0x0000150e
|
|
|
|
+#define NV20TCL_COLOR_LOGIC_OP_OP_SET 0x0000150f
|
|
|
|
+#define NV20TCL_LIGHT_MODEL_TWO_SIDE_ENABLE 0x000017c4
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE 0x000017f8
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_S (1 << 0)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_S_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_S_LESS 0x00000001
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_T (1 << 1)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_T_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_T_LESS 0x00000002
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_R (1 << 2)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_R_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_R_LESS 0x00000004
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_Q (1 << 3)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_Q_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX0_Q_LESS 0x00000008
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_S (1 << 4)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_S_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_S_LESS 0x00000010
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_T (1 << 5)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_T_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_T_LESS 0x00000020
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_R (1 << 6)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_R_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_R_LESS 0x00000040
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_Q (1 << 7)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_Q_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX1_Q_LESS 0x00000080
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_S (1 << 8)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_S_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_S_LESS 0x00000100
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_T (1 << 9)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_T_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_T_LESS 0x00000200
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_R (1 << 10)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_R_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_R_LESS 0x00000400
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_Q (1 << 11)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_Q_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX2_Q_LESS 0x00000800
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_S (1 << 12)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_S_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_S_LESS 0x00001000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_T (1 << 13)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_T_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_T_LESS 0x00002000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_R (1 << 14)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_R_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_R_LESS 0x00004000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_Q (1 << 15)
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_Q_GEQUAL 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_CULL_MODE_TX3_Q_LESS 0x00008000
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END 0x000017fc
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_STOP 0x00000000
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_POINTS 0x00000001
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_LINES 0x00000002
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_LINE_LOOP 0x00000003
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_LINE_STRIP 0x00000004
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_TRIANGLES 0x00000005
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP 0x00000006
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_TRIANGLE_FAN 0x00000007
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_QUADS 0x00000008
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_QUAD_STRIP 0x00000009
|
|
|
|
+#define NV20TCL_VERTEX_BEGIN_END_POLYGON 0x0000000a
|
|
|
|
+#define NV20TCL_VB_ELEMENT_U16 0x00001800
|
|
|
|
+#define NV20TCL_VB_ELEMENT_U16_I0_SHIFT 0
|
|
|
|
+#define NV20TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_VB_ELEMENT_U16_I1_SHIFT 16
|
|
|
|
+#define NV20TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_VB_VERTEX_BATCH 0x00001810
|
|
|
|
+#define NV20TCL_VB_VERTEX_BATCH_OFFSET_SHIFT 0
|
|
|
|
+#define NV20TCL_VB_VERTEX_BATCH_OFFSET_MASK 0x00ffffff
|
|
|
|
+#define NV20TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24
|
|
|
|
+#define NV20TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000
|
|
|
|
+#define NV20TCL_VERTEX_DATA 0x00001818
|
|
|
|
+#define NV20TCL_TX_SHADER_CONST_EYE_X 0x0000181c
|
|
|
|
+#define NV20TCL_TX_SHADER_CONST_EYE_Y 0x00001820
|
|
|
|
+#define NV20TCL_TX_SHADER_CONST_EYE_Z 0x00001824
|
|
|
|
+#define NV20TCL_VTX_ATTR_4F_X(x) (0x00001a00+((x)*16))
|
|
|
|
+#define NV20TCL_VTX_ATTR_4F_X__SIZE 0x00000010
|
|
|
|
+#define NV20TCL_VTX_ATTR_4F_Y(x) (0x00001a04+((x)*16))
|
|
|
|
+#define NV20TCL_VTX_ATTR_4F_Y__SIZE 0x00000010
|
|
|
|
+#define NV20TCL_VTX_ATTR_4F_Z(x) (0x00001a08+((x)*16))
|
|
|
|
+#define NV20TCL_VTX_ATTR_4F_Z__SIZE 0x00000010
|
|
|
|
+#define NV20TCL_VTX_ATTR_4F_W(x) (0x00001a0c+((x)*16))
|
|
|
|
+#define NV20TCL_VTX_ATTR_4F_W__SIZE 0x00000010
|
|
|
|
+#define NV20TCL_TX_OFFSET(x) (0x00001b00+((x)*64))
|
|
|
|
+#define NV20TCL_TX_OFFSET__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_FORMAT(x) (0x00001b04+((x)*64))
|
|
|
|
+#define NV20TCL_TX_FORMAT__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_FORMAT_DMA0 (1 << 0)
|
|
|
|
+#define NV20TCL_TX_FORMAT_DMA1 (1 << 1)
|
|
|
|
+#define NV20TCL_TX_FORMAT_CUBIC (1 << 2)
|
|
|
|
+#define NV20TCL_TX_FORMAT_NO_BORDER (1 << 3)
|
|
|
|
+#define NV20TCL_TX_FORMAT_DIMS_SHIFT 4
|
|
|
|
+#define NV20TCL_TX_FORMAT_DIMS_MASK 0x000000f0
|
|
|
|
+#define NV20TCL_TX_FORMAT_DIMS_1D 0x00000010
|
|
|
|
+#define NV20TCL_TX_FORMAT_DIMS_2D 0x00000020
|
|
|
|
+#define NV20TCL_TX_FORMAT_DIMS_3D 0x00000030
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_SHIFT 8
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_MASK 0x0000ff00
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_L8 0x00000000
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_A8 0x00000100
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000200
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000300
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000400
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000500
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000600
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000700
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_INDEX8 0x00000b00
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_DXT1 0x00000c00
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_DXT3 0x00000e00
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_DXT5 0x00000f00
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00001000
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00001100
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00001200
|
|
|
|
+#define NV20TCL_TX_FORMAT_FORMAT_L8_RECT 0x00001300
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|
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+#define NV20TCL_TX_FORMAT_FORMAT_A8L8 0x00001a00
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+#define NV20TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00001b00
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+#define NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00001d00
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+#define NV20TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00001e00
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+#define NV20TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00002000
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+#define NV20TCL_TX_FORMAT_FORMAT_DSDT 0x00002800
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+#define NV20TCL_TX_FORMAT_FORMAT_A16 0x00003200
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+#define NV20TCL_TX_FORMAT_FORMAT_HILO16 0x00003300
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+#define NV20TCL_TX_FORMAT_FORMAT_A16_RECT 0x00003500
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+#define NV20TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00003600
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+#define NV20TCL_TX_FORMAT_FORMAT_HILO8 0x00004400
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+#define NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00004500
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+#define NV20TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00004600
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|
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+#define NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00004700
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+#define NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00004a00
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+#define NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00004b00
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+#define NV20TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00004c00
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+#define NV20TCL_TX_FORMAT_MIPMAP (1 << 19)
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+#define NV20TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 20
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+#define NV20TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x00f00000
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+#define NV20TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 24
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+#define NV20TCL_TX_FORMAT_BASE_SIZE_V_MASK 0x0f000000
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+#define NV20TCL_TX_FORMAT_BASE_SIZE_W_SHIFT 28
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+#define NV20TCL_TX_FORMAT_BASE_SIZE_W_MASK 0xf0000000
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+#define NV20TCL_TX_WRAP(x) (0x00001b08+((x)*64))
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|
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+#define NV20TCL_TX_WRAP__SIZE 0x00000004
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|
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+#define NV20TCL_TX_WRAP_S_SHIFT 0
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|
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+#define NV20TCL_TX_WRAP_S_MASK 0x000000ff
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|
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+#define NV20TCL_TX_WRAP_S_REPEAT 0x00000001
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|
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+#define NV20TCL_TX_WRAP_S_MIRRORED_REPEAT 0x00000002
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|
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+#define NV20TCL_TX_WRAP_S_CLAMP_TO_EDGE 0x00000003
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|
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+#define NV20TCL_TX_WRAP_S_CLAMP_TO_BORDER 0x00000004
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|
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+#define NV20TCL_TX_WRAP_S_CLAMP 0x00000005
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|
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+#define NV20TCL_TX_WRAP_T_SHIFT 8
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|
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+#define NV20TCL_TX_WRAP_T_MASK 0x00000f00
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|
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+#define NV20TCL_TX_WRAP_T_REPEAT 0x00000100
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|
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+#define NV20TCL_TX_WRAP_T_MIRRORED_REPEAT 0x00000200
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|
|
+#define NV20TCL_TX_WRAP_T_CLAMP_TO_EDGE 0x00000300
|
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|
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+#define NV20TCL_TX_WRAP_T_CLAMP_TO_BORDER 0x00000400
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|
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+#define NV20TCL_TX_WRAP_T_CLAMP 0x00000500
|
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|
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+#define NV20TCL_TX_WRAP_R_SHIFT 16
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|
|
+#define NV20TCL_TX_WRAP_R_MASK 0x000f0000
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|
|
|
+#define NV20TCL_TX_WRAP_R_REPEAT 0x00010000
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|
|
+#define NV20TCL_TX_WRAP_R_MIRRORED_REPEAT 0x00020000
|
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|
|
+#define NV20TCL_TX_WRAP_R_CLAMP_TO_EDGE 0x00030000
|
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|
|
+#define NV20TCL_TX_WRAP_R_CLAMP_TO_BORDER 0x00040000
|
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|
|
+#define NV20TCL_TX_WRAP_R_CLAMP 0x00050000
|
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|
|
+#define NV20TCL_TX_ENABLE(x) (0x00001b0c+((x)*64))
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|
|
+#define NV20TCL_TX_ENABLE__SIZE 0x00000004
|
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|
+#define NV20TCL_TX_ENABLE_ANISO_SHIFT 4
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|
|
+#define NV20TCL_TX_ENABLE_ANISO_MASK 0x00000030
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|
|
|
+#define NV20TCL_TX_ENABLE_ANISO_NONE 0x00000000
|
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|
|
+#define NV20TCL_TX_ENABLE_ANISO_2X 0x00000010
|
|
|
|
+#define NV20TCL_TX_ENABLE_ANISO_4X 0x00000020
|
|
|
|
+#define NV20TCL_TX_ENABLE_ANISO_8X 0x00000030
|
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|
|
+#define NV20TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14
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|
|
+#define NV20TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000
|
|
|
|
+#define NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26
|
|
|
|
+#define NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000
|
|
|
|
+#define NV20TCL_TX_ENABLE_ENABLE (1 << 30)
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|
|
+#define NV20TCL_TX_SWIZZLE(x) (0x00001b10+((x)*64))
|
|
|
|
+#define NV20TCL_TX_SWIZZLE__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_SWIZZLE_RECT_PITCH_SHIFT 16
|
|
|
|
+#define NV20TCL_TX_SWIZZLE_RECT_PITCH_MASK 0xffff0000
|
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|
|
+#define NV20TCL_TX_FILTER(x) (0x00001b14+((x)*64))
|
|
|
|
+#define NV20TCL_TX_FILTER__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_FILTER_LOD_BIAS_SHIFT 8
|
|
|
|
+#define NV20TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_TX_FILTER_MINIFY_SHIFT 16
|
|
|
|
+#define NV20TCL_TX_FILTER_MINIFY_MASK 0x000f0000
|
|
|
|
+#define NV20TCL_TX_FILTER_MINIFY_NEAREST 0x00010000
|
|
|
|
+#define NV20TCL_TX_FILTER_MINIFY_LINEAR 0x00020000
|
|
|
|
+#define NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x00030000
|
|
|
|
+#define NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x00040000
|
|
|
|
+#define NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x00050000
|
|
|
|
+#define NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x00060000
|
|
|
|
+#define NV20TCL_TX_FILTER_MAGNIFY_SHIFT 24
|
|
|
|
+#define NV20TCL_TX_FILTER_MAGNIFY_MASK 0x0f000000
|
|
|
|
+#define NV20TCL_TX_FILTER_MAGNIFY_NEAREST 0x01000000
|
|
|
|
+#define NV20TCL_TX_FILTER_MAGNIFY_LINEAR 0x02000000
|
|
|
|
+#define NV20TCL_TX_NPOT_SIZE(x) (0x00001b1c+((x)*64))
|
|
|
|
+#define NV20TCL_TX_NPOT_SIZE__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_NPOT_SIZE_H_SHIFT 0
|
|
|
|
+#define NV20TCL_TX_NPOT_SIZE_H_MASK 0x0000ffff
|
|
|
|
+#define NV20TCL_TX_NPOT_SIZE_W_SHIFT 16
|
|
|
|
+#define NV20TCL_TX_NPOT_SIZE_W_MASK 0xffff0000
|
|
|
|
+#define NV20TCL_TX_PALETTE_OFFSET(x) (0x00001b20+((x)*64))
|
|
|
|
+#define NV20TCL_TX_PALETTE_OFFSET__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR(x) (0x00001b24+((x)*64))
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR_B_SHIFT 0
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR_G_SHIFT 8
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR_R_SHIFT 16
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR_A_SHIFT 24
|
|
|
|
+#define NV20TCL_TX_BORDER_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV20TCL_TX_SHADER_OFFSET_MATRIX00(x) (0x00001b28+((x)*64))
|
|
|
|
+#define NV20TCL_TX_SHADER_OFFSET_MATRIX00__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_SHADER_OFFSET_MATRIX01(x) (0x00001b2c+((x)*64))
|
|
|
|
+#define NV20TCL_TX_SHADER_OFFSET_MATRIX01__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_SHADER_OFFSET_MATRIX11(x) (0x00001b30+((x)*64))
|
|
|
|
+#define NV20TCL_TX_SHADER_OFFSET_MATRIX11__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_TX_SHADER_OFFSET_MATRIX10(x) (0x00001b34+((x)*64))
|
|
|
|
+#define NV20TCL_TX_SHADER_OFFSET_MATRIX10__SIZE 0x00000004
|
|
|
|
+#define NV20TCL_DEPTH_UNK17D8 0x00001d78
|
|
|
|
+#define NV20TCL_DEPTH_UNK17D8_CLAMP_SHIFT 4
|
|
|
|
+#define NV20TCL_DEPTH_UNK17D8_CLAMP_MASK 0x000000f0
|
|
|
|
+#define NV20TCL_MULTISAMPLE_CONTROL 0x00001d7c
|
|
|
|
+#define NV20TCL_CLEAR_DEPTH_VALUE 0x00001d8c
|
|
|
|
+#define NV20TCL_CLEAR_VALUE 0x00001d90
|
|
|
|
+#define NV20TCL_CLEAR_BUFFERS 0x00001d94
|
|
|
|
+#define NV20TCL_CLEAR_BUFFERS_COLOR_A (1 << 7)
|
|
|
|
+#define NV20TCL_CLEAR_BUFFERS_COLOR_B (1 << 6)
|
|
|
|
+#define NV20TCL_CLEAR_BUFFERS_COLOR_G (1 << 5)
|
|
|
|
+#define NV20TCL_CLEAR_BUFFERS_COLOR_R (1 << 4)
|
|
|
|
+#define NV20TCL_CLEAR_BUFFERS_STENCIL (1 << 1)
|
|
|
|
+#define NV20TCL_CLEAR_BUFFERS_DEPTH (1 << 0)
|
|
|
|
+#define NV20TCL_RC_COLOR0 0x00001e20
|
|
|
|
+#define NV20TCL_RC_COLOR0_B_SHIFT 0
|
|
|
|
+#define NV20TCL_RC_COLOR0_B_MASK 0x000000ff
|
|
|
|
+#define NV20TCL_RC_COLOR0_G_SHIFT 8
|
|
|
|
+#define NV20TCL_RC_COLOR0_G_MASK 0x0000ff00
|
|
|
|
+#define NV20TCL_RC_COLOR0_R_SHIFT 16
|
|
|
|
+#define NV20TCL_RC_COLOR0_R_MASK 0x00ff0000
|
|
|
|
+#define NV20TCL_RC_COLOR0_A_SHIFT 24
|
|
|
|
+#define NV20TCL_RC_COLOR0_A_MASK 0xff000000
|
|
|
|
+#define NV20TCL_RC_COLOR1 0x00001e24
|
|
|
|
+#define NV20TCL_RC_COLOR1_B_SHIFT 0
|
|
|
|
+#define NV20TCL_RC_COLOR1_B_MASK 0x000000ff
|
|
|
|
+#define NV20TCL_RC_COLOR1_G_SHIFT 8
|
|
|
|
+#define NV20TCL_RC_COLOR1_G_MASK 0x0000ff00
|
|
|
|
+#define NV20TCL_RC_COLOR1_R_SHIFT 16
|
|
|
|
+#define NV20TCL_RC_COLOR1_R_MASK 0x00ff0000
|
|
|
|
+#define NV20TCL_RC_COLOR1_A_SHIFT 24
|
|
|
|
+#define NV20TCL_RC_COLOR1_A_MASK 0xff000000
|
|
|
|
+#define NV20TCL_BACK_MATERIAL_SHININESS(x) (0x00001e28+((x)*4))
|
|
|
|
+#define NV20TCL_BACK_MATERIAL_SHININESS__SIZE 0x00000006
|
|
|
|
+#define NV20TCL_RC_OUT_RGB(x) (0x00001e40+((x)*4))
|
|
|
|
+#define NV20TCL_RC_OUT_RGB__SIZE 0x00000008
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT 0
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_MASK 0x0000000f
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_FOG 0x00000003
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT 4
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_MASK 0x000000f0
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_FOG 0x00000030
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0_ARB 0x00000080
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1_ARB 0x00000090
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_NV 0x000000c0
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1_NV 0x000000d0
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F_NV 0x000000f0
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT 8
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_FOG 0x00000300
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_CD_DOT_PRODUCT (1 << 12)
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_AB_DOT_PRODUCT (1 << 13)
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_MUX_SUM (1 << 14)
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_BIAS (1 << 15)
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_BIAS_NONE 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SCALE_SHIFT 17
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SCALE_MASK 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SCALE_NONE 0x00000000
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO_NV 0x00020000
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR_NV 0x00040000
|
|
|
|
+#define NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000
|
|
|
|
+#define NV20TCL_RC_ENABLE 0x00001e60
|
|
|
|
+#define NV20TCL_RC_ENABLE_NUM_COMBINERS_SHIFT 0
|
|
|
|
+#define NV20TCL_RC_ENABLE_NUM_COMBINERS_MASK 0x0000000f
|
|
|
|
+#define NV20TCL_TX_RCOMP 0x00001e6c
|
|
|
|
+#define NV20TCL_TX_RCOMP_NEVER 0x00000000
|
|
|
|
+#define NV20TCL_TX_RCOMP_GREATER 0x00000001
|
|
|
|
+#define NV20TCL_TX_RCOMP_EQUAL 0x00000002
|
|
|
|
+#define NV20TCL_TX_RCOMP_GEQUAL 0x00000003
|
|
|
|
+#define NV20TCL_TX_RCOMP_LESS 0x00000004
|
|
|
|
+#define NV20TCL_TX_RCOMP_NOTEQUAL 0x00000005
|
|
|
|
+#define NV20TCL_TX_RCOMP_LEQUAL 0x00000006
|
|
|
|
+#define NV20TCL_TX_RCOMP_ALWAYS 0x00000007
|
|
|
|
+#define NV20TCL_TX_SHADER_OP 0x00001e70
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_SHIFT 0
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_MASK 0x0000001f
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_NONE 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_TEXTURE_2D 0x00000001
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_PASS_THROUGH 0x00000004
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_CULL_FRAGMENT 0x00000005
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_OFFSET_TEXTURE_2D 0x00000006
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT_TEXTURE_2D 0x00000009
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT_DEPTH_REPLACE 0x0000000a
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_DEPENDANT_AR_TEXTURE_2D 0x0000000f
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_DEPENDANT_GB_TEXTURE_2D 0x00000010
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT 0x00000011
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_SHIFT 5
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_MASK 0x000003e0
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_NONE 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_TEXTURE_2D 0x00000020
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_PASS_THROUGH 0x00000080
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_CULL_FRAGMENT 0x000000a0
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_OFFSET_TEXTURE_2D 0x000000c0
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT_TEXTURE_2D 0x00000120
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT_DEPTH_REPLACE 0x00000140
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_DEPENDANT_AR_TEXTURE_2D 0x000001e0
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_DEPENDANT_GB_TEXTURE_2D 0x00000200
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT 0x00000220
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_SHIFT 10
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_MASK 0x00007c00
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_NONE 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_TEXTURE_2D 0x00000400
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_PASS_THROUGH 0x00001000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_CULL_FRAGMENT 0x00001400
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_OFFSET_TEXTURE_2D 0x00001800
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT_TEXTURE_2D 0x00002400
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT_DEPTH_REPLACE 0x00002800
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_DEPENDANT_AR_TEXTURE_2D 0x00003c00
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_DEPENDANT_GB_TEXTURE_2D 0x00004000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT 0x00004400
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_SHIFT 15
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_MASK 0x000f8000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_NONE 0x00000000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_TEXTURE_2D 0x00008000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_PASS_THROUGH 0x00020000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_CULL_FRAGMENT 0x00028000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_OFFSET_TEXTURE_2D 0x00030000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT_TEXTURE_2D 0x00048000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT_DEPTH_REPLACE 0x00050000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_DEPENDANT_AR_TEXTURE_2D 0x00078000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_DEPENDANT_GB_TEXTURE_2D 0x00080000
|
|
|
|
+#define NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT 0x00088000
|
|
|
|
+#define NV20TCL_TX_SHADER_DOTMAPPING 0x00001e74
|
|
|
|
+#define NV20TCL_TX_SHADER_DOTMAPPING_TX0_SHIFT 0
|
|
|
|
+#define NV20TCL_TX_SHADER_DOTMAPPING_TX0_MASK 0x0000000f
|
|
|
|
+#define NV20TCL_TX_SHADER_DOTMAPPING_TX1_SHIFT 4
|
|
|
|
+#define NV20TCL_TX_SHADER_DOTMAPPING_TX1_MASK 0x000000f0
|
|
|
|
+#define NV20TCL_TX_SHADER_DOTMAPPING_TX2_SHIFT 8
|
|
|
|
+#define NV20TCL_TX_SHADER_DOTMAPPING_TX2_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_TX_SHADER_DOTMAPPING_TX3_SHIFT 12
|
|
|
|
+#define NV20TCL_TX_SHADER_DOTMAPPING_TX3_MASK 0x0000f000
|
|
|
|
+#define NV20TCL_TX_SHADER_PREVIOUS 0x00001e78
|
|
|
|
+#define NV20TCL_TX_SHADER_PREVIOUS_TX0_SHIFT 8
|
|
|
|
+#define NV20TCL_TX_SHADER_PREVIOUS_TX0_MASK 0x00000f00
|
|
|
|
+#define NV20TCL_TX_SHADER_PREVIOUS_TX1_SHIFT 12
|
|
|
|
+#define NV20TCL_TX_SHADER_PREVIOUS_TX1_MASK 0x0000f000
|
|
|
|
+#define NV20TCL_TX_SHADER_PREVIOUS_TX2_SHIFT 16
|
|
|
|
+#define NV20TCL_TX_SHADER_PREVIOUS_TX2_MASK 0x00030000
|
|
|
|
+#define NV20TCL_TX_SHADER_PREVIOUS_TX3_SHIFT 20
|
|
|
|
+#define NV20TCL_TX_SHADER_PREVIOUS_TX3_MASK 0x00300000
|
|
|
|
+#define NV20TCL_ENGINE 0x00001e94
|
|
|
|
+#define NV20TCL_ENGINE_VP (1 << 1)
|
|
|
|
+#define NV20TCL_ENGINE_FIXED (1 << 2)
|
|
|
|
+#define NV20TCL_VP_UPLOAD_FROM_ID 0x00001e9c
|
|
|
|
+#define NV20TCL_VP_START_FROM_ID 0x00001ea0
|
|
|
|
+#define NV20TCL_VP_UPLOAD_CONST_ID 0x00001ea4
|
|
|
|
+#define NV20TCL_VIEWPORT_TRANSLATE_X 0x00001f00
|
|
|
|
+#define NV20TCL_VIEWPORT_TRANSLATE_Y 0x00001f04
|
|
|
|
+#define NV20TCL_VIEWPORT_TRANSLATE_Z 0x00001f08
|
|
|
|
+#define NV20TCL_VIEWPORT_TRANSLATE_W 0x00001f0c
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV17TCL 0x00000099
|
|
|
|
+
|
|
|
|
+#define NV17TCL_DMA_IN_MEMORY4 0x000001ac
|
|
|
|
+#define NV17TCL_DMA_IN_MEMORY5 0x000001b0
|
|
|
|
+#define NV17TCL_COLOR_MASK_ENABLE 0x000002bc
|
|
|
|
+#define NV17TCL_LMA_DEPTH_BUFFER_PITCH 0x00000d5c
|
|
|
|
+#define NV17TCL_LMA_DEPTH_BUFFER_OFFSET 0x00000d60
|
|
|
|
+#define NV17TCL_LMA_DEPTH_FILL_VALUE 0x00000d68
|
|
|
|
+#define NV17TCL_LMA_DEPTH_BUFFER_CLEAR 0x00000d6c
|
|
|
|
+#define NV17TCL_LMA_DEPTH_ENABLE 0x00001658
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV20_SWIZZLED_SURFACE 0x0000009e
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV12_IMAGE_BLIT 0x0000009f
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV30_CONTEXT_SURFACES_2D 0x00000362
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV30_STRETCHED_IMAGE_FROM_CPU 0x00000366
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV30_TEXTURE_FROM_CPU 0x0000037b
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV30_SCALED_IMAGE_FROM_MEMORY 0x00000389
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV30_IMAGE_FROM_CPU 0x0000038a
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV30TCL 0x00000397
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV30_SWIZZLED_SURFACE 0x0000039e
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV35TCL 0x00000497
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV25TCL 0x00000597
|
|
|
|
+
|
|
|
|
+#define NV25TCL_DMA_IN_MEMORY4 0x0000019c
|
|
|
|
+#define NV25TCL_DMA_IN_MEMORY5 0x000001a0
|
|
|
|
+#define NV25TCL_DMA_IN_MEMORY8 0x000001ac
|
|
|
|
+#define NV25TCL_DMA_IN_MEMORY9 0x000001b0
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV34TCL 0x00000697
|
|
|
|
+
|
|
|
|
+#define NV34TCL_NOP 0x00000100
|
|
|
|
+#define NV34TCL_NOTIFY 0x00000104
|
|
|
|
+#define NV34TCL_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV34TCL_DMA_TEXTURE0 0x00000184
|
|
|
|
+#define NV34TCL_DMA_TEXTURE1 0x00000188
|
|
|
|
+#define NV34TCL_DMA_COLOR1 0x0000018c
|
|
|
|
+#define NV34TCL_DMA_COLOR0 0x00000194
|
|
|
|
+#define NV34TCL_DMA_ZETA 0x00000198
|
|
|
|
+#define NV34TCL_DMA_VTXBUF0 0x0000019c
|
|
|
|
+#define NV34TCL_DMA_VTXBUF1 0x000001a0
|
|
|
|
+#define NV34TCL_DMA_FENCE 0x000001a4
|
|
|
|
+#define NV34TCL_DMA_QUERY 0x000001a8
|
|
|
|
+#define NV34TCL_DMA_IN_MEMORY7 0x000001ac
|
|
|
|
+#define NV34TCL_DMA_IN_MEMORY8 0x000001b0
|
|
|
|
+#define NV34TCL_RT_HORIZ 0x00000200
|
|
|
|
+#define NV34TCL_RT_HORIZ_X_SHIFT 0
|
|
|
|
+#define NV34TCL_RT_HORIZ_X_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_RT_HORIZ_W_SHIFT 16
|
|
|
|
+#define NV34TCL_RT_HORIZ_W_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_RT_VERT 0x00000204
|
|
|
|
+#define NV34TCL_RT_VERT_Y_SHIFT 0
|
|
|
|
+#define NV34TCL_RT_VERT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_RT_VERT_H_SHIFT 16
|
|
|
|
+#define NV34TCL_RT_VERT_H_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_RT_FORMAT 0x00000208
|
|
|
|
+#define NV34TCL_RT_FORMAT_TYPE_SHIFT 8
|
|
|
|
+#define NV34TCL_RT_FORMAT_TYPE_MASK 0x00000f00
|
|
|
|
+#define NV34TCL_RT_FORMAT_TYPE_LINEAR 0x00000100
|
|
|
|
+#define NV34TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200
|
|
|
|
+#define NV34TCL_RT_FORMAT_ZETA_SHIFT 5
|
|
|
|
+#define NV34TCL_RT_FORMAT_ZETA_MASK 0x000000e0
|
|
|
|
+#define NV34TCL_RT_FORMAT_ZETA_Z16 0x00000020
|
|
|
|
+#define NV34TCL_RT_FORMAT_ZETA_Z24S8 0x00000040
|
|
|
|
+#define NV34TCL_RT_FORMAT_COLOR_SHIFT 0
|
|
|
|
+#define NV34TCL_RT_FORMAT_COLOR_MASK 0x0000001f
|
|
|
|
+#define NV34TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003
|
|
|
|
+#define NV34TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005
|
|
|
|
+#define NV34TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008
|
|
|
|
+#define NV34TCL_RT_FORMAT_COLOR_B8 0x00000009
|
|
|
|
+#define NV34TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d
|
|
|
|
+#define NV34TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f
|
|
|
|
+#define NV34TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010
|
|
|
|
+#define NV34TCL_COLOR0_PITCH 0x0000020c
|
|
|
|
+#define NV34TCL_COLOR0_PITCH_COLOR0_SHIFT 0
|
|
|
|
+#define NV34TCL_COLOR0_PITCH_COLOR0_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_COLOR0_PITCH_ZETA_SHIFT 16
|
|
|
|
+#define NV34TCL_COLOR0_PITCH_ZETA_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_COLOR0_OFFSET 0x00000210
|
|
|
|
+#define NV34TCL_ZETA_OFFSET 0x00000214
|
|
|
|
+#define NV34TCL_COLOR1_OFFSET 0x00000218
|
|
|
|
+#define NV34TCL_COLOR1_PITCH 0x0000021c
|
|
|
|
+#define NV34TCL_RT_ENABLE 0x00000220
|
|
|
|
+#define NV34TCL_RT_ENABLE_MRT (1 << 4)
|
|
|
|
+#define NV34TCL_RT_ENABLE_COLOR1 (1 << 1)
|
|
|
|
+#define NV34TCL_RT_ENABLE_COLOR0 (1 << 0)
|
|
|
|
+#define NV34TCL_LMA_DEPTH_PITCH 0x0000022c
|
|
|
|
+#define NV34TCL_LMA_DEPTH_OFFSET 0x00000230
|
|
|
|
+#define NV34TCL_TX_UNITS_ENABLE 0x0000023c
|
|
|
|
+#define NV34TCL_TX_UNITS_ENABLE_TX0 (1 << 0)
|
|
|
|
+#define NV34TCL_TX_UNITS_ENABLE_TX1 (1 << 1)
|
|
|
|
+#define NV34TCL_TX_UNITS_ENABLE_TX2 (1 << 2)
|
|
|
|
+#define NV34TCL_TX_UNITS_ENABLE_TX3 (1 << 3)
|
|
|
|
+#define NV34TCL_TX_UNITS_ENABLE_TX4 (1 << 4)
|
|
|
|
+#define NV34TCL_TX_UNITS_ENABLE_TX5 (1 << 5)
|
|
|
|
+#define NV34TCL_TX_UNITS_ENABLE_TX6 (1 << 6)
|
|
|
|
+#define NV34TCL_TX_UNITS_ENABLE_TX7 (1 << 7)
|
|
|
|
+#define NV34TCL_TX_MATRIX_ENABLE(x) (0x00000240+((x)*4))
|
|
|
|
+#define NV34TCL_TX_MATRIX_ENABLE__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_VIEWPORT_TX_ORIGIN 0x000002b8
|
|
|
|
+#define NV34TCL_VIEWPORT_TX_ORIGIN_X_SHIFT 0
|
|
|
|
+#define NV34TCL_VIEWPORT_TX_ORIGIN_X_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VIEWPORT_TX_ORIGIN_Y_SHIFT 16
|
|
|
|
+#define NV34TCL_VIEWPORT_TX_ORIGIN_Y_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_MODE 0x000002bc
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*8))
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_HORIZ_L_SHIFT 0
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_HORIZ_L_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_HORIZ_R_SHIFT 16
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_HORIZ_R_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_VERT(x) (0x000002c4+((x)*8))
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_VERT_T_SHIFT 0
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_VERT_T_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_VERT_D_SHIFT 16
|
|
|
|
+#define NV34TCL_VIEWPORT_CLIP_VERT_D_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_DITHER_ENABLE 0x00000300
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_ENABLE 0x00000304
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC 0x00000308
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV34TCL_ALPHA_FUNC_REF 0x0000030c
|
|
|
|
+#define NV34TCL_BLEND_FUNC_ENABLE 0x00000310
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC 0x00000314
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_SHIFT 0
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE 0x00000001
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR 0x00000300
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA 0x00000304
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_DST_COLOR 0x00000306
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002
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+#define NV34TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA 0x00008003
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+#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SHIFT 16
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_MASK 0xffff0000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ZERO 0x00000000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE 0x00010000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR 0x03000000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA 0x03020000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA 0x03040000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR 0x03060000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR 0x03070000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE 0x03080000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR 0x80010000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA 0x80030000
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+#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000
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+#define NV34TCL_BLEND_FUNC_DST 0x00000318
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+#define NV34TCL_BLEND_FUNC_DST_RGB_SHIFT 0
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+#define NV34TCL_BLEND_FUNC_DST_RGB_MASK 0x0000ffff
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+#define NV34TCL_BLEND_FUNC_DST_RGB_ZERO 0x00000000
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+#define NV34TCL_BLEND_FUNC_DST_RGB_ONE 0x00000001
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+#define NV34TCL_BLEND_FUNC_DST_RGB_SRC_COLOR 0x00000300
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+#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR 0x00000301
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+#define NV34TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA 0x00000302
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|
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+#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA 0x00000303
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+#define NV34TCL_BLEND_FUNC_DST_RGB_DST_ALPHA 0x00000304
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+#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA 0x00000305
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+#define NV34TCL_BLEND_FUNC_DST_RGB_DST_COLOR 0x00000306
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+#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR 0x00000307
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+#define NV34TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE 0x00000308
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+#define NV34TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR 0x00008001
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+#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002
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+#define NV34TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA 0x00008003
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|
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+#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004
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+#define NV34TCL_BLEND_FUNC_DST_ALPHA_SHIFT 16
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+#define NV34TCL_BLEND_FUNC_DST_ALPHA_MASK 0xffff0000
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+#define NV34TCL_BLEND_FUNC_DST_ALPHA_ZERO 0x00000000
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|
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+#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE 0x00010000
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|
|
+#define NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR 0x03000000
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|
|
+#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000
|
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|
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+#define NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA 0x03020000
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|
|
+#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000
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|
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+#define NV34TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA 0x03040000
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+#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000
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+#define NV34TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR 0x03060000
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|
|
+#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR 0x03070000
|
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|
|
+#define NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE 0x03080000
|
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|
|
+#define NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR 0x80010000
|
|
|
|
+#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000
|
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|
|
+#define NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x80030000
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|
|
+#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000
|
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|
|
+#define NV34TCL_BLEND_COLOR 0x0000031c
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|
|
+#define NV34TCL_BLEND_COLOR_B_SHIFT 0
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|
+#define NV34TCL_BLEND_COLOR_B_MASK 0x000000ff
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|
|
+#define NV34TCL_BLEND_COLOR_G_SHIFT 8
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|
+#define NV34TCL_BLEND_COLOR_G_MASK 0x0000ff00
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+#define NV34TCL_BLEND_COLOR_R_SHIFT 16
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|
+#define NV34TCL_BLEND_COLOR_R_MASK 0x00ff0000
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|
|
+#define NV34TCL_BLEND_COLOR_A_SHIFT 24
|
|
|
|
+#define NV34TCL_BLEND_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV34TCL_BLEND_EQUATION 0x00000320
|
|
|
|
+#define NV34TCL_BLEND_EQUATION_FUNC_ADD 0x00008006
|
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|
|
+#define NV34TCL_BLEND_EQUATION_MIN 0x00008007
|
|
|
|
+#define NV34TCL_BLEND_EQUATION_MAX 0x00008008
|
|
|
|
+#define NV34TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a
|
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|
|
+#define NV34TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b
|
|
|
|
+#define NV34TCL_COLOR_MASK 0x00000324
|
|
|
|
+#define NV34TCL_COLOR_MASK_B_SHIFT 0
|
|
|
|
+#define NV34TCL_COLOR_MASK_B_MASK 0x000000ff
|
|
|
|
+#define NV34TCL_COLOR_MASK_G_SHIFT 8
|
|
|
|
+#define NV34TCL_COLOR_MASK_G_MASK 0x0000ff00
|
|
|
|
+#define NV34TCL_COLOR_MASK_R_SHIFT 16
|
|
|
|
+#define NV34TCL_COLOR_MASK_R_MASK 0x00ff0000
|
|
|
|
+#define NV34TCL_COLOR_MASK_A_SHIFT 24
|
|
|
|
+#define NV34TCL_COLOR_MASK_A_MASK 0xff000000
|
|
|
|
+#define NV34TCL_STENCIL_BACK_ENABLE 0x00000328
|
|
|
|
+#define NV34TCL_STENCIL_BACK_MASK 0x0000032c
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC 0x00000330
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_REF 0x00000334
|
|
|
|
+#define NV34TCL_STENCIL_BACK_FUNC_MASK 0x00000338
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_FAIL 0x0000033c
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_FAIL_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_FAIL_INVERT 0x0000150a
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_FAIL_KEEP 0x00001e00
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_FAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_FAIL_INCR 0x00001e02
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_FAIL_DECR 0x00001e03
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZFAIL 0x00000340
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZFAIL_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZFAIL_INVERT 0x0000150a
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZFAIL_KEEP 0x00001e00
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZFAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZFAIL_INCR 0x00001e02
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR 0x00001e03
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZPASS 0x00000344
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZPASS_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZPASS_INVERT 0x0000150a
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZPASS_KEEP 0x00001e00
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZPASS_REPLACE 0x00001e01
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZPASS_INCR 0x00001e02
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZPASS_DECR 0x00001e03
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP 0x00008507
|
|
|
|
+#define NV34TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP 0x00008508
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_ENABLE 0x00000348
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_MASK 0x0000034c
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC 0x00000350
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_REF 0x00000354
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_FUNC_MASK 0x00000358
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_FAIL 0x0000035c
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_FAIL_INVERT 0x0000150a
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_FAIL_KEEP 0x00001e00
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_FAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR 0x00001e02
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR 0x00001e03
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZFAIL 0x00000360
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INVERT 0x0000150a
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_KEEP 0x00001e00
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR 0x00001e02
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR 0x00001e03
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZPASS 0x00000364
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZPASS_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INVERT 0x0000150a
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZPASS_KEEP 0x00001e00
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZPASS_REPLACE 0x00001e01
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR 0x00001e02
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR 0x00001e03
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP 0x00008507
|
|
|
|
+#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP 0x00008508
|
|
|
|
+#define NV34TCL_SHADE_MODEL 0x00000368
|
|
|
|
+#define NV34TCL_SHADE_MODEL_FLAT 0x00001d00
|
|
|
|
+#define NV34TCL_SHADE_MODEL_SMOOTH 0x00001d01
|
|
|
|
+#define NV34TCL_FOG_ENABLE 0x0000036c
|
|
|
|
+#define NV34TCL_FOG_COLOR 0x00000370
|
|
|
|
+#define NV34TCL_FOG_COLOR_R_SHIFT 0
|
|
|
|
+#define NV34TCL_FOG_COLOR_R_MASK 0x000000ff
|
|
|
|
+#define NV34TCL_FOG_COLOR_G_SHIFT 8
|
|
|
|
+#define NV34TCL_FOG_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV34TCL_FOG_COLOR_B_SHIFT 16
|
|
|
|
+#define NV34TCL_FOG_COLOR_B_MASK 0x00ff0000
|
|
|
|
+#define NV34TCL_FOG_COLOR_A_SHIFT 24
|
|
|
|
+#define NV34TCL_FOG_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_ENABLE 0x00000374
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP 0x00000378
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_CLEAR 0x00001500
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_AND 0x00001501
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_AND_REVERSE 0x00001502
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_COPY 0x00001503
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_AND_INVERTED 0x00001504
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_NOOP 0x00001505
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_XOR 0x00001506
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_OR 0x00001507
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_NOR 0x00001508
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_EQUIV 0x00001509
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_INVERT 0x0000150a
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_OR_REVERSE 0x0000150b
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED 0x0000150c
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_OR_INVERTED 0x0000150d
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_NAND 0x0000150e
|
|
|
|
+#define NV34TCL_COLOR_LOGIC_OP_OP_SET 0x0000150f
|
|
|
|
+#define NV34TCL_NORMALIZE_ENABLE 0x0000037c
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL 0x00000390
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_FRONT_EMISSION_ENABLE (1 << 0)
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_FRONT_AMBIENT_ENABLE (1 << 2)
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_FRONT_DIFFUSE_ENABLE (1 << 4)
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_FRONT_SPECULAR_ENABLE (1 << 6)
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_BACK_EMISSION_ENABLE (1 << 8)
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_BACK_AMBIENT_ENABLE (1 << 10)
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_BACK_DIFFUSE_ENABLE (1 << 12)
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_BACK_SPECULAR_ENABLE (1 << 14)
|
|
|
|
+#define NV34TCL_DEPTH_RANGE_NEAR 0x00000394
|
|
|
|
+#define NV34TCL_DEPTH_RANGE_FAR 0x00000398
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_FRONT_R 0x000003a0
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_FRONT_G 0x000003a4
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_FRONT_B 0x000003a8
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_FRONT_A 0x000003b4
|
|
|
|
+#define NV34TCL_LINE_WIDTH 0x000003b8
|
|
|
|
+#define NV34TCL_LINE_SMOOTH_ENABLE 0x000003bc
|
|
|
|
+#define NV34TCL_TX_GEN_S(x) (0x00000400+((x)*16))
|
|
|
|
+#define NV34TCL_TX_GEN_S__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_TX_GEN_S_FALSE 0x00000000
|
|
|
|
+#define NV34TCL_TX_GEN_S_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV34TCL_TX_GEN_S_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV34TCL_TX_GEN_S_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV34TCL_TX_GEN_S_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV34TCL_TX_GEN_S_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV34TCL_TX_GEN_T(x) (0x00000404+((x)*16))
|
|
|
|
+#define NV34TCL_TX_GEN_T__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_TX_GEN_T_FALSE 0x00000000
|
|
|
|
+#define NV34TCL_TX_GEN_T_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV34TCL_TX_GEN_T_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV34TCL_TX_GEN_T_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV34TCL_TX_GEN_T_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV34TCL_TX_GEN_T_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV34TCL_TX_GEN_R(x) (0x00000408+((x)*16))
|
|
|
|
+#define NV34TCL_TX_GEN_R__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_TX_GEN_R_FALSE 0x00000000
|
|
|
|
+#define NV34TCL_TX_GEN_R_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV34TCL_TX_GEN_R_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV34TCL_TX_GEN_R_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV34TCL_TX_GEN_R_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV34TCL_TX_GEN_R_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV34TCL_TX_GEN_Q(x) (0x0000040c+((x)*16))
|
|
|
|
+#define NV34TCL_TX_GEN_Q__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_TX_GEN_Q_FALSE 0x00000000
|
|
|
|
+#define NV34TCL_TX_GEN_Q_EYE_LINEAR 0x00002400
|
|
|
|
+#define NV34TCL_TX_GEN_Q_OBJECT_LINEAR 0x00002401
|
|
|
|
+#define NV34TCL_TX_GEN_Q_SPHERE_MAP 0x00002402
|
|
|
|
+#define NV34TCL_TX_GEN_Q_NORMAL_MAP 0x00008511
|
|
|
|
+#define NV34TCL_TX_GEN_Q_REFLECTION_MAP 0x00008512
|
|
|
|
+#define NV34TCL_MODELVIEW_MATRIX(x) (0x00000480+((x)*4))
|
|
|
|
+#define NV34TCL_MODELVIEW_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_INVERSE_MODELVIEW_MATRIX(x) (0x00000580+((x)*4))
|
|
|
|
+#define NV34TCL_INVERSE_MODELVIEW_MATRIX__SIZE 0x0000000c
|
|
|
|
+#define NV34TCL_PROJECTION_MATRIX(x) (0x00000680+((x)*4))
|
|
|
|
+#define NV34TCL_PROJECTION_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_TX0_MATRIX(x) (0x000006c0+((x)*4))
|
|
|
|
+#define NV34TCL_TX0_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_TX1_MATRIX(x) (0x00000700+((x)*4))
|
|
|
|
+#define NV34TCL_TX1_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_TX2_MATRIX(x) (0x00000740+((x)*4))
|
|
|
|
+#define NV34TCL_TX2_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_TX3_MATRIX(x) (0x00000780+((x)*4))
|
|
|
|
+#define NV34TCL_TX3_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_TX4_MATRIX(x) (0x000007c0+((x)*4))
|
|
|
|
+#define NV34TCL_TX4_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_TX5_MATRIX(x) (0x00000800+((x)*4))
|
|
|
|
+#define NV34TCL_TX5_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_TX6_MATRIX(x) (0x00000840+((x)*4))
|
|
|
|
+#define NV34TCL_TX6_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_TX7_MATRIX(x) (0x00000880+((x)*4))
|
|
|
|
+#define NV34TCL_TX7_MATRIX__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_SCISSOR_HORIZ 0x000008c0
|
|
|
|
+#define NV34TCL_SCISSOR_HORIZ_X_SHIFT 0
|
|
|
|
+#define NV34TCL_SCISSOR_HORIZ_X_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_SCISSOR_HORIZ_W_SHIFT 16
|
|
|
|
+#define NV34TCL_SCISSOR_HORIZ_W_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_SCISSOR_VERT 0x000008c4
|
|
|
|
+#define NV34TCL_SCISSOR_VERT_Y_SHIFT 0
|
|
|
|
+#define NV34TCL_SCISSOR_VERT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_SCISSOR_VERT_H_SHIFT 16
|
|
|
|
+#define NV34TCL_SCISSOR_VERT_H_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_FOG_COORD_DIST 0x000008c8
|
|
|
|
+#define NV34TCL_FOG_COORD_DIST_COORD_FALSE 0x00000000
|
|
|
|
+#define NV34TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_RADIAL_NV 0x00000001
|
|
|
|
+#define NV34TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_PLANE_ABSOLUTE_NV 0x00000002
|
|
|
|
+#define NV34TCL_FOG_COORD_DIST_COORD_FOG 0x00000003
|
|
|
|
+#define NV34TCL_FOG_MODE 0x000008cc
|
|
|
|
+#define NV34TCL_FOG_MODE_EXP 0x00000800
|
|
|
|
+#define NV34TCL_FOG_MODE_EXP_2 0x00000802
|
|
|
|
+#define NV34TCL_FOG_MODE_EXP2 0x00000803
|
|
|
|
+#define NV34TCL_FOG_MODE_LINEAR 0x00000804
|
|
|
|
+#define NV34TCL_FOG_MODE_LINEAR_2 0x00002601
|
|
|
|
+#define NV34TCL_FOG_EQUATION_CONSTANT 0x000008d0
|
|
|
|
+#define NV34TCL_FOG_EQUATION_LINEAR 0x000008d4
|
|
|
|
+#define NV34TCL_FOG_EQUATION_QUADRATIC 0x000008d8
|
|
|
|
+#define NV34TCL_FP_ACTIVE_PROGRAM 0x000008e4
|
|
|
|
+#define NV34TCL_FP_ACTIVE_PROGRAM_DMA0 (1 << 0)
|
|
|
|
+#define NV34TCL_FP_ACTIVE_PROGRAM_DMA1 (1 << 1)
|
|
|
|
+#define NV34TCL_FP_ACTIVE_PROGRAM_OFFSET_SHIFT 2
|
|
|
|
+#define NV34TCL_FP_ACTIVE_PROGRAM_OFFSET_MASK 0xfffffffc
|
|
|
|
+#define NV34TCL_RC_COLOR0 0x000008ec
|
|
|
|
+#define NV34TCL_RC_COLOR0_B_SHIFT 0
|
|
|
|
+#define NV34TCL_RC_COLOR0_B_MASK 0x000000ff
|
|
|
|
+#define NV34TCL_RC_COLOR0_G_SHIFT 8
|
|
|
|
+#define NV34TCL_RC_COLOR0_G_MASK 0x0000ff00
|
|
|
|
+#define NV34TCL_RC_COLOR0_R_SHIFT 16
|
|
|
|
+#define NV34TCL_RC_COLOR0_R_MASK 0x00ff0000
|
|
|
|
+#define NV34TCL_RC_COLOR0_A_SHIFT 24
|
|
|
|
+#define NV34TCL_RC_COLOR0_A_MASK 0xff000000
|
|
|
|
+#define NV34TCL_RC_COLOR1 0x000008f0
|
|
|
|
+#define NV34TCL_RC_COLOR1_B_SHIFT 0
|
|
|
|
+#define NV34TCL_RC_COLOR1_B_MASK 0x000000ff
|
|
|
|
+#define NV34TCL_RC_COLOR1_G_SHIFT 8
|
|
|
|
+#define NV34TCL_RC_COLOR1_G_MASK 0x0000ff00
|
|
|
|
+#define NV34TCL_RC_COLOR1_R_SHIFT 16
|
|
|
|
+#define NV34TCL_RC_COLOR1_R_MASK 0x00ff0000
|
|
|
|
+#define NV34TCL_RC_COLOR1_A_SHIFT 24
|
|
|
|
+#define NV34TCL_RC_COLOR1_A_MASK 0xff000000
|
|
|
|
+#define NV34TCL_RC_FINAL0 0x000008f4
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_SHIFT 0
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_MASK 0x0000000f
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_FOG 0x00000003
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_INPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_COMPONENT_USAGE (1 << 4)
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA 0x00000010
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_SHIFT 5
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_MASK 0x000000e0
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL_NV 0x00000040
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE_NV 0x00000060
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0
|
|
|
|
+#define NV34TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_SHIFT 8
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_FOG 0x00000300
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_SHIFT 13
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV34TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_SHIFT 16
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_FOG 0x00030000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_TEXTURE1_ARB 0x00090000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_SHIFT 21
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV34TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_SHIFT 24
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_FOG 0x03000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_SHIFT 29
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL_NV 0x40000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV34TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000
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|
|
|
+#define NV34TCL_RC_FINAL1 0x000008f8
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|
|
|
+#define NV34TCL_RC_FINAL1_COLOR_SUM_CLAMP (1 << 7)
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|
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+#define NV34TCL_RC_FINAL1_G_INPUT_SHIFT 8
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|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_MASK 0x00000f00
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|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_ZERO 0x00000000
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|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0_NV 0x00000100
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|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_FOG 0x00000300
|
|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_TEXTURE0_ARB 0x00000800
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|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_TEXTURE1_ARB 0x00000900
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|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_SPARE0_NV 0x00000c00
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|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_SPARE1_NV 0x00000d00
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|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
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|
|
|
+#define NV34TCL_RC_FINAL1_G_INPUT_E_TIMES_F_NV 0x00000f00
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|
|
|
+#define NV34TCL_RC_FINAL1_G_COMPONENT_USAGE (1 << 12)
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|
|
|
+#define NV34TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB 0x00000000
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|
|
|
+#define NV34TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA 0x00001000
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|
|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_SHIFT 13
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|
|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_MASK 0x0000e000
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|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
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|
|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT_NV 0x00002000
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|
|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
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|
|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
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|
|
|
+#define NV34TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE_NV 0x0000e000
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|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_SHIFT 16
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|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_MASK 0x000f0000
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|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_FOG 0x00030000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_TEXTURE0_ARB 0x00080000
|
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|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_TEXTURE1_ARB 0x00090000
|
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|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_SPARE0_NV 0x000c0000
|
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|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_COMPONENT_USAGE (1 << 20)
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|
|
|
+#define NV34TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_SHIFT 21
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_MASK 0x00e00000
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|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV34TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_SHIFT 24
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_FOG 0x03000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_SHIFT 29
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_MASK 0xe0000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT_NV 0x20000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL_NV 0x40000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV34TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE_NV 0xe0000000
|
|
|
|
+#define NV34TCL_RC_ENABLE 0x000008fc
|
|
|
|
+#define NV34TCL_RC_ENABLE_NUM_COMBINERS_SHIFT 0
|
|
|
|
+#define NV34TCL_RC_ENABLE_NUM_COMBINERS_MASK 0x0000000f
|
|
|
|
+#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR0_SHIFT 12
|
|
|
|
+#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR0_MASK 0x0000f000
|
|
|
|
+#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR1_SHIFT 16
|
|
|
|
+#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR1_MASK 0x000f0000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA(x) (0x00000900+((x)*32))
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_SHIFT 0
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_MASK 0x0000000f
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_FOG 0x00000003
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0_ARB 0x00000008
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1_ARB 0x00000009
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE (1 << 4)
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA 0x00000010
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_SHIFT 5
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_MASK 0x000000e0
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL_NV 0x00000040
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE_NV 0x00000060
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_SHIFT 8
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_MASK 0x00000f00
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_FOG 0x00000300
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE (1 << 12)
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA 0x00001000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_SHIFT 13
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_MASK 0x0000e000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL_NV 0x00004000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE_NV 0x00006000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_SHIFT 16
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_MASK 0x000f0000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0_NV 0x00010000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1_NV 0x00020000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_FOG 0x00030000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR_NV 0x00040000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR_NV 0x00050000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0_ARB 0x00080000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1_ARB 0x00090000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE0_NV 0x000c0000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE1_NV 0x000d0000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F_NV 0x000f0000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE (1 << 20)
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA 0x00100000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_SHIFT 21
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_MASK 0x00e00000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL_NV 0x00400000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE_NV 0x00600000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_SHIFT 24
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_MASK 0x0f000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0_NV 0x01000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1_NV 0x02000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_FOG 0x03000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR_NV 0x04000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR_NV 0x05000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0_ARB 0x08000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1_ARB 0x09000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE0_NV 0x0c000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE1_NV 0x0d000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F_NV 0x0f000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE (1 << 28)
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE 0x00000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA 0x10000000
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_SHIFT 29
|
|
|
|
+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_MASK 0xe0000000
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+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
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|
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+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000
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+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL_NV 0x40000000
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|
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+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE_NV 0x60000000
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+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
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+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
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+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
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+#define NV34TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000
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+#define NV34TCL_RC_IN_RGB(x) (0x00000904+((x)*32))
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+#define NV34TCL_RC_IN_RGB__SIZE 0x00000008
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+#define NV34TCL_RC_IN_RGB_D_INPUT_SHIFT 0
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+#define NV34TCL_RC_IN_RGB_D_INPUT_MASK 0x0000000f
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+#define NV34TCL_RC_IN_RGB_D_INPUT_ZERO 0x00000000
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+#define NV34TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0_NV 0x00000001
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+#define NV34TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1_NV 0x00000002
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+#define NV34TCL_RC_IN_RGB_D_INPUT_FOG 0x00000003
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+#define NV34TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR_NV 0x00000004
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+#define NV34TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR_NV 0x00000005
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+#define NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE0_ARB 0x00000008
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+#define NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE1_ARB 0x00000009
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+#define NV34TCL_RC_IN_RGB_D_INPUT_SPARE0_NV 0x0000000c
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+#define NV34TCL_RC_IN_RGB_D_INPUT_SPARE1_NV 0x0000000d
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+#define NV34TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
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+#define NV34TCL_RC_IN_RGB_D_INPUT_E_TIMES_F_NV 0x0000000f
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+#define NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE (1 << 4)
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+#define NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB 0x00000000
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+#define NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA 0x00000010
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_SHIFT 5
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_MASK 0x000000e0
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL_NV 0x00000040
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE_NV 0x00000060
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0
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+#define NV34TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0
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+#define NV34TCL_RC_IN_RGB_C_INPUT_SHIFT 8
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+#define NV34TCL_RC_IN_RGB_C_INPUT_MASK 0x00000f00
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+#define NV34TCL_RC_IN_RGB_C_INPUT_ZERO 0x00000000
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+#define NV34TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0_NV 0x00000100
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+#define NV34TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1_NV 0x00000200
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+#define NV34TCL_RC_IN_RGB_C_INPUT_FOG 0x00000300
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+#define NV34TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR_NV 0x00000400
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+#define NV34TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR_NV 0x00000500
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+#define NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE0_ARB 0x00000800
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+#define NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE1_ARB 0x00000900
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+#define NV34TCL_RC_IN_RGB_C_INPUT_SPARE0_NV 0x00000c00
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+#define NV34TCL_RC_IN_RGB_C_INPUT_SPARE1_NV 0x00000d00
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+#define NV34TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
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+#define NV34TCL_RC_IN_RGB_C_INPUT_E_TIMES_F_NV 0x00000f00
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|
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+#define NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE (1 << 12)
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+#define NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB 0x00000000
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+#define NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA 0x00001000
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_SHIFT 13
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_MASK 0x0000e000
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL_NV 0x00004000
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE_NV 0x00006000
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000
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+#define NV34TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000
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+#define NV34TCL_RC_IN_RGB_B_INPUT_SHIFT 16
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+#define NV34TCL_RC_IN_RGB_B_INPUT_MASK 0x000f0000
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+#define NV34TCL_RC_IN_RGB_B_INPUT_ZERO 0x00000000
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|
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+#define NV34TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0_NV 0x00010000
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+#define NV34TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1_NV 0x00020000
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|
|
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+#define NV34TCL_RC_IN_RGB_B_INPUT_FOG 0x00030000
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|
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+#define NV34TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR_NV 0x00040000
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|
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+#define NV34TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR_NV 0x00050000
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|
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+#define NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE0_ARB 0x00080000
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|
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+#define NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE1_ARB 0x00090000
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+#define NV34TCL_RC_IN_RGB_B_INPUT_SPARE0_NV 0x000c0000
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|
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+#define NV34TCL_RC_IN_RGB_B_INPUT_SPARE1_NV 0x000d0000
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|
|
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+#define NV34TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000
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|
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+#define NV34TCL_RC_IN_RGB_B_INPUT_E_TIMES_F_NV 0x000f0000
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|
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+#define NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE (1 << 20)
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+#define NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB 0x00000000
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+#define NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA 0x00100000
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|
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+#define NV34TCL_RC_IN_RGB_B_MAPPING_SHIFT 21
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|
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+#define NV34TCL_RC_IN_RGB_B_MAPPING_MASK 0x00e00000
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|
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+#define NV34TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000
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|
|
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+#define NV34TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL_NV 0x00400000
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|
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+#define NV34TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE_NV 0x00600000
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|
|
|
+#define NV34TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000
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|
|
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+#define NV34TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000
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|
|
|
+#define NV34TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000
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|
|
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+#define NV34TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000
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|
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+#define NV34TCL_RC_IN_RGB_A_INPUT_SHIFT 24
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|
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+#define NV34TCL_RC_IN_RGB_A_INPUT_MASK 0x0f000000
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|
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+#define NV34TCL_RC_IN_RGB_A_INPUT_ZERO 0x00000000
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|
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+#define NV34TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0_NV 0x01000000
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|
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+#define NV34TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1_NV 0x02000000
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|
|
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+#define NV34TCL_RC_IN_RGB_A_INPUT_FOG 0x03000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR_NV 0x04000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR_NV 0x05000000
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|
|
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+#define NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE0_ARB 0x08000000
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|
|
+#define NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE1_ARB 0x09000000
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|
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+#define NV34TCL_RC_IN_RGB_A_INPUT_SPARE0_NV 0x0c000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_INPUT_SPARE1_NV 0x0d000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_INPUT_E_TIMES_F_NV 0x0f000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE (1 << 28)
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB 0x00000000
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|
|
+#define NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA 0x10000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_SHIFT 29
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_MASK 0xe0000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL_NV 0x40000000
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|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE_NV 0x60000000
|
|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000
|
|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000
|
|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000
|
|
|
|
+#define NV34TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000
|
|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR0(x) (0x00000908+((x)*32))
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR0__SIZE 0x00000008
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR0_B_SHIFT 0
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR0_B_MASK 0x000000ff
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|
|
+#define NV34TCL_RC_CONSTANT_COLOR0_G_SHIFT 8
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|
|
+#define NV34TCL_RC_CONSTANT_COLOR0_G_MASK 0x0000ff00
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR0_R_SHIFT 16
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR0_R_MASK 0x00ff0000
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR0_A_SHIFT 24
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR0_A_MASK 0xff000000
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1(x) (0x0000090c+((x)*32))
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1_B_SHIFT 0
|
|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1_B_MASK 0x000000ff
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1_G_SHIFT 8
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1_G_MASK 0x0000ff00
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1_R_SHIFT 16
|
|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1_R_MASK 0x00ff0000
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1_A_SHIFT 24
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|
|
|
+#define NV34TCL_RC_CONSTANT_COLOR1_A_MASK 0xff000000
|
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|
|
+#define NV34TCL_RC_OUT_ALPHA(x) (0x00000910+((x)*32))
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT 0
|
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|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK 0x0000000f
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|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO 0x00000000
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|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG 0x00000003
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0_ARB 0x00000008
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|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1_ARB 0x00000009
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|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_NV 0x0000000c
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1_NV 0x0000000d
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F_NV 0x0000000f
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT 4
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|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK 0x000000f0
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|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO 0x00000000
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|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG 0x00000030
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0_ARB 0x00000080
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1_ARB 0x00000090
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_NV 0x000000c0
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1_NV 0x000000d0
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F_NV 0x000000f0
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT 8
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK 0x00000f00
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG 0x00000300
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0_ARB 0x00000800
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1_ARB 0x00000900
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_NV 0x00000c00
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1_NV 0x00000d00
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT (1 << 12)
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT (1 << 13)
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_MUX_SUM (1 << 14)
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_BIAS (1 << 15)
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_BIAS_NONE 0x00000000
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SCALE_SHIFT 17
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SCALE_MASK 0x00000000
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SCALE_NONE 0x00000000
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO_NV 0x00020000
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR_NV 0x00040000
|
|
|
|
+#define NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000
|
|
|
|
+#define NV34TCL_RC_OUT_RGB(x) (0x00000914+((x)*32))
|
|
|
|
+#define NV34TCL_RC_OUT_RGB__SIZE 0x00000008
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|
|
+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT 0
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_MASK 0x0000000f
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_ZERO 0x00000000
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|
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_FOG 0x00000003
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004
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|
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0_ARB 0x00000008
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1_ARB 0x00000009
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_NV 0x0000000c
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1_NV 0x0000000d
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|
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e
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+#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F_NV 0x0000000f
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT 4
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_MASK 0x000000f0
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_ZERO 0x00000000
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|
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010
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|
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_FOG 0x00000030
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|
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0_ARB 0x00000080
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1_ARB 0x00000090
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|
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_NV 0x000000c0
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|
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1_NV 0x000000d0
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0
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+#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F_NV 0x000000f0
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT 8
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_MASK 0x00000f00
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO 0x00000000
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_FOG 0x00000300
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400
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|
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0_ARB 0x00000800
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1_ARB 0x00000900
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_NV 0x00000c00
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1_NV 0x00000d00
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+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00
|
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|
|
+#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00
|
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|
|
+#define NV34TCL_RC_OUT_RGB_CD_DOT_PRODUCT (1 << 12)
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|
|
+#define NV34TCL_RC_OUT_RGB_AB_DOT_PRODUCT (1 << 13)
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|
|
+#define NV34TCL_RC_OUT_RGB_MUX_SUM (1 << 14)
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+#define NV34TCL_RC_OUT_RGB_BIAS (1 << 15)
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+#define NV34TCL_RC_OUT_RGB_BIAS_NONE 0x00000000
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+#define NV34TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000
|
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|
+#define NV34TCL_RC_OUT_RGB_SCALE_SHIFT 17
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|
|
+#define NV34TCL_RC_OUT_RGB_SCALE_MASK 0x00000000
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|
|
+#define NV34TCL_RC_OUT_RGB_SCALE_NONE 0x00000000
|
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|
|
+#define NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO_NV 0x00020000
|
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|
|
+#define NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR_NV 0x00040000
|
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|
|
+#define NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000
|
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|
|
+#define NV34TCL_VIEWPORT_HORIZ 0x00000a00
|
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|
|
+#define NV34TCL_VIEWPORT_HORIZ_X_SHIFT 0
|
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|
|
+#define NV34TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff
|
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|
|
+#define NV34TCL_VIEWPORT_HORIZ_W_SHIFT 16
|
|
|
|
+#define NV34TCL_VIEWPORT_HORIZ_W_MASK 0xffff0000
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|
|
+#define NV34TCL_VIEWPORT_VERT 0x00000a04
|
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|
+#define NV34TCL_VIEWPORT_VERT_Y_SHIFT 0
|
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|
|
+#define NV34TCL_VIEWPORT_VERT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VIEWPORT_VERT_H_SHIFT 16
|
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|
|
+#define NV34TCL_VIEWPORT_VERT_H_MASK 0xffff0000
|
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|
|
+#define NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x00000a10
|
|
|
|
+#define NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x00000a14
|
|
|
|
+#define NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x00000a18
|
|
|
|
+#define NV34TCL_VIEWPORT_TRANSLATE_X 0x00000a20
|
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|
+#define NV34TCL_VIEWPORT_TRANSLATE_Y 0x00000a24
|
|
|
|
+#define NV34TCL_VIEWPORT_TRANSLATE_Z 0x00000a28
|
|
|
|
+#define NV34TCL_VIEWPORT_TRANSLATE_W 0x00000a2c
|
|
|
|
+#define NV34TCL_VIEWPORT_SCALE_X 0x00000a30
|
|
|
|
+#define NV34TCL_VIEWPORT_SCALE_Y 0x00000a34
|
|
|
|
+#define NV34TCL_VIEWPORT_SCALE_Z 0x00000a38
|
|
|
|
+#define NV34TCL_VIEWPORT_SCALE_W 0x00000a3c
|
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|
|
+#define NV34TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000a60
|
|
|
|
+#define NV34TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000a64
|
|
|
|
+#define NV34TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000a68
|
|
|
|
+#define NV34TCL_DEPTH_FUNC 0x00000a6c
|
|
|
|
+#define NV34TCL_DEPTH_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV34TCL_DEPTH_FUNC_LESS 0x00000201
|
|
|
|
+#define NV34TCL_DEPTH_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV34TCL_DEPTH_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV34TCL_DEPTH_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV34TCL_DEPTH_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV34TCL_DEPTH_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV34TCL_DEPTH_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV34TCL_DEPTH_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV34TCL_DEPTH_WRITE_ENABLE 0x00000a70
|
|
|
|
+#define NV34TCL_DEPTH_TEST_ENABLE 0x00000a74
|
|
|
|
+#define NV34TCL_POLYGON_OFFSET_FACTOR 0x00000a78
|
|
|
|
+#define NV34TCL_POLYGON_OFFSET_UNITS 0x00000a7c
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8))
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_XY__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_XY_X_SHIFT 0
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_XY_Y_SHIFT 16
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8))
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_Z__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_Z_Z_SHIFT 0
|
|
|
|
+#define NV34TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4))
|
|
|
|
+#define NV34TCL_VP_UPLOAD_INST__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX0_CLIP_PLANE_A(x) (0x00000e00+((x)*16))
|
|
|
|
+#define NV34TCL_TX0_CLIP_PLANE_A__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX0_CLIP_PLANE_B(x) (0x00000e04+((x)*16))
|
|
|
|
+#define NV34TCL_TX0_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX0_CLIP_PLANE_C(x) (0x00000e08+((x)*16))
|
|
|
|
+#define NV34TCL_TX0_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX0_CLIP_PLANE_D(x) (0x00000e0c+((x)*16))
|
|
|
|
+#define NV34TCL_TX0_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX1_CLIP_PLANE_A(x) (0x00000e40+((x)*16))
|
|
|
|
+#define NV34TCL_TX1_CLIP_PLANE_A__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX1_CLIP_PLANE_B(x) (0x00000e44+((x)*16))
|
|
|
|
+#define NV34TCL_TX1_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX1_CLIP_PLANE_C(x) (0x00000e48+((x)*16))
|
|
|
|
+#define NV34TCL_TX1_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX1_CLIP_PLANE_D(x) (0x00000e4c+((x)*16))
|
|
|
|
+#define NV34TCL_TX1_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX2_CLIP_PLANE_A(x) (0x00000e80+((x)*16))
|
|
|
|
+#define NV34TCL_TX2_CLIP_PLANE_A__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX2_CLIP_PLANE_B(x) (0x00000e84+((x)*16))
|
|
|
|
+#define NV34TCL_TX2_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX2_CLIP_PLANE_C(x) (0x00000e88+((x)*16))
|
|
|
|
+#define NV34TCL_TX2_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX2_CLIP_PLANE_D(x) (0x00000e8c+((x)*16))
|
|
|
|
+#define NV34TCL_TX2_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX3_CLIP_PLANE_A(x) (0x00000ec0+((x)*16))
|
|
|
|
+#define NV34TCL_TX3_CLIP_PLANE_A__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX3_CLIP_PLANE_B(x) (0x00000ec4+((x)*16))
|
|
|
|
+#define NV34TCL_TX3_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX3_CLIP_PLANE_C(x) (0x00000ec8+((x)*16))
|
|
|
|
+#define NV34TCL_TX3_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX3_CLIP_PLANE_D(x) (0x00000ecc+((x)*16))
|
|
|
|
+#define NV34TCL_TX3_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX4_CLIP_PLANE_A(x) (0x00000f00+((x)*16))
|
|
|
|
+#define NV34TCL_TX4_CLIP_PLANE_A__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX4_CLIP_PLANE_B(x) (0x00000f04+((x)*16))
|
|
|
|
+#define NV34TCL_TX4_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX4_CLIP_PLANE_C(x) (0x00000f08+((x)*16))
|
|
|
|
+#define NV34TCL_TX4_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX4_CLIP_PLANE_D(x) (0x00000f0c+((x)*16))
|
|
|
|
+#define NV34TCL_TX4_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX5_CLIP_PLANE_A(x) (0x00000f40+((x)*16))
|
|
|
|
+#define NV34TCL_TX5_CLIP_PLANE_A__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX5_CLIP_PLANE_B(x) (0x00000f44+((x)*16))
|
|
|
|
+#define NV34TCL_TX5_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX5_CLIP_PLANE_C(x) (0x00000f48+((x)*16))
|
|
|
|
+#define NV34TCL_TX5_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX5_CLIP_PLANE_D(x) (0x00000f4c+((x)*16))
|
|
|
|
+#define NV34TCL_TX5_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX6_CLIP_PLANE_A(x) (0x00000f80+((x)*16))
|
|
|
|
+#define NV34TCL_TX6_CLIP_PLANE_A__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX6_CLIP_PLANE_B(x) (0x00000f84+((x)*16))
|
|
|
|
+#define NV34TCL_TX6_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX6_CLIP_PLANE_C(x) (0x00000f88+((x)*16))
|
|
|
|
+#define NV34TCL_TX6_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX6_CLIP_PLANE_D(x) (0x00000f8c+((x)*16))
|
|
|
|
+#define NV34TCL_TX6_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX7_CLIP_PLANE_A(x) (0x00000fc0+((x)*16))
|
|
|
|
+#define NV34TCL_TX7_CLIP_PLANE_A__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX7_CLIP_PLANE_B(x) (0x00000fc4+((x)*16))
|
|
|
|
+#define NV34TCL_TX7_CLIP_PLANE_B__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX7_CLIP_PLANE_C(x) (0x00000fc8+((x)*16))
|
|
|
|
+#define NV34TCL_TX7_CLIP_PLANE_C__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX7_CLIP_PLANE_D(x) (0x00000fcc+((x)*16))
|
|
|
|
+#define NV34TCL_TX7_CLIP_PLANE_D__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x) (0x00001000+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x) (0x00001004+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x) (0x00001008+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x) (0x0000100c+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x) (0x00001010+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x) (0x00001014+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x) (0x00001018+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x) (0x0000101c+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x) (0x00001020+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_HALF_VECTOR_X(x) (0x00001028+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_HALF_VECTOR_X__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_HALF_VECTOR_Y(x) (0x0000102c+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_HALF_VECTOR_Y__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_HALF_VECTOR_Z(x) (0x00001030+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_HALF_VECTOR_Z__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_DIRECTION_X(x) (0x00001034+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_DIRECTION_X__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_DIRECTION_Y(x) (0x00001038+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_DIRECTION_Y__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_DIRECTION_Z(x) (0x0000103c+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_DIRECTION_Z__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_CUTOFF_A(x) (0x00001200+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_CUTOFF_A__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_CUTOFF_B(x) (0x00001204+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_CUTOFF_B__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_CUTOFF_C(x) (0x00001208+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_CUTOFF_C__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_DIR_X(x) (0x0000120c+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_DIR_X__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_DIR_Y(x) (0x00001210+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_DIR_Y__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_DIR_Z(x) (0x00001214+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_DIR_Z__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_CUTOFF_D(x) (0x00001218+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_SPOT_CUTOFF_D__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_POSITION_X(x) (0x0000121c+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_POSITION_X__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_POSITION_Y(x) (0x00001220+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_POSITION_Y__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_POSITION_Z(x) (0x00001224+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_POSITION_Z__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_ATTENUATION_CONSTANT(x) (0x00001228+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_ATTENUATION_CONSTANT__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_ATTENUATION_LINEAR(x) (0x0000122c+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_ATTENUATION_LINEAR__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_LIGHT_ATTENUATION_QUADRATIC(x) (0x00001230+((x)*64))
|
|
|
|
+#define NV34TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_FRONT_MATERIAL_SHININESS(x) (0x00001400+((x)*4))
|
|
|
|
+#define NV34TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006
|
|
|
|
+#define NV34TCL_ENABLED_LIGHTS 0x00001420
|
|
|
|
+#define NV34TCL_FP_REG_CONTROL 0x00001450
|
|
|
|
+#define NV34TCL_FP_REG_CONTROL_UNK1_SHIFT 16
|
|
|
|
+#define NV34TCL_FP_REG_CONTROL_UNK1_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_FP_REG_CONTROL_UNK0_SHIFT 0
|
|
|
|
+#define NV34TCL_FP_REG_CONTROL_UNK0_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANES_ENABLE 0x00001478
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE0 (1 << 1)
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE1 (1 << 5)
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE2 (1 << 9)
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE3 (1 << 13)
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE4 (1 << 17)
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE5 (1 << 21)
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE6 (1 << 25)
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE7 (1 << 29)
|
|
|
|
+#define NV34TCL_POLYGON_STIPPLE_ENABLE 0x0000147c
|
|
|
|
+#define NV34TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4))
|
|
|
|
+#define NV34TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020
|
|
|
|
+#define NV34TCL_VTX_ATTR_3F_X(x) (0x00001500+((x)*16))
|
|
|
|
+#define NV34TCL_VTX_ATTR_3F_X__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_3F_Y(x) (0x00001504+((x)*16))
|
|
|
|
+#define NV34TCL_VTX_ATTR_3F_Y__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_3F_Z(x) (0x00001508+((x)*16))
|
|
|
|
+#define NV34TCL_VTX_ATTR_3F_Z__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANE_A(x) (0x00001600+((x)*16))
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANE_A__SIZE 0x00000006
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANE_B(x) (0x00001604+((x)*16))
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANE_B__SIZE 0x00000006
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANE_C(x) (0x00001608+((x)*16))
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANE_C__SIZE 0x00000006
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANE_D(x) (0x0000160c+((x)*16))
|
|
|
|
+#define NV34TCL_VP_CLIP_PLANE_D__SIZE 0x00000006
|
|
|
|
+#define NV34TCL_VTXBUF_ADDRESS(x) (0x00001680+((x)*4))
|
|
|
|
+#define NV34TCL_VTXBUF_ADDRESS__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTXBUF_ADDRESS_DMA1 (1 << 31)
|
|
|
|
+#define NV34TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0
|
|
|
|
+#define NV34TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff
|
|
|
|
+#define NV34TCL_VTXFMT(x) (0x00001740+((x)*4))
|
|
|
|
+#define NV34TCL_VTXFMT__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTXFMT_TYPE_SHIFT 0
|
|
|
|
+#define NV34TCL_VTXFMT_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV34TCL_VTXFMT_TYPE_FLOAT 0x00000002
|
|
|
|
+#define NV34TCL_VTXFMT_TYPE_UBYTE 0x00000004
|
|
|
|
+#define NV34TCL_VTXFMT_TYPE_USHORT 0x00000005
|
|
|
|
+#define NV34TCL_VTXFMT_SIZE_SHIFT 4
|
|
|
|
+#define NV34TCL_VTXFMT_SIZE_MASK 0x000000f0
|
|
|
|
+#define NV34TCL_VTXFMT_STRIDE_SHIFT 8
|
|
|
|
+#define NV34TCL_VTXFMT_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x000017a0
|
|
|
|
+#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x000017a4
|
|
|
|
+#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x000017a8
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_BACK_R 0x000017b0
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_BACK_G 0x000017b4
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_BACK_B 0x000017b8
|
|
|
|
+#define NV34TCL_COLOR_MATERIAL_BACK_A 0x000017c0
|
|
|
|
+#define NV34TCL_QUERY_RESET 0x000017c8
|
|
|
|
+#define NV34TCL_QUERY_UNK17CC 0x000017cc
|
|
|
|
+#define NV34TCL_QUERY_GET 0x00001800
|
|
|
|
+#define NV34TCL_QUERY_GET_UNK24_SHIFT 24
|
|
|
|
+#define NV34TCL_QUERY_GET_UNK24_MASK 0xff000000
|
|
|
|
+#define NV34TCL_QUERY_GET_OFFSET_SHIFT 0
|
|
|
|
+#define NV34TCL_QUERY_GET_OFFSET_MASK 0x00ffffff
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END 0x00001808
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_STOP 0x00000000
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_POINTS 0x00000001
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_LINES 0x00000002
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_LINE_LOOP 0x00000003
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_LINE_STRIP 0x00000004
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_TRIANGLES 0x00000005
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP 0x00000006
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_TRIANGLE_FAN 0x00000007
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_QUADS 0x00000008
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_QUAD_STRIP 0x00000009
|
|
|
|
+#define NV34TCL_VERTEX_BEGIN_END_POLYGON 0x0000000a
|
|
|
|
+#define NV34TCL_VB_ELEMENT_U16 0x0000180c
|
|
|
|
+#define NV34TCL_VB_ELEMENT_U16_I0_SHIFT 0
|
|
|
|
+#define NV34TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VB_ELEMENT_U16_I1_SHIFT 16
|
|
|
|
+#define NV34TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_VB_ELEMENT_U32 0x00001810
|
|
|
|
+#define NV34TCL_VB_VERTEX_BATCH 0x00001814
|
|
|
|
+#define NV34TCL_VB_VERTEX_BATCH_OFFSET_SHIFT 0
|
|
|
|
+#define NV34TCL_VB_VERTEX_BATCH_OFFSET_MASK 0x00ffffff
|
|
|
|
+#define NV34TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24
|
|
|
|
+#define NV34TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000
|
|
|
|
+#define NV34TCL_VERTEX_DATA 0x00001818
|
|
|
|
+#define NV34TCL_IDXBUF_ADDRESS 0x0000181c
|
|
|
|
+#define NV34TCL_IDXBUF_FORMAT 0x00001820
|
|
|
|
+#define NV34TCL_IDXBUF_FORMAT_TYPE_SHIFT 4
|
|
|
|
+#define NV34TCL_IDXBUF_FORMAT_TYPE_MASK 0x000000f0
|
|
|
|
+#define NV34TCL_IDXBUF_FORMAT_TYPE_U32 0x00000000
|
|
|
|
+#define NV34TCL_IDXBUF_FORMAT_TYPE_U16 0x00000010
|
|
|
|
+#define NV34TCL_IDXBUF_FORMAT_DMA1 (1 << 0)
|
|
|
|
+#define NV34TCL_VB_INDEX_BATCH 0x00001824
|
|
|
|
+#define NV34TCL_VB_INDEX_BATCH_COUNT_SHIFT 24
|
|
|
|
+#define NV34TCL_VB_INDEX_BATCH_COUNT_MASK 0xff000000
|
|
|
|
+#define NV34TCL_VB_INDEX_BATCH_START_SHIFT 0
|
|
|
|
+#define NV34TCL_VB_INDEX_BATCH_START_MASK 0x00ffffff
|
|
|
|
+#define NV34TCL_POLYGON_MODE_FRONT 0x00001828
|
|
|
|
+#define NV34TCL_POLYGON_MODE_FRONT_POINT 0x00001b00
|
|
|
|
+#define NV34TCL_POLYGON_MODE_FRONT_LINE 0x00001b01
|
|
|
|
+#define NV34TCL_POLYGON_MODE_FRONT_FILL 0x00001b02
|
|
|
|
+#define NV34TCL_POLYGON_MODE_BACK 0x0000182c
|
|
|
|
+#define NV34TCL_POLYGON_MODE_BACK_POINT 0x00001b00
|
|
|
|
+#define NV34TCL_POLYGON_MODE_BACK_LINE 0x00001b01
|
|
|
|
+#define NV34TCL_POLYGON_MODE_BACK_FILL 0x00001b02
|
|
|
|
+#define NV34TCL_CULL_FACE 0x00001830
|
|
|
|
+#define NV34TCL_CULL_FACE_FRONT 0x00000404
|
|
|
|
+#define NV34TCL_CULL_FACE_BACK 0x00000405
|
|
|
|
+#define NV34TCL_CULL_FACE_FRONT_AND_BACK 0x00000408
|
|
|
|
+#define NV34TCL_FRONT_FACE 0x00001834
|
|
|
|
+#define NV34TCL_FRONT_FACE_CW 0x00000900
|
|
|
|
+#define NV34TCL_FRONT_FACE_CCW 0x00000901
|
|
|
|
+#define NV34TCL_POLYGON_SMOOTH_ENABLE 0x00001838
|
|
|
|
+#define NV34TCL_CULL_FACE_ENABLE 0x0000183c
|
|
|
|
+#define NV34TCL_TX_PALETTE_OFFSET(x) (0x00001840+((x)*4))
|
|
|
|
+#define NV34TCL_TX_PALETTE_OFFSET__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_VTX_ATTR_2F_X(x) (0x00001880+((x)*8))
|
|
|
|
+#define NV34TCL_VTX_ATTR_2F_X__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_2F_Y(x) (0x00001884+((x)*8))
|
|
|
|
+#define NV34TCL_VTX_ATTR_2F_Y__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4))
|
|
|
|
+#define NV34TCL_VTX_ATTR_2I__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_2I_X_SHIFT 0
|
|
|
|
+#define NV34TCL_VTX_ATTR_2I_X_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VTX_ATTR_2I_Y_SHIFT 16
|
|
|
|
+#define NV34TCL_VTX_ATTR_2I_Y_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4))
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB_X_SHIFT 0
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB_X_MASK 0x000000ff
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB_Y_SHIFT 8
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB_Z_SHIFT 16
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB_W_SHIFT 24
|
|
|
|
+#define NV34TCL_VTX_ATTR_4UB_W_MASK 0xff000000
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8))
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_XY__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_XY_X_SHIFT 0
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_XY_Y_SHIFT 16
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8))
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_ZW_W_SHIFT 16
|
|
|
|
+#define NV34TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_TX_OFFSET(x) (0x00001a00+((x)*32))
|
|
|
|
+#define NV34TCL_TX_OFFSET__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX_FORMAT(x) (0x00001a04+((x)*32))
|
|
|
|
+#define NV34TCL_TX_FORMAT__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX_FORMAT_DMA0 (1 << 0)
|
|
|
|
+#define NV34TCL_TX_FORMAT_DMA1 (1 << 1)
|
|
|
|
+#define NV34TCL_TX_FORMAT_CUBIC (1 << 2)
|
|
|
|
+#define NV34TCL_TX_FORMAT_NO_BORDER (1 << 3)
|
|
|
|
+#define NV34TCL_TX_FORMAT_DIMS_SHIFT 4
|
|
|
|
+#define NV34TCL_TX_FORMAT_DIMS_MASK 0x000000f0
|
|
|
|
+#define NV34TCL_TX_FORMAT_DIMS_1D 0x00000010
|
|
|
|
+#define NV34TCL_TX_FORMAT_DIMS_2D 0x00000020
|
|
|
|
+#define NV34TCL_TX_FORMAT_DIMS_3D 0x00000030
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_SHIFT 8
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_MASK 0x0000ff00
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_L8 0x00000000
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A8 0x00000100
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000200
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000300
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000400
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000500
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000600
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000700
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_INDEX8 0x00000b00
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_DXT1 0x00000c00
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_DXT3 0x00000e00
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_DXT5 0x00000f00
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00001000
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00001100
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00001200
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_L8_RECT 0x00001300
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A8L8 0x00001a00
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00001b00
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00001d00
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00001e00
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00002000
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_DSDT 0x00002800
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A16 0x00003200
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_HILO16 0x00003300
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_A16_RECT 0x00003500
|
|
|
|
+#define NV34TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00003600
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+#define NV34TCL_TX_FORMAT_FORMAT_HILO8 0x00004400
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+#define NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00004500
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+#define NV34TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00004600
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+#define NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00004700
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+#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00004a00
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+#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00004b00
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+#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00004c00
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+#define NV34TCL_TX_FORMAT_MIPMAP (1 << 19)
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+#define NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 20
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+#define NV34TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x00f00000
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+#define NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 24
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+#define NV34TCL_TX_FORMAT_BASE_SIZE_V_MASK 0x0f000000
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+#define NV34TCL_TX_FORMAT_BASE_SIZE_W_SHIFT 28
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+#define NV34TCL_TX_FORMAT_BASE_SIZE_W_MASK 0xf0000000
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+#define NV34TCL_TX_WRAP(x) (0x00001a08+((x)*32))
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+#define NV34TCL_TX_WRAP__SIZE 0x00000004
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+#define NV34TCL_TX_WRAP_S_SHIFT 0
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+#define NV34TCL_TX_WRAP_S_MASK 0x000000ff
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+#define NV34TCL_TX_WRAP_S_REPEAT 0x00000001
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+#define NV34TCL_TX_WRAP_S_MIRRORED_REPEAT 0x00000002
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+#define NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE 0x00000003
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+#define NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER 0x00000004
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+#define NV34TCL_TX_WRAP_S_CLAMP 0x00000005
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+#define NV34TCL_TX_WRAP_T_SHIFT 8
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+#define NV34TCL_TX_WRAP_T_MASK 0x00000f00
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+#define NV34TCL_TX_WRAP_T_REPEAT 0x00000100
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+#define NV34TCL_TX_WRAP_T_MIRRORED_REPEAT 0x00000200
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|
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+#define NV34TCL_TX_WRAP_T_CLAMP_TO_EDGE 0x00000300
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|
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+#define NV34TCL_TX_WRAP_T_CLAMP_TO_BORDER 0x00000400
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|
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+#define NV34TCL_TX_WRAP_T_CLAMP 0x00000500
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+#define NV34TCL_TX_WRAP_EXPAND_NORMAL_SHIFT 12
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+#define NV34TCL_TX_WRAP_EXPAND_NORMAL_MASK 0x0000f000
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+#define NV34TCL_TX_WRAP_R_SHIFT 16
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+#define NV34TCL_TX_WRAP_R_MASK 0x000f0000
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|
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+#define NV34TCL_TX_WRAP_R_REPEAT 0x00010000
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|
|
+#define NV34TCL_TX_WRAP_R_MIRRORED_REPEAT 0x00020000
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|
|
+#define NV34TCL_TX_WRAP_R_CLAMP_TO_EDGE 0x00030000
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|
|
+#define NV34TCL_TX_WRAP_R_CLAMP_TO_BORDER 0x00040000
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|
|
+#define NV34TCL_TX_WRAP_R_CLAMP 0x00050000
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+#define NV34TCL_TX_WRAP_RCOMP_SHIFT 28
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+#define NV34TCL_TX_WRAP_RCOMP_MASK 0xf0000000
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+#define NV34TCL_TX_WRAP_RCOMP_NEVER 0x00000000
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|
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+#define NV34TCL_TX_WRAP_RCOMP_GREATER 0x10000000
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|
|
+#define NV34TCL_TX_WRAP_RCOMP_EQUAL 0x20000000
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|
|
+#define NV34TCL_TX_WRAP_RCOMP_GEQUAL 0x30000000
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|
|
+#define NV34TCL_TX_WRAP_RCOMP_LESS 0x40000000
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|
+#define NV34TCL_TX_WRAP_RCOMP_NOTEQUAL 0x50000000
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|
+#define NV34TCL_TX_WRAP_RCOMP_LEQUAL 0x60000000
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|
|
+#define NV34TCL_TX_WRAP_RCOMP_ALWAYS 0x70000000
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|
+#define NV34TCL_TX_ENABLE(x) (0x00001a0c+((x)*32))
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|
|
+#define NV34TCL_TX_ENABLE__SIZE 0x00000004
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|
+#define NV34TCL_TX_ENABLE_ANISO_SHIFT 4
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|
+#define NV34TCL_TX_ENABLE_ANISO_MASK 0x00000030
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|
|
+#define NV34TCL_TX_ENABLE_ANISO_NONE 0x00000000
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|
|
+#define NV34TCL_TX_ENABLE_ANISO_2X 0x00000010
|
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|
|
+#define NV34TCL_TX_ENABLE_ANISO_4X 0x00000020
|
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|
|
+#define NV34TCL_TX_ENABLE_ANISO_8X 0x00000030
|
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|
|
+#define NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14
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|
|
+#define NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000
|
|
|
|
+#define NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26
|
|
|
|
+#define NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000
|
|
|
|
+#define NV34TCL_TX_ENABLE_ENABLE (1 << 30)
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|
|
+#define NV34TCL_TX_SWIZZLE(x) (0x00001a10+((x)*32))
|
|
|
|
+#define NV34TCL_TX_SWIZZLE__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_X_SHIFT 14
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|
|
+#define NV34TCL_TX_SWIZZLE_S0_X_MASK 0x0000c000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_X_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_X_ONE 0x00004000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_X_S1 0x00008000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Y_SHIFT 12
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|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Y_MASK 0x00003000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Y_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Y_ONE 0x00001000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Y_S1 0x00002000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Z_SHIFT 10
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Z_MASK 0x00000c00
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Z_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Z_ONE 0x00000400
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_Z_S1 0x00000800
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_W_SHIFT 8
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_W_MASK 0x00000300
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_W_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_W_ONE 0x00000100
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S0_W_S1 0x00000200
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_X_SHIFT 6
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_X_MASK 0x000000c0
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_X_W 0x00000000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_X_Z 0x00000040
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_X_Y 0x00000080
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_X_X 0x000000c0
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Y_SHIFT 4
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Y_MASK 0x00000030
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Y_W 0x00000000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Y_Z 0x00000010
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Y_Y 0x00000020
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Y_X 0x00000030
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Z_SHIFT 2
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Z_MASK 0x0000000c
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Z_W 0x00000000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Z_Z 0x00000004
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Z_Y 0x00000008
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_Z_X 0x0000000c
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_W_SHIFT 0
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_W_MASK 0x00000003
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_W_W 0x00000000
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_W_Z 0x00000001
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_W_Y 0x00000002
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_S1_W_X 0x00000003
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_RECT_PITCH_SHIFT 16
|
|
|
|
+#define NV34TCL_TX_SWIZZLE_RECT_PITCH_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_TX_FILTER(x) (0x00001a14+((x)*32))
|
|
|
|
+#define NV34TCL_TX_FILTER__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX_FILTER_LOD_BIAS_SHIFT 8
|
|
|
|
+#define NV34TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00
|
|
|
|
+#define NV34TCL_TX_FILTER_MINIFY_SHIFT 16
|
|
|
|
+#define NV34TCL_TX_FILTER_MINIFY_MASK 0x000f0000
|
|
|
|
+#define NV34TCL_TX_FILTER_MINIFY_NEAREST 0x00010000
|
|
|
|
+#define NV34TCL_TX_FILTER_MINIFY_LINEAR 0x00020000
|
|
|
|
+#define NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x00030000
|
|
|
|
+#define NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x00040000
|
|
|
|
+#define NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x00050000
|
|
|
|
+#define NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x00060000
|
|
|
|
+#define NV34TCL_TX_FILTER_MAGNIFY_SHIFT 24
|
|
|
|
+#define NV34TCL_TX_FILTER_MAGNIFY_MASK 0x0f000000
|
|
|
|
+#define NV34TCL_TX_FILTER_MAGNIFY_NEAREST 0x01000000
|
|
|
|
+#define NV34TCL_TX_FILTER_MAGNIFY_LINEAR 0x02000000
|
|
|
|
+#define NV34TCL_TX_FILTER_SIGNED_BLUE (1 << 28)
|
|
|
|
+#define NV34TCL_TX_FILTER_SIGNED_GREEN (1 << 29)
|
|
|
|
+#define NV34TCL_TX_FILTER_SIGNED_RED (1 << 30)
|
|
|
|
+#define NV34TCL_TX_FILTER_SIGNED_ALPHA (1 << 31)
|
|
|
|
+#define NV34TCL_TX_NPOT_SIZE(x) (0x00001a18+((x)*32))
|
|
|
|
+#define NV34TCL_TX_NPOT_SIZE__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX_NPOT_SIZE_H_SHIFT 0
|
|
|
|
+#define NV34TCL_TX_NPOT_SIZE_H_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_TX_NPOT_SIZE_W_SHIFT 16
|
|
|
|
+#define NV34TCL_TX_NPOT_SIZE_W_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR(x) (0x00001a1c+((x)*32))
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR_B_SHIFT 0
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR_G_SHIFT 8
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR_R_SHIFT 16
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR_A_SHIFT 24
|
|
|
|
+#define NV34TCL_TX_BORDER_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV34TCL_VTX_ATTR_4F_X(x) (0x00001c00+((x)*16))
|
|
|
|
+#define NV34TCL_VTX_ATTR_4F_X__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_4F_Y(x) (0x00001c04+((x)*16))
|
|
|
|
+#define NV34TCL_VTX_ATTR_4F_Y__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_4F_Z(x) (0x00001c08+((x)*16))
|
|
|
|
+#define NV34TCL_VTX_ATTR_4F_Z__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_VTX_ATTR_4F_W(x) (0x00001c0c+((x)*16))
|
|
|
|
+#define NV34TCL_VTX_ATTR_4F_W__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_FP_CONTROL 0x00001d60
|
|
|
|
+#define NV34TCL_FP_CONTROL_USES_KIL (1 << 7)
|
|
|
|
+#define NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_SHIFT 0
|
|
|
|
+#define NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_MASK 0x0000000f
|
|
|
|
+#define NV34TCL_DEPTH_UNK17D8 0x00001d78
|
|
|
|
+#define NV34TCL_DEPTH_UNK17D8_CLAMP_SHIFT 4
|
|
|
|
+#define NV34TCL_DEPTH_UNK17D8_CLAMP_MASK 0x000000f0
|
|
|
|
+#define NV34TCL_MULTISAMPLE_CONTROL 0x00001d7c
|
|
|
|
+#define NV34TCL_MULTISAMPLE_CONTROL_ENABLE (1 << 0)
|
|
|
|
+#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_COVERAGE (1 << 4)
|
|
|
|
+#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_ONE (1 << 8)
|
|
|
|
+#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_SHIFT 16
|
|
|
|
+#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_CLEAR_DEPTH_VALUE 0x00001d8c
|
|
|
|
+#define NV34TCL_CLEAR_COLOR_VALUE 0x00001d90
|
|
|
|
+#define NV34TCL_CLEAR_COLOR_VALUE_B_SHIFT 0
|
|
|
|
+#define NV34TCL_CLEAR_COLOR_VALUE_B_MASK 0x000000ff
|
|
|
|
+#define NV34TCL_CLEAR_COLOR_VALUE_G_SHIFT 8
|
|
|
|
+#define NV34TCL_CLEAR_COLOR_VALUE_G_MASK 0x0000ff00
|
|
|
|
+#define NV34TCL_CLEAR_COLOR_VALUE_R_SHIFT 16
|
|
|
|
+#define NV34TCL_CLEAR_COLOR_VALUE_R_MASK 0x00ff0000
|
|
|
|
+#define NV34TCL_CLEAR_COLOR_VALUE_A_SHIFT 24
|
|
|
|
+#define NV34TCL_CLEAR_COLOR_VALUE_A_MASK 0xff000000
|
|
|
|
+#define NV34TCL_CLEAR_BUFFERS 0x00001d94
|
|
|
|
+#define NV34TCL_CLEAR_BUFFERS_COLOR_A (1 << 7)
|
|
|
|
+#define NV34TCL_CLEAR_BUFFERS_COLOR_B (1 << 6)
|
|
|
|
+#define NV34TCL_CLEAR_BUFFERS_COLOR_G (1 << 5)
|
|
|
|
+#define NV34TCL_CLEAR_BUFFERS_COLOR_R (1 << 4)
|
|
|
|
+#define NV34TCL_CLEAR_BUFFERS_STENCIL (1 << 1)
|
|
|
|
+#define NV34TCL_CLEAR_BUFFERS_DEPTH (1 << 0)
|
|
|
|
+#define NV34TCL_DO_VERTICES 0x00001dac
|
|
|
|
+#define NV34TCL_LINE_STIPPLE_ENABLE 0x00001db4
|
|
|
|
+#define NV34TCL_LINE_STIPPLE_PATTERN 0x00001db8
|
|
|
|
+#define NV34TCL_LINE_STIPPLE_PATTERN_FACTOR_SHIFT 0
|
|
|
|
+#define NV34TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK 0x0000ffff
|
|
|
|
+#define NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT 16
|
|
|
|
+#define NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000
|
|
|
|
+#define NV34TCL_BACK_MATERIAL_SHININESS(x) (0x00001e20+((x)*4))
|
|
|
|
+#define NV34TCL_BACK_MATERIAL_SHININESS__SIZE 0x00000006
|
|
|
|
+#define NV34TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4))
|
|
|
|
+#define NV34TCL_VTX_ATTR_1F__SIZE 0x00000010
|
|
|
|
+#define NV34TCL_ENGINE 0x00001e94
|
|
|
|
+#define NV34TCL_ENGINE_FP (1 << 0)
|
|
|
|
+#define NV34TCL_ENGINE_VP (1 << 1)
|
|
|
|
+#define NV34TCL_ENGINE_FIXED (1 << 2)
|
|
|
|
+#define NV34TCL_VP_UPLOAD_FROM_ID 0x00001e9c
|
|
|
|
+#define NV34TCL_VP_START_FROM_ID 0x00001ea0
|
|
|
|
+#define NV34TCL_POINT_PARAMETERS(x) (0x00001ec0+((x)*4))
|
|
|
|
+#define NV34TCL_POINT_PARAMETERS__SIZE 0x00000008
|
|
|
|
+#define NV34TCL_POINT_SIZE 0x00001ee0
|
|
|
|
+#define NV34TCL_POINT_PARAMETERS_ENABLE 0x00001ee4
|
|
|
|
+#define NV34TCL_POINT_SPRITE 0x00001ee8
|
|
|
|
+#define NV34TCL_POINT_SPRITE_ENABLE (1 << 0)
|
|
|
|
+#define NV34TCL_POINT_SPRITE_R_MODE_SHIFT 1
|
|
|
|
+#define NV34TCL_POINT_SPRITE_R_MODE_MASK 0x00000006
|
|
|
|
+#define NV34TCL_POINT_SPRITE_R_MODE_ZERO 0x00000000
|
|
|
|
+#define NV34TCL_POINT_SPRITE_R_MODE_R 0x00000002
|
|
|
|
+#define NV34TCL_POINT_SPRITE_R_MODE_S 0x00000004
|
|
|
|
+#define NV34TCL_POINT_SPRITE_COORD_REPLACE (1 << 11)
|
|
|
|
+#define NV34TCL_VP_UPLOAD_CONST_ID 0x00001efc
|
|
|
|
+#define NV34TCL_VP_UPLOAD_CONST_X(x) (0x00001f00+((x)*16))
|
|
|
|
+#define NV34TCL_VP_UPLOAD_CONST_X__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_VP_UPLOAD_CONST_Y(x) (0x00001f04+((x)*16))
|
|
|
|
+#define NV34TCL_VP_UPLOAD_CONST_Y__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_VP_UPLOAD_CONST_Z(x) (0x00001f08+((x)*16))
|
|
|
|
+#define NV34TCL_VP_UPLOAD_CONST_Z__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_VP_UPLOAD_CONST_W(x) (0x00001f0c+((x)*16))
|
|
|
|
+#define NV34TCL_VP_UPLOAD_CONST_W__SIZE 0x00000004
|
|
|
|
+#define NV34TCL_UNK1f80(x) (0x00001f80+((x)*4))
|
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|
|
+#define NV34TCL_UNK1f80__SIZE 0x00000010
|
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+
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+
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|
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+#define NV40_CONTEXT_SURFACES_2D 0x00003062
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+
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+
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+
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|
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+#define NV40_STRETCHED_IMAGE_FROM_CPU 0x00003066
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+
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+
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+
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|
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+#define NV40_TEXTURE_FROM_CPU 0x0000307b
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+
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+
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+
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|
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+#define NV40_SCALED_IMAGE_FROM_MEMORY 0x00003089
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+
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+
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+
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|
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+#define NV40_IMAGE_FROM_CPU 0x0000308a
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+
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+
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+
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|
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+#define NV40_SWIZZLED_SURFACE 0x0000309e
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+
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+
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+
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|
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+#define NV40TCL 0x00004097
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+
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+#define NV40TCL_REF_CNT 0x00000050
|
|
|
|
+#define NV40TCL_NOP 0x00000100
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|
|
|
+#define NV40TCL_NOTIFY 0x00000104
|
|
|
|
+#define NV40TCL_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV40TCL_DMA_TEXTURE0 0x00000184
|
|
|
|
+#define NV40TCL_DMA_TEXTURE1 0x00000188
|
|
|
|
+#define NV40TCL_DMA_COLOR1 0x0000018c
|
|
|
|
+#define NV40TCL_DMA_COLOR0 0x00000194
|
|
|
|
+#define NV40TCL_DMA_ZETA 0x00000198
|
|
|
|
+#define NV40TCL_DMA_VTXBUF0 0x0000019c
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|
|
|
+#define NV40TCL_DMA_VTXBUF1 0x000001a0
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|
|
|
+#define NV40TCL_DMA_FENCE 0x000001a4
|
|
|
|
+#define NV40TCL_DMA_QUERY 0x000001a8
|
|
|
|
+#define NV40TCL_DMA_UNK01AC 0x000001ac
|
|
|
|
+#define NV40TCL_DMA_UNK01B0 0x000001b0
|
|
|
|
+#define NV40TCL_DMA_COLOR2 0x000001b4
|
|
|
|
+#define NV40TCL_DMA_COLOR3 0x000001b8
|
|
|
|
+#define NV40TCL_RT_HORIZ 0x00000200
|
|
|
|
+#define NV40TCL_RT_HORIZ_W_SHIFT 16
|
|
|
|
+#define NV40TCL_RT_HORIZ_W_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_RT_HORIZ_X_SHIFT 0
|
|
|
|
+#define NV40TCL_RT_HORIZ_X_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_RT_VERT 0x00000204
|
|
|
|
+#define NV40TCL_RT_VERT_H_SHIFT 16
|
|
|
|
+#define NV40TCL_RT_VERT_H_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_RT_VERT_Y_SHIFT 0
|
|
|
|
+#define NV40TCL_RT_VERT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_RT_FORMAT 0x00000208
|
|
|
|
+#define NV40TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT 24
|
|
|
|
+#define NV40TCL_RT_FORMAT_LOG2_HEIGHT_MASK 0xff000000
|
|
|
|
+#define NV40TCL_RT_FORMAT_LOG2_WIDTH_SHIFT 16
|
|
|
|
+#define NV40TCL_RT_FORMAT_LOG2_WIDTH_MASK 0x00ff0000
|
|
|
|
+#define NV40TCL_RT_FORMAT_TYPE_SHIFT 8
|
|
|
|
+#define NV40TCL_RT_FORMAT_TYPE_MASK 0x00000f00
|
|
|
|
+#define NV40TCL_RT_FORMAT_TYPE_LINEAR 0x00000100
|
|
|
|
+#define NV40TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200
|
|
|
|
+#define NV40TCL_RT_FORMAT_ZETA_SHIFT 5
|
|
|
|
+#define NV40TCL_RT_FORMAT_ZETA_MASK 0x000000e0
|
|
|
|
+#define NV40TCL_RT_FORMAT_ZETA_Z16 0x00000020
|
|
|
|
+#define NV40TCL_RT_FORMAT_ZETA_Z24S8 0x00000040
|
|
|
|
+#define NV40TCL_RT_FORMAT_COLOR_SHIFT 0
|
|
|
|
+#define NV40TCL_RT_FORMAT_COLOR_MASK 0x0000001f
|
|
|
|
+#define NV40TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003
|
|
|
|
+#define NV40TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005
|
|
|
|
+#define NV40TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008
|
|
|
|
+#define NV40TCL_RT_FORMAT_COLOR_B8 0x00000009
|
|
|
|
+#define NV40TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d
|
|
|
|
+#define NV40TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f
|
|
|
|
+#define NV40TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010
|
|
|
|
+#define NV40TCL_COLOR0_PITCH 0x0000020c
|
|
|
|
+#define NV40TCL_COLOR0_OFFSET 0x00000210
|
|
|
|
+#define NV40TCL_ZETA_OFFSET 0x00000214
|
|
|
|
+#define NV40TCL_COLOR1_OFFSET 0x00000218
|
|
|
|
+#define NV40TCL_COLOR1_PITCH 0x0000021c
|
|
|
|
+#define NV40TCL_RT_ENABLE 0x00000220
|
|
|
|
+#define NV40TCL_RT_ENABLE_MRT (1 << 4)
|
|
|
|
+#define NV40TCL_RT_ENABLE_COLOR3 (1 << 3)
|
|
|
|
+#define NV40TCL_RT_ENABLE_COLOR2 (1 << 2)
|
|
|
|
+#define NV40TCL_RT_ENABLE_COLOR1 (1 << 1)
|
|
|
|
+#define NV40TCL_RT_ENABLE_COLOR0 (1 << 0)
|
|
|
|
+#define NV40TCL_ZETA_PITCH 0x0000022c
|
|
|
|
+#define NV40TCL_COLOR2_PITCH 0x00000280
|
|
|
|
+#define NV40TCL_COLOR3_PITCH 0x00000284
|
|
|
|
+#define NV40TCL_COLOR2_OFFSET 0x00000288
|
|
|
|
+#define NV40TCL_COLOR3_OFFSET 0x0000028c
|
|
|
|
+#define NV40TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*8))
|
|
|
|
+#define NV40TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008
|
|
|
|
+#define NV40TCL_VIEWPORT_CLIP_VERT(x) (0x000002c4+((x)*8))
|
|
|
|
+#define NV40TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008
|
|
|
|
+#define NV40TCL_DITHER_ENABLE 0x00000300
|
|
|
|
+#define NV40TCL_ALPHA_TEST_ENABLE 0x00000304
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC 0x00000308
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC_LESS 0x00000201
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV40TCL_ALPHA_TEST_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV40TCL_ALPHA_TEST_REF 0x0000030c
|
|
|
|
+#define NV40TCL_BLEND_ENABLE 0x00000310
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC 0x00000314
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_SHIFT 0
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE 0x00000001
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR 0x00000300
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA 0x00000304
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_DST_COLOR 0x00000306
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SHIFT 16
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE 0x00010000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR 0x03000000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA 0x03020000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA 0x03040000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR 0x03060000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR 0x03070000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE 0x03080000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR 0x80010000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA 0x80030000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST 0x00000318
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_SHIFT 0
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_ONE 0x00000001
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_SRC_COLOR 0x00000300
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_DST_ALPHA 0x00000304
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_DST_COLOR 0x00000306
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_SHIFT 16
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE 0x00010000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR 0x03000000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA 0x03020000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA 0x03040000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR 0x03060000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR 0x03070000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE 0x03080000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR 0x80010000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x80030000
|
|
|
|
+#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000
|
|
|
|
+#define NV40TCL_BLEND_COLOR 0x0000031c
|
|
|
|
+#define NV40TCL_BLEND_EQUATION 0x00000320
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_RGB_SHIFT 0
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_RGB_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_RGB_FUNC_ADD 0x00008006
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_RGB_MIN 0x00008007
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_RGB_MAX 0x00008008
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_RGB_FUNC_SUBTRACT 0x0000800a
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_RGB_FUNC_REVERSE_SUBTRACT 0x0000800b
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_ALPHA_SHIFT 16
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_ALPHA_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_ALPHA_FUNC_ADD 0x80060000
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_ALPHA_MIN 0x80070000
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_ALPHA_MAX 0x80080000
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_ALPHA_FUNC_SUBTRACT 0x800a0000
|
|
|
|
+#define NV40TCL_BLEND_EQUATION_ALPHA_FUNC_REVERSE_SUBTRACT 0x800b0000
|
|
|
|
+#define NV40TCL_COLOR_MASK 0x00000324
|
|
|
|
+#define NV40TCL_COLOR_MASK_BUFFER0_B_SHIFT 0
|
|
|
|
+#define NV40TCL_COLOR_MASK_BUFFER0_B_MASK 0x000000ff
|
|
|
|
+#define NV40TCL_COLOR_MASK_BUFFER0_G_SHIFT 8
|
|
|
|
+#define NV40TCL_COLOR_MASK_BUFFER0_G_MASK 0x0000ff00
|
|
|
|
+#define NV40TCL_COLOR_MASK_BUFFER0_R_SHIFT 16
|
|
|
|
+#define NV40TCL_COLOR_MASK_BUFFER0_R_MASK 0x00ff0000
|
|
|
|
+#define NV40TCL_COLOR_MASK_BUFFER0_A_SHIFT 24
|
|
|
|
+#define NV40TCL_COLOR_MASK_BUFFER0_A_MASK 0xff000000
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_ENABLE 0x00000328
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_MASK 0x0000032c
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC 0x00000330
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_REF 0x00000334
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_FUNC_MASK 0x00000338
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_FAIL 0x0000033c
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_FAIL_INVERT 0x0000150a
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_FAIL_KEEP 0x00001e00
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_FAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_FAIL_INCR 0x00001e02
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_FAIL_DECR 0x00001e03
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZFAIL 0x00000340
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_INVERT 0x0000150a
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_KEEP 0x00001e00
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_INCR 0x00001e02
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_DECR 0x00001e03
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZPASS 0x00000344
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZPASS_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZPASS_INVERT 0x0000150a
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZPASS_KEEP 0x00001e00
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZPASS_REPLACE 0x00001e01
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZPASS_INCR 0x00001e02
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZPASS_DECR 0x00001e03
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP 0x00008507
|
|
|
|
+#define NV40TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP 0x00008508
|
|
|
|
+#define NV40TCL_STENCIL_BACK_ENABLE 0x00000348
|
|
|
|
+#define NV40TCL_STENCIL_BACK_MASK 0x0000034c
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC 0x00000350
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_REF 0x00000354
|
|
|
|
+#define NV40TCL_STENCIL_BACK_FUNC_MASK 0x00000358
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_FAIL 0x0000035c
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_FAIL_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_FAIL_INVERT 0x0000150a
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_FAIL_KEEP 0x00001e00
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_FAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_FAIL_INCR 0x00001e02
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_FAIL_DECR 0x00001e03
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZFAIL 0x00000360
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZFAIL_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZFAIL_INVERT 0x0000150a
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZFAIL_KEEP 0x00001e00
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZFAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZFAIL_INCR 0x00001e02
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZFAIL_DECR 0x00001e03
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZPASS 0x00000364
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZPASS_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZPASS_INVERT 0x0000150a
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZPASS_KEEP 0x00001e00
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZPASS_REPLACE 0x00001e01
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZPASS_INCR 0x00001e02
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZPASS_DECR 0x00001e03
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP 0x00008507
|
|
|
|
+#define NV40TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP 0x00008508
|
|
|
|
+#define NV40TCL_SHADE_MODEL 0x00000368
|
|
|
|
+#define NV40TCL_SHADE_MODEL_FLAT 0x00001d00
|
|
|
|
+#define NV40TCL_SHADE_MODEL_SMOOTH 0x00001d01
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK 0x00000370
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER1_A (1 << 4)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER1_R (1 << 5)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER1_G (1 << 6)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER1_B (1 << 7)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER2_A (1 << 8)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER2_R (1 << 9)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER2_G (1 << 10)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER2_B (1 << 11)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER3_A (1 << 12)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER3_R (1 << 13)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER3_G (1 << 14)
|
|
|
|
+#define NV40TCL_MRT_COLOR_MASK_BUFFER3_B (1 << 15)
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_ENABLE 0x00000374
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP 0x00000378
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_CLEAR 0x00001500
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_AND 0x00001501
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_AND_REVERSE 0x00001502
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_COPY 0x00001503
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_AND_INVERTED 0x00001504
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_NOOP 0x00001505
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_XOR 0x00001506
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_OR 0x00001507
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_NOR 0x00001508
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_EQUIV 0x00001509
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_INVERT 0x0000150a
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_OR_REVERSE 0x0000150b
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_COPY_INVERTED 0x0000150c
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_OR_INVERTED 0x0000150d
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_NAND 0x0000150e
|
|
|
|
+#define NV40TCL_COLOR_LOGIC_OP_SET 0x0000150f
|
|
|
|
+#define NV40TCL_DEPTH_RANGE_NEAR 0x00000394
|
|
|
|
+#define NV40TCL_DEPTH_RANGE_FAR 0x00000398
|
|
|
|
+#define NV40TCL_LINE_WIDTH 0x000003b8
|
|
|
|
+#define NV40TCL_LINE_SMOOTH_ENABLE 0x000003bc
|
|
|
|
+#define NV40TCL_UNK03C0(x) (0x000003c0+((x)*4))
|
|
|
|
+#define NV40TCL_UNK03C0__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_UNK0400(x) (0x00000400+((x)*4))
|
|
|
|
+#define NV40TCL_UNK0400__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_UNK0440(x) (0x00000440+((x)*4))
|
|
|
|
+#define NV40TCL_UNK0440__SIZE 0x00000020
|
|
|
|
+#define NV40TCL_SCISSOR_HORIZ 0x000008c0
|
|
|
|
+#define NV40TCL_SCISSOR_HORIZ_X_SHIFT 0
|
|
|
|
+#define NV40TCL_SCISSOR_HORIZ_X_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_SCISSOR_HORIZ_W_SHIFT 16
|
|
|
|
+#define NV40TCL_SCISSOR_HORIZ_W_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_SCISSOR_VERT 0x000008c4
|
|
|
|
+#define NV40TCL_SCISSOR_VERT_Y_SHIFT 0
|
|
|
|
+#define NV40TCL_SCISSOR_VERT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_SCISSOR_VERT_H_SHIFT 16
|
|
|
|
+#define NV40TCL_SCISSOR_VERT_H_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_FOG_MODE 0x000008cc
|
|
|
|
+#define NV40TCL_FOG_EQUATION_CONSTANT 0x000008d0
|
|
|
|
+#define NV40TCL_FOG_EQUATION_LINEAR 0x000008d4
|
|
|
|
+#define NV40TCL_FOG_EQUATION_QUADRATIC 0x000008d8
|
|
|
|
+#define NV40TCL_FP_ADDRESS 0x000008e4
|
|
|
|
+#define NV40TCL_FP_ADDRESS_OFFSET_SHIFT 8
|
|
|
|
+#define NV40TCL_FP_ADDRESS_OFFSET_MASK 0xffffff00
|
|
|
|
+#define NV40TCL_FP_ADDRESS_DMA1 (1 << 1)
|
|
|
|
+#define NV40TCL_FP_ADDRESS_DMA0 (1 << 0)
|
|
|
|
+#define NV40TCL_VIEWPORT_HORIZ 0x00000a00
|
|
|
|
+#define NV40TCL_VIEWPORT_HORIZ_W_SHIFT 16
|
|
|
|
+#define NV40TCL_VIEWPORT_HORIZ_W_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_VIEWPORT_HORIZ_X_SHIFT 0
|
|
|
|
+#define NV40TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_VIEWPORT_VERT 0x00000a04
|
|
|
|
+#define NV40TCL_VIEWPORT_VERT_H_SHIFT 16
|
|
|
|
+#define NV40TCL_VIEWPORT_VERT_H_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_VIEWPORT_VERT_Y_SHIFT 0
|
|
|
|
+#define NV40TCL_VIEWPORT_VERT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_VIEWPORT_TRANSLATE_X 0x00000a20
|
|
|
|
+#define NV40TCL_VIEWPORT_TRANSLATE_Y 0x00000a24
|
|
|
|
+#define NV40TCL_VIEWPORT_TRANSLATE_Z 0x00000a28
|
|
|
|
+#define NV40TCL_VIEWPORT_TRANSLATE_W 0x00000a2c
|
|
|
|
+#define NV40TCL_VIEWPORT_SCALE_X 0x00000a30
|
|
|
|
+#define NV40TCL_VIEWPORT_SCALE_Y 0x00000a34
|
|
|
|
+#define NV40TCL_VIEWPORT_SCALE_Z 0x00000a38
|
|
|
|
+#define NV40TCL_VIEWPORT_SCALE_W 0x00000a3c
|
|
|
|
+#define NV40TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000a60
|
|
|
|
+#define NV40TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000a64
|
|
|
|
+#define NV40TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000a68
|
|
|
|
+#define NV40TCL_DEPTH_FUNC 0x00000a6c
|
|
|
|
+#define NV40TCL_DEPTH_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV40TCL_DEPTH_FUNC_LESS 0x00000201
|
|
|
|
+#define NV40TCL_DEPTH_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV40TCL_DEPTH_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV40TCL_DEPTH_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV40TCL_DEPTH_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV40TCL_DEPTH_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV40TCL_DEPTH_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV40TCL_DEPTH_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV40TCL_DEPTH_WRITE_ENABLE 0x00000a70
|
|
|
|
+#define NV40TCL_DEPTH_TEST_ENABLE 0x00000a74
|
|
|
|
+#define NV40TCL_POLYGON_OFFSET_FACTOR 0x00000a78
|
|
|
|
+#define NV40TCL_POLYGON_OFFSET_UNITS 0x00000a7c
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8))
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_XY__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_XY_X_SHIFT 0
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_XY_Y_SHIFT 16
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8))
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_Z__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_Z_Z_SHIFT 0
|
|
|
|
+#define NV40TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_UNK0B40(x) (0x00000b40+((x)*4))
|
|
|
|
+#define NV40TCL_UNK0B40__SIZE 0x00000008
|
|
|
|
+#define NV40TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4))
|
|
|
|
+#define NV40TCL_VP_UPLOAD_INST__SIZE 0x00000004
|
|
|
|
+#define NV40TCL_CLIP_PLANE_ENABLE 0x00001478
|
|
|
|
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE0 (1 << 1)
|
|
|
|
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE1 (1 << 5)
|
|
|
|
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE2 (1 << 9)
|
|
|
|
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE3 (1 << 13)
|
|
|
|
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE4 (1 << 17)
|
|
|
|
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE5 (1 << 21)
|
|
|
|
+#define NV40TCL_POLYGON_STIPPLE_ENABLE 0x0000147c
|
|
|
|
+#define NV40TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4))
|
|
|
|
+#define NV40TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020
|
|
|
|
+#define NV40TCL_VTX_ATTR_3F_X(x) (0x00001500+((x)*16))
|
|
|
|
+#define NV40TCL_VTX_ATTR_3F_X__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_3F_Y(x) (0x00001504+((x)*16))
|
|
|
|
+#define NV40TCL_VTX_ATTR_3F_Y__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_3F_Z(x) (0x00001508+((x)*16))
|
|
|
|
+#define NV40TCL_VTX_ATTR_3F_Z__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTXBUF_ADDRESS(x) (0x00001680+((x)*4))
|
|
|
|
+#define NV40TCL_VTXBUF_ADDRESS__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTXBUF_ADDRESS_DMA1 (1 << 31)
|
|
|
|
+#define NV40TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0
|
|
|
|
+#define NV40TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff
|
|
|
|
+#define NV40TCL_VTX_CACHE_INVALIDATE 0x00001714
|
|
|
|
+#define NV40TCL_VTXFMT(x) (0x00001740+((x)*4))
|
|
|
|
+#define NV40TCL_VTXFMT__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTXFMT_TYPE_SHIFT 0
|
|
|
|
+#define NV40TCL_VTXFMT_TYPE_MASK 0x0000000f
|
|
|
|
+#define NV40TCL_VTXFMT_TYPE_FLOAT 0x00000002
|
|
|
|
+#define NV40TCL_VTXFMT_TYPE_UBYTE 0x00000004
|
|
|
|
+#define NV40TCL_VTXFMT_TYPE_USHORT 0x00000005
|
|
|
|
+#define NV40TCL_VTXFMT_SIZE_SHIFT 4
|
|
|
|
+#define NV40TCL_VTXFMT_SIZE_MASK 0x000000f0
|
|
|
|
+#define NV40TCL_VTXFMT_STRIDE_SHIFT 8
|
|
|
|
+#define NV40TCL_VTXFMT_STRIDE_MASK 0x0000ff00
|
|
|
|
+#define NV40TCL_QUERY_RESET 0x000017c8
|
|
|
|
+#define NV40TCL_QUERY_UNK17CC 0x000017cc
|
|
|
|
+#define NV40TCL_QUERY_GET 0x00001800
|
|
|
|
+#define NV40TCL_QUERY_GET_UNK24_SHIFT 24
|
|
|
|
+#define NV40TCL_QUERY_GET_UNK24_MASK 0xff000000
|
|
|
|
+#define NV40TCL_QUERY_GET_OFFSET_SHIFT 0
|
|
|
|
+#define NV40TCL_QUERY_GET_OFFSET_MASK 0x00ffffff
|
|
|
|
+#define NV40TCL_BEGIN_END 0x00001808
|
|
|
|
+#define NV40TCL_BEGIN_END_STOP 0x00000000
|
|
|
|
+#define NV40TCL_BEGIN_END_POINTS 0x00000001
|
|
|
|
+#define NV40TCL_BEGIN_END_LINES 0x00000002
|
|
|
|
+#define NV40TCL_BEGIN_END_LINE_LOOP 0x00000003
|
|
|
|
+#define NV40TCL_BEGIN_END_LINE_STRIP 0x00000004
|
|
|
|
+#define NV40TCL_BEGIN_END_TRIANGLES 0x00000005
|
|
|
|
+#define NV40TCL_BEGIN_END_TRIANGLE_STRIP 0x00000006
|
|
|
|
+#define NV40TCL_BEGIN_END_TRIANGLE_FAN 0x00000007
|
|
|
|
+#define NV40TCL_BEGIN_END_QUADS 0x00000008
|
|
|
|
+#define NV40TCL_BEGIN_END_QUAD_STRIP 0x00000009
|
|
|
|
+#define NV40TCL_BEGIN_END_POLYGON 0x0000000a
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|
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+#define NV40TCL_VB_ELEMENT_U16 0x0000180c
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+#define NV40TCL_VB_ELEMENT_U16_1_SHIFT 16
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+#define NV40TCL_VB_ELEMENT_U16_1_MASK 0xffff0000
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+#define NV40TCL_VB_ELEMENT_U16_0_SHIFT 0
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|
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+#define NV40TCL_VB_ELEMENT_U16_0_MASK 0x0000ffff
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|
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+#define NV40TCL_VB_ELEMENT_U32 0x00001810
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+#define NV40TCL_VB_VERTEX_BATCH 0x00001814
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+#define NV40TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24
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+#define NV40TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000
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+#define NV40TCL_VB_VERTEX_BATCH_START_SHIFT 0
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|
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+#define NV40TCL_VB_VERTEX_BATCH_START_MASK 0x00ffffff
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+#define NV40TCL_VERTEX_DATA 0x00001818
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+#define NV40TCL_IDXBUF_ADDRESS 0x0000181c
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|
|
+#define NV40TCL_IDXBUF_FORMAT 0x00001820
|
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|
|
+#define NV40TCL_IDXBUF_FORMAT_TYPE_SHIFT 4
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|
|
+#define NV40TCL_IDXBUF_FORMAT_TYPE_MASK 0x000000f0
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|
|
|
+#define NV40TCL_IDXBUF_FORMAT_TYPE_U32 0x00000000
|
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|
|
+#define NV40TCL_IDXBUF_FORMAT_TYPE_U16 0x00000010
|
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|
|
+#define NV40TCL_IDXBUF_FORMAT_DMA1 (1 << 0)
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|
|
+#define NV40TCL_VB_INDEX_BATCH 0x00001824
|
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|
|
+#define NV40TCL_VB_INDEX_BATCH_COUNT_SHIFT 24
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|
|
|
+#define NV40TCL_VB_INDEX_BATCH_COUNT_MASK 0xff000000
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|
+#define NV40TCL_VB_INDEX_BATCH_START_SHIFT 0
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|
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+#define NV40TCL_VB_INDEX_BATCH_START_MASK 0x00ffffff
|
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|
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+#define NV40TCL_POLYGON_MODE_FRONT 0x00001828
|
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|
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+#define NV40TCL_POLYGON_MODE_FRONT_POINT 0x00001b00
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|
|
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+#define NV40TCL_POLYGON_MODE_FRONT_LINE 0x00001b01
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|
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+#define NV40TCL_POLYGON_MODE_FRONT_FILL 0x00001b02
|
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|
|
+#define NV40TCL_POLYGON_MODE_BACK 0x0000182c
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|
|
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+#define NV40TCL_POLYGON_MODE_BACK_POINT 0x00001b00
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|
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+#define NV40TCL_POLYGON_MODE_BACK_LINE 0x00001b01
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|
|
+#define NV40TCL_POLYGON_MODE_BACK_FILL 0x00001b02
|
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|
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+#define NV40TCL_CULL_FACE 0x00001830
|
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|
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+#define NV40TCL_CULL_FACE_FRONT 0x00000404
|
|
|
|
+#define NV40TCL_CULL_FACE_BACK 0x00000405
|
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|
|
+#define NV40TCL_CULL_FACE_FRONT_AND_BACK 0x00000408
|
|
|
|
+#define NV40TCL_FRONT_FACE 0x00001834
|
|
|
|
+#define NV40TCL_FRONT_FACE_CW 0x00000900
|
|
|
|
+#define NV40TCL_FRONT_FACE_CCW 0x00000901
|
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|
|
+#define NV40TCL_POLYGON_SMOOTH_ENABLE 0x00001838
|
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|
|
+#define NV40TCL_CULL_FACE_ENABLE 0x0000183c
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|
|
+#define NV40TCL_TEX_SIZE1(x) (0x00001840+((x)*4))
|
|
|
|
+#define NV40TCL_TEX_SIZE1__SIZE 0x00000008
|
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|
|
+#define NV40TCL_TEX_SIZE1_DEPTH_SHIFT 20
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|
|
+#define NV40TCL_TEX_SIZE1_DEPTH_MASK 0xfff00000
|
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|
|
+#define NV40TCL_TEX_SIZE1_PITCH_SHIFT 0
|
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|
|
+#define NV40TCL_TEX_SIZE1_PITCH_MASK 0x0000ffff
|
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|
|
+#define NV40TCL_VTX_ATTR_2F_X(x) (0x00001880+((x)*8))
|
|
|
|
+#define NV40TCL_VTX_ATTR_2F_X__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_2F_Y(x) (0x00001884+((x)*8))
|
|
|
|
+#define NV40TCL_VTX_ATTR_2F_Y__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4))
|
|
|
|
+#define NV40TCL_VTX_ATTR_2I__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_2I_X_SHIFT 0
|
|
|
|
+#define NV40TCL_VTX_ATTR_2I_X_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_VTX_ATTR_2I_Y_SHIFT 16
|
|
|
|
+#define NV40TCL_VTX_ATTR_2I_Y_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4))
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB_X_SHIFT 0
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB_X_MASK 0x000000ff
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB_Y_SHIFT 8
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB_Z_SHIFT 16
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB_W_SHIFT 24
|
|
|
|
+#define NV40TCL_VTX_ATTR_4UB_W_MASK 0xff000000
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8))
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_XY__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_XY_X_SHIFT 0
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_XY_Y_SHIFT 16
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8))
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_ZW_W_SHIFT 16
|
|
|
|
+#define NV40TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_TEX_OFFSET(x) (0x00001a00+((x)*32))
|
|
|
|
+#define NV40TCL_TEX_OFFSET__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_TEX_FORMAT(x) (0x00001a04+((x)*32))
|
|
|
|
+#define NV40TCL_TEX_FORMAT__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT 16
|
|
|
|
+#define NV40TCL_TEX_FORMAT_MIPMAP_COUNT_MASK 0x000f0000
|
|
|
|
+#define NV40TCL_TEX_FORMAT_RECT (1 << 14)
|
|
|
|
+#define NV40TCL_TEX_FORMAT_LINEAR (1 << 13)
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_SHIFT 8
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_MASK 0x00001f00
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_L8 0x00000100
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_A1R5G5B5 0x00000200
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_A4R4G4B4 0x00000300
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_R5G6B5 0x00000400
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_A8R8G8B8 0x00000500
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_DXT1 0x00000600
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_DXT3 0x00000700
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_DXT5 0x00000800
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_A8L8 0x00000b00
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_Z24 0x00001000
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_Z16 0x00001200
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_A16 0x00001400
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_A16L16 0x00001500
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_HILO8 0x00001800
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_RGBA16F 0x00001a00
|
|
|
|
+#define NV40TCL_TEX_FORMAT_FORMAT_RGBA32F 0x00001b00
|
|
|
|
+#define NV40TCL_TEX_FORMAT_DIMS_SHIFT 4
|
|
|
|
+#define NV40TCL_TEX_FORMAT_DIMS_MASK 0x000000f0
|
|
|
|
+#define NV40TCL_TEX_FORMAT_DIMS_1D 0x00000010
|
|
|
|
+#define NV40TCL_TEX_FORMAT_DIMS_2D 0x00000020
|
|
|
|
+#define NV40TCL_TEX_FORMAT_DIMS_3D 0x00000030
|
|
|
|
+#define NV40TCL_TEX_FORMAT_NO_BORDER (1 << 3)
|
|
|
|
+#define NV40TCL_TEX_FORMAT_CUBIC (1 << 2)
|
|
|
|
+#define NV40TCL_TEX_FORMAT_DMA1 (1 << 1)
|
|
|
|
+#define NV40TCL_TEX_FORMAT_DMA0 (1 << 0)
|
|
|
|
+#define NV40TCL_TEX_WRAP(x) (0x00001a08+((x)*32))
|
|
|
|
+#define NV40TCL_TEX_WRAP__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_SHIFT 0
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_MASK 0x000000ff
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_REPEAT 0x00000001
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT 0x00000002
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE 0x00000003
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER 0x00000004
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_CLAMP 0x00000005
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE 0x00000006
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER 0x00000007
|
|
|
|
+#define NV40TCL_TEX_WRAP_S_MIRROR_CLAMP 0x00000008
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_SHIFT 8
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_MASK 0x00000f00
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_REPEAT 0x00000100
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_MIRRORED_REPEAT 0x00000200
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_CLAMP_TO_EDGE 0x00000300
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_CLAMP_TO_BORDER 0x00000400
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_CLAMP 0x00000500
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_MIRROR_CLAMP_TO_EDGE 0x00000600
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_MIRROR_CLAMP_TO_BORDER 0x00000700
|
|
|
|
+#define NV40TCL_TEX_WRAP_T_MIRROR_CLAMP 0x00000800
|
|
|
|
+#define NV40TCL_TEX_WRAP_EXPAND_NORMAL_SHIFT 12
|
|
|
|
+#define NV40TCL_TEX_WRAP_EXPAND_NORMAL_MASK 0x0000f000
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_SHIFT 16
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_MASK 0x00ff0000
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_REPEAT 0x00010000
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_MIRRORED_REPEAT 0x00020000
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_CLAMP_TO_EDGE 0x00030000
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_CLAMP_TO_BORDER 0x00040000
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_CLAMP 0x00050000
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_EDGE 0x00060000
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_BORDER 0x00070000
|
|
|
|
+#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP 0x00080000
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_SHIFT 28
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_MASK 0xf0000000
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_NEVER 0x00000000
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_GREATER 0x10000000
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_EQUAL 0x20000000
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_GEQUAL 0x30000000
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_LESS 0x40000000
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL 0x50000000
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_LEQUAL 0x60000000
|
|
|
|
+#define NV40TCL_TEX_WRAP_RCOMP_ALWAYS 0x70000000
|
|
|
|
+#define NV40TCL_TEX_ENABLE(x) (0x00001a0c+((x)*32))
|
|
|
|
+#define NV40TCL_TEX_ENABLE__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ENABLE (1 << 31)
|
|
|
|
+#define NV40TCL_TEX_ENABLE_MIPMAP_MIN_LOD_SHIFT 27
|
|
|
|
+#define NV40TCL_TEX_ENABLE_MIPMAP_MIN_LOD_MASK 0x38000000
|
|
|
|
+#define NV40TCL_TEX_ENABLE_MIPMAP_MAX_LOD_SHIFT 15
|
|
|
|
+#define NV40TCL_TEX_ENABLE_MIPMAP_MAX_LOD_MASK 0x00038000
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_SHIFT 4
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_MASK 0x000000f0
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_NONE 0x00000000
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_2X 0x00000010
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_4X 0x00000020
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_6X 0x00000030
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_8X 0x00000040
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_10X 0x00000050
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_12X 0x00000060
|
|
|
|
+#define NV40TCL_TEX_ENABLE_ANISO_16X 0x00000070
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE(x) (0x00001a10+((x)*32))
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_X_SHIFT 14
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_X_MASK 0x0000c000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_X_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_X_ONE 0x00004000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_X_S1 0x00008000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Y_SHIFT 12
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Y_MASK 0x00003000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Y_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Y_ONE 0x00001000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Y_S1 0x00002000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Z_SHIFT 10
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Z_MASK 0x00000c00
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Z_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Z_ONE 0x00000400
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_Z_S1 0x00000800
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_W_SHIFT 8
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_W_MASK 0x00000300
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_W_ZERO 0x00000000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_W_ONE 0x00000100
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S0_W_S1 0x00000200
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_X_SHIFT 6
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_X_MASK 0x000000c0
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_X_W 0x00000000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_X_Z 0x00000040
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_X_Y 0x00000080
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_X_X 0x000000c0
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Y_SHIFT 4
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Y_MASK 0x00000030
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Y_W 0x00000000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Y_Z 0x00000010
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Y_Y 0x00000020
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Y_X 0x00000030
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Z_SHIFT 2
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Z_MASK 0x0000000c
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Z_W 0x00000000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Z_Z 0x00000004
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Z_Y 0x00000008
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_Z_X 0x0000000c
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_W_SHIFT 0
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_W_MASK 0x00000003
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_W_W 0x00000000
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_W_Z 0x00000001
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_W_Y 0x00000002
|
|
|
|
+#define NV40TCL_TEX_SWIZZLE_S1_W_X 0x00000003
|
|
|
|
+#define NV40TCL_TEX_FILTER(x) (0x00001a14+((x)*32))
|
|
|
|
+#define NV40TCL_TEX_FILTER__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_TEX_FILTER_SIGNED_ALPHA (1 << 31)
|
|
|
|
+#define NV40TCL_TEX_FILTER_SIGNED_RED (1 << 30)
|
|
|
|
+#define NV40TCL_TEX_FILTER_SIGNED_GREEN (1 << 29)
|
|
|
|
+#define NV40TCL_TEX_FILTER_SIGNED_BLUE (1 << 28)
|
|
|
|
+#define NV40TCL_TEX_FILTER_MIN_SHIFT 16
|
|
|
|
+#define NV40TCL_TEX_FILTER_MIN_MASK 0x000f0000
|
|
|
|
+#define NV40TCL_TEX_FILTER_MIN_NEAREST 0x00010000
|
|
|
|
+#define NV40TCL_TEX_FILTER_MIN_LINEAR 0x00020000
|
|
|
|
+#define NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST 0x00030000
|
|
|
|
+#define NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST 0x00040000
|
|
|
|
+#define NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR 0x00050000
|
|
|
|
+#define NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR 0x00060000
|
|
|
|
+#define NV40TCL_TEX_FILTER_MAG_SHIFT 24
|
|
|
|
+#define NV40TCL_TEX_FILTER_MAG_MASK 0x0f000000
|
|
|
|
+#define NV40TCL_TEX_FILTER_MAG_NEAREST 0x01000000
|
|
|
|
+#define NV40TCL_TEX_FILTER_MAG_LINEAR 0x02000000
|
|
|
|
+#define NV40TCL_TEX_SIZE0(x) (0x00001a18+((x)*32))
|
|
|
|
+#define NV40TCL_TEX_SIZE0__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_TEX_SIZE0_H_SHIFT 0
|
|
|
|
+#define NV40TCL_TEX_SIZE0_H_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_TEX_SIZE0_W_SHIFT 16
|
|
|
|
+#define NV40TCL_TEX_SIZE0_W_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR(x) (0x00001a1c+((x)*32))
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR_B_SHIFT 0
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR_B_MASK 0x000000ff
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR_G_SHIFT 8
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR_G_MASK 0x0000ff00
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR_R_SHIFT 16
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR_R_MASK 0x00ff0000
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR_A_SHIFT 24
|
|
|
|
+#define NV40TCL_TEX_BORDER_COLOR_A_MASK 0xff000000
|
|
|
|
+#define NV40TCL_VTX_ATTR_4F_X(x) (0x00001c00+((x)*16))
|
|
|
|
+#define NV40TCL_VTX_ATTR_4F_X__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_4F_Y(x) (0x00001c04+((x)*16))
|
|
|
|
+#define NV40TCL_VTX_ATTR_4F_Y__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_4F_Z(x) (0x00001c08+((x)*16))
|
|
|
|
+#define NV40TCL_VTX_ATTR_4F_Z__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VTX_ATTR_4F_W(x) (0x00001c0c+((x)*16))
|
|
|
|
+#define NV40TCL_VTX_ATTR_4F_W__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_FP_CONTROL 0x00001d60
|
|
|
|
+#define NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT 24
|
|
|
|
+#define NV40TCL_FP_CONTROL_TEMP_COUNT_MASK 0xff000000
|
|
|
|
+#define NV40TCL_FP_CONTROL_KIL (1 << 7)
|
|
|
|
+#define NV40TCL_MULTISAMPLE_CONTROL 0x00001d7c
|
|
|
|
+#define NV40TCL_CLEAR_VALUE_DEPTH 0x00001d8c
|
|
|
|
+#define NV40TCL_CLEAR_VALUE_COLOR 0x00001d90
|
|
|
|
+#define NV40TCL_CLEAR_BUFFERS 0x00001d94
|
|
|
|
+#define NV40TCL_CLEAR_BUFFERS_COLOR_A (1 << 7)
|
|
|
|
+#define NV40TCL_CLEAR_BUFFERS_COLOR_B (1 << 6)
|
|
|
|
+#define NV40TCL_CLEAR_BUFFERS_COLOR_G (1 << 5)
|
|
|
|
+#define NV40TCL_CLEAR_BUFFERS_COLOR_R (1 << 4)
|
|
|
|
+#define NV40TCL_CLEAR_BUFFERS_STENCIL (1 << 1)
|
|
|
|
+#define NV40TCL_CLEAR_BUFFERS_DEPTH (1 << 0)
|
|
|
|
+#define NV40TCL_LINE_STIPPLE_ENABLE 0x00001db4
|
|
|
|
+#define NV40TCL_LINE_STIPPLE_PATTERN 0x00001db8
|
|
|
|
+#define NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_SHIFT 0
|
|
|
|
+#define NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK 0x0000ffff
|
|
|
|
+#define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT 16
|
|
|
|
+#define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000
|
|
|
|
+#define NV40TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4))
|
|
|
|
+#define NV40TCL_VTX_ATTR_1F__SIZE 0x00000010
|
|
|
|
+#define NV40TCL_VP_UPLOAD_FROM_ID 0x00001e9c
|
|
|
|
+#define NV40TCL_VP_START_FROM_ID 0x00001ea0
|
|
|
|
+#define NV40TCL_POINT_SIZE 0x00001ee0
|
|
|
|
+#define NV40TCL_POINT_SPRITE 0x00001ee8
|
|
|
|
+#define NV40TCL_VP_UPLOAD_CONST_ID 0x00001efc
|
|
|
|
+#define NV40TCL_VP_UPLOAD_CONST_X(x) (0x00001f00+((x)*16))
|
|
|
|
+#define NV40TCL_VP_UPLOAD_CONST_X__SIZE 0x00000004
|
|
|
|
+#define NV40TCL_VP_UPLOAD_CONST_Y(x) (0x00001f04+((x)*16))
|
|
|
|
+#define NV40TCL_VP_UPLOAD_CONST_Y__SIZE 0x00000004
|
|
|
|
+#define NV40TCL_VP_UPLOAD_CONST_Z(x) (0x00001f08+((x)*16))
|
|
|
|
+#define NV40TCL_VP_UPLOAD_CONST_Z__SIZE 0x00000004
|
|
|
|
+#define NV40TCL_VP_UPLOAD_CONST_W(x) (0x00001f0c+((x)*16))
|
|
|
|
+#define NV40TCL_VP_UPLOAD_CONST_W__SIZE 0x00000004
|
|
|
|
+#define NV40TCL_TEX_CACHE_CTL 0x00001fd8
|
|
|
|
+#define NV40TCL_VP_ATTRIB_EN 0x00001ff0
|
|
|
|
+#define NV40TCL_VP_RESULT_EN 0x00001ff4
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV44TCL 0x00004497
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV50_2D 0x0000502d
|
|
|
|
+
|
|
|
|
+#define NV50_2D_NOP 0x00000100
|
|
|
|
+#define NV50_2D_NOTIFY 0x00000104
|
|
|
|
+#define NV50_2D_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV50_2D_DMA_IN_MEMORY0 0x00000184
|
|
|
|
+#define NV50_2D_DMA_IN_MEMORY1 0x00000188
|
|
|
|
+#define NV50_2D_DMA_IN_MEMORY2 0x0000018c
|
|
|
|
+#define NV50_2D_DST_FORMAT 0x00000200
|
|
|
|
+#define NV50_2D_DST_FORMAT_32BPP 0x000000cf
|
|
|
|
+#define NV50_2D_DST_FORMAT_24BPP 0x000000e6
|
|
|
|
+#define NV50_2D_DST_FORMAT_16BPP 0x000000e8
|
|
|
|
+#define NV50_2D_DST_FORMAT_8BPP 0x000000f3
|
|
|
|
+#define NV50_2D_DST_FORMAT_15BPP 0x000000f8
|
|
|
|
+#define NV50_2D_DST_PITCH 0x00000214
|
|
|
|
+#define NV50_2D_DST_WIDTH 0x00000218
|
|
|
|
+#define NV50_2D_DST_HEIGHT 0x0000021c
|
|
|
|
+#define NV50_2D_DST_ADDRESS_HIGH 0x00000220
|
|
|
|
+#define NV50_2D_DST_ADDRESS_LOW 0x00000224
|
|
|
|
+#define NV50_2D_SRC_FORMAT 0x00000230
|
|
|
|
+#define NV50_2D_SRC_FORMAT_32BPP 0x000000cf
|
|
|
|
+#define NV50_2D_SRC_FORMAT_24BPP 0x000000e6
|
|
|
|
+#define NV50_2D_SRC_FORMAT_16BPP 0x000000e8
|
|
|
|
+#define NV50_2D_SRC_FORMAT_8BPP 0x000000f3
|
|
|
|
+#define NV50_2D_SRC_FORMAT_15BPP 0x000000f8
|
|
|
|
+#define NV50_2D_SRC_PITCH 0x00000244
|
|
|
|
+#define NV50_2D_SRC_WIDTH 0x00000248
|
|
|
|
+#define NV50_2D_SRC_HEIGHT 0x0000024c
|
|
|
|
+#define NV50_2D_SRC_ADDRESS_HIGH 0x00000250
|
|
|
|
+#define NV50_2D_SRC_ADDRESS_LOW 0x00000254
|
|
|
|
+#define NV50_2D_CLIP_X 0x00000280
|
|
|
|
+#define NV50_2D_CLIP_Y 0x00000284
|
|
|
|
+#define NV50_2D_CLIP_Z 0x00000288
|
|
|
|
+#define NV50_2D_CLIP_W 0x0000028c
|
|
|
|
+#define NV50_2D_ROP 0x000002a0
|
|
|
|
+#define NV50_2D_OPERATION 0x000002ac
|
|
|
|
+#define NV50_2D_OPERATION_SRCCOPY_AND 0x00000000
|
|
|
|
+#define NV50_2D_OPERATION_ROP_AND 0x00000001
|
|
|
|
+#define NV50_2D_OPERATION_BLEND_AND 0x00000002
|
|
|
|
+#define NV50_2D_OPERATION_SRCCOPY 0x00000003
|
|
|
|
+#define NV50_2D_OPERATION_SRCCOPY_PREMULT 0x00000004
|
|
|
|
+#define NV50_2D_OPERATION_BLEND_PREMULT 0x00000005
|
|
|
|
+#define NV50_2D_PATTERN_FORMAT 0x000002e8
|
|
|
|
+#define NV50_2D_PATTERN_FORMAT_16BPP 0x00000000
|
|
|
|
+#define NV50_2D_PATTERN_FORMAT_15BPP 0x00000001
|
|
|
|
+#define NV50_2D_PATTERN_FORMAT_32BPP 0x00000002
|
|
|
|
+#define NV50_2D_PATTERN_FORMAT_8BPP 0x00000003
|
|
|
|
+#define NV50_2D_PATTERN_COLOR(x) (0x000002f0+((x)*4))
|
|
|
|
+#define NV50_2D_PATTERN_COLOR__SIZE 0x00000002
|
|
|
|
+#define NV50_2D_PATTERN_BITMAP(x) (0x000002f8+((x)*4))
|
|
|
|
+#define NV50_2D_PATTERN_BITMAP__SIZE 0x00000002
|
|
|
|
+#define NV50_2D_RECT_FORMAT 0x00000584
|
|
|
|
+#define NV50_2D_RECT_FORMAT_32BPP 0x000000cf
|
|
|
|
+#define NV50_2D_RECT_FORMAT_24BPP 0x000000e6
|
|
|
|
+#define NV50_2D_RECT_FORMAT_16BPP 0x000000e8
|
|
|
|
+#define NV50_2D_RECT_FORMAT_8BPP 0x000000f3
|
|
|
|
+#define NV50_2D_RECT_FORMAT_15BPP 0x000000f8
|
|
|
|
+#define NV50_2D_RECT_COLOR 0x00000588
|
|
|
|
+#define NV50_2D_RECT_X1 0x00000600
|
|
|
|
+#define NV50_2D_RECT_Y1 0x00000604
|
|
|
|
+#define NV50_2D_RECT_X2 0x00000608
|
|
|
|
+#define NV50_2D_RECT_Y2 0x0000060c
|
|
|
|
+#define NV50_2D_SIFC_UNK0800 0x00000800
|
|
|
|
+#define NV50_2D_SIFC_FORMAT 0x00000804
|
|
|
|
+#define NV50_2D_SIFC_FORMAT_32BPP 0x000000cf
|
|
|
|
+#define NV50_2D_SIFC_FORMAT_24BPP 0x000000e6
|
|
|
|
+#define NV50_2D_SIFC_FORMAT_16BPP 0x000000e8
|
|
|
|
+#define NV50_2D_SIFC_FORMAT_8BPP 0x000000f3
|
|
|
|
+#define NV50_2D_SIFC_FORMAT_15BPP 0x000000f8
|
|
|
|
+#define NV50_2D_SIFC_WIDTH 0x00000838
|
|
|
|
+#define NV50_2D_SIFC_HEIGHT 0x0000083c
|
|
|
|
+#define NV50_2D_SIFC_SCALE_UNK0840 0x00000840
|
|
|
|
+#define NV50_2D_SIFC_SCALE_UNK0844 0x00000844
|
|
|
|
+#define NV50_2D_SIFC_SCALE_UNK0848 0x00000848
|
|
|
|
+#define NV50_2D_SIFC_SCALE_UNK084C 0x0000084c
|
|
|
|
+#define NV50_2D_SIFC_UNK0850 0x00000850
|
|
|
|
+#define NV50_2D_SIFC_DST_X 0x00000854
|
|
|
|
+#define NV50_2D_SIFC_UNK0858 0x00000858
|
|
|
|
+#define NV50_2D_SIFC_DST_Y 0x0000085c
|
|
|
|
+#define NV50_2D_SIFC_DATA 0x00000860
|
|
|
|
+#define NV50_2D_BLIT_DST_X 0x000008b0
|
|
|
|
+#define NV50_2D_BLIT_DST_Y 0x000008b4
|
|
|
|
+#define NV50_2D_BLIT_DST_W 0x000008b8
|
|
|
|
+#define NV50_2D_BLIT_DST_H 0x000008bc
|
|
|
|
+#define NV50_2D_BLIT_SRC_X 0x000008d4
|
|
|
|
+#define NV50_2D_BLIT_SRC_Y 0x000008dc
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV50_MEMORY_TO_MEMORY_FORMAT 0x00005039
|
|
|
|
+
|
|
|
|
+#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH 0x00000238
|
|
|
|
+#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH 0x0000023c
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV50TCL 0x00005097
|
|
|
|
+
|
|
|
|
+#define NV50TCL_NOP 0x00000100
|
|
|
|
+#define NV50TCL_NOTIFY 0x00000104
|
|
|
|
+#define NV50TCL_DMA_NOTIFY 0x00000180
|
|
|
|
+#define NV50TCL_DMA_UNK0(x) (0x00000184+((x)*4))
|
|
|
|
+#define NV50TCL_DMA_UNK0__SIZE 0x0000000b
|
|
|
|
+#define NV50TCL_DMA_UNK1(x) (0x000001c0+((x)*4))
|
|
|
|
+#define NV50TCL_DMA_UNK1__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_RT_ADDRESS_HIGH(x) (0x00000200+((x)*32))
|
|
|
|
+#define NV50TCL_RT_ADDRESS_HIGH__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_RT_ADDRESS_LOW(x) (0x00000204+((x)*32))
|
|
|
|
+#define NV50TCL_RT_ADDRESS_LOW__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_RT_FORMAT(x) (0x00000208+((x)*32))
|
|
|
|
+#define NV50TCL_RT_FORMAT__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_RT_FORMAT_32BPP 0x000000cf
|
|
|
|
+#define NV50TCL_RT_FORMAT_24BPP 0x000000e6
|
|
|
|
+#define NV50TCL_RT_FORMAT_16BPP 0x000000e8
|
|
|
|
+#define NV50TCL_RT_FORMAT_8BPP 0x000000f3
|
|
|
|
+#define NV50TCL_RT_FORMAT_15BPP 0x000000f8
|
|
|
|
+#define NV50TCL_RT_TILE_UNK(x) (0x0000020c+((x)*32))
|
|
|
|
+#define NV50TCL_RT_TILE_UNK__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_RT_UNK4(x) (0x00000210+((x)*32))
|
|
|
|
+#define NV50TCL_RT_UNK4__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_VTX_ATTR_1F(x) (0x00000300+((x)*4))
|
|
|
|
+#define NV50TCL_VTX_ATTR_1F__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_2F_X(x) (0x00000380+((x)*8))
|
|
|
|
+#define NV50TCL_VTX_ATTR_2F_X__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_2F_Y(x) (0x00000384+((x)*8))
|
|
|
|
+#define NV50TCL_VTX_ATTR_2F_Y__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_3F_X(x) (0x00000400+((x)*16))
|
|
|
|
+#define NV50TCL_VTX_ATTR_3F_X__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_3F_Y(x) (0x00000404+((x)*16))
|
|
|
|
+#define NV50TCL_VTX_ATTR_3F_Y__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_3F_Z(x) (0x00000408+((x)*16))
|
|
|
|
+#define NV50TCL_VTX_ATTR_3F_Z__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_3F_W(x) (0x0000040c+((x)*16))
|
|
|
|
+#define NV50TCL_VTX_ATTR_3F_W__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_4F_X(x) (0x00000500+((x)*16))
|
|
|
|
+#define NV50TCL_VTX_ATTR_4F_X__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_4F_Y(x) (0x00000504+((x)*16))
|
|
|
|
+#define NV50TCL_VTX_ATTR_4F_Y__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_4F_Z(x) (0x00000508+((x)*16))
|
|
|
|
+#define NV50TCL_VTX_ATTR_4F_Z__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_4F_W(x) (0x0000050c+((x)*16))
|
|
|
|
+#define NV50TCL_VTX_ATTR_4F_W__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_2I(x) (0x00000680+((x)*4))
|
|
|
|
+#define NV50TCL_VTX_ATTR_2I__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_2I_X_SHIFT 0
|
|
|
|
+#define NV50TCL_VTX_ATTR_2I_X_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_VTX_ATTR_2I_Y_SHIFT 16
|
|
|
|
+#define NV50TCL_VTX_ATTR_2I_Y_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_0(x) (0x00000700+((x)*8))
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_0__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_0_X_SHIFT 0
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_0_X_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_0_Y_SHIFT 16
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_0_Y_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_1(x) (0x00000704+((x)*8))
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_1__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_1_Z_SHIFT 0
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_1_Z_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_1_W_SHIFT 16
|
|
|
|
+#define NV50TCL_VTX_ATTR_4I_1_W_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_0(x) (0x00000780+((x)*8))
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_0__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_0_X_SHIFT 0
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_0_X_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_0_Y_SHIFT 16
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_0_Y_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_1(x) (0x00000784+((x)*8))
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_1__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_1_Z_SHIFT 0
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_1_Z_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_1_W_SHIFT 16
|
|
|
|
+#define NV50TCL_VTX_ATTR_4NI_1_W_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_VERTEX_ARRAY_FORMAT(x) (0x00000900+((x)*16))
|
|
|
|
+#define NV50TCL_VERTEX_ARRAY_FORMAT__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_VIEWPORT_UNK0(x) (0x00000a00+((x)*4))
|
|
|
|
+#define NV50TCL_VIEWPORT_UNK0__SIZE 0x00000003
|
|
|
|
+#define NV50TCL_VIEWPORT_UNK1(x) (0x00000a0c+((x)*4))
|
|
|
|
+#define NV50TCL_VIEWPORT_UNK1__SIZE 0x00000003
|
|
|
|
+#define NV50TCL_VIEWPORT_HORIZ 0x00000c00
|
|
|
|
+#define NV50TCL_VIEWPORT_HORIZ_X_SHIFT 0
|
|
|
|
+#define NV50TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_VIEWPORT_HORIZ_W_SHIFT 16
|
|
|
|
+#define NV50TCL_VIEWPORT_HORIZ_W_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_VIEWPORT_VERT 0x00000c04
|
|
|
|
+#define NV50TCL_VIEWPORT_VERT_Y_SHIFT 0
|
|
|
|
+#define NV50TCL_VIEWPORT_VERT_Y_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_VIEWPORT_VERT_H_SHIFT 16
|
|
|
|
+#define NV50TCL_VIEWPORT_VERT_H_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_DEPTH_RANGE_NEAR 0x00000c08
|
|
|
|
+#define NV50TCL_DEPTH_RANGE_FAR 0x00000c0c
|
|
|
|
+#define NV50TCL_VIEWPORT_CLIP_HORIZ(x) (0x00000d00+((x)*8))
|
|
|
|
+#define NV50TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_VIEWPORT_CLIP_VERT(x) (0x00000d04+((x)*8))
|
|
|
|
+#define NV50TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_VERTEX_BUFFER_FIRST 0x00000d74
|
|
|
|
+#define NV50TCL_VERTEX_BUFFER_COUNT 0x00000d78
|
|
|
|
+#define NV50TCL_CLEAR_COLOR(x) (0x00000d80+((x)*4))
|
|
|
|
+#define NV50TCL_CLEAR_COLOR__SIZE 0x00000004
|
|
|
|
+#define NV50TCL_CLEAR_DEPTH 0x00000d90
|
|
|
|
+#define NV50TCL_CLEAR_STENCIL 0x00000da0
|
|
|
|
+#define NV50TCL_POLYGON_MODE_FRONT 0x00000dac
|
|
|
|
+#define NV50TCL_POLYGON_MODE_FRONT_POINT 0x00001b00
|
|
|
|
+#define NV50TCL_POLYGON_MODE_FRONT_LINE 0x00001b01
|
|
|
|
+#define NV50TCL_POLYGON_MODE_FRONT_FILL 0x00001b02
|
|
|
|
+#define NV50TCL_POLYGON_MODE_BACK 0x00000db0
|
|
|
|
+#define NV50TCL_POLYGON_MODE_BACK_POINT 0x00001b00
|
|
|
|
+#define NV50TCL_POLYGON_MODE_BACK_LINE 0x00001b01
|
|
|
|
+#define NV50TCL_POLYGON_MODE_BACK_FILL 0x00001b02
|
|
|
|
+#define NV50TCL_POLYGON_SMOOTH_ENABLE 0x00000db4
|
|
|
|
+#define NV50TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000dc0
|
|
|
|
+#define NV50TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000dc4
|
|
|
|
+#define NV50TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000dc8
|
|
|
|
+#define NV50TCL_SCISSOR_HORIZ 0x00000e04
|
|
|
|
+#define NV50TCL_SCISSOR_HORIZ_L_SHIFT 0
|
|
|
|
+#define NV50TCL_SCISSOR_HORIZ_L_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_SCISSOR_HORIZ_R_SHIFT 16
|
|
|
|
+#define NV50TCL_SCISSOR_HORIZ_R_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_SCISSOR_VERT 0x00000e08
|
|
|
|
+#define NV50TCL_SCISSOR_VERT_T_SHIFT 0
|
|
|
|
+#define NV50TCL_SCISSOR_VERT_T_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_SCISSOR_VERT_B_SHIFT 16
|
|
|
|
+#define NV50TCL_SCISSOR_VERT_B_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_CB_ADDR 0x00000f00
|
|
|
|
+#define NV50TCL_CB_ADDR_ID_SHIFT 8
|
|
|
|
+#define NV50TCL_CB_ADDR_ID_MASK 0xffffff00
|
|
|
|
+#define NV50TCL_CB_ADDR_BUFFER_SHIFT 0
|
|
|
|
+#define NV50TCL_CB_ADDR_BUFFER_MASK 0x000000ff
|
|
|
|
+#define NV50TCL_CB_DATA(x) (0x00000f04+((x)*4))
|
|
|
|
+#define NV50TCL_CB_DATA__SIZE 0x00000010
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_REF 0x00000f54
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_MASK 0x00000f58
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_MASK 0x00000f5c
|
|
|
|
+#define NV50TCL_GP_ADDRESS_HIGH 0x00000f70
|
|
|
|
+#define NV50TCL_GP_ADDRESS_LOW 0x00000f74
|
|
|
|
+#define NV50TCL_VP_ADDRESS_HIGH 0x00000f7c
|
|
|
|
+#define NV50TCL_VP_ADDRESS_LOW 0x00000f80
|
|
|
|
+#define NV50TCL_FP_ADDRESS_HIGH 0x00000fa4
|
|
|
|
+#define NV50TCL_FP_ADDRESS_LOW 0x00000fa8
|
|
|
|
+#define NV50TCL_ZETA_ADDRESS_HIGH 0x00000fe0
|
|
|
|
+#define NV50TCL_ZETA_ADDRESS_LOW 0x00000fe4
|
|
|
|
+#define NV50TCL_UNKFF4 0x00000ff4
|
|
|
|
+#define NV50TCL_UNKFF4_W_SHIFT 16
|
|
|
|
+#define NV50TCL_UNKFF4_W_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_UNKFF8 0x00000ff8
|
|
|
|
+#define NV50TCL_UNKFF8_H_SHIFT 16
|
|
|
|
+#define NV50TCL_UNKFF8_H_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_RT_HORIZ(x) (0x00001240+((x)*8))
|
|
|
|
+#define NV50TCL_RT_HORIZ__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_RT_VERT(x) (0x00001244+((x)*8))
|
|
|
|
+#define NV50TCL_RT_VERT__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_CB_DEF_ADDRESS_HIGH 0x00001280
|
|
|
|
+#define NV50TCL_CB_DEF_ADDRESS_LOW 0x00001284
|
|
|
|
+#define NV50TCL_CB_DEF_SET 0x00001288
|
|
|
|
+#define NV50TCL_CB_DEF_SET_SIZE_SHIFT 0
|
|
|
|
+#define NV50TCL_CB_DEF_SET_SIZE_MASK 0x0000ffff
|
|
|
|
+#define NV50TCL_CB_DEF_SET_BUFFER_SHIFT 16
|
|
|
|
+#define NV50TCL_CB_DEF_SET_BUFFER_MASK 0xffff0000
|
|
|
|
+#define NV50TCL_DEPTH_TEST_ENABLE 0x000012cc
|
|
|
|
+#define NV50TCL_SHADE_MODEL 0x000012d4
|
|
|
|
+#define NV50TCL_SHADE_MODEL_FLAT 0x00001d00
|
|
|
|
+#define NV50TCL_SHADE_MODEL_SMOOTH 0x00001d01
|
|
|
|
+#define NV50TCL_DEPTH_WRITE_ENABLE 0x000012e8
|
|
|
|
+#define NV50TCL_ALPHA_TEST_ENABLE 0x000012ec
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC 0x0000130c
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC_LESS 0x00000201
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV50TCL_DEPTH_TEST_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV50TCL_ALPHA_TEST_REF 0x00001310
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC 0x00001314
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC_LESS 0x00000201
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV50TCL_ALPHA_TEST_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV50TCL_BLEND_COLOR(x) (0x0000131c+((x)*4))
|
|
|
|
+#define NV50TCL_BLEND_COLOR__SIZE 0x00000004
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_RGB 0x00001340
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_RGB_FUNC_ADD 0x00008006
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_RGB_MIN 0x00008007
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_RGB_MAX 0x00008008
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_RGB_FUNC_SUBTRACT 0x0000800a
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_RGB_FUNC_REVERSE_SUBTRACT 0x0000800b
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB 0x00001344
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE 0x00000001
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR 0x00000300
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA 0x00000304
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_DST_COLOR 0x00000306
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB 0x00001348
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_ONE 0x00000001
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_SRC_COLOR 0x00000300
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_DST_ALPHA 0x00000304
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_DST_COLOR 0x00000306
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_ALPHA 0x0000134c
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_ALPHA_FUNC_ADD 0x00008006
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_ALPHA_MIN 0x00008007
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_ALPHA_MAX 0x00008008
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_ALPHA_FUNC_SUBTRACT 0x0000800a
|
|
|
|
+#define NV50TCL_BLEND_EQUATION_ALPHA_FUNC_REVERSE_SUBTRACT 0x0000800b
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA 0x00001350
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE 0x00000001
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR 0x00000300
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA 0x00000304
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR 0x00000306
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA 0x00001358
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE 0x00000001
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR 0x00000300
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR 0x00000301
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA 0x00000302
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA 0x00000303
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA 0x00000304
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA 0x00000305
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR 0x00000306
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR 0x00000307
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE 0x00000308
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR 0x00008001
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x00008002
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x00008003
|
|
|
|
+#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x00008004
|
|
|
|
+#define NV50TCL_BLEND_ENABLE(x) (0x00001360+((x)*4))
|
|
|
|
+#define NV50TCL_BLEND_ENABLE__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_STENCIL_BACK_ENABLE 0x00001380
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_FAIL 0x00001384
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_FAIL_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_FAIL_INVERT 0x0000150a
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_FAIL_KEEP 0x00001e00
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_FAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_FAIL_INCR 0x00001e02
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_FAIL_DECR 0x00001e03
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZFAIL 0x00001388
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZFAIL_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZFAIL_INVERT 0x0000150a
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZFAIL_KEEP 0x00001e00
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZFAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZFAIL_INCR 0x00001e02
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZFAIL_DECR 0x00001e03
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZPASS 0x0000138c
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZPASS_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZPASS_INVERT 0x0000150a
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZPASS_KEEP 0x00001e00
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZPASS_REPLACE 0x00001e01
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZPASS_INCR 0x00001e02
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZPASS_DECR 0x00001e03
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP 0x00008507
|
|
|
|
+#define NV50TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP 0x00008508
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC 0x00001390
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_REF 0x00001394
|
|
|
|
+#define NV50TCL_STENCIL_BACK_MASK 0x00001398
|
|
|
|
+#define NV50TCL_STENCIL_BACK_FUNC_MASK 0x0000139c
|
|
|
|
+#define NV50TCL_LINE_WIDTH 0x000013b0
|
|
|
|
+#define NV50TCL_VP_START_ID 0x0000140c
|
|
|
|
+#define NV50TCL_GP_START_ID 0x00001410
|
|
|
|
+#define NV50TCL_FP_START_ID 0x00001414
|
|
|
|
+#define NV50TCL_POINT_SIZE 0x00001518
|
|
|
|
+#define NV50TCL_TSC_ADDRESS_HIGH 0x0000155c
|
|
|
|
+#define NV50TCL_TSC_ADDRESS_LOW 0x00001560
|
|
|
|
+#define NV50TCL_POLYGON_OFFSET_FACTOR 0x0000156c
|
|
|
|
+#define NV50TCL_LINE_SMOOTH_ENABLE 0x00001570
|
|
|
|
+#define NV50TCL_TIC_ADDRESS_HIGH 0x00001574
|
|
|
|
+#define NV50TCL_TIC_ADDRESS_LOW 0x00001578
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_ENABLE 0x00001594
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_FAIL 0x00001598
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_FAIL_INVERT 0x0000150a
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_FAIL_KEEP 0x00001e00
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_FAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_FAIL_INCR 0x00001e02
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_FAIL_DECR 0x00001e03
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZFAIL 0x0000159c
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_INVERT 0x0000150a
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_KEEP 0x00001e00
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE 0x00001e01
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_INCR 0x00001e02
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_DECR 0x00001e03
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP 0x00008507
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP 0x00008508
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZPASS 0x000015a0
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZPASS_ZERO 0x00000000
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZPASS_INVERT 0x0000150a
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZPASS_KEEP 0x00001e00
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZPASS_REPLACE 0x00001e01
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZPASS_INCR 0x00001e02
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZPASS_DECR 0x00001e03
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP 0x00008507
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP 0x00008508
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC 0x000015a4
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_NEVER 0x00000200
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_LESS 0x00000201
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL 0x00000202
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL 0x00000203
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL 0x00000205
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL 0x00000206
|
|
|
|
+#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS 0x00000207
|
|
|
|
+#define NV50TCL_POLYGON_OFFSET_UNITS 0x000015bc
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN 0x000015dc
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_POINTS 0x00000000
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_LINES 0x00000001
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_LINE_LOOP 0x00000002
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_LINE_STRIP 0x00000003
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_TRIANGLES 0x00000004
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP 0x00000005
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN 0x00000006
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_QUADS 0x00000007
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_QUAD_STRIP 0x00000008
|
|
|
|
+#define NV50TCL_VERTEX_BEGIN_POLYGON 0x00000009
|
|
|
|
+#define NV50TCL_VERTEX_END 0x000015e0
|
|
|
|
+#define NV50TCL_VERTEX_DATA 0x00001640
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0 0x00001650
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_SHIFT 28
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_MASK 0xf0000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_XNNN 0x10000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_NYNN 0x20000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_XYNN 0x30000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_NNZN 0x40000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_XNZN 0x50000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_NYZN 0x60000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_XYZN 0x70000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_NNNW 0x80000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_XNNW 0x90000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_NYNW 0xa0000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_XYNW 0xb0000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_NNZW 0xc0000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_XNZW 0xd0000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_NYZW 0xe0000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_7_XYZW 0xf0000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_SHIFT 24
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_MASK 0x0f000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_XNNN 0x01000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_NYNN 0x02000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_XYNN 0x03000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_NNZN 0x04000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_XNZN 0x05000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_NYZN 0x06000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_XYZN 0x07000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_NNNW 0x08000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_XNNW 0x09000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_NYNW 0x0a000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_XYNW 0x0b000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_NNZW 0x0c000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_XNZW 0x0d000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_NYZW 0x0e000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_6_XYZW 0x0f000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_SHIFT 20
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_MASK 0x00f00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_XNNN 0x00100000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_NYNN 0x00200000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_XYNN 0x00300000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_NNZN 0x00400000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_XNZN 0x00500000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_NYZN 0x00600000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_XYZN 0x00700000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_NNNW 0x00800000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_XNNW 0x00900000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_NYNW 0x00a00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_XYNW 0x00b00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_NNZW 0x00c00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_XNZW 0x00d00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_NYZW 0x00e00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_5_XYZW 0x00f00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_SHIFT 16
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_MASK 0x000f0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_XNNN 0x00010000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_NYNN 0x00020000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_XYNN 0x00030000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_NNZN 0x00040000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_XNZN 0x00050000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_NYZN 0x00060000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_XYZN 0x00070000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_NNNW 0x00080000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_XNNW 0x00090000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_NYNW 0x000a0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_XYNW 0x000b0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_NNZW 0x000c0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_XNZW 0x000d0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_NYZW 0x000e0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_4_XYZW 0x000f0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_SHIFT 12
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_MASK 0x0000f000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_XNNN 0x00001000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_NYNN 0x00002000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_XYNN 0x00003000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_NNZN 0x00004000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_XNZN 0x00005000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_NYZN 0x00006000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_XYZN 0x00007000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_NNNW 0x00008000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_XNNW 0x00009000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_NYNW 0x0000a000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_XYNW 0x0000b000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_NNZW 0x0000c000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_XNZW 0x0000d000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_NYZW 0x0000e000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_3_XYZW 0x0000f000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_SHIFT 8
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_MASK 0x00000f00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_XNNN 0x00000100
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_NYNN 0x00000200
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_XYNN 0x00000300
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_NNZN 0x00000400
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_XNZN 0x00000500
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_NYZN 0x00000600
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_XYZN 0x00000700
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_NNNW 0x00000800
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_XNNW 0x00000900
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_NYNW 0x00000a00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_XYNW 0x00000b00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_NNZW 0x00000c00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_XNZW 0x00000d00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_NYZW 0x00000e00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_2_XYZW 0x00000f00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_1_SHIFT 4
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_0_1_MASK 0x000000f0
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+#define NV50TCL_VP_ATTR_EN_0_1_NONE 0x00000000
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_XNNN 0x00000010
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_NYNN 0x00000020
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_XYNN 0x00000030
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_NNZN 0x00000040
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_XNZN 0x00000050
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_NYZN 0x00000060
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_XYZN 0x00000070
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_NNNW 0x00000080
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_XNNW 0x00000090
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_NYNW 0x000000a0
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_XYNW 0x000000b0
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|
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+#define NV50TCL_VP_ATTR_EN_0_1_NNZW 0x000000c0
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+#define NV50TCL_VP_ATTR_EN_0_1_XNZW 0x000000d0
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+#define NV50TCL_VP_ATTR_EN_0_1_NYZW 0x000000e0
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+#define NV50TCL_VP_ATTR_EN_0_1_XYZW 0x000000f0
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+#define NV50TCL_VP_ATTR_EN_0_0_SHIFT 0
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+#define NV50TCL_VP_ATTR_EN_0_0_MASK 0x0000000f
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+#define NV50TCL_VP_ATTR_EN_0_0_NONE 0x00000000
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+#define NV50TCL_VP_ATTR_EN_0_0_XNNN 0x00000001
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+#define NV50TCL_VP_ATTR_EN_0_0_NYNN 0x00000002
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+#define NV50TCL_VP_ATTR_EN_0_0_XYNN 0x00000003
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+#define NV50TCL_VP_ATTR_EN_0_0_NNZN 0x00000004
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+#define NV50TCL_VP_ATTR_EN_0_0_XNZN 0x00000005
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+#define NV50TCL_VP_ATTR_EN_0_0_NYZN 0x00000006
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+#define NV50TCL_VP_ATTR_EN_0_0_XYZN 0x00000007
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+#define NV50TCL_VP_ATTR_EN_0_0_NNNW 0x00000008
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+#define NV50TCL_VP_ATTR_EN_0_0_XNNW 0x00000009
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|
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+#define NV50TCL_VP_ATTR_EN_0_0_NYNW 0x0000000a
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|
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+#define NV50TCL_VP_ATTR_EN_0_0_XYNW 0x0000000b
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+#define NV50TCL_VP_ATTR_EN_0_0_NNZW 0x0000000c
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+#define NV50TCL_VP_ATTR_EN_0_0_XNZW 0x0000000d
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+#define NV50TCL_VP_ATTR_EN_0_0_NYZW 0x0000000e
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|
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+#define NV50TCL_VP_ATTR_EN_0_0_XYZW 0x0000000f
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+#define NV50TCL_VP_ATTR_EN_1 0x00001654
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+#define NV50TCL_VP_ATTR_EN_1_15_SHIFT 28
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+#define NV50TCL_VP_ATTR_EN_1_15_MASK 0xf0000000
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+#define NV50TCL_VP_ATTR_EN_1_15_NONE 0x00000000
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+#define NV50TCL_VP_ATTR_EN_1_15_XNNN 0x10000000
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+#define NV50TCL_VP_ATTR_EN_1_15_NYNN 0x20000000
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+#define NV50TCL_VP_ATTR_EN_1_15_XYNN 0x30000000
|
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+#define NV50TCL_VP_ATTR_EN_1_15_NNZN 0x40000000
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+#define NV50TCL_VP_ATTR_EN_1_15_XNZN 0x50000000
|
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+#define NV50TCL_VP_ATTR_EN_1_15_NYZN 0x60000000
|
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+#define NV50TCL_VP_ATTR_EN_1_15_XYZN 0x70000000
|
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|
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+#define NV50TCL_VP_ATTR_EN_1_15_NNNW 0x80000000
|
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|
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+#define NV50TCL_VP_ATTR_EN_1_15_XNNW 0x90000000
|
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|
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+#define NV50TCL_VP_ATTR_EN_1_15_NYNW 0xa0000000
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|
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+#define NV50TCL_VP_ATTR_EN_1_15_XYNW 0xb0000000
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+#define NV50TCL_VP_ATTR_EN_1_15_NNZW 0xc0000000
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+#define NV50TCL_VP_ATTR_EN_1_15_XNZW 0xd0000000
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|
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+#define NV50TCL_VP_ATTR_EN_1_15_NYZW 0xe0000000
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+#define NV50TCL_VP_ATTR_EN_1_15_XYZW 0xf0000000
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+#define NV50TCL_VP_ATTR_EN_1_14_SHIFT 24
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+#define NV50TCL_VP_ATTR_EN_1_14_MASK 0x0f000000
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+#define NV50TCL_VP_ATTR_EN_1_14_NONE 0x00000000
|
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|
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+#define NV50TCL_VP_ATTR_EN_1_14_XNNN 0x01000000
|
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+#define NV50TCL_VP_ATTR_EN_1_14_NYNN 0x02000000
|
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+#define NV50TCL_VP_ATTR_EN_1_14_XYNN 0x03000000
|
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|
|
+#define NV50TCL_VP_ATTR_EN_1_14_NNZN 0x04000000
|
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|
|
+#define NV50TCL_VP_ATTR_EN_1_14_XNZN 0x05000000
|
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|
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+#define NV50TCL_VP_ATTR_EN_1_14_NYZN 0x06000000
|
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|
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+#define NV50TCL_VP_ATTR_EN_1_14_XYZN 0x07000000
|
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|
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+#define NV50TCL_VP_ATTR_EN_1_14_NNNW 0x08000000
|
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|
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+#define NV50TCL_VP_ATTR_EN_1_14_XNNW 0x09000000
|
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|
|
+#define NV50TCL_VP_ATTR_EN_1_14_NYNW 0x0a000000
|
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|
|
+#define NV50TCL_VP_ATTR_EN_1_14_XYNW 0x0b000000
|
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|
|
+#define NV50TCL_VP_ATTR_EN_1_14_NNZW 0x0c000000
|
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|
|
+#define NV50TCL_VP_ATTR_EN_1_14_XNZW 0x0d000000
|
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+#define NV50TCL_VP_ATTR_EN_1_14_NYZW 0x0e000000
|
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|
+#define NV50TCL_VP_ATTR_EN_1_14_XYZW 0x0f000000
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+#define NV50TCL_VP_ATTR_EN_1_13_SHIFT 20
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+#define NV50TCL_VP_ATTR_EN_1_13_MASK 0x00f00000
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|
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+#define NV50TCL_VP_ATTR_EN_1_13_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_XNNN 0x00100000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_NYNN 0x00200000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_XYNN 0x00300000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_NNZN 0x00400000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_XNZN 0x00500000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_NYZN 0x00600000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_XYZN 0x00700000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_NNNW 0x00800000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_XNNW 0x00900000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_NYNW 0x00a00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_XYNW 0x00b00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_NNZW 0x00c00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_XNZW 0x00d00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_NYZW 0x00e00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_13_XYZW 0x00f00000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_SHIFT 16
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_MASK 0x000f0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_XNNN 0x00010000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_NYNN 0x00020000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_XYNN 0x00030000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_NNZN 0x00040000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_XNZN 0x00050000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_NYZN 0x00060000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_XYZN 0x00070000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_NNNW 0x00080000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_XNNW 0x00090000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_NYNW 0x000a0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_XYNW 0x000b0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_NNZW 0x000c0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_XNZW 0x000d0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_NYZW 0x000e0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_12_XYZW 0x000f0000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_SHIFT 12
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_MASK 0x0000f000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_XNNN 0x00001000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_NYNN 0x00002000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_XYNN 0x00003000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_NNZN 0x00004000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_XNZN 0x00005000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_NYZN 0x00006000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_XYZN 0x00007000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_NNNW 0x00008000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_XNNW 0x00009000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_NYNW 0x0000a000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_XYNW 0x0000b000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_NNZW 0x0000c000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_XNZW 0x0000d000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_NYZW 0x0000e000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_11_XYZW 0x0000f000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_SHIFT 8
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_MASK 0x00000f00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_XNNN 0x00000100
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_NYNN 0x00000200
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_XYNN 0x00000300
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_NNZN 0x00000400
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_XNZN 0x00000500
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_NYZN 0x00000600
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_XYZN 0x00000700
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_NNNW 0x00000800
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_XNNW 0x00000900
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_NYNW 0x00000a00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_XYNW 0x00000b00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_NNZW 0x00000c00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_XNZW 0x00000d00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_NYZW 0x00000e00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_10_XYZW 0x00000f00
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_SHIFT 4
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_MASK 0x000000f0
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_XNNN 0x00000010
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_NYNN 0x00000020
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_XYNN 0x00000030
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_NNZN 0x00000040
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_XNZN 0x00000050
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_NYZN 0x00000060
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_XYZN 0x00000070
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_NNNW 0x00000080
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_XNNW 0x00000090
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_NYNW 0x000000a0
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_XYNW 0x000000b0
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_NNZW 0x000000c0
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_XNZW 0x000000d0
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_NYZW 0x000000e0
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_9_XYZW 0x000000f0
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_SHIFT 0
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_MASK 0x0000000f
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_NONE 0x00000000
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_XNNN 0x00000001
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_NYNN 0x00000002
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_XYNN 0x00000003
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_NNZN 0x00000004
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_XNZN 0x00000005
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_NYZN 0x00000006
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_XYZN 0x00000007
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_NNNW 0x00000008
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_XNNW 0x00000009
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_NYNW 0x0000000a
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_XYNW 0x0000000b
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_NNZW 0x0000000c
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_XNZW 0x0000000d
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_NYZW 0x0000000e
|
|
|
|
+#define NV50TCL_VP_ATTR_EN_1_8_XYZW 0x0000000f
|
|
|
|
+#define NV50TCL_LINE_STIPPLE_ENABLE 0x0000166c
|
|
|
|
+#define NV50TCL_LINE_STIPPLE_PATTERN 0x00001680
|
|
|
|
+#define NV50TCL_POLYGON_STIPPLE_ENABLE 0x0000168c
|
|
|
|
+#define NV50TCL_VP_REG_HPOS 0x000016bc
|
|
|
|
+#define NV50TCL_VP_REG_HPOS_X_SHIFT 0
|
|
|
|
+#define NV50TCL_VP_REG_HPOS_X_MASK 0x000000ff
|
|
|
|
+#define NV50TCL_VP_REG_HPOS_Y_SHIFT 8
|
|
|
|
+#define NV50TCL_VP_REG_HPOS_Y_MASK 0x0000ff00
|
|
|
|
+#define NV50TCL_VP_REG_HPOS_Z_SHIFT 16
|
|
|
|
+#define NV50TCL_VP_REG_HPOS_Z_MASK 0x00ff0000
|
|
|
|
+#define NV50TCL_VP_REG_HPOS_W_SHIFT 24
|
|
|
|
+#define NV50TCL_VP_REG_HPOS_W_MASK 0xff000000
|
|
|
|
+#define NV50TCL_VP_REG_COL0 0x000016c0
|
|
|
|
+#define NV50TCL_VP_REG_COL0_X_SHIFT 0
|
|
|
|
+#define NV50TCL_VP_REG_COL0_X_MASK 0x000000ff
|
|
|
|
+#define NV50TCL_VP_REG_COL0_Y_SHIFT 8
|
|
|
|
+#define NV50TCL_VP_REG_COL0_Y_MASK 0x0000ff00
|
|
|
|
+#define NV50TCL_VP_REG_COL0_Z_SHIFT 16
|
|
|
|
+#define NV50TCL_VP_REG_COL0_Z_MASK 0x00ff0000
|
|
|
|
+#define NV50TCL_VP_REG_COL0_W_SHIFT 24
|
|
|
|
+#define NV50TCL_VP_REG_COL0_W_MASK 0xff000000
|
|
|
|
+#define NV50TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001700+((x)*4))
|
|
|
|
+#define NV50TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020
|
|
|
|
+#define NV50TCL_CULL_FACE_ENABLE 0x00001918
|
|
|
|
+#define NV50TCL_FRONT_FACE 0x0000191c
|
|
|
|
+#define NV50TCL_FRONT_FACE_CW 0x00000900
|
|
|
|
+#define NV50TCL_FRONT_FACE_CCW 0x00000901
|
|
|
|
+#define NV50TCL_CULL_FACE 0x00001920
|
|
|
|
+#define NV50TCL_CULL_FACE_FRONT 0x00000404
|
|
|
|
+#define NV50TCL_CULL_FACE_BACK 0x00000405
|
|
|
|
+#define NV50TCL_CULL_FACE_FRONT_AND_BACK 0x00000408
|
|
|
|
+#define NV50TCL_LOGIC_OP_ENABLE 0x000019c4
|
|
|
|
+#define NV50TCL_LOGIC_OP 0x000019c8
|
|
|
|
+#define NV50TCL_LOGIC_OP_CLEAR 0x00001500
|
|
|
|
+#define NV50TCL_LOGIC_OP_AND 0x00001501
|
|
|
|
+#define NV50TCL_LOGIC_OP_AND_REVERSE 0x00001502
|
|
|
|
+#define NV50TCL_LOGIC_OP_COPY 0x00001503
|
|
|
|
+#define NV50TCL_LOGIC_OP_AND_INVERTED 0x00001504
|
|
|
|
+#define NV50TCL_LOGIC_OP_NOOP 0x00001505
|
|
|
|
+#define NV50TCL_LOGIC_OP_XOR 0x00001506
|
|
|
|
+#define NV50TCL_LOGIC_OP_OR 0x00001507
|
|
|
|
+#define NV50TCL_LOGIC_OP_NOR 0x00001508
|
|
|
|
+#define NV50TCL_LOGIC_OP_EQUIV 0x00001509
|
|
|
|
+#define NV50TCL_LOGIC_OP_INVERT 0x0000150a
|
|
|
|
+#define NV50TCL_LOGIC_OP_OR_REVERSE 0x0000150b
|
|
|
|
+#define NV50TCL_LOGIC_OP_COPY_INVERTED 0x0000150c
|
|
|
|
+#define NV50TCL_LOGIC_OP_OR_INVERTED 0x0000150d
|
|
|
|
+#define NV50TCL_LOGIC_OP_NAND 0x0000150e
|
|
|
|
+#define NV50TCL_LOGIC_OP_SET 0x0000150f
|
|
|
|
+#define NV50TCL_CLEAR_BUFFERS 0x000019d0
|
|
|
|
+#define NV50TCL_COLOR_MASK(x) (0x00001a00+((x)*4))
|
|
|
|
+#define NV50TCL_COLOR_MASK__SIZE 0x00000008
|
|
|
|
+#define NV50TCL_COLOR_MASK_R_SHIFT 0
|
|
|
|
+#define NV50TCL_COLOR_MASK_R_MASK 0x0000000f
|
|
|
|
+#define NV50TCL_COLOR_MASK_G_SHIFT 4
|
|
|
|
+#define NV50TCL_COLOR_MASK_G_MASK 0x000000f0
|
|
|
|
+#define NV50TCL_COLOR_MASK_B_SHIFT 8
|
|
|
|
+#define NV50TCL_COLOR_MASK_B_MASK 0x00000f00
|
|
|
|
+#define NV50TCL_COLOR_MASK_A_SHIFT 12
|
|
|
|
+#define NV50TCL_COLOR_MASK_A_MASK 0x0000f000
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV50_COMPUTE 0x000050c0
|
|
|
|
+
|
|
|
|
+#define NV50_COMPUTE_DMA_UNK0 0x000001a0
|
|
|
|
+#define NV50_COMPUTE_DMA_STATUS 0x000001a4
|
|
|
|
+#define NV50_COMPUTE_DMA_UNK1 0x000001b8
|
|
|
|
+#define NV50_COMPUTE_DMA_UNK2 0x000001bc
|
|
|
|
+#define NV50_COMPUTE_DMA_UNK3 0x000001c0
|
|
|
|
+#define NV50_COMPUTE_UNK4_HIGH 0x00000210
|
|
|
|
+#define NV50_COMPUTE_UNK4_LOW 0x00000214
|
|
|
|
+#define NV50_COMPUTE_UNK5_HIGH 0x00000218
|
|
|
|
+#define NV50_COMPUTE_UNK5_LOW 0x0000021c
|
|
|
|
+#define NV50_COMPUTE_UNK6_HIGH 0x00000294
|
|
|
|
+#define NV50_COMPUTE_UNK6_LOW 0x00000298
|
|
|
|
+#define NV50_COMPUTE_CONST_BASE_HIGH 0x000002a4
|
|
|
|
+#define NV50_COMPUTE_CONST_BASE_LO 0x000002a8
|
|
|
|
+#define NV50_COMPUTE_CONST_SIZE_SEG 0x000002ac
|
|
|
|
+#define NV50_COMPUTE_REG_COUNT 0x000002c0
|
|
|
|
+#define NV50_COMPUTE_STATUS_HIGH 0x00000310
|
|
|
|
+#define NV50_COMPUTE_STATUS_LOW 0x00000314
|
|
|
|
+#define NV50_COMPUTE_EXECUTE 0x0000031c
|
|
|
|
+#define NV50_COMPUTE_USER_PARAM_COUNT 0x00000374
|
|
|
|
+#define NV50_COMPUTE_GRIDDIM_YX 0x000003a4
|
|
|
|
+#define NV50_COMPUTE_SHARED_SIZE 0x000003a8
|
|
|
|
+#define NV50_COMPUTE_BLOCKDIM_YX 0x000003ac
|
|
|
|
+#define NV50_COMPUTE_BLOCKDIM_Z 0x000003b0
|
|
|
|
+#define NV50_COMPUTE_CALL_ADDRESS 0x000003b4
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_BASE_HIGH(x) (0x00000400+((x)*32))
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_BASE_HIGH__SIZE 0x00000010
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_BASE_LOW(x) (0x00000404+((x)*32))
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_BASE_LOW__SIZE 0x00000010
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_LIMIT_HIGH(x) (0x00000408+((x)*32))
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_LIMIT_HIGH__SIZE 0x00000010
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_LIMIT_LOW(x) (0x0000040c+((x)*32))
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_LIMIT_LOW__SIZE 0x00000010
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_UNK(x) (0x00000410+((x)*32))
|
|
|
|
+#define NV50_COMPUTE_GLOBAL_UNK__SIZE 0x00000010
|
|
|
|
+#define NV50_COMPUTE_USER_PARAM(x) (0x00000600+((x)*4))
|
|
|
|
+#define NV50_COMPUTE_USER_PARAM__SIZE 0x00000040
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#define NV54TCL 0x00008297
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+#endif /* NOUVEAU_REG_H */
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_device.c libdrm-2.4.4/libdrm/nouveau/nouveau_device.c
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_device.c 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_device.c 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,185 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#include <stdio.h>
|
|
|
|
+#include <stdlib.h>
|
|
|
|
+#include <errno.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_private.h"
|
|
|
|
+
|
|
|
|
+#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 12
|
|
|
|
+#error nouveau_drm.h does not match expected patchlevel, update libdrm.
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_device_open_existing(struct nouveau_device **dev, int close,
|
|
|
|
+ int fd, drm_context_t ctx)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev;
|
|
|
|
+ drmVersionPtr ver;
|
|
|
|
+ uint64_t value;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!dev || *dev)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ ver = drmGetVersion(fd);
|
|
|
|
+ if (!ver || ver->version_patchlevel != NOUVEAU_DRM_HEADER_PATCHLEVEL)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ nvdev = calloc(1, sizeof(*nvdev));
|
|
|
|
+ if (!nvdev)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+ nvdev->fd = fd;
|
|
|
|
+ nvdev->ctx = ctx;
|
|
|
|
+ nvdev->needs_close = close;
|
|
|
|
+
|
|
|
|
+ ret = drmCommandNone(nvdev->fd, DRM_NOUVEAU_CARD_INIT);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_device_close((void *)&nvdev);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ ret = nouveau_device_get_param(&nvdev->base,
|
|
|
|
+ NOUVEAU_GETPARAM_MM_ENABLED, &value);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_device_close((void *)&nvdev);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+ nvdev->mm_enabled = value;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_device_get_param(&nvdev->base,
|
|
|
|
+ NOUVEAU_GETPARAM_VM_VRAM_BASE, &value);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_device_close((void *)&nvdev);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+ nvdev->base.vm_vram_base = value;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_init(&nvdev->base);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_device_close((void *)&nvdev);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ ret = nouveau_device_get_param(&nvdev->base,
|
|
|
|
+ NOUVEAU_GETPARAM_CHIPSET_ID, &value);
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_device_close((void *)&nvdev);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+ nvdev->base.chipset = value;
|
|
|
|
+
|
|
|
|
+ *dev = &nvdev->base;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_device_open(struct nouveau_device **dev, const char *busid)
|
|
|
|
+{
|
|
|
|
+ drm_context_t ctx;
|
|
|
|
+ int fd, ret;
|
|
|
|
+
|
|
|
|
+ if (!dev || *dev)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ fd = drmOpen("nouveau", busid);
|
|
|
|
+ if (fd < 0)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ ret = drmCreateContext(fd, &ctx);
|
|
|
|
+ if (ret) {
|
|
|
|
+ drmClose(fd);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ ret = nouveau_device_open_existing(dev, 1, fd, ctx);
|
|
|
|
+ if (ret) {
|
|
|
|
+ drmDestroyContext(fd, ctx);
|
|
|
|
+ drmClose(fd);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_device_close(struct nouveau_device **dev)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev;
|
|
|
|
+
|
|
|
|
+ if (dev || !*dev)
|
|
|
|
+ return;
|
|
|
|
+ nvdev = nouveau_device(*dev);
|
|
|
|
+ *dev = NULL;
|
|
|
|
+
|
|
|
|
+ nouveau_bo_takedown(&nvdev->base);
|
|
|
|
+
|
|
|
|
+ if (nvdev->needs_close) {
|
|
|
|
+ drmDestroyContext(nvdev->fd, nvdev->ctx);
|
|
|
|
+ drmClose(nvdev->fd);
|
|
|
|
+ }
|
|
|
|
+ free(nvdev);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_device_get_param(struct nouveau_device *dev,
|
|
|
|
+ uint64_t param, uint64_t *value)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(dev);
|
|
|
|
+ struct drm_nouveau_getparam g;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!nvdev || !value)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ g.param = param;
|
|
|
|
+ ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GETPARAM,
|
|
|
|
+ &g, sizeof(g));
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ *value = g.value;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_device_set_param(struct nouveau_device *dev,
|
|
|
|
+ uint64_t param, uint64_t value)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(dev);
|
|
|
|
+ struct drm_nouveau_setparam s;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!nvdev)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ s.param = param;
|
|
|
|
+ s.value = value;
|
|
|
|
+ ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_SETPARAM,
|
|
|
|
+ &s, sizeof(s));
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_device.h libdrm-2.4.4/libdrm/nouveau/nouveau_device.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_device.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_device.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,31 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_DEVICE_H__
|
|
|
|
+#define __NOUVEAU_DEVICE_H__
|
|
|
|
+
|
|
|
|
+struct nouveau_device {
|
|
|
|
+ unsigned chipset;
|
|
|
|
+ uint64_t vm_vram_base;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_dma.c libdrm-2.4.4/libdrm/nouveau/nouveau_dma.c
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_dma.c 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_dma.c 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,215 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#include <stdint.h>
|
|
|
|
+#include <assert.h>
|
|
|
|
+#include <errno.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_drmif.h"
|
|
|
|
+#include "nouveau_dma.h"
|
|
|
|
+
|
|
|
|
+static inline uint32_t
|
|
|
|
+READ_GET(struct nouveau_channel_priv *nvchan)
|
|
|
|
+{
|
|
|
|
+ return *nvchan->get;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static inline void
|
|
|
|
+WRITE_PUT(struct nouveau_channel_priv *nvchan, uint32_t val)
|
|
|
|
+{
|
|
|
|
+ uint32_t put = ((val << 2) + nvchan->dma->base);
|
|
|
|
+ volatile int dum;
|
|
|
|
+
|
|
|
|
+ NOUVEAU_DMA_BARRIER;
|
|
|
|
+ dum = READ_GET(nvchan);
|
|
|
|
+
|
|
|
|
+ *nvchan->put = put;
|
|
|
|
+ nvchan->dma->put = val;
|
|
|
|
+#ifdef NOUVEAU_DMA_TRACE
|
|
|
|
+ printf("WRITE_PUT %d/0x%08x\n", nvchan->drm.channel, put);
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+ NOUVEAU_DMA_BARRIER;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static inline int
|
|
|
|
+LOCAL_GET(struct nouveau_dma_priv *dma, uint32_t *val)
|
|
|
|
+{
|
|
|
|
+ uint32_t get = *val;
|
|
|
|
+
|
|
|
|
+ if (get >= dma->base && get <= (dma->base + (dma->max << 2))) {
|
|
|
|
+ *val = (get - dma->base) >> 2;
|
|
|
|
+ return 1;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_dma_channel_init(struct nouveau_channel *chan)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ int i;
|
|
|
|
+
|
|
|
|
+ nvchan->dma = &nvchan->struct_dma;
|
|
|
|
+ nvchan->dma->base = nvchan->drm.put_base;
|
|
|
|
+ nvchan->dma->cur = nvchan->dma->put = 0;
|
|
|
|
+ nvchan->dma->max = (nvchan->drm.cmdbuf_size >> 2) - 2;
|
|
|
|
+ nvchan->dma->free = nvchan->dma->max - nvchan->dma->cur;
|
|
|
|
+
|
|
|
|
+ RING_SPACE_CH(chan, RING_SKIPS);
|
|
|
|
+ for (i = 0; i < RING_SKIPS; i++)
|
|
|
|
+ OUT_RING_CH(chan, 0);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+#define CHECK_TIMEOUT() do { \
|
|
|
|
+ if ((NOUVEAU_TIME_MSEC() - t_start) > NOUVEAU_DMA_TIMEOUT) \
|
|
|
|
+ return - EBUSY; \
|
|
|
|
+} while(0)
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_dma_wait(struct nouveau_channel *chan, int size)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ struct nouveau_dma_priv *dma = nvchan->dma;
|
|
|
|
+ uint32_t get, t_start;
|
|
|
|
+
|
|
|
|
+ FIRE_RING_CH(chan);
|
|
|
|
+
|
|
|
|
+ t_start = NOUVEAU_TIME_MSEC();
|
|
|
|
+ while (dma->free < size) {
|
|
|
|
+ CHECK_TIMEOUT();
|
|
|
|
+
|
|
|
|
+ get = READ_GET(nvchan);
|
|
|
|
+ if (!LOCAL_GET(dma, &get))
|
|
|
|
+ continue;
|
|
|
|
+
|
|
|
|
+ if (dma->put >= get) {
|
|
|
|
+ dma->free = dma->max - dma->cur;
|
|
|
|
+
|
|
|
|
+ if (dma->free < size) {
|
|
|
|
+#ifdef NOUVEAU_DMA_DEBUG
|
|
|
|
+ dma->push_free = 1;
|
|
|
|
+#endif
|
|
|
|
+ OUT_RING_CH(chan, 0x20000000 | dma->base);
|
|
|
|
+ if (get <= RING_SKIPS) {
|
|
|
|
+ /*corner case - will be idle*/
|
|
|
|
+ if (dma->put <= RING_SKIPS)
|
|
|
|
+ WRITE_PUT(nvchan,
|
|
|
|
+ RING_SKIPS + 1);
|
|
|
|
+
|
|
|
|
+ do {
|
|
|
|
+ CHECK_TIMEOUT();
|
|
|
|
+ get = READ_GET(nvchan);
|
|
|
|
+ if (!LOCAL_GET(dma, &get))
|
|
|
|
+ get = 0;
|
|
|
|
+ } while (get <= RING_SKIPS);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ WRITE_PUT(nvchan, RING_SKIPS);
|
|
|
|
+ dma->cur = dma->put = RING_SKIPS;
|
|
|
|
+ dma->free = get - (RING_SKIPS + 1);
|
|
|
|
+ }
|
|
|
|
+ } else {
|
|
|
|
+ dma->free = get - dma->cur - 1;
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+#ifdef NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF
|
|
|
|
+static void
|
|
|
|
+nouveau_dma_parse_pushbuf(struct nouveau_channel *chan, int get, int put)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ unsigned mthd_count = 0;
|
|
|
|
+
|
|
|
|
+ while (get != put) {
|
|
|
|
+ uint32_t gpuget = (get << 2) + nvchan->drm.put_base;
|
|
|
|
+ uint32_t data;
|
|
|
|
+
|
|
|
|
+ if (get < 0 || get >= nvchan->drm.cmdbuf_size)
|
|
|
|
+ assert(0);
|
|
|
|
+ data = nvchan->pushbuf[get++];
|
|
|
|
+
|
|
|
|
+ if (mthd_count) {
|
|
|
|
+ printf("0x%08x 0x%08x\n", gpuget, data);
|
|
|
|
+ mthd_count--;
|
|
|
|
+ continue;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ switch (data & 0x60000000) {
|
|
|
|
+ case 0x00000000:
|
|
|
|
+ mthd_count = (data >> 18) & 0x7ff;
|
|
|
|
+ printf("0x%08x 0x%08x MTHD "
|
|
|
|
+ "Sc %d Mthd 0x%04x Size %d\n",
|
|
|
|
+ gpuget, data, (data>>13) & 7, data & 0x1ffc,
|
|
|
|
+ mthd_count);
|
|
|
|
+ break;
|
|
|
|
+ case 0x20000000:
|
|
|
|
+ get = (data & 0x1ffffffc) >> 2;
|
|
|
|
+ printf("0x%08x 0x%08x JUMP 0x%08x\n",
|
|
|
|
+ gpuget, data, data & 0x1ffffffc);
|
|
|
|
+ continue;
|
|
|
|
+ case 0x40000000:
|
|
|
|
+ mthd_count = (data >> 18) & 0x7ff;
|
|
|
|
+ printf("0x%08x 0x%08x NINC "
|
|
|
|
+ "Sc %d Mthd 0x%04x Size %d\n",
|
|
|
|
+ gpuget, data, (data>>13) & 7, data & 0x1ffc,
|
|
|
|
+ mthd_count);
|
|
|
|
+ break;
|
|
|
|
+ case 0x60000000:
|
|
|
|
+ /* DMA_OPCODE_CALL apparently, doesn't seem to work on
|
|
|
|
+ * my NV40 at least..
|
|
|
|
+ */
|
|
|
|
+ /* fall-through */
|
|
|
|
+ default:
|
|
|
|
+ printf("DMA_PUSHER 0x%08x 0x%08x\n", gpuget, data);
|
|
|
|
+ assert(0);
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+}
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_dma_kickoff(struct nouveau_channel *chan)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ struct nouveau_dma_priv *dma = nvchan->dma;
|
|
|
|
+
|
|
|
|
+ if (dma->cur == dma->put)
|
|
|
|
+ return;
|
|
|
|
+
|
|
|
|
+#ifdef NOUVEAU_DMA_DEBUG
|
|
|
|
+ if (dma->push_free) {
|
|
|
|
+ printf("Packet incomplete: %d left\n", dma->push_free);
|
|
|
|
+ return;
|
|
|
|
+ }
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+#ifdef NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF
|
|
|
|
+ nouveau_dma_parse_pushbuf(chan, dma->put, dma->cur);
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+ WRITE_PUT(nvchan, dma->cur);
|
|
|
|
+}
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_dma.h libdrm-2.4.4/libdrm/nouveau/nouveau_dma.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_dma.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_dma.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,154 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_DMA_H__
|
|
|
|
+#define __NOUVEAU_DMA_H__
|
|
|
|
+
|
|
|
|
+#include <string.h>
|
|
|
|
+#include "nouveau_private.h"
|
|
|
|
+
|
|
|
|
+//#define NOUVEAU_DMA_DEBUG
|
|
|
|
+//#define NOUVEAU_DMA_TRACE
|
|
|
|
+//#define NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF
|
|
|
|
+#if defined(__amd64__)
|
|
|
|
+#define NOUVEAU_DMA_BARRIER asm volatile("lock; addl $0,0(%%rsp)" ::: "memory")
|
|
|
|
+#elif defined(__i386__)
|
|
|
|
+#define NOUVEAU_DMA_BARRIER asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
|
|
|
|
+#else
|
|
|
|
+#define NOUVEAU_DMA_BARRIER
|
|
|
|
+#endif
|
|
|
|
+#define NOUVEAU_DMA_TIMEOUT 2000
|
|
|
|
+#define NOUVEAU_TIME_MSEC() 0
|
|
|
|
+#define RING_SKIPS 8
|
|
|
|
+
|
|
|
|
+extern int nouveau_dma_wait(struct nouveau_channel *chan, int size);
|
|
|
|
+extern void nouveau_dma_subc_bind(struct nouveau_grobj *);
|
|
|
|
+extern void nouveau_dma_channel_init(struct nouveau_channel *);
|
|
|
|
+extern void nouveau_dma_kickoff(struct nouveau_channel *);
|
|
|
|
+
|
|
|
|
+#ifdef NOUVEAU_DMA_DEBUG
|
|
|
|
+static char faulty[1024];
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+static inline void
|
|
|
|
+nouveau_dma_out(struct nouveau_channel *chan, uint32_t data)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ struct nouveau_dma_priv *dma = nvchan->dma;
|
|
|
|
+
|
|
|
|
+#ifdef NOUVEAU_DMA_DEBUG
|
|
|
|
+ if (dma->push_free == 0) {
|
|
|
|
+ printf("No space left in packet at %s\n", faulty);
|
|
|
|
+ return;
|
|
|
|
+ }
|
|
|
|
+ dma->push_free--;
|
|
|
|
+#endif
|
|
|
|
+#ifdef NOUVEAU_DMA_TRACE
|
|
|
|
+ {
|
|
|
|
+ uint32_t offset = (dma->cur << 2) + dma->base;
|
|
|
|
+ printf("\tOUT_RING %d/0x%08x -> 0x%08x\n",
|
|
|
|
+ nvchan->drm.channel, offset, data);
|
|
|
|
+ }
|
|
|
|
+#endif
|
|
|
|
+ nvchan->pushbuf[dma->cur + (dma->base - nvchan->drm.put_base)/4] = data;
|
|
|
|
+ dma->cur++;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static inline void
|
|
|
|
+nouveau_dma_outp(struct nouveau_channel *chan, uint32_t *ptr, int size)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ struct nouveau_dma_priv *dma = nvchan->dma;
|
|
|
|
+ (void)dma;
|
|
|
|
+
|
|
|
|
+#ifdef NOUVEAU_DMA_DEBUG
|
|
|
|
+ if (dma->push_free < size) {
|
|
|
|
+ printf("Packet too small. Free=%d, Need=%d\n",
|
|
|
|
+ dma->push_free, size);
|
|
|
|
+ return;
|
|
|
|
+ }
|
|
|
|
+#endif
|
|
|
|
+#ifdef NOUVEAU_DMA_TRACE
|
|
|
|
+ while (size--) {
|
|
|
|
+ nouveau_dma_out(chan, *ptr);
|
|
|
|
+ ptr++;
|
|
|
|
+ }
|
|
|
|
+#else
|
|
|
|
+ memcpy(&nvchan->pushbuf[dma->cur], ptr, size << 2);
|
|
|
|
+#ifdef NOUVEAU_DMA_DEBUG
|
|
|
|
+ dma->push_free -= size;
|
|
|
|
+#endif
|
|
|
|
+ dma->cur += size;
|
|
|
|
+#endif
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static inline void
|
|
|
|
+nouveau_dma_space(struct nouveau_channel *chan, unsigned size)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ struct nouveau_dma_priv *dma = nvchan->dma;
|
|
|
|
+
|
|
|
|
+ if (dma->free < size) {
|
|
|
|
+ if (nouveau_dma_wait(chan, size) && chan->hang_notify)
|
|
|
|
+ chan->hang_notify(chan);
|
|
|
|
+ }
|
|
|
|
+ dma->free -= size;
|
|
|
|
+#ifdef NOUVEAU_DMA_DEBUG
|
|
|
|
+ dma->push_free = size;
|
|
|
|
+#endif
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static inline void
|
|
|
|
+nouveau_dma_begin(struct nouveau_channel *chan, struct nouveau_grobj *grobj,
|
|
|
|
+ int method, int size, const char* file, int line)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ struct nouveau_dma_priv *dma = nvchan->dma;
|
|
|
|
+ (void)dma;
|
|
|
|
+
|
|
|
|
+#ifdef NOUVEAU_DMA_TRACE
|
|
|
|
+ printf("BEGIN_RING %d/%08x/%d/0x%04x/%d\n", nvchan->drm.channel,
|
|
|
|
+ grobj->handle, grobj->subc, method, size);
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+#ifdef NOUVEAU_DMA_DEBUG
|
|
|
|
+ if (dma->push_free) {
|
|
|
|
+ printf("Previous packet incomplete: %d left at %s\n",
|
|
|
|
+ dma->push_free, faulty);
|
|
|
|
+ return;
|
|
|
|
+ }
|
|
|
|
+ sprintf(faulty,"%s:%d",file,line);
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+ nouveau_dma_space(chan, (size + 1));
|
|
|
|
+ nouveau_dma_out(chan, (size << 18) | (grobj->subc << 13) | method);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+#define RING_SPACE_CH(ch,sz) nouveau_dma_space((ch), (sz))
|
|
|
|
+#define BEGIN_RING_CH(ch,gr,m,sz) nouveau_dma_begin((ch), (gr), (m), (sz), __FUNCTION__, __LINE__ )
|
|
|
|
+#define OUT_RING_CH(ch, data) nouveau_dma_out((ch), (data))
|
|
|
|
+#define OUT_RINGp_CH(ch,ptr,dwords) nouveau_dma_outp((ch), (void*)(ptr), \
|
|
|
|
+ (dwords))
|
|
|
|
+#define FIRE_RING_CH(ch) nouveau_dma_kickoff((ch))
|
|
|
|
+#define WAIT_RING_CH(ch,sz) nouveau_dma_wait((ch), (sz))
|
|
|
|
+
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_drmif.h libdrm-2.4.4/libdrm/nouveau/nouveau_drmif.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_drmif.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_drmif.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,59 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2008 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_DRMIF_H__
|
|
|
|
+#define __NOUVEAU_DRMIF_H__
|
|
|
|
+
|
|
|
|
+#include <stdint.h>
|
|
|
|
+#include <xf86drm.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_device.h"
|
|
|
|
+
|
|
|
|
+struct nouveau_device_priv {
|
|
|
|
+ struct nouveau_device base;
|
|
|
|
+
|
|
|
|
+ int fd;
|
|
|
|
+ drm_context_t ctx;
|
|
|
|
+ drmLock *lock;
|
|
|
|
+ int needs_close;
|
|
|
|
+
|
|
|
|
+ int mm_enabled;
|
|
|
|
+};
|
|
|
|
+#define nouveau_device(n) ((struct nouveau_device_priv *)(n))
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_device_open_existing(struct nouveau_device **, int close,
|
|
|
|
+ int fd, drm_context_t ctx);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_device_open(struct nouveau_device **, const char *busid);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_device_close(struct nouveau_device **);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_device_get_param(struct nouveau_device *, uint64_t param, uint64_t *v);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_device_set_param(struct nouveau_device *, uint64_t param, uint64_t val);
|
|
|
|
+
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_fence.c libdrm-2.4.4/libdrm/nouveau/nouveau_fence.c
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_fence.c 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_fence.c 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,249 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#include <stdio.h>
|
|
|
|
+#include <stdlib.h>
|
|
|
|
+#include <errno.h>
|
|
|
|
+#include <assert.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_private.h"
|
|
|
|
+#include "nouveau_dma.h"
|
|
|
|
+
|
|
|
|
+static void
|
|
|
|
+nouveau_fence_del_unsignalled(struct nouveau_fence *fence)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(fence->channel);
|
|
|
|
+ struct nouveau_fence *le;
|
|
|
|
+
|
|
|
|
+ if (nvchan->fence_head == fence) {
|
|
|
|
+ nvchan->fence_head = nouveau_fence(fence)->next;
|
|
|
|
+ if (nvchan->fence_head == NULL)
|
|
|
|
+ nvchan->fence_tail = NULL;
|
|
|
|
+ return;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ le = nvchan->fence_head;
|
|
|
|
+ while (le && nouveau_fence(le)->next != fence)
|
|
|
|
+ le = nouveau_fence(le)->next;
|
|
|
|
+ assert(le && nouveau_fence(le)->next == fence);
|
|
|
|
+ nouveau_fence(le)->next = nouveau_fence(fence)->next;
|
|
|
|
+ if (nvchan->fence_tail == fence)
|
|
|
|
+ nvchan->fence_tail = le;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void
|
|
|
|
+nouveau_fence_del(struct nouveau_fence **fence)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_fence_priv *nvfence;
|
|
|
|
+
|
|
|
|
+ if (!fence || !*fence)
|
|
|
|
+ return;
|
|
|
|
+ nvfence = nouveau_fence(*fence);
|
|
|
|
+ *fence = NULL;
|
|
|
|
+
|
|
|
|
+ if (--nvfence->refcount)
|
|
|
|
+ return;
|
|
|
|
+
|
|
|
|
+ if (nvfence->emitted && !nvfence->signalled) {
|
|
|
|
+ if (nvfence->signal_cb) {
|
|
|
|
+ nvfence->refcount++;
|
|
|
|
+ nouveau_fence_wait((void *)&nvfence);
|
|
|
|
+ return;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nouveau_fence_del_unsignalled(&nvfence->base);
|
|
|
|
+ }
|
|
|
|
+ free(nvfence);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **fence)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_fence_priv *nvfence;
|
|
|
|
+
|
|
|
|
+ if (!chan || !fence || *fence)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ nvfence = calloc(1, sizeof(struct nouveau_fence_priv));
|
|
|
|
+ if (!nvfence)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+ nvfence->base.channel = chan;
|
|
|
|
+ nvfence->refcount = 1;
|
|
|
|
+
|
|
|
|
+ *fence = &nvfence->base;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_fence_ref(struct nouveau_fence *ref, struct nouveau_fence **fence)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_fence_priv *nvfence;
|
|
|
|
+
|
|
|
|
+ if (!fence)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ if (*fence) {
|
|
|
|
+ nouveau_fence_del(fence);
|
|
|
|
+ *fence = NULL;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (ref) {
|
|
|
|
+ nvfence = nouveau_fence(ref);
|
|
|
|
+ nvfence->refcount++;
|
|
|
|
+ *fence = &nvfence->base;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_fence_signal_cb(struct nouveau_fence *fence, void (*func)(void *),
|
|
|
|
+ void *priv)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_fence_priv *nvfence = nouveau_fence(fence);
|
|
|
|
+ struct nouveau_fence_cb *cb;
|
|
|
|
+
|
|
|
|
+ if (!nvfence || !func)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ cb = malloc(sizeof(struct nouveau_fence_cb));
|
|
|
|
+ if (!cb)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+
|
|
|
|
+ cb->func = func;
|
|
|
|
+ cb->priv = priv;
|
|
|
|
+ cb->next = nvfence->signal_cb;
|
|
|
|
+ nvfence->signal_cb = cb;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_fence_emit(struct nouveau_fence *fence)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(fence->channel);
|
|
|
|
+ struct nouveau_fence_priv *nvfence = nouveau_fence(fence);
|
|
|
|
+
|
|
|
|
+ nvfence->emitted = 1;
|
|
|
|
+ nvfence->sequence = ++nvchan->fence_sequence;
|
|
|
|
+ if (nvfence->sequence == 0xffffffff)
|
|
|
|
+ printf("AII wrap unhandled\n");
|
|
|
|
+
|
|
|
|
+ if (!nvchan->fence_ntfy) {
|
|
|
|
+ /*XXX: assumes subc 0 is populated */
|
|
|
|
+ nouveau_dma_space(fence->channel, 2);
|
|
|
|
+ nouveau_dma_out (fence->channel, 0x00040050);
|
|
|
|
+ nouveau_dma_out (fence->channel, nvfence->sequence);
|
|
|
|
+ }
|
|
|
|
+ nouveau_dma_kickoff(fence->channel);
|
|
|
|
+
|
|
|
|
+ if (nvchan->fence_tail) {
|
|
|
|
+ nouveau_fence(nvchan->fence_tail)->next = fence;
|
|
|
|
+ } else {
|
|
|
|
+ nvchan->fence_head = fence;
|
|
|
|
+ }
|
|
|
|
+ nvchan->fence_tail = fence;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void
|
|
|
|
+nouveau_fence_flush_seq(struct nouveau_channel *chan, uint32_t sequence)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+
|
|
|
|
+ while (nvchan->fence_head) {
|
|
|
|
+ struct nouveau_fence_priv *nvfence;
|
|
|
|
+
|
|
|
|
+ nvfence = nouveau_fence(nvchan->fence_head);
|
|
|
|
+ if (nvfence->sequence > sequence)
|
|
|
|
+ break;
|
|
|
|
+ nouveau_fence_del_unsignalled(&nvfence->base);
|
|
|
|
+ nvfence->signalled = 1;
|
|
|
|
+
|
|
|
|
+ if (nvfence->signal_cb) {
|
|
|
|
+ struct nouveau_fence *fence = NULL;
|
|
|
|
+
|
|
|
|
+ nouveau_fence_ref(&nvfence->base, &fence);
|
|
|
|
+
|
|
|
|
+ while (nvfence->signal_cb) {
|
|
|
|
+ struct nouveau_fence_cb *cb;
|
|
|
|
+
|
|
|
|
+ cb = nvfence->signal_cb;
|
|
|
|
+ nvfence->signal_cb = cb->next;
|
|
|
|
+ cb->func(cb->priv);
|
|
|
|
+ free(cb);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nouveau_fence_ref(NULL, &fence);
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_fence_flush(struct nouveau_channel *chan)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+
|
|
|
|
+ if (!nvchan->fence_ntfy)
|
|
|
|
+ nouveau_fence_flush_seq(chan, *nvchan->ref_cnt);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_fence_wait(struct nouveau_fence **fence)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_fence_priv *nvfence;
|
|
|
|
+ struct nouveau_channel_priv *nvchan;
|
|
|
|
+
|
|
|
|
+ if (!fence)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ nvfence = nouveau_fence(*fence);
|
|
|
|
+ if (!nvfence)
|
|
|
|
+ return 0;
|
|
|
|
+ nvchan = nouveau_channel(nvfence->base.channel);
|
|
|
|
+
|
|
|
|
+ if (nvfence->emitted) {
|
|
|
|
+ if (!nvfence->signalled && nvchan->fence_ntfy) {
|
|
|
|
+ struct nouveau_channel *chan = &nvchan->base;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ /*XXX: NV04/NV05: Full sync + flush all fences */
|
|
|
|
+ nouveau_notifier_reset(nvchan->fence_ntfy, 0);
|
|
|
|
+ BEGIN_RING(chan, nvchan->fence_grobj, 0x0104, 1);
|
|
|
|
+ OUT_RING (chan, 0);
|
|
|
|
+ BEGIN_RING(chan, nvchan->fence_grobj, 0x0100, 1);
|
|
|
|
+ OUT_RING (chan, 0);
|
|
|
|
+ FIRE_RING (chan);
|
|
|
|
+ ret = nouveau_notifier_wait_status(nvchan->fence_ntfy,
|
|
|
|
+ 0, 0, 2.0);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ nouveau_fence_flush_seq(chan, nvchan->fence_sequence);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ while (!nvfence->signalled)
|
|
|
|
+ nouveau_fence_flush(nvfence->base.channel);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nouveau_fence_ref(NULL, fence);
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_grobj.c libdrm-2.4.4/libdrm/nouveau/nouveau_grobj.c
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_grobj.c 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_grobj.c 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,138 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#include <stdlib.h>
|
|
|
|
+#include <errno.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_private.h"
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_grobj_alloc(struct nouveau_channel *chan, uint32_t handle,
|
|
|
|
+ int class, struct nouveau_grobj **grobj)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(chan->device);
|
|
|
|
+ struct nouveau_grobj_priv *nvgrobj;
|
|
|
|
+ struct drm_nouveau_grobj_alloc g;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!nvdev || !grobj || *grobj)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ nvgrobj = calloc(1, sizeof(*nvgrobj));
|
|
|
|
+ if (!nvgrobj)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+ nvgrobj->base.channel = chan;
|
|
|
|
+ nvgrobj->base.handle = handle;
|
|
|
|
+ nvgrobj->base.grclass = class;
|
|
|
|
+ nvgrobj->base.bound = NOUVEAU_GROBJ_UNBOUND;
|
|
|
|
+ nvgrobj->base.subc = -1;
|
|
|
|
+
|
|
|
|
+ g.channel = chan->id;
|
|
|
|
+ g.handle = handle;
|
|
|
|
+ g.class = class;
|
|
|
|
+ ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GROBJ_ALLOC,
|
|
|
|
+ &g, sizeof(g));
|
|
|
|
+ if (ret) {
|
|
|
|
+ nouveau_grobj_free((void *)&nvgrobj);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ *grobj = &nvgrobj->base;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_grobj_ref(struct nouveau_channel *chan, uint32_t handle,
|
|
|
|
+ struct nouveau_grobj **grobj)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_grobj_priv *nvgrobj;
|
|
|
|
+
|
|
|
|
+ if (!chan || !grobj || *grobj)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ nvgrobj = calloc(1, sizeof(struct nouveau_grobj_priv));
|
|
|
|
+ if (!nvgrobj)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+ nvgrobj->base.channel = chan;
|
|
|
|
+ nvgrobj->base.handle = handle;
|
|
|
|
+ nvgrobj->base.grclass = 0;
|
|
|
|
+
|
|
|
|
+ *grobj = &nvgrobj->base;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_grobj_free(struct nouveau_grobj **grobj)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev;
|
|
|
|
+ struct nouveau_channel_priv *chan;
|
|
|
|
+ struct nouveau_grobj_priv *nvgrobj;
|
|
|
|
+
|
|
|
|
+ if (!grobj || !*grobj)
|
|
|
|
+ return;
|
|
|
|
+ nvgrobj = nouveau_grobj(*grobj);
|
|
|
|
+ *grobj = NULL;
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+ chan = nouveau_channel(nvgrobj->base.channel);
|
|
|
|
+ nvdev = nouveau_device(chan->base.device);
|
|
|
|
+
|
|
|
|
+ if (nvgrobj->base.grclass) {
|
|
|
|
+ struct drm_nouveau_gpuobj_free f;
|
|
|
|
+
|
|
|
|
+ f.channel = chan->drm.channel;
|
|
|
|
+ f.handle = nvgrobj->base.handle;
|
|
|
|
+ drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE,
|
|
|
|
+ &f, sizeof(f));
|
|
|
|
+ }
|
|
|
|
+ free(nvgrobj);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_grobj_autobind(struct nouveau_grobj *grobj)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_subchannel *subc = NULL;
|
|
|
|
+ int i;
|
|
|
|
+
|
|
|
|
+ for (i = 0; i < 8; i++) {
|
|
|
|
+ struct nouveau_subchannel *scc = &grobj->channel->subc[i];
|
|
|
|
+
|
|
|
|
+ if (scc->gr && scc->gr->bound == NOUVEAU_GROBJ_BOUND_EXPLICIT)
|
|
|
|
+ continue;
|
|
|
|
+
|
|
|
|
+ if (!subc || scc->sequence < subc->sequence)
|
|
|
|
+ subc = scc;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (subc->gr) {
|
|
|
|
+ subc->gr->bound = NOUVEAU_GROBJ_UNBOUND;
|
|
|
|
+ subc->gr->subc = -1;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ subc->gr = grobj;
|
|
|
|
+ subc->gr->bound = NOUVEAU_GROBJ_BOUND;
|
|
|
|
+ subc->gr->subc = subc - &grobj->channel->subc[0];
|
|
|
|
+
|
|
|
|
+ BEGIN_RING(grobj->channel, grobj, 0x0000, 1);
|
|
|
|
+ OUT_RING (grobj->channel, grobj->handle);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_grobj.h libdrm-2.4.4/libdrm/nouveau/nouveau_grobj.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_grobj.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_grobj.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,48 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_GROBJ_H__
|
|
|
|
+#define __NOUVEAU_GROBJ_H__
|
|
|
|
+
|
|
|
|
+#include "nouveau_channel.h"
|
|
|
|
+
|
|
|
|
+struct nouveau_grobj {
|
|
|
|
+ struct nouveau_channel *channel;
|
|
|
|
+ int grclass;
|
|
|
|
+ uint32_t handle;
|
|
|
|
+
|
|
|
|
+ enum {
|
|
|
|
+ NOUVEAU_GROBJ_UNBOUND = 0,
|
|
|
|
+ NOUVEAU_GROBJ_BOUND = 1,
|
|
|
|
+ NOUVEAU_GROBJ_BOUND_EXPLICIT = 2
|
|
|
|
+ } bound;
|
|
|
|
+ int subc;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+int nouveau_grobj_alloc(struct nouveau_channel *, uint32_t handle,
|
|
|
|
+ int class, struct nouveau_grobj **);
|
|
|
|
+int nouveau_grobj_ref(struct nouveau_channel *, uint32_t handle,
|
|
|
|
+ struct nouveau_grobj **);
|
|
|
|
+void nouveau_grobj_free(struct nouveau_grobj **);
|
|
|
|
+void nouveau_grobj_autobind(struct nouveau_grobj *);
|
|
|
|
+
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_notifier.c libdrm-2.4.4/libdrm/nouveau/nouveau_notifier.c
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_notifier.c 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_notifier.c 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,146 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#include <stdlib.h>
|
|
|
|
+#include <errno.h>
|
|
|
|
+#include <sys/time.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_private.h"
|
|
|
|
+
|
|
|
|
+#define NOTIFIER(__v) \
|
|
|
|
+ struct nouveau_notifier_priv *nvnotify = nouveau_notifier(notifier); \
|
|
|
|
+ volatile uint32_t *__v = (void*)nvnotify->map + (id * 32)
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
|
|
|
|
+ int count, struct nouveau_notifier **notifier)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_notifier_priv *nvnotify;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (!chan || !notifier || *notifier)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ nvnotify = calloc(1, sizeof(struct nouveau_notifier_priv));
|
|
|
|
+ if (!nvnotify)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+ nvnotify->base.channel = chan;
|
|
|
|
+ nvnotify->base.handle = handle;
|
|
|
|
+
|
|
|
|
+ nvnotify->drm.channel = chan->id;
|
|
|
|
+ nvnotify->drm.handle = handle;
|
|
|
|
+ nvnotify->drm.count = count;
|
|
|
|
+ if ((ret = drmCommandWriteRead(nouveau_device(chan->device)->fd,
|
|
|
|
+ DRM_NOUVEAU_NOTIFIEROBJ_ALLOC,
|
|
|
|
+ &nvnotify->drm,
|
|
|
|
+ sizeof(nvnotify->drm)))) {
|
|
|
|
+ nouveau_notifier_free((void *)&nvnotify);
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nvnotify->map = (void *)nouveau_channel(chan)->notifier_block +
|
|
|
|
+ nvnotify->drm.offset;
|
|
|
|
+ *notifier = &nvnotify->base;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_notifier_free(struct nouveau_notifier **notifier)
|
|
|
|
+{
|
|
|
|
+
|
|
|
|
+ struct nouveau_notifier_priv *nvnotify;
|
|
|
|
+ struct nouveau_channel_priv *nvchan;
|
|
|
|
+ struct nouveau_device_priv *nvdev;
|
|
|
|
+ struct drm_nouveau_gpuobj_free f;
|
|
|
|
+
|
|
|
|
+ if (!notifier || !*notifier)
|
|
|
|
+ return;
|
|
|
|
+ nvnotify = nouveau_notifier(*notifier);
|
|
|
|
+ *notifier = NULL;
|
|
|
|
+
|
|
|
|
+ nvchan = nouveau_channel(nvnotify->base.channel);
|
|
|
|
+ nvdev = nouveau_device(nvchan->base.device);
|
|
|
|
+
|
|
|
|
+ f.channel = nvchan->drm.channel;
|
|
|
|
+ f.handle = nvnotify->base.handle;
|
|
|
|
+ drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE, &f, sizeof(f));
|
|
|
|
+ free(nvnotify);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_notifier_reset(struct nouveau_notifier *notifier, int id)
|
|
|
|
+{
|
|
|
|
+ NOTIFIER(n);
|
|
|
|
+
|
|
|
|
+ n[NV_NOTIFY_TIME_0 /4] = 0x00000000;
|
|
|
|
+ n[NV_NOTIFY_TIME_1 /4] = 0x00000000;
|
|
|
|
+ n[NV_NOTIFY_RETURN_VALUE/4] = 0x00000000;
|
|
|
|
+ n[NV_NOTIFY_STATE /4] = (NV_NOTIFY_STATE_STATUS_IN_PROCESS <<
|
|
|
|
+ NV_NOTIFY_STATE_STATUS_SHIFT);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+uint32_t
|
|
|
|
+nouveau_notifier_status(struct nouveau_notifier *notifier, int id)
|
|
|
|
+{
|
|
|
|
+ NOTIFIER(n);
|
|
|
|
+
|
|
|
|
+ return n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+uint32_t
|
|
|
|
+nouveau_notifier_return_val(struct nouveau_notifier *notifier, int id)
|
|
|
|
+{
|
|
|
|
+ NOTIFIER(n);
|
|
|
|
+
|
|
|
|
+ return n[NV_NOTIFY_RETURN_VALUE/4];
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static inline double
|
|
|
|
+gettime(void)
|
|
|
|
+{
|
|
|
|
+ struct timeval tv;
|
|
|
|
+
|
|
|
|
+ gettimeofday(&tv, NULL);
|
|
|
|
+ return (double)tv.tv_sec + tv.tv_usec / 1000000.0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_notifier_wait_status(struct nouveau_notifier *notifier, int id,
|
|
|
|
+ int status, double timeout)
|
|
|
|
+{
|
|
|
|
+ NOTIFIER(n);
|
|
|
|
+ double time = 0, t_start = gettime();
|
|
|
|
+
|
|
|
|
+ while (time <= timeout) {
|
|
|
|
+ uint32_t v;
|
|
|
|
+
|
|
|
|
+ v = n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT;
|
|
|
|
+ if (v == status)
|
|
|
|
+ return 0;
|
|
|
|
+
|
|
|
|
+ if (timeout)
|
|
|
|
+ time = gettime() - t_start;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return -EBUSY;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_notifier.h libdrm-2.4.4/libdrm/nouveau/nouveau_notifier.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_notifier.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_notifier.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,63 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_NOTIFIER_H__
|
|
|
|
+#define __NOUVEAU_NOTIFIER_H__
|
|
|
|
+
|
|
|
|
+#define NV_NOTIFIER_SIZE 32
|
|
|
|
+#define NV_NOTIFY_TIME_0 0x00000000
|
|
|
|
+#define NV_NOTIFY_TIME_1 0x00000004
|
|
|
|
+#define NV_NOTIFY_RETURN_VALUE 0x00000008
|
|
|
|
+#define NV_NOTIFY_STATE 0x0000000C
|
|
|
|
+#define NV_NOTIFY_STATE_STATUS_MASK 0xFF000000
|
|
|
|
+#define NV_NOTIFY_STATE_STATUS_SHIFT 24
|
|
|
|
+#define NV_NOTIFY_STATE_STATUS_COMPLETED 0x00
|
|
|
|
+#define NV_NOTIFY_STATE_STATUS_IN_PROCESS 0x01
|
|
|
|
+#define NV_NOTIFY_STATE_ERROR_CODE_MASK 0x0000FFFF
|
|
|
|
+#define NV_NOTIFY_STATE_ERROR_CODE_SHIFT 0
|
|
|
|
+
|
|
|
|
+struct nouveau_notifier {
|
|
|
|
+ struct nouveau_channel *channel;
|
|
|
|
+ uint32_t handle;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, int count,
|
|
|
|
+ struct nouveau_notifier **);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_notifier_free(struct nouveau_notifier **);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_notifier_reset(struct nouveau_notifier *, int id);
|
|
|
|
+
|
|
|
|
+uint32_t
|
|
|
|
+nouveau_notifier_status(struct nouveau_notifier *, int id);
|
|
|
|
+
|
|
|
|
+uint32_t
|
|
|
|
+nouveau_notifier_return_val(struct nouveau_notifier *, int id);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_notifier_wait_status(struct nouveau_notifier *, int id, int status,
|
|
|
|
+ double timeout);
|
|
|
|
+
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_private.h libdrm-2.4.4/libdrm/nouveau/nouveau_private.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_private.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_private.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,203 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_PRIVATE_H__
|
|
|
|
+#define __NOUVEAU_PRIVATE_H__
|
|
|
|
+
|
|
|
|
+#include <stdint.h>
|
|
|
|
+#include <xf86drm.h>
|
|
|
|
+#include <nouveau_drm.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_drmif.h"
|
|
|
|
+#include "nouveau_device.h"
|
|
|
|
+#include "nouveau_channel.h"
|
|
|
|
+#include "nouveau_grobj.h"
|
|
|
|
+#include "nouveau_notifier.h"
|
|
|
|
+#include "nouveau_bo.h"
|
|
|
|
+#include "nouveau_resource.h"
|
|
|
|
+#include "nouveau_pushbuf.h"
|
|
|
|
+
|
|
|
|
+#define NOUVEAU_PUSHBUF_MAX_BUFFERS 1024
|
|
|
|
+#define NOUVEAU_PUSHBUF_MAX_RELOCS 1024
|
|
|
|
+struct nouveau_pushbuf_priv {
|
|
|
|
+ struct nouveau_pushbuf base;
|
|
|
|
+
|
|
|
|
+ int use_cal;
|
|
|
|
+ struct nouveau_bo *buffer;
|
|
|
|
+
|
|
|
|
+ unsigned *pushbuf;
|
|
|
|
+ unsigned size;
|
|
|
|
+
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_bo *buffers;
|
|
|
|
+ unsigned nr_buffers;
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_reloc *relocs;
|
|
|
|
+ unsigned nr_relocs;
|
|
|
|
+
|
|
|
|
+ /*XXX: nomm */
|
|
|
|
+ struct nouveau_fence *fence;
|
|
|
|
+};
|
|
|
|
+#define nouveau_pushbuf(n) ((struct nouveau_pushbuf_priv *)(n))
|
|
|
|
+
|
|
|
|
+#define pbbo_to_ptr(o) ((uint64_t)(unsigned long)(o))
|
|
|
|
+#define ptr_to_pbbo(h) ((struct nouveau_pushbuf_bo *)(unsigned long)(h))
|
|
|
|
+#define pbrel_to_ptr(o) ((uint64_t)(unsigned long)(o))
|
|
|
|
+#define ptr_to_pbrel(h) ((struct nouveau_pushbuf_reloc *)(unsigned long)(h))
|
|
|
|
+#define bo_to_ptr(o) ((uint64_t)(unsigned long)(o))
|
|
|
|
+#define ptr_to_bo(h) ((struct nouveau_bo_priv *)(unsigned long)(h))
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_pushbuf_init(struct nouveau_channel *);
|
|
|
|
+
|
|
|
|
+struct nouveau_dma_priv {
|
|
|
|
+ uint32_t base;
|
|
|
|
+ uint32_t max;
|
|
|
|
+ uint32_t cur;
|
|
|
|
+ uint32_t put;
|
|
|
|
+ uint32_t free;
|
|
|
|
+
|
|
|
|
+ int push_free;
|
|
|
|
+} dma;
|
|
|
|
+
|
|
|
|
+struct nouveau_channel_priv {
|
|
|
|
+ struct nouveau_channel base;
|
|
|
|
+
|
|
|
|
+ struct drm_nouveau_channel_alloc drm;
|
|
|
|
+
|
|
|
|
+ void *notifier_block;
|
|
|
|
+
|
|
|
|
+ struct nouveau_pushbuf_priv pb;
|
|
|
|
+
|
|
|
|
+ /*XXX: nomm */
|
|
|
|
+ volatile uint32_t *user, *put, *get, *ref_cnt;
|
|
|
|
+ uint32_t *pushbuf;
|
|
|
|
+ struct nouveau_dma_priv struct_dma;
|
|
|
|
+ struct nouveau_dma_priv *dma;
|
|
|
|
+ struct nouveau_fence *fence_head;
|
|
|
|
+ struct nouveau_fence *fence_tail;
|
|
|
|
+ uint32_t fence_sequence;
|
|
|
|
+ struct nouveau_grobj *fence_grobj;
|
|
|
|
+ struct nouveau_notifier *fence_ntfy;
|
|
|
|
+};
|
|
|
|
+#define nouveau_channel(n) ((struct nouveau_channel_priv *)(n))
|
|
|
|
+
|
|
|
|
+struct nouveau_fence {
|
|
|
|
+ struct nouveau_channel *channel;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct nouveau_fence_cb {
|
|
|
|
+ struct nouveau_fence_cb *next;
|
|
|
|
+ void (*func)(void *);
|
|
|
|
+ void *priv;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct nouveau_fence_priv {
|
|
|
|
+ struct nouveau_fence base;
|
|
|
|
+ int refcount;
|
|
|
|
+
|
|
|
|
+ struct nouveau_fence *next;
|
|
|
|
+ struct nouveau_fence_cb *signal_cb;
|
|
|
|
+
|
|
|
|
+ uint32_t sequence;
|
|
|
|
+ int emitted;
|
|
|
|
+ int signalled;
|
|
|
|
+};
|
|
|
|
+#define nouveau_fence(n) ((struct nouveau_fence_priv *)(n))
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_fence_ref(struct nouveau_fence *, struct nouveau_fence **);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_fence_signal_cb(struct nouveau_fence *, void (*)(void *), void *);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_fence_emit(struct nouveau_fence *);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_fence_wait(struct nouveau_fence **);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_fence_flush(struct nouveau_channel *);
|
|
|
|
+
|
|
|
|
+struct nouveau_grobj_priv {
|
|
|
|
+ struct nouveau_grobj base;
|
|
|
|
+};
|
|
|
|
+#define nouveau_grobj(n) ((struct nouveau_grobj_priv *)(n))
|
|
|
|
+
|
|
|
|
+struct nouveau_notifier_priv {
|
|
|
|
+ struct nouveau_notifier base;
|
|
|
|
+
|
|
|
|
+ struct drm_nouveau_notifierobj_alloc drm;
|
|
|
|
+ volatile void *map;
|
|
|
|
+};
|
|
|
|
+#define nouveau_notifier(n) ((struct nouveau_notifier_priv *)(n))
|
|
|
|
+
|
|
|
|
+struct nouveau_bo_priv {
|
|
|
|
+ struct nouveau_bo base;
|
|
|
|
+ int refcount;
|
|
|
|
+
|
|
|
|
+ /* Buffer configuration + usage hints */
|
|
|
|
+ unsigned flags;
|
|
|
|
+ unsigned size;
|
|
|
|
+ unsigned align;
|
|
|
|
+ int user;
|
|
|
|
+
|
|
|
|
+ /* Tracking */
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_bo *pending;
|
|
|
|
+ struct nouveau_channel *pending_channel;
|
|
|
|
+ int write_marker;
|
|
|
|
+
|
|
|
|
+ /* Userspace object */
|
|
|
|
+ void *sysmem;
|
|
|
|
+
|
|
|
|
+ /* Kernel object */
|
|
|
|
+ uint32_t global_handle;
|
|
|
|
+ unsigned handle;
|
|
|
|
+ void *map;
|
|
|
|
+
|
|
|
|
+ /* Last known information from kernel on buffer status */
|
|
|
|
+ int pinned;
|
|
|
|
+ uint64_t offset;
|
|
|
|
+ uint32_t domain;
|
|
|
|
+
|
|
|
|
+ /*XXX: nomm stuff */
|
|
|
|
+ struct nouveau_fence *fence;
|
|
|
|
+ struct nouveau_fence *wr_fence;
|
|
|
|
+};
|
|
|
|
+#define nouveau_bo(n) ((struct nouveau_bo_priv *)(n))
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_init(struct nouveau_device *);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_bo_takedown(struct nouveau_device *);
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_pushbuf_bo *
|
|
|
|
+nouveau_bo_emit_buffer(struct nouveau_channel *, struct nouveau_bo *);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_bo_validate_nomm(struct nouveau_bo_priv *, uint32_t);
|
|
|
|
+
|
|
|
|
+#include "nouveau_dma.h"
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_pushbuf.c libdrm-2.4.4/libdrm/nouveau/nouveau_pushbuf.c
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_pushbuf.c 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_pushbuf.c 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,276 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#include <stdio.h>
|
|
|
|
+#include <stdlib.h>
|
|
|
|
+#include <errno.h>
|
|
|
|
+#include <assert.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_private.h"
|
|
|
|
+#include "nouveau_dma.h"
|
|
|
|
+
|
|
|
|
+#define PB_BUFMGR_DWORDS (4096 / 2)
|
|
|
|
+#define PB_MIN_USER_DWORDS 2048
|
|
|
|
+
|
|
|
|
+static uint32_t
|
|
|
|
+nouveau_pushbuf_calc_reloc(struct drm_nouveau_gem_pushbuf_bo *pbbo,
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_reloc *r,
|
|
|
|
+ int mm_enabled)
|
|
|
|
+{
|
|
|
|
+ uint32_t push = 0;
|
|
|
|
+ const unsigned is_vram = mm_enabled ? NOUVEAU_GEM_DOMAIN_VRAM :
|
|
|
|
+ NOUVEAU_BO_VRAM;
|
|
|
|
+
|
|
|
|
+ if (r->flags & NOUVEAU_GEM_RELOC_LOW)
|
|
|
|
+ push = (pbbo->presumed_offset + r->data);
|
|
|
|
+ else
|
|
|
|
+ if (r->flags & NOUVEAU_GEM_RELOC_HIGH)
|
|
|
|
+ push = (pbbo->presumed_offset + r->data) >> 32;
|
|
|
|
+ else
|
|
|
|
+ push = r->data;
|
|
|
|
+
|
|
|
|
+ if (r->flags & NOUVEAU_GEM_RELOC_OR) {
|
|
|
|
+ if (pbbo->presumed_domain & is_vram)
|
|
|
|
+ push |= r->vor;
|
|
|
|
+ else
|
|
|
|
+ push |= r->tor;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return push;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_pushbuf_emit_reloc(struct nouveau_channel *chan, void *ptr,
|
|
|
|
+ struct nouveau_bo *bo, uint32_t data, uint32_t flags,
|
|
|
|
+ uint32_t vor, uint32_t tor)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(chan->device);
|
|
|
|
+ struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf);
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_reloc *r;
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_bo *pbbo;
|
|
|
|
+ uint32_t domains = 0;
|
|
|
|
+
|
|
|
|
+ if (nvpb->nr_relocs >= NOUVEAU_PUSHBUF_MAX_RELOCS)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+
|
|
|
|
+ if (nouveau_bo(bo)->user && (flags & NOUVEAU_BO_WR)) {
|
|
|
|
+ fprintf(stderr, "write to user buffer!!\n");
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ pbbo = nouveau_bo_emit_buffer(chan, bo);
|
|
|
|
+ if (!pbbo)
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+
|
|
|
|
+ if (flags & NOUVEAU_BO_VRAM)
|
|
|
|
+ domains |= NOUVEAU_GEM_DOMAIN_VRAM;
|
|
|
|
+ if (flags & NOUVEAU_BO_GART)
|
|
|
|
+ domains |= NOUVEAU_GEM_DOMAIN_GART;
|
|
|
|
+ pbbo->valid_domains &= domains;
|
|
|
|
+ assert(pbbo->valid_domains);
|
|
|
|
+
|
|
|
|
+ if (!nvdev->mm_enabled) {
|
|
|
|
+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
|
|
|
+
|
|
|
|
+ nouveau_fence_ref(nvpb->fence, &nvbo->fence);
|
|
|
|
+ if (flags & NOUVEAU_BO_WR)
|
|
|
|
+ nouveau_fence_ref(nvpb->fence, &nvbo->wr_fence);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ assert(flags & NOUVEAU_BO_RDWR);
|
|
|
|
+ if (flags & NOUVEAU_BO_RD) {
|
|
|
|
+ pbbo->read_domains |= domains;
|
|
|
|
+ }
|
|
|
|
+ if (flags & NOUVEAU_BO_WR) {
|
|
|
|
+ pbbo->write_domains |= domains;
|
|
|
|
+ nouveau_bo(bo)->write_marker = 1;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ r = nvpb->relocs + nvpb->nr_relocs++;
|
|
|
|
+ r->bo_index = pbbo - nvpb->buffers;
|
|
|
|
+ r->reloc_index = (uint32_t *)ptr - nvpb->pushbuf;
|
|
|
|
+ r->flags = 0;
|
|
|
|
+ if (flags & NOUVEAU_BO_LOW)
|
|
|
|
+ r->flags |= NOUVEAU_GEM_RELOC_LOW;
|
|
|
|
+ if (flags & NOUVEAU_BO_HIGH)
|
|
|
|
+ r->flags |= NOUVEAU_GEM_RELOC_HIGH;
|
|
|
|
+ if (flags & NOUVEAU_BO_OR)
|
|
|
|
+ r->flags |= NOUVEAU_GEM_RELOC_OR;
|
|
|
|
+ r->data = data;
|
|
|
|
+ r->vor = vor;
|
|
|
|
+ r->tor = tor;
|
|
|
|
+
|
|
|
|
+ *(uint32_t *)ptr = (flags & NOUVEAU_BO_DUMMY) ? 0 :
|
|
|
|
+ nouveau_pushbuf_calc_reloc(pbbo, r, nvdev->mm_enabled);
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int
|
|
|
|
+nouveau_pushbuf_space(struct nouveau_channel *chan, unsigned min)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
|
|
|
|
+
|
|
|
|
+ if (nvpb->pushbuf) {
|
|
|
|
+ free(nvpb->pushbuf);
|
|
|
|
+ nvpb->pushbuf = NULL;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nvpb->size = min < PB_MIN_USER_DWORDS ? PB_MIN_USER_DWORDS : min;
|
|
|
|
+ nvpb->pushbuf = malloc(sizeof(uint32_t) * nvpb->size);
|
|
|
|
+
|
|
|
|
+ nvpb->base.channel = chan;
|
|
|
|
+ nvpb->base.remaining = nvpb->size;
|
|
|
|
+ nvpb->base.cur = nvpb->pushbuf;
|
|
|
|
+
|
|
|
|
+ if (!nouveau_device(chan->device)->mm_enabled) {
|
|
|
|
+ nouveau_fence_ref(NULL, &nvpb->fence);
|
|
|
|
+ nouveau_fence_new(chan, &nvpb->fence);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_pushbuf_init(struct nouveau_channel *chan)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
|
|
|
|
+
|
|
|
|
+ nouveau_pushbuf_space(chan, 0);
|
|
|
|
+
|
|
|
|
+ nvpb->buffers = calloc(NOUVEAU_PUSHBUF_MAX_BUFFERS,
|
|
|
|
+ sizeof(struct drm_nouveau_gem_pushbuf_bo));
|
|
|
|
+ nvpb->relocs = calloc(NOUVEAU_PUSHBUF_MAX_RELOCS,
|
|
|
|
+ sizeof(struct drm_nouveau_gem_pushbuf_reloc));
|
|
|
|
+
|
|
|
|
+ chan->pushbuf = &nvpb->base;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int
|
|
|
|
+nouveau_pushbuf_flush_nomm(struct nouveau_channel_priv *nvchan)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_bo *bo = nvpb->buffers;
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_reloc *reloc = nvpb->relocs;
|
|
|
|
+ unsigned b, r;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ for (b = 0; b < nvpb->nr_buffers; b++) {
|
|
|
|
+ struct nouveau_bo_priv *nvbo =
|
|
|
|
+ (void *)(unsigned long)bo[b].user_priv;
|
|
|
|
+ uint32_t flags = 0;
|
|
|
|
+
|
|
|
|
+ if (bo[b].valid_domains & NOUVEAU_GEM_DOMAIN_VRAM)
|
|
|
|
+ flags |= NOUVEAU_BO_VRAM;
|
|
|
|
+ if (bo[b].valid_domains & NOUVEAU_GEM_DOMAIN_GART)
|
|
|
|
+ flags |= NOUVEAU_BO_GART;
|
|
|
|
+
|
|
|
|
+ ret = nouveau_bo_validate_nomm(nvbo, flags);
|
|
|
|
+ if (ret)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ if (1 || bo[b].presumed_domain != nvbo->domain ||
|
|
|
|
+ bo[b].presumed_offset != nvbo->offset) {
|
|
|
|
+ bo[b].presumed_ok = 0;
|
|
|
|
+ bo[b].presumed_domain = nvbo->domain;
|
|
|
|
+ bo[b].presumed_offset = nvbo->offset;
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ for (r = 0; r < nvpb->nr_relocs; r++, reloc++) {
|
|
|
|
+ uint32_t push;
|
|
|
|
+
|
|
|
|
+ if (bo[reloc->bo_index].presumed_ok)
|
|
|
|
+ continue;
|
|
|
|
+
|
|
|
|
+ push = nouveau_pushbuf_calc_reloc(&bo[reloc->bo_index], reloc, 0);
|
|
|
|
+ nvpb->pushbuf[reloc->reloc_index] = push;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nouveau_dma_space(&nvchan->base, nvpb->size);
|
|
|
|
+ nouveau_dma_outp (&nvchan->base, nvpb->pushbuf, nvpb->size);
|
|
|
|
+ nouveau_fence_emit(nvpb->fence);
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_pushbuf_flush(struct nouveau_channel *chan, unsigned min)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_device_priv *nvdev = nouveau_device(chan->device);
|
|
|
|
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
|
|
|
|
+ struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
|
|
|
|
+ struct drm_nouveau_gem_pushbuf req;
|
|
|
|
+ unsigned i;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (nvpb->base.remaining == nvpb->size)
|
|
|
|
+ return 0;
|
|
|
|
+ nvpb->size -= nvpb->base.remaining;
|
|
|
|
+
|
|
|
|
+ if (nvdev->mm_enabled) {
|
|
|
|
+ req.channel = chan->id;
|
|
|
|
+ req.nr_dwords = nvpb->size;
|
|
|
|
+ req.dwords = (uint64_t)(unsigned long)nvpb->pushbuf;
|
|
|
|
+ req.nr_buffers = nvpb->nr_buffers;
|
|
|
|
+ req.buffers = (uint64_t)(unsigned long)nvpb->buffers;
|
|
|
|
+ req.nr_relocs = nvpb->nr_relocs;
|
|
|
|
+ req.relocs = (uint64_t)(unsigned long)nvpb->relocs;
|
|
|
|
+ ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_PUSHBUF,
|
|
|
|
+ &req, sizeof(req));
|
|
|
|
+ } else {
|
|
|
|
+ nouveau_fence_flush(chan);
|
|
|
|
+ ret = nouveau_pushbuf_flush_nomm(nvchan);
|
|
|
|
+ }
|
|
|
|
+ assert(ret == 0);
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+ /* Update presumed offset/domain for any buffers that moved.
|
|
|
|
+ * Dereference all buffers on validate list
|
|
|
|
+ */
|
|
|
|
+ for (i = 0; i < nvpb->nr_buffers; i++) {
|
|
|
|
+ struct drm_nouveau_gem_pushbuf_bo *pbbo = &nvpb->buffers[i];
|
|
|
|
+ struct nouveau_bo *bo = (void *)(unsigned long)pbbo->user_priv;
|
|
|
|
+
|
|
|
|
+ if (pbbo->presumed_ok == 0) {
|
|
|
|
+ nouveau_bo(bo)->domain = pbbo->presumed_domain;
|
|
|
|
+ nouveau_bo(bo)->offset = pbbo->presumed_offset;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ nouveau_bo(bo)->pending = NULL;
|
|
|
|
+ nouveau_bo_ref(NULL, &bo);
|
|
|
|
+ }
|
|
|
|
+ nvpb->nr_buffers = 0;
|
|
|
|
+ nvpb->nr_relocs = 0;
|
|
|
|
+
|
|
|
|
+ /* Allocate space for next push buffer */
|
|
|
|
+ ret = nouveau_pushbuf_space(chan, min);
|
|
|
|
+ assert(!ret);
|
|
|
|
+
|
|
|
|
+ if (chan->flush_notify)
|
|
|
|
+ chan->flush_notify(chan);
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_pushbuf.h libdrm-2.4.4/libdrm/nouveau/nouveau_pushbuf.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_pushbuf.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_pushbuf.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,160 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_PUSHBUF_H__
|
|
|
|
+#define __NOUVEAU_PUSHBUF_H__
|
|
|
|
+
|
|
|
|
+#include <assert.h>
|
|
|
|
+#include <string.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_bo.h"
|
|
|
|
+#include "nouveau_grobj.h"
|
|
|
|
+
|
|
|
|
+struct nouveau_pushbuf {
|
|
|
|
+ struct nouveau_channel *channel;
|
|
|
|
+
|
|
|
|
+ unsigned remaining;
|
|
|
|
+ uint32_t *cur;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_pushbuf_flush(struct nouveau_channel *, unsigned min);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_pushbuf_emit_reloc(struct nouveau_channel *, void *ptr,
|
|
|
|
+ struct nouveau_bo *, uint32_t data, uint32_t flags,
|
|
|
|
+ uint32_t vor, uint32_t tor);
|
|
|
|
+
|
|
|
|
+/* Push buffer access macros */
|
|
|
|
+static __inline__ void
|
|
|
|
+OUT_RING(struct nouveau_channel *chan, unsigned data)
|
|
|
|
+{
|
|
|
|
+ *(chan->pushbuf->cur++) = (data);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static __inline__ void
|
|
|
|
+OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned size)
|
|
|
|
+{
|
|
|
|
+ memcpy(chan->pushbuf->cur, data, size * 4);
|
|
|
|
+ chan->pushbuf->cur += size;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static __inline__ void
|
|
|
|
+OUT_RINGf(struct nouveau_channel *chan, float f)
|
|
|
|
+{
|
|
|
|
+ union { uint32_t i; float f; } c;
|
|
|
|
+ c.f = f;
|
|
|
|
+ OUT_RING(chan, c.i);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static __inline__ unsigned
|
|
|
|
+AVAIL_RING(struct nouveau_channel *chan)
|
|
|
|
+{
|
|
|
|
+ return chan->pushbuf->remaining;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static __inline__ void
|
|
|
|
+WAIT_RING(struct nouveau_channel *chan, unsigned size)
|
|
|
|
+{
|
|
|
|
+ if (chan->pushbuf->remaining < size)
|
|
|
|
+ nouveau_pushbuf_flush(chan, size);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static __inline__ void
|
|
|
|
+BEGIN_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr,
|
|
|
|
+ unsigned mthd, unsigned size)
|
|
|
|
+{
|
|
|
|
+ if (gr->bound == NOUVEAU_GROBJ_UNBOUND)
|
|
|
|
+ nouveau_grobj_autobind(gr);
|
|
|
|
+ chan->subc[gr->subc].sequence = chan->subc_sequence++;
|
|
|
|
+
|
|
|
|
+ WAIT_RING(chan, size + 1);
|
|
|
|
+ OUT_RING(chan, (gr->subc << 13) | (size << 18) | mthd);
|
|
|
|
+ chan->pushbuf->remaining -= (size + 1);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static __inline__ void
|
|
|
|
+FIRE_RING(struct nouveau_channel *chan)
|
|
|
|
+{
|
|
|
|
+ nouveau_pushbuf_flush(chan, 0);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static __inline__ void
|
|
|
|
+BIND_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr, unsigned sc)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_subchannel *subc = &gr->channel->subc[sc];
|
|
|
|
+
|
|
|
|
+ if (subc->gr) {
|
|
|
|
+ if (subc->gr->bound == NOUVEAU_GROBJ_BOUND_EXPLICIT)
|
|
|
|
+ assert(0);
|
|
|
|
+ subc->gr->bound = NOUVEAU_GROBJ_UNBOUND;
|
|
|
|
+ }
|
|
|
|
+ subc->gr = gr;
|
|
|
|
+ subc->gr->subc = sc;
|
|
|
|
+ subc->gr->bound = NOUVEAU_GROBJ_BOUND_EXPLICIT;
|
|
|
|
+
|
|
|
|
+ BEGIN_RING(chan, gr, 0x0000, 1);
|
|
|
|
+ OUT_RING (chan, gr->handle);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static __inline__ void
|
|
|
|
+OUT_RELOC(struct nouveau_channel *chan, struct nouveau_bo *bo,
|
|
|
|
+ unsigned data, unsigned flags, unsigned vor, unsigned tor)
|
|
|
|
+{
|
|
|
|
+ nouveau_pushbuf_emit_reloc(chan, chan->pushbuf->cur++, bo,
|
|
|
|
+ data, flags, vor, tor);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+/* Raw data + flags depending on FB/TT buffer */
|
|
|
|
+static __inline__ void
|
|
|
|
+OUT_RELOCd(struct nouveau_channel *chan, struct nouveau_bo *bo,
|
|
|
|
+ unsigned data, unsigned flags, unsigned vor, unsigned tor)
|
|
|
|
+{
|
|
|
|
+ OUT_RELOC(chan, bo, data, flags | NOUVEAU_BO_OR, vor, tor);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+/* FB/TT object handle */
|
|
|
|
+static __inline__ void
|
|
|
|
+OUT_RELOCo(struct nouveau_channel *chan, struct nouveau_bo *bo,
|
|
|
|
+ unsigned flags)
|
|
|
|
+{
|
|
|
|
+ OUT_RELOC(chan, bo, 0, flags | NOUVEAU_BO_OR,
|
|
|
|
+ chan->vram->handle, chan->gart->handle);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+/* Low 32-bits of offset */
|
|
|
|
+static __inline__ void
|
|
|
|
+OUT_RELOCl(struct nouveau_channel *chan, struct nouveau_bo *bo,
|
|
|
|
+ unsigned delta, unsigned flags)
|
|
|
|
+{
|
|
|
|
+ OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_LOW, 0, 0);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+/* High 32-bits of offset */
|
|
|
|
+static __inline__ void
|
|
|
|
+OUT_RELOCh(struct nouveau_channel *chan, struct nouveau_bo *bo,
|
|
|
|
+ unsigned delta, unsigned flags)
|
|
|
|
+{
|
|
|
|
+ OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_HIGH, 0, 0);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_resource.c libdrm-2.4.4/libdrm/nouveau/nouveau_resource.c
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_resource.c 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_resource.c 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,115 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#include <stdlib.h>
|
|
|
|
+#include <errno.h>
|
|
|
|
+
|
|
|
|
+#include "nouveau_private.h"
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_resource_init(struct nouveau_resource **heap,
|
|
|
|
+ unsigned start, unsigned size)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_resource *r;
|
|
|
|
+
|
|
|
|
+ r = calloc(1, sizeof(struct nouveau_resource));
|
|
|
|
+ if (!r)
|
|
|
|
+ return 1;
|
|
|
|
+
|
|
|
|
+ r->start = start;
|
|
|
|
+ r->size = size;
|
|
|
|
+ *heap = r;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_resource_alloc(struct nouveau_resource *heap, int size, void *priv,
|
|
|
|
+ struct nouveau_resource **res)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_resource *r;
|
|
|
|
+
|
|
|
|
+ if (!heap || !size || !res || *res)
|
|
|
|
+ return 1;
|
|
|
|
+
|
|
|
|
+ while (heap) {
|
|
|
|
+ if (!heap->in_use && heap->size >= size) {
|
|
|
|
+ r = calloc(1, sizeof(struct nouveau_resource));
|
|
|
|
+ if (!r)
|
|
|
|
+ return 1;
|
|
|
|
+
|
|
|
|
+ r->start = (heap->start + heap->size) - size;
|
|
|
|
+ r->size = size;
|
|
|
|
+ r->in_use = 1;
|
|
|
|
+ r->priv = priv;
|
|
|
|
+
|
|
|
|
+ heap->size -= size;
|
|
|
|
+
|
|
|
|
+ r->next = heap->next;
|
|
|
|
+ if (heap->next)
|
|
|
|
+ heap->next->prev = r;
|
|
|
|
+ r->prev = heap;
|
|
|
|
+ heap->next = r;
|
|
|
|
+
|
|
|
|
+ *res = r;
|
|
|
|
+ return 0;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ heap = heap->next;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return 1;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_resource_free(struct nouveau_resource **res)
|
|
|
|
+{
|
|
|
|
+ struct nouveau_resource *r;
|
|
|
|
+
|
|
|
|
+ if (!res || !*res)
|
|
|
|
+ return;
|
|
|
|
+ r = *res;
|
|
|
|
+ *res = NULL;
|
|
|
|
+
|
|
|
|
+ r->in_use = 0;
|
|
|
|
+
|
|
|
|
+ if (r->next && !r->next->in_use) {
|
|
|
|
+ struct nouveau_resource *new = r->next;
|
|
|
|
+
|
|
|
|
+ new->prev = r->prev;
|
|
|
|
+ if (r->prev)
|
|
|
|
+ r->prev->next = new;
|
|
|
|
+ new->size += r->size;
|
|
|
|
+ new->start = r->start;
|
|
|
|
+
|
|
|
|
+ free(r);
|
|
|
|
+ r = new;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (r->prev && !r->prev->in_use) {
|
|
|
|
+ r->prev->next = r->next;
|
|
|
|
+ if (r->next)
|
|
|
|
+ r->next->prev = r->prev;
|
|
|
|
+ r->prev->size += r->size;
|
|
|
|
+ free(r);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+}
|
|
|
|
diff -Nur libdrm-2.4.4.orig/libdrm/nouveau/nouveau_resource.h libdrm-2.4.4/libdrm/nouveau/nouveau_resource.h
|
|
|
|
--- libdrm-2.4.4.orig/libdrm/nouveau/nouveau_resource.h 1970-01-01 10:00:00.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/libdrm/nouveau/nouveau_resource.h 2009-02-05 15:19:56.000000000 +1000
|
|
|
|
@@ -0,0 +1,48 @@
|
|
|
|
+/*
|
|
|
|
+ * Copyright 2007 Nouveau Project
|
|
|
|
+ *
|
|
|
|
+ * Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
+ * copy of this software and associated documentation files (the "Software"),
|
|
|
|
+ * to deal in the Software without restriction, including without limitation
|
|
|
|
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
+ * and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
+ * Software is furnished to do so, subject to the following conditions:
|
|
|
|
+ *
|
|
|
|
+ * The above copyright notice and this permission notice shall be included in
|
|
|
|
+ * all copies or substantial portions of the Software.
|
|
|
|
+ *
|
|
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
|
|
|
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
|
|
+ * SOFTWARE.
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+#ifndef __NOUVEAU_RESOURCE_H__
|
|
|
|
+#define __NOUVEAU_RESOURCE_H__
|
|
|
|
+
|
|
|
|
+struct nouveau_resource {
|
|
|
|
+ struct nouveau_resource *prev;
|
|
|
|
+ struct nouveau_resource *next;
|
|
|
|
+
|
|
|
|
+ int in_use;
|
|
|
|
+ void *priv;
|
|
|
|
+
|
|
|
|
+ unsigned int start;
|
|
|
|
+ unsigned int size;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_resource_init(struct nouveau_resource **heap, unsigned start,
|
|
|
|
+ unsigned size);
|
|
|
|
+
|
|
|
|
+int
|
|
|
|
+nouveau_resource_alloc(struct nouveau_resource *heap, int size, void *priv,
|
|
|
|
+ struct nouveau_resource **);
|
|
|
|
+
|
|
|
|
+void
|
|
|
|
+nouveau_resource_free(struct nouveau_resource **);
|
|
|
|
+
|
|
|
|
+#endif
|
|
|
|
diff -Nur libdrm-2.4.4.orig/shared-core/nouveau_drm.h libdrm-2.4.4/shared-core/nouveau_drm.h
|
|
|
|
--- libdrm-2.4.4.orig/shared-core/nouveau_drm.h 2008-10-10 05:02:11.000000000 +1000
|
|
|
|
+++ libdrm-2.4.4/shared-core/nouveau_drm.h 2009-02-05 15:19:39.000000000 +1000
|
|
|
|
@@ -25,13 +25,26 @@
|
|
|
|
#ifndef __NOUVEAU_DRM_H__
|
|
|
|
#define __NOUVEAU_DRM_H__
|
|
|
|
|
|
|
|
-#define NOUVEAU_DRM_HEADER_PATCHLEVEL 11
|
|
|
|
+#define NOUVEAU_DRM_HEADER_PATCHLEVEL 12
|
|
|
|
|
|
|
|
struct drm_nouveau_channel_alloc {
|
|
|
|
uint32_t fb_ctxdma_handle;
|
|
|
|
uint32_t tt_ctxdma_handle;
|
|
|
|
|
|
|
|
int channel;
|
|
|
|
+
|
|
|
|
+ /* Notifier memory */
|
|
|
|
+ drm_handle_t notifier;
|
|
|
|
+ int notifier_size;
|
|
|
|
+
|
|
|
|
+ /* DRM-enforced subchannel assignments */
|
|
|
|
+ struct {
|
|
|
|
+ uint32_t handle;
|
|
|
|
+ uint32_t grclass;
|
|
|
|
+ } subchan[8];
|
|
|
|
+ uint32_t nr_subchan;
|
|
|
|
+
|
|
|
|
+/* !MM_ENABLED ONLY */
|
|
|
|
uint32_t put_base;
|
|
|
|
/* FIFO control regs */
|
|
|
|
drm_handle_t ctrl;
|
|
|
|
@@ -39,9 +52,6 @@
|
|
|
|
/* DMA command buffer */
|
|
|
|
drm_handle_t cmdbuf;
|
|
|
|
int cmdbuf_size;
|
|
|
|
- /* Notifier memory */
|
|
|
|
- drm_handle_t notifier;
|
|
|
|
- int notifier_size;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct drm_nouveau_channel_free {
|
|
|
|
@@ -126,6 +136,8 @@
|
|
|
|
#define NOUVEAU_GETPARAM_AGP_SIZE 9
|
|
|
|
#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10
|
|
|
|
#define NOUVEAU_GETPARAM_CHIPSET_ID 11
|
|
|
|
+#define NOUVEAU_GETPARAM_MM_ENABLED 12
|
|
|
|
+#define NOUVEAU_GETPARAM_VM_VRAM_BASE 13
|
|
|
|
struct drm_nouveau_getparam {
|
|
|
|
uint64_t param;
|
|
|
|
uint64_t value;
|
|
|
|
@@ -138,6 +150,100 @@
|
|
|
|
uint64_t value;
|
|
|
|
};
|
|
|
|
|
|
|
|
+#define NOUVEAU_GEM_DOMAIN_CPU (1 << 0)
|
|
|
|
+#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1)
|
|
|
|
+#define NOUVEAU_GEM_DOMAIN_GART (1 << 2)
|
|
|
|
+#define NOUVEAU_GEM_DOMAIN_NOMAP (1 << 3)
|
|
|
|
+#define NOUVEAU_GEM_DOMAIN_TILE (1 << 30)
|
|
|
|
+#define NOUVEAU_GEM_DOMAIN_TILE_ZETA (1 << 31)
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_new {
|
|
|
|
+ uint64_t size;
|
|
|
|
+ uint32_t channel_hint;
|
|
|
|
+ uint32_t align;
|
|
|
|
+ uint32_t handle;
|
|
|
|
+ uint32_t domain;
|
|
|
|
+ uint32_t offset;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_pushbuf_bo {
|
|
|
|
+ uint64_t user_priv;
|
|
|
|
+ uint32_t handle;
|
|
|
|
+ uint32_t read_domains;
|
|
|
|
+ uint32_t write_domains;
|
|
|
|
+ uint32_t valid_domains;
|
|
|
|
+ uint32_t presumed_ok;
|
|
|
|
+ uint32_t presumed_domain;
|
|
|
|
+ uint64_t presumed_offset;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+#define NOUVEAU_GEM_RELOC_LOW (1 << 0)
|
|
|
|
+#define NOUVEAU_GEM_RELOC_HIGH (1 << 1)
|
|
|
|
+#define NOUVEAU_GEM_RELOC_OR (1 << 2)
|
|
|
|
+struct drm_nouveau_gem_pushbuf_reloc {
|
|
|
|
+ uint32_t bo_index;
|
|
|
|
+ uint32_t reloc_index;
|
|
|
|
+ uint32_t flags;
|
|
|
|
+ uint32_t data;
|
|
|
|
+ uint32_t vor;
|
|
|
|
+ uint32_t tor;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+#define NOUVEAU_GEM_MAX_BUFFERS 1024
|
|
|
|
+#define NOUVEAU_GEM_MAX_RELOCS 1024
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_pushbuf {
|
|
|
|
+ uint32_t channel;
|
|
|
|
+ uint32_t nr_dwords;
|
|
|
|
+ uint32_t nr_buffers;
|
|
|
|
+ uint32_t nr_relocs;
|
|
|
|
+ uint64_t dwords;
|
|
|
|
+ uint64_t buffers;
|
|
|
|
+ uint64_t relocs;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_pushbuf_call {
|
|
|
|
+ uint32_t channel;
|
|
|
|
+ uint32_t handle;
|
|
|
|
+ uint32_t offset;
|
|
|
|
+ uint32_t nr_buffers;
|
|
|
|
+ uint32_t nr_relocs;
|
|
|
|
+ uint32_t pad0;
|
|
|
|
+ uint64_t buffers;
|
|
|
|
+ uint64_t relocs;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_pin {
|
|
|
|
+ uint32_t handle;
|
|
|
|
+ uint32_t domain;
|
|
|
|
+ uint64_t offset;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_unpin {
|
|
|
|
+ uint32_t handle;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_mmap {
|
|
|
|
+ uint32_t handle;
|
|
|
|
+ uint32_t pad;
|
|
|
|
+ uint64_t vaddr;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_cpu_prep {
|
|
|
|
+ uint32_t handle;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_cpu_fini {
|
|
|
|
+ uint32_t handle;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct drm_nouveau_gem_tile {
|
|
|
|
+ uint32_t handle;
|
|
|
|
+ uint32_t delta;
|
|
|
|
+ uint32_t size;
|
|
|
|
+ uint32_t flags;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
enum nouveau_card_type {
|
|
|
|
NV_UNKNOWN =0,
|
|
|
|
NV_04 =4,
|
|
|
|
@@ -180,5 +286,14 @@
|
|
|
|
#define DRM_NOUVEAU_MEM_TILE 0x0a
|
|
|
|
#define DRM_NOUVEAU_SUSPEND 0x0b
|
|
|
|
#define DRM_NOUVEAU_RESUME 0x0c
|
|
|
|
+#define DRM_NOUVEAU_GEM_NEW 0x40
|
|
|
|
+#define DRM_NOUVEAU_GEM_PUSHBUF 0x41
|
|
|
|
+#define DRM_NOUVEAU_GEM_PUSHBUF_CALL 0x42
|
|
|
|
+#define DRM_NOUVEAU_GEM_PIN 0x43
|
|
|
|
+#define DRM_NOUVEAU_GEM_UNPIN 0x44
|
|
|
|
+#define DRM_NOUVEAU_GEM_MMAP 0x45
|
|
|
|
+#define DRM_NOUVEAU_GEM_CPU_PREP 0x46
|
|
|
|
+#define DRM_NOUVEAU_GEM_CPU_FINI 0x47
|
|
|
|
+#define DRM_NOUVEAU_GEM_TILE 0x48
|
|
|
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#endif /* __NOUVEAU_DRM_H__ */
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