207 lines
6.7 KiB
Diff
207 lines
6.7 KiB
Diff
From patchwork Thu Jun 1 14:14:16 2017
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [v4,1/2] clk: bcm2835: Limit PCM clock to OSC and PLLD_PER
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From: Phil Elwell <phil@raspberrypi.org>
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X-Patchwork-Id: 9759641
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Message-Id: <8cc0ba82-d33e-127b-7b86-ac595ef416d1@raspberrypi.org>
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To: Michael Turquette <mturquette@baylibre.com>,
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Stephen Boyd <sboyd@codeaurora.org>, Eric Anholt <eric@anholt.net>,
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Stefan Wahren <stefan.wahren@i2se.com>,
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Florian Fainelli <f.fainelli@gmail.com>,
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linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org,
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linux-kernel@vger.kernel.org
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Date: Thu, 1 Jun 2017 15:14:16 +0100
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Restrict clock sources for the PCM peripheral to the oscillator and
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PLLD_PER because other source may have varying rates or be switched off.
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Prevent other sources from being selected by replacing their names in
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the list of potential parents with dummy entries (entry index is
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significant).
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
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---
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drivers/clk/bcm/clk-bcm2835.c | 27 ++++++++++++++++++++++++++-
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1 file changed, 26 insertions(+), 1 deletion(-)
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diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
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index 0258538..49867d2 100644
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -1516,6 +1516,31 @@ struct bcm2835_clk_desc {
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.parents = bcm2835_clock_per_parents, \
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__VA_ARGS__)
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+/*
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+ * Restrict clock sources for the PCM peripheral to the oscillator and
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+ * PLLD_PER because other source may have varying rates or be switched
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+ * off.
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+ *
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+ * Prevent other sources from being selected by replacing their names in
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+ * the list of potential parents with dummy entries (entry index is
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+ * significant).
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+ */
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+static const char *const bcm2835_pcm_per_parents[] = {
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+ "-",
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+ "xosc",
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+ "-",
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+ "-",
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+ "-",
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+ "-",
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+ "plld_per",
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+ "-",
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+};
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+
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+#define REGISTER_PCM_CLK(...) REGISTER_CLK( \
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+ .num_mux_parents = ARRAY_SIZE(bcm2835_pcm_per_parents), \
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+ .parents = bcm2835_pcm_per_parents, \
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+ __VA_ARGS__)
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+
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/* main vpu parent mux */
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static const char *const bcm2835_clock_vpu_parents[] = {
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"gnd",
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@@ -1993,7 +2018,7 @@ struct bcm2835_clk_desc {
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.int_bits = 4,
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.frac_bits = 8,
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.tcnt_mux = 22),
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- [BCM2835_CLOCK_PCM] = REGISTER_PER_CLK(
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+ [BCM2835_CLOCK_PCM] = REGISTER_PCM_CLK(
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.name = "pcm",
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.ctl_reg = CM_PCMCTL,
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.div_reg = CM_PCMDIV,
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From patchwork Thu Jun 1 14:14:22 2017
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [v4,2/2] clk: bcm2835: Minimise clock jitter for PCM clock
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From: Phil Elwell <phil@raspberrypi.org>
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X-Patchwork-Id: 9759643
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Message-Id: <9989244b-ca4d-9081-95d9-b24f51099222@raspberrypi.org>
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To: Michael Turquette <mturquette@baylibre.com>,
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Stephen Boyd <sboyd@codeaurora.org>, Eric Anholt <eric@anholt.net>,
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Stefan Wahren <stefan.wahren@i2se.com>,
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Florian Fainelli <f.fainelli@gmail.com>,
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linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org,
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linux-kernel@vger.kernel.org
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Date: Thu, 1 Jun 2017 15:14:22 +0100
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Fractional clock dividers generate accurate average frequencies but
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with jitter, particularly when the integer divisor is small.
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Introduce a new metric of clock accuracy to penalise clocks with a good
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average but worse jitter compared to clocks with an average which is no
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better but with lower jitter. The metric is the ideal rate minus the
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worse deviation from that ideal using the nearest integer divisors.
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Use this metric for parent selection for clocks requiring low jitter
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(currently just PCM).
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
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---
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drivers/clk/bcm/clk-bcm2835.c | 34 +++++++++++++++++++++++++++++-----
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1 file changed, 29 insertions(+), 5 deletions(-)
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diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
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index 49867d2..0bc56a0 100644
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -530,6 +530,7 @@ struct bcm2835_clock_data {
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bool is_vpu_clock;
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bool is_mash_clock;
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+ bool low_jitter;
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u32 tcnt_mux;
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};
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@@ -1124,7 +1125,8 @@ static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw,
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int parent_idx,
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unsigned long rate,
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u32 *div,
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- unsigned long *prate)
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+ unsigned long *prate,
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+ unsigned long *avgrate)
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{
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struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
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struct bcm2835_cprman *cprman = clock->cprman;
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@@ -1139,8 +1141,25 @@ static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw,
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*prate = clk_hw_get_rate(parent);
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*div = bcm2835_clock_choose_div(hw, rate, *prate, true);
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- return bcm2835_clock_rate_from_divisor(clock, *prate,
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- *div);
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+ *avgrate = bcm2835_clock_rate_from_divisor(clock, *prate, *div);
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+
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+ if (data->low_jitter && (*div & CM_DIV_FRAC_MASK)) {
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+ unsigned long high, low;
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+ u32 int_div = *div & ~CM_DIV_FRAC_MASK;
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+
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+ high = bcm2835_clock_rate_from_divisor(clock, *prate,
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+ int_div);
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+ int_div += CM_DIV_FRAC_MASK + 1;
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+ low = bcm2835_clock_rate_from_divisor(clock, *prate,
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+ int_div);
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+
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+ /*
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+ * Return a value which is the maximum deviation
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+ * below the ideal rate, for use as a metric.
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+ */
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+ return *avgrate - max(*avgrate - low, high - *avgrate);
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+ }
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+ return *avgrate;
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}
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if (data->frac_bits)
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@@ -1167,6 +1186,7 @@ static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw,
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*div = curdiv << CM_DIV_FRAC_BITS;
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*prate = curdiv * best_rate;
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+ *avgrate = best_rate;
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return best_rate;
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}
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@@ -1178,6 +1198,7 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
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bool current_parent_is_pllc;
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unsigned long rate, best_rate = 0;
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unsigned long prate, best_prate = 0;
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+ unsigned long avgrate, best_avgrate = 0;
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size_t i;
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u32 div;
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@@ -1202,11 +1223,13 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
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continue;
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rate = bcm2835_clock_choose_div_and_prate(hw, i, req->rate,
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- &div, &prate);
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+ &div, &prate,
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+ &avgrate);
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if (rate > best_rate && rate <= req->rate) {
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best_parent = parent;
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best_prate = prate;
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best_rate = rate;
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+ best_avgrate = avgrate;
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}
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}
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@@ -1216,7 +1239,7 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
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req->best_parent_hw = best_parent;
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req->best_parent_rate = best_prate;
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- req->rate = best_rate;
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+ req->rate = best_avgrate;
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return 0;
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}
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@@ -2025,6 +2048,7 @@ struct bcm2835_clk_desc {
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.int_bits = 12,
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.frac_bits = 12,
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.is_mash_clock = true,
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+ .low_jitter = true,
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.tcnt_mux = 23),
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[BCM2835_CLOCK_PWM] = REGISTER_PER_CLK(
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.name = "pwm",
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