112 lines
3.5 KiB
Diff
112 lines
3.5 KiB
Diff
From 34d3d5458f58c88954bb3087219610f35e2b5c37 Mon Sep 17 00:00:00 2001
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From: "Borislav Petkov (AMD)" <bp@alien8.de>
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Date: Thu, 26 Jan 2023 16:26:17 +0100
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Subject: [PATCH 23/36] x86/microcode/AMD: Fix mixed steppings support
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The AMD side of the loader has always claimed to support mixed
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steppings. But somewhere along the way, it broke that by assuming that
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the cached patch blob is a single one instead of it being one per
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*node*.
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So turn it into a per-node one so that each node can stash the blob
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relevant for it.
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[ NB: Fixes tag is not really the exactly correct one but it is good
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enough. ]
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Fixes: fe055896c040 ("x86/microcode: Merge the early microcode loader")
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Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
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Cc: <stable@kernel.org> # 2355370cd941 ("x86/microcode/amd: Remove load_microcode_amd()'s bsp parameter")
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Cc: <stable@kernel.org> # a5ad92134bd1 ("x86/microcode/AMD: Add a @cpu parameter to the reloading functions")
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Link: https://lore.kernel.org/r/20230130161709.11615-4-bp@alien8.de
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(cherry picked from commit 7ff6edf4fef38ab404ee7861f257e28eaaeed35f)
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CVE: CVE-2023-20593
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Signed-off-by: Mridula Shastry <mridula.c.shastry@oracle.com>
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Reviewed-by: Todd Vierling <todd.vierling@oracle.com>
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---
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arch/x86/kernel/cpu/microcode/amd.c | 34 ++++++++++++++++++-----------
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1 file changed, 21 insertions(+), 13 deletions(-)
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diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
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index 030f69f93c00..d1d31011b8fa 100644
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--- a/arch/x86/kernel/cpu/microcode/amd.c
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+++ b/arch/x86/kernel/cpu/microcode/amd.c
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@@ -55,7 +55,9 @@ struct cont_desc {
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};
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static u32 ucode_new_rev;
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-static u8 amd_ucode_patch[PATCH_MAX_SIZE];
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+
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+/* One blob per node. */
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+static u8 amd_ucode_patch[MAX_NUMNODES][PATCH_MAX_SIZE];
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/*
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* Microcode patch container file is prepended to the initrd in cpio
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@@ -428,7 +430,7 @@ static bool early_apply_microcode(u32 cpuid_1_eax, void *ucode, size_t size, boo
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patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);
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#else
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new_rev = &ucode_new_rev;
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- patch = &amd_ucode_patch;
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+ patch = &amd_ucode_patch[0];
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#endif
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desc.cpuid_1_eax = cpuid_1_eax;
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@@ -574,10 +576,10 @@ int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax)
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void reload_ucode_amd(unsigned int cpu)
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{
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- struct microcode_amd *mc;
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u32 rev, dummy __always_unused;
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+ struct microcode_amd *mc;
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- mc = (struct microcode_amd *)amd_ucode_patch;
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+ mc = (struct microcode_amd *)amd_ucode_patch[cpu_to_node(cpu)];
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rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
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@@ -846,6 +848,8 @@ static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
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static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size)
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{
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+ struct cpuinfo_x86 *c;
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+ unsigned int nid, cpu;
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struct ucode_patch *p;
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enum ucode_state ret;
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@@ -858,18 +862,22 @@ static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t siz
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return ret;
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}
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- p = find_patch(0);
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- if (!p) {
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- return ret;
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- } else {
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- if (boot_cpu_data.microcode >= p->patch_id)
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- return ret;
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+ for_each_node(nid) {
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+ cpu = cpumask_first(cpumask_of_node(nid));
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+ c = &cpu_data(cpu);
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+
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+ p = find_patch(cpu);
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+ if (!p)
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+ continue;
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+
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+ if (c->microcode >= p->patch_id)
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+ continue;
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ret = UCODE_NEW;
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- }
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- memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
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- memcpy(amd_ucode_patch, p->data, min_t(u32, p->size, PATCH_MAX_SIZE));
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+ memset(&amd_ucode_patch[nid], 0, PATCH_MAX_SIZE);
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+ memcpy(&amd_ucode_patch[nid], p->data, min_t(u32, p->size, PATCH_MAX_SIZE));
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+ }
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return ret;
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}
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--
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2.39.3
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