107 lines
3.7 KiB
Diff
107 lines
3.7 KiB
Diff
From 9cc01dc772e684b7864d8c8a1f526035c991aa76 Mon Sep 17 00:00:00 2001
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From: Borislav Petkov <bp@suse.de>
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Date: Wed, 25 May 2022 18:12:30 +0200
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Subject: [PATCH 05/36] x86/microcode: Default-disable late loading
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It is dangerous and it should not be used anyway - there's a nice early
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loading already.
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Requested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
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Signed-off-by: Borislav Petkov <bp@suse.de>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Link: https://lore.kernel.org/r/20220525161232.14924-3-bp@alien8.de
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(cherry picked from commit a77a94f86273ce42a39cb479217dd8d68acfe0ff)
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Signed-off-by: Mridula Shastry <mridula.c.shastry@oracle.com>
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Reviewed-by: Todd Vierling <todd.vierling@oracle.com>
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---
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arch/x86/Kconfig | 11 +++++++++++
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arch/x86/kernel/cpu/common.c | 2 ++
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arch/x86/kernel/cpu/microcode/core.c | 7 ++++++-
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3 files changed, 19 insertions(+), 1 deletion(-)
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diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
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index b9bcde5c538f..5af5427c50ae 100644
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--- a/arch/x86/Kconfig
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+++ b/arch/x86/Kconfig
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@@ -1360,6 +1360,17 @@ config MICROCODE_AMD
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If you select this option, microcode patch loading support for AMD
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processors will be enabled.
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+config MICROCODE_LATE_LOADING
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+ bool "Late microcode loading (DANGEROUS)"
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+ default n
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+ depends on MICROCODE
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+ help
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+ Loading microcode late, when the system is up and executing instructions
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+ is a tricky business and should be avoided if possible. Just the sequence
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+ of synchronizing all cores and SMT threads is one fragile dance which does
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+ not guarantee that cores might not softlock after the loading. Therefore,
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+ use this at your own risk. Late loading taints the kernel too.
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+
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config X86_MSR
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tristate "/dev/cpu/*/msr - Model-specific register support"
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---help---
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diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
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index f59edeef14eb..7be057c7531c 100644
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--- a/arch/x86/kernel/cpu/common.c
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+++ b/arch/x86/kernel/cpu/common.c
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@@ -2145,6 +2145,7 @@ void cpu_init_secondary(void)
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}
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#endif
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+#ifdef CONFIG_MICROCODE_LATE_LOADING
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/*
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* The microcode loader calls this upon late microcode load to recheck features,
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* only when microcode has been updated. Caller holds microcode_mutex and CPU
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@@ -2174,6 +2175,7 @@ void microcode_check(void)
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pr_warn("x86/CPU: CPU features have changed after loading microcode, but might not take effect.\n");
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pr_warn("x86/CPU: Please consider either early loading through initrd/built-in or a potential BIOS update.\n");
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}
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+#endif
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/*
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* Invoked from core CPU hotplug code after hotplug operations
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diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
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index bbc262a5fc0d..c4d19f4b7afb 100644
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--- a/arch/x86/kernel/cpu/microcode/core.c
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+++ b/arch/x86/kernel/cpu/microcode/core.c
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@@ -395,6 +395,7 @@ static int apply_microcode_on_target(int cpu)
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/* fake device for request_firmware */
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static struct platform_device *microcode_pdev;
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+#ifdef CONFIG_MICROCODE_LATE_LOADING
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/*
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* Late loading dance. Why the heavy-handed stomp_machine effort?
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*
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@@ -563,6 +564,9 @@ put:
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return ret;
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}
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+static DEVICE_ATTR_WO(reload);
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+#endif
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+
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static ssize_t version_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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@@ -579,7 +583,6 @@ static ssize_t pf_show(struct device *dev,
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return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
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}
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-static DEVICE_ATTR_WO(reload);
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static DEVICE_ATTR(version, 0444, version_show, NULL);
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static DEVICE_ATTR(processor_flags, 0444, pf_show, NULL);
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@@ -732,7 +735,9 @@ static int mc_cpu_down_prep(unsigned int cpu)
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}
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static struct attribute *cpu_root_microcode_attrs[] = {
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+#ifdef CONFIG_MICROCODE_LATE_LOADING
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&dev_attr_reload.attr,
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+#endif
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NULL
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};
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--
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2.39.3
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