java-1.8.0-openjdk/jdk8160748-aarch64_ideal_reg.patch
Andrew John Hughes e0121aeccf Update to aarch64-shenandoah-jdk8u192-b12.
Remove patches included upstream
 - JDK-8031668/PR2842
 - JDK-8148351/PR2842
 - JDK-6260348/PR3066
 - JDK-8061305/PR3335/RH1423421
 - JDK-8188030/PR3459/RH1484079
 - JDK-8205104/PR3539/RH1548475
 - JDK-8185723/PR3553
 - JDK-8186461/PR3557
 - JDK-8201509/PR3579
 - JDK-8075942/PR3602
 - JDK-8203182/PR3603
 - JDK-8206406/PR3610/RH1597825
 - JDK-8206425
 - JDK-8036003
 - JDK-8201495/PR2415
 - JDK-8150954/PR2866/RH1176206
Re-generate patches (mostly due to upstream build changes)
 - JDK-8073139/PR1758/RH1191652
 - JDK-8143245/PR3548 (due to JDK-8202600)
 - JDK-8197429/PR3546/RH1536622 (due to JDK-8189170)
 - JDK-8199936/PR3533
 - JDK-8199936/PR3591
 - JDK-8207057/PR3613
 - JDK-8210761/RH1632174 (due to JDK-8207402)
 - PR3559 (due to JDK-8185723/JDK-8186461/JDK-8201509)
 - PR3593 (due to JDK-8081202)
 - RH1566890/CVE-2018-3639 (due to JDK-8189170)
 - RH1649664 (due to JDK-8196516)
2019-01-30 14:56:30 +00:00

40 lines
1.2 KiB
Diff

# HG changeset patch
# User kbarrett
# Date 1547614745 0
# Wed Jan 16 04:59:05 2019 +0000
# Node ID bca8195a3bc70df281a73d9a40032c673971676c
# Parent 09abae195e9a7e134a1cfd9b375a6f4d95091de7
8160748: [AArch64] Inconsistent types for ideal_reg
Summary: Made ideal_reg consistently uint.
Reviewed-by: kvn, iveresov
diff --git openjdk.orig/hotspot/src/cpu/aarch64/vm/aarch64.ad openjdk/hotspot/src/cpu/aarch64/vm/aarch64.ad
--- openjdk.orig/hotspot/src/cpu/aarch64/vm/aarch64.ad
+++ openjdk/hotspot/src/cpu/aarch64/vm/aarch64.ad
@@ -1,6 +1,6 @@
//
+// Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
// Copyright (c) 2013, Red Hat Inc.
-// Copyright (c) 2003, 2012, Oracle and/or its affiliates.
// All rights reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
@@ -3449,7 +3449,7 @@
}
// Vector ideal reg.
-const int Matcher::vector_ideal_reg(int len) {
+const uint Matcher::vector_ideal_reg(int len) {
switch(len) {
case 8: return Op_VecD;
case 16: return Op_VecX;
@@ -3458,7 +3458,7 @@
return 0;
}
-const int Matcher::vector_shift_count_ideal_reg(int size) {
+const uint Matcher::vector_shift_count_ideal_reg(int size) {
return Op_VecX;
}