glibc/SOURCES/glibc-upstream-2.34-55.patch
2022-03-01 13:08:25 +00:00

38 lines
1.2 KiB
Diff

commit 4db172a54d43f9b7fd17e66fc44a34efb3cab1e1
Author: Xi Ruoyao <xry111@mengyan1223.wang>
Date: Fri Aug 13 16:01:14 2021 +0000
mips: increase stack alignment in clone to match the ABI
In "mips: align stack in clone [BZ #28223]"
(commit 1f51cd9a860ee45eee8a56fb2ba925267a2a7bfe) I made a mistake: I
misbelieved one "word" was 2-byte and "doubleword" should be 4-byte.
But in MIPS ABI one "word" is defined 32-bit (4-byte), so "doubleword" is
8-byte [1], and "quadword" is 16-byte [2].
[1]: "System V Application Binary Interface: MIPS(R) RISC Processor
Supplement, 3rd edition", page 3-31
[2]: "MIPSpro(TM) 64-Bit Porting and Transition Guide", page 23
(cherry picked from commit 0f62fe053273ff6c62ac95c59b7687c964737b00)
diff --git a/sysdeps/unix/sysv/linux/mips/clone.S b/sysdeps/unix/sysv/linux/mips/clone.S
index 43a5ad3a400d9504..fd71b5ca2eb86089 100644
--- a/sysdeps/unix/sysv/linux/mips/clone.S
+++ b/sysdeps/unix/sysv/linux/mips/clone.S
@@ -55,11 +55,11 @@ NESTED(__clone,4*SZREG,sp)
.set at
#endif
- /* Align stack to 4/8 bytes per the ABI. */
+ /* Align stack to 8/16 bytes per the ABI. */
#if _MIPS_SIM == _ABIO32
- li t0,-4
-#else
li t0,-8
+#else
+ li t0,-16
#endif
and a1,a1,t0