c2879fd933
* Thu Jan 13 2022 Florian Weimer <fweimer@redhat.com> - 2.34-18 - Backport optimized ELF dependency sorting algorithm (#2032647) * Thu Jan 13 2022 Florian Weimer <fweimer@redhat.com> - 2.34-17 - Sync with upstream branch release/2.34/master, commit 2fe2af88abd13ae5636881da2e26f461ecb7dfb5 - i386: Remove broken CAN_USE_REGISTER_ASM_EBP (bug 28771) - Update syscall lists for Linux 5.15 - powerpc: Fix unrecognized instruction errors with recent GCC - timezone: test-case for BZ #28707 - timezone: handle truncated timezones from tzcode-2021d and later (BZ #28707) - Fix subscript error with odd TZif file [BZ #28338] - AArch64: Check for SVE in ifuncs [BZ #28744] - intl/plural.y: Avoid conflicting declarations of yyerror and yylex - Linux: Fix 32-bit vDSO for clock_gettime on powerpc32 - linux: Add sparck brk implementation - Update sparc libm-test-ulps - Update hppa libm-test-ulps - riscv: align stack before calling _dl_init [BZ #28703] - riscv: align stack in clone [BZ #28702] - powerpc64[le]: Allocate extra stack frame on syscall.S - elf: Fix tst-cpu-features-cpuinfo for KVM guests on some AMD systems [BZ #28704] - nss: Use "files dns" as the default for the hosts database (bug 28700) - arm: Guard ucontext _rtld_global_ro access by SHARED, not PIC macro - mips: increase stack alignment in clone to match the ABI - mips: align stack in clone [BZ #28223] Resolves: #2032647 Resolves: #2033649
40 lines
1.7 KiB
Diff
40 lines
1.7 KiB
Diff
commit e64235ff4266e87b20505101877fe57350ab69ab
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Author: Paul A. Clarke <pc@us.ibm.com>
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Date: Tue Sep 14 13:13:33 2021 -0500
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powerpc: Fix unrecognized instruction errors with recent GCC
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Recent binutils commit b25f942e18d6ecd7ec3e2d2e9930eb4f996c258a
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changes the behavior of `.machine` directives to override, rather
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than augment, the base CPU. This can result in _reduced_ functionality
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when, for example, compiling for default machine "power8", but explicitly
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asking for ".machine power5", which loses Altivec instructions.
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In tst-ucontext-ppc64-vscr.c, while the instructions provoking the new
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error messages are bracketed by ".machine power5", which is ostensibly
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Power ISA 2.03 (POWER5), the POWER5 processor did not support the
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VSX subset, so these instructions are not recognized as "power5".
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Error: unrecognized opcode: `vspltisb'
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Error: unrecognized opcode: `vpkuwus'
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Error: unrecognized opcode: `mfvscr'
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Error: unrecognized opcode: `stvx'
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Manually adding the VSX subset via ".machine altivec" is sufficient.
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Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
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(cherry picked from commit 064b475a2e5662b6b3973fabf505eade86e61510)
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diff --git a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
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index 28c87fcef72bded6..d3fc4ab589f4752a 100644
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--- a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
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+++ b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
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@@ -50,6 +50,7 @@ do_test (void)
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/* Set SAT bit in VSCR register. */
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asm volatile (".machine push;\n"
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".machine \"power5\";\n"
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+ ".machine altivec;\n"
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"vspltisb %0,0;\n"
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"vspltisb %1,-1;\n"
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"vpkuwus %0,%0,%1;\n"
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