This combines the following upstream commits: e45af510bc AArch64: Fix instability in AdvSIMD sinh 6c22823da5 AArch64: Fix instability in AdvSIMD tan aebaeb2c33 AArch64: Update math-vector-fortran.h e20ca759af AArch64: add optimised strspn/strcspn aac077645a AArch64: Fix SVE powf routine [BZ #33299] 1e3d1ddf97 AArch64: Optimize SVE exp functions dee22d2a81 AArch64: Optimise SVE FP64 Hyperbolics 6849c5b791 AArch64: Improve codegen SVE log1p helper 09795c5612 AArch64: Fix builderror with GCC 12.1/12.2 aa18367c11 AArch64: Improve enabling of SVE for libmvec 691edbdf77 aarch64: fix unwinding in longjmp 4352e2cc93 aarch64: Fix _dl_tlsdesc_dynamic unwind for pac-ret (BZ 32612) cf56eb28fa AArch64: Optimize algorithm in users of SVE expf helper ce2f26a22e AArch64: Remove PTR_ARG/SIZE_ARG defines 8f0e7fe61e Aarch64: Improve codegen in SVE asinh c0ff447edf Aarch64: Improve codegen in SVE exp and users, and update expf_inline f5ff34cb3c AArch64: Improve codegen for SVE erfcf 0b195651db AArch64: Improve codegen for SVE pow 95e807209b AArch64: Improve codegen for SVE powf d3f2b71ef1 aarch64: Fix tests not compatible with targets supporting GCS f86b4cf875 AArch64: Improve codegen in SVE expm1f and users 140b985e5a AArch64: Improve codegen in AdvSIMD asinh 91c1fadba3 AArch64: Improve codegen for SVE log1pf users cff9648d0b AArch64: Improve codegen of AdvSIMD expf family 569cfaaf49 AArch64: Improve codegen in AdvSIMD pow ca0c0d0f26 AArch64: Improve codegen in users of ADVSIMD log1p helper 13a7ef5999 AArch64: Improve codegen in users of ADVSIMD expm1 helper 2d82d781a5 AArch64: Remove SVE erf and erfc tables 1cf29fbc5b AArch64: Small optimisation in AdvSIMD erf and erfc 7b8c134b54 AArch64: Improve codegen in SVE expf & related routines a15b1394b5 AArch64: Improve codegen in SVE F32 logs 5bc100bd4b AArch64: Improve codegen in users of AdvSIMD log1pf helper 7900ac490d AArch64: Improve codegen in users of ADVSIMD expm1f helper 0fed0b250f aarch64/fpu: Add vector variants of pow 75207bde68 aarch64/fpu: Add vector variants of cbrt 157f89fa3d aarch64/fpu: Add vector variants of hypot 90a6ca8b28 aarch64: Fix AdvSIMD libmvec routines for big-endian 87cb1dfcd6 aarch64/fpu: Add vector variants of erfc 3d3a4fb8e4 aarch64/fpu: Add vector variants of tanh eedbbca0bf aarch64/fpu: Add vector variants of sinh 8b67920528 aarch64/fpu: Add vector variants of atanh 81406ea3c5 aarch64/fpu: Add vector variants of asinh b09fee1d21 aarch64/fpu: Add vector variants of acosh bdb5705b7b aarch64/fpu: Add vector variants of cosh cb5d84f1f8 aarch64/fpu: Add vector variants of erf Resolves: RHEL-118273
304 lines
12 KiB
Diff
304 lines
12 KiB
Diff
commit c0ff447edf19bd4630fe79adf5e8b896405b059f
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Author: Luna Lamb <luna.lamb@arm.com>
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Date: Thu Feb 13 17:54:46 2025 +0000
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Aarch64: Improve codegen in SVE exp and users, and update expf_inline
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Use unpredicted muls, and improve memory access.
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7%, 3% and 1% improvement in throughput microbenchmark on Neoverse V1,
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for exp, exp2 and cosh respectively.
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Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
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diff --git a/sysdeps/aarch64/fpu/cosh_sve.c b/sysdeps/aarch64/fpu/cosh_sve.c
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index 919f34604a452b4a..e375dd8a3407feb2 100644
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--- a/sysdeps/aarch64/fpu/cosh_sve.c
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+++ b/sysdeps/aarch64/fpu/cosh_sve.c
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@@ -23,7 +23,7 @@ static const struct data
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{
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float64_t poly[3];
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float64_t inv_ln2, ln2_hi, ln2_lo, shift, thres;
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- uint64_t index_mask, special_bound;
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+ uint64_t special_bound;
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} data = {
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.poly = { 0x1.fffffffffffd4p-2, 0x1.5555571d6b68cp-3,
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0x1.5555576a59599p-5, },
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@@ -35,14 +35,16 @@ static const struct data
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.shift = 0x1.8p+52,
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.thres = 704.0,
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- .index_mask = 0xff,
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/* 0x1.6p9, above which exp overflows. */
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.special_bound = 0x4086000000000000,
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};
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static svfloat64_t NOINLINE
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-special_case (svfloat64_t x, svfloat64_t y, svbool_t special)
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+special_case (svfloat64_t x, svbool_t pg, svfloat64_t t, svbool_t special)
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{
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+ svfloat64_t half_t = svmul_x (svptrue_b64 (), t, 0.5);
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+ svfloat64_t half_over_t = svdivr_x (pg, t, 0.5);
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+ svfloat64_t y = svadd_x (pg, half_t, half_over_t);
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return sv_call_f64 (cosh, x, y, special);
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}
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@@ -60,12 +62,12 @@ exp_inline (svfloat64_t x, const svbool_t pg, const struct data *d)
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svuint64_t u = svreinterpret_u64 (z);
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svuint64_t e = svlsl_x (pg, u, 52 - V_EXP_TAIL_TABLE_BITS);
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- svuint64_t i = svand_x (pg, u, d->index_mask);
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+ svuint64_t i = svand_x (svptrue_b64 (), u, 0xff);
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svfloat64_t y = svmla_x (pg, sv_f64 (d->poly[1]), r, d->poly[2]);
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y = svmla_x (pg, sv_f64 (d->poly[0]), r, y);
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y = svmla_x (pg, sv_f64 (1.0), r, y);
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- y = svmul_x (pg, r, y);
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+ y = svmul_x (svptrue_b64 (), r, y);
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/* s = 2^(n/N). */
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u = svld1_gather_index (pg, __v_exp_tail_data, i);
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@@ -94,12 +96,12 @@ svfloat64_t SV_NAME_D1 (cosh) (svfloat64_t x, const svbool_t pg)
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/* Up to the point that exp overflows, we can use it to calculate cosh by
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exp(|x|) / 2 + 1 / (2 * exp(|x|)). */
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svfloat64_t t = exp_inline (ax, pg, d);
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- svfloat64_t half_t = svmul_x (pg, t, 0.5);
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- svfloat64_t half_over_t = svdivr_x (pg, t, 0.5);
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/* Fall back to scalar for any special cases. */
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if (__glibc_unlikely (svptest_any (pg, special)))
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- return special_case (x, svadd_x (pg, half_t, half_over_t), special);
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+ return special_case (x, pg, t, special);
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+ svfloat64_t half_t = svmul_x (svptrue_b64 (), t, 0.5);
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+ svfloat64_t half_over_t = svdivr_x (pg, t, 0.5);
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return svadd_x (pg, half_t, half_over_t);
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}
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diff --git a/sysdeps/aarch64/fpu/exp10_sve.c b/sysdeps/aarch64/fpu/exp10_sve.c
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index ddf64708cb1773cd..bfd3fb9e1948a3b8 100644
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--- a/sysdeps/aarch64/fpu/exp10_sve.c
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+++ b/sysdeps/aarch64/fpu/exp10_sve.c
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@@ -18,21 +18,23 @@
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<https://www.gnu.org/licenses/>. */
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#include "sv_math.h"
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-#include "poly_sve_f64.h"
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#define SpecialBound 307.0 /* floor (log10 (2^1023)). */
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static const struct data
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{
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- double poly[5];
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+ double c1, c3, c2, c4, c0;
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double shift, log10_2, log2_10_hi, log2_10_lo, scale_thres, special_bound;
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} data = {
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/* Coefficients generated using Remez algorithm.
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rel error: 0x1.9fcb9b3p-60
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abs error: 0x1.a20d9598p-60 in [ -log10(2)/128, log10(2)/128 ]
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max ulp err 0.52 +0.5. */
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- .poly = { 0x1.26bb1bbb55516p1, 0x1.53524c73cd32ap1, 0x1.0470591daeafbp1,
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- 0x1.2bd77b1361ef6p0, 0x1.142b5d54e9621p-1 },
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+ .c0 = 0x1.26bb1bbb55516p1,
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+ .c1 = 0x1.53524c73cd32ap1,
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+ .c2 = 0x1.0470591daeafbp1,
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+ .c3 = 0x1.2bd77b1361ef6p0,
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+ .c4 = 0x1.142b5d54e9621p-1,
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/* 1.5*2^46+1023. This value is further explained below. */
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.shift = 0x1.800000000ffc0p+46,
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.log10_2 = 0x1.a934f0979a371p1, /* 1/log2(10). */
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@@ -70,9 +72,9 @@ special_case (svbool_t pg, svfloat64_t s, svfloat64_t y, svfloat64_t n,
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/* |n| > 1280 => 2^(n) overflows. */
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svbool_t p_cmp = svacgt (pg, n, d->scale_thres);
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- svfloat64_t r1 = svmul_x (pg, s1, s1);
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+ svfloat64_t r1 = svmul_x (svptrue_b64 (), s1, s1);
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svfloat64_t r2 = svmla_x (pg, s2, s2, y);
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- svfloat64_t r0 = svmul_x (pg, r2, s1);
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+ svfloat64_t r0 = svmul_x (svptrue_b64 (), r2, s1);
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return svsel (p_cmp, r1, r0);
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}
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@@ -103,11 +105,14 @@ svfloat64_t SV_NAME_D1 (exp10) (svfloat64_t x, svbool_t pg)
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comes at significant performance cost. */
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svuint64_t u = svreinterpret_u64 (z);
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svfloat64_t scale = svexpa (u);
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-
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+ svfloat64_t c24 = svld1rq (svptrue_b64 (), &d->c2);
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/* Approximate exp10(r) using polynomial. */
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- svfloat64_t r2 = svmul_x (pg, r, r);
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- svfloat64_t y = svmla_x (pg, svmul_x (pg, r, d->poly[0]), r2,
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- sv_pairwise_poly_3_f64_x (pg, r, r2, d->poly + 1));
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+ svfloat64_t r2 = svmul_x (svptrue_b64 (), r, r);
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+ svfloat64_t p12 = svmla_lane (sv_f64 (d->c1), r, c24, 0);
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+ svfloat64_t p34 = svmla_lane (sv_f64 (d->c3), r, c24, 1);
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+ svfloat64_t p14 = svmla_x (pg, p12, p34, r2);
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+
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+ svfloat64_t y = svmla_x (pg, svmul_x (svptrue_b64 (), r, d->c0), r2, p14);
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/* Assemble result as exp10(x) = 2^n * exp10(r). If |x| > SpecialBound
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multiplication may overflow, so use special case routine. */
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diff --git a/sysdeps/aarch64/fpu/exp2_sve.c b/sysdeps/aarch64/fpu/exp2_sve.c
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index 22848ebfa5ac21d8..5dfb77cdbc2f6a51 100644
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--- a/sysdeps/aarch64/fpu/exp2_sve.c
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+++ b/sysdeps/aarch64/fpu/exp2_sve.c
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@@ -18,7 +18,6 @@
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<https://www.gnu.org/licenses/>. */
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#include "sv_math.h"
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-#include "poly_sve_f64.h"
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#define N (1 << V_EXP_TABLE_BITS)
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@@ -27,15 +26,15 @@
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static const struct data
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{
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- double poly[4];
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+ double c0, c2;
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+ double c1, c3;
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double shift, big_bound, uoflow_bound;
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} data = {
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/* Coefficients are computed using Remez algorithm with
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minimisation of the absolute error. */
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- .poly = { 0x1.62e42fefa3686p-1, 0x1.ebfbdff82c241p-3, 0x1.c6b09b16de99ap-5,
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- 0x1.3b2abf5571ad8p-7 },
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- .shift = 0x1.8p52 / N,
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- .uoflow_bound = UOFlowBound,
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+ .c0 = 0x1.62e42fefa3686p-1, .c1 = 0x1.ebfbdff82c241p-3,
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+ .c2 = 0x1.c6b09b16de99ap-5, .c3 = 0x1.3b2abf5571ad8p-7,
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+ .shift = 0x1.8p52 / N, .uoflow_bound = UOFlowBound,
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.big_bound = BigBound,
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};
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@@ -67,9 +66,9 @@ special_case (svbool_t pg, svfloat64_t s, svfloat64_t y, svfloat64_t n,
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/* |n| > 1280 => 2^(n) overflows. */
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svbool_t p_cmp = svacgt (pg, n, d->uoflow_bound);
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- svfloat64_t r1 = svmul_x (pg, s1, s1);
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+ svfloat64_t r1 = svmul_x (svptrue_b64 (), s1, s1);
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svfloat64_t r2 = svmla_x (pg, s2, s2, y);
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- svfloat64_t r0 = svmul_x (pg, r2, s1);
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+ svfloat64_t r0 = svmul_x (svptrue_b64 (), r2, s1);
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return svsel (p_cmp, r1, r0);
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}
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@@ -99,11 +98,14 @@ svfloat64_t SV_NAME_D1 (exp2) (svfloat64_t x, svbool_t pg)
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svuint64_t top = svlsl_x (pg, ki, 52 - V_EXP_TABLE_BITS);
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svfloat64_t scale = svreinterpret_f64 (svadd_x (pg, sbits, top));
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+ svfloat64_t c13 = svld1rq (svptrue_b64 (), &d->c1);
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/* Approximate exp2(r) using polynomial. */
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- svfloat64_t r2 = svmul_x (pg, r, r);
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- svfloat64_t p = sv_pairwise_poly_3_f64_x (pg, r, r2, d->poly);
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- svfloat64_t y = svmul_x (pg, r, p);
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-
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+ /* y = exp2(r) - 1 ~= C0 r + C1 r^2 + C2 r^3 + C3 r^4. */
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+ svfloat64_t r2 = svmul_x (svptrue_b64 (), r, r);
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+ svfloat64_t p01 = svmla_lane (sv_f64 (d->c0), r, c13, 0);
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+ svfloat64_t p23 = svmla_lane (sv_f64 (d->c2), r, c13, 1);
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+ svfloat64_t p = svmla_x (pg, p01, p23, r2);
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+ svfloat64_t y = svmul_x (svptrue_b64 (), r, p);
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/* Assemble exp2(x) = exp2(r) * scale. */
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if (__glibc_unlikely (svptest_any (pg, special)))
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return special_case (pg, scale, y, kd, d);
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diff --git a/sysdeps/aarch64/fpu/exp_sve.c b/sysdeps/aarch64/fpu/exp_sve.c
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index aabaaa1d61dbab27..b2421d493f2e119f 100644
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--- a/sysdeps/aarch64/fpu/exp_sve.c
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+++ b/sysdeps/aarch64/fpu/exp_sve.c
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@@ -21,12 +21,15 @@
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static const struct data
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{
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- double poly[4];
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+ double c0, c2;
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+ double c1, c3;
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double ln2_hi, ln2_lo, inv_ln2, shift, thres;
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+
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} data = {
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- .poly = { /* ulp error: 0.53. */
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- 0x1.fffffffffdbcdp-2, 0x1.555555555444cp-3, 0x1.555573c6a9f7dp-5,
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- 0x1.1111266d28935p-7 },
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+ .c0 = 0x1.fffffffffdbcdp-2,
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+ .c1 = 0x1.555555555444cp-3,
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+ .c2 = 0x1.555573c6a9f7dp-5,
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+ .c3 = 0x1.1111266d28935p-7,
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.ln2_hi = 0x1.62e42fefa3800p-1,
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.ln2_lo = 0x1.ef35793c76730p-45,
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/* 1/ln2. */
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@@ -36,7 +39,6 @@ static const struct data
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.thres = 704.0,
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};
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-#define C(i) sv_f64 (d->poly[i])
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#define SpecialOffset 0x6000000000000000 /* 0x1p513. */
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/* SpecialBias1 + SpecialBias1 = asuint(1.0). */
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#define SpecialBias1 0x7000000000000000 /* 0x1p769. */
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@@ -56,20 +58,20 @@ special_case (svbool_t pg, svfloat64_t s, svfloat64_t y, svfloat64_t n)
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svuint64_t b
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= svdup_u64_z (p_sign, SpecialOffset); /* Inactive lanes set to 0. */
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- /* Set s1 to generate overflow depending on sign of exponent n. */
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- svfloat64_t s1 = svreinterpret_f64 (
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- svsubr_x (pg, b, SpecialBias1)); /* 0x70...0 - b. */
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- /* Offset s to avoid overflow in final result if n is below threshold. */
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+ /* Set s1 to generate overflow depending on sign of exponent n,
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+ ie. s1 = 0x70...0 - b. */
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+ svfloat64_t s1 = svreinterpret_f64 (svsubr_x (pg, b, SpecialBias1));
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+ /* Offset s to avoid overflow in final result if n is below threshold.
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+ ie. s2 = as_u64 (s) - 0x3010...0 + b. */
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svfloat64_t s2 = svreinterpret_f64 (
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- svadd_x (pg, svsub_x (pg, svreinterpret_u64 (s), SpecialBias2),
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- b)); /* as_u64 (s) - 0x3010...0 + b. */
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+ svadd_x (pg, svsub_x (pg, svreinterpret_u64 (s), SpecialBias2), b));
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/* |n| > 1280 => 2^(n) overflows. */
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svbool_t p_cmp = svacgt (pg, n, 1280.0);
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- svfloat64_t r1 = svmul_x (pg, s1, s1);
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+ svfloat64_t r1 = svmul_x (svptrue_b64 (), s1, s1);
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svfloat64_t r2 = svmla_x (pg, s2, s2, y);
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- svfloat64_t r0 = svmul_x (pg, r2, s1);
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+ svfloat64_t r0 = svmul_x (svptrue_b64 (), r2, s1);
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return svsel (p_cmp, r1, r0);
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}
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@@ -103,16 +105,16 @@ svfloat64_t SV_NAME_D1 (exp) (svfloat64_t x, const svbool_t pg)
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svfloat64_t z = svmla_x (pg, sv_f64 (d->shift), x, d->inv_ln2);
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svuint64_t u = svreinterpret_u64 (z);
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svfloat64_t n = svsub_x (pg, z, d->shift);
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-
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+ svfloat64_t c13 = svld1rq (svptrue_b64 (), &d->c1);
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/* r = x - n * ln2, r is in [-ln2/(2N), ln2/(2N)]. */
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svfloat64_t ln2 = svld1rq (svptrue_b64 (), &d->ln2_hi);
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svfloat64_t r = svmls_lane (x, n, ln2, 0);
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r = svmls_lane (r, n, ln2, 1);
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/* y = exp(r) - 1 ~= r + C0 r^2 + C1 r^3 + C2 r^4 + C3 r^5. */
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- svfloat64_t r2 = svmul_x (pg, r, r);
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- svfloat64_t p01 = svmla_x (pg, C (0), C (1), r);
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- svfloat64_t p23 = svmla_x (pg, C (2), C (3), r);
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+ svfloat64_t r2 = svmul_x (svptrue_b64 (), r, r);
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+ svfloat64_t p01 = svmla_lane (sv_f64 (d->c0), r, c13, 0);
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+ svfloat64_t p23 = svmla_lane (sv_f64 (d->c2), r, c13, 1);
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svfloat64_t p04 = svmla_x (pg, p01, p23, r2);
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svfloat64_t y = svmla_x (pg, r, p04, r2);
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diff --git a/sysdeps/aarch64/fpu/sv_expf_inline.h b/sysdeps/aarch64/fpu/sv_expf_inline.h
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index 6166df65533555a6..75781fb4ddcb9790 100644
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--- a/sysdeps/aarch64/fpu/sv_expf_inline.h
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+++ b/sysdeps/aarch64/fpu/sv_expf_inline.h
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@@ -61,7 +61,7 @@ expf_inline (svfloat32_t x, const svbool_t pg, const struct sv_expf_data *d)
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/* scale = 2^(n/N). */
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svfloat32_t scale = svexpa (svreinterpret_u32 (z));
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- /* y = exp(r) - 1 ~= r + C0 r^2 + C1 r^3 + C2 r^4 + C3 r^5 + C4 r^6. */
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+ /* poly(r) = exp(r) - 1 ~= C0 r + C1 r^2 + C2 r^3 + C3 r^4 + C4 r^5. */
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svfloat32_t p12 = svmla_lane (sv_f32 (d->c1), r, lane_consts, 2);
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svfloat32_t p34 = svmla_lane (sv_f32 (d->c3), r, lane_consts, 3);
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svfloat32_t r2 = svmul_x (svptrue_b32 (), r, r);
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@@ -71,5 +71,4 @@ expf_inline (svfloat32_t x, const svbool_t pg, const struct sv_expf_data *d)
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return svmla_x (pg, scale, scale, poly);
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}
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-
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#endif
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