02cfe04e36
Resolves: RHEL-15696 Includes two additional (well, 1.5) upstream patches to resolve roundeven redirects.
390 lines
10 KiB
Diff
390 lines
10 KiB
Diff
From abddd61de090ae84e380aff68a98bd94ef704667 Mon Sep 17 00:00:00 2001
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From: Noah Goldstein <goldstein.w.n@gmail.com>
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Date: Fri, 24 Dec 2021 18:54:41 -0600
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Subject: [PATCH] x86: Optimize L(less_vec) case in memcmp-evex-movbe.S
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Content-type: text/plain; charset=UTF-8
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No bug.
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Optimizations are twofold.
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1) Replace page cross and 0/1 checks with masked load instructions in
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L(less_vec). In applications this reduces branch-misses in the
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hot [0, 32] case.
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2) Change controlflow so that L(less_vec) case gets the fall through.
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Change 2) helps copies in the [0, 32] size range but comes at the cost
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of copies in the [33, 64] size range. From profiles of GCC and
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Python3, 94%+ and 99%+ of calls are in the [0, 32] range so this
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appears to the the right tradeoff.
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Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
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Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
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---
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sysdeps/x86_64/multiarch/memcmp-evex-movbe.S | 249 +++++--------------
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1 file changed, 56 insertions(+), 193 deletions(-)
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diff --git a/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S b/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S
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index 640f6757..d2899e7c 100644
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--- a/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S
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+++ b/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S
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@@ -62,15 +62,18 @@ Latency:
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# define VMOVU vmovdqu64
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# ifdef USE_AS_WMEMCMP
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+# define VMOVU_MASK vmovdqu32
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# define CHAR_SIZE 4
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# define VPCMP vpcmpd
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# define VPTEST vptestmd
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# else
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+# define VMOVU_MASK vmovdqu8
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# define CHAR_SIZE 1
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# define VPCMP vpcmpub
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# define VPTEST vptestmb
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# endif
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+
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# define VEC_SIZE 32
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# define PAGE_SIZE 4096
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# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
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@@ -102,12 +105,48 @@ ENTRY_P2ALIGN (MEMCMP, 6)
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movl %edx, %edx
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# endif
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cmp $CHAR_PER_VEC, %RDX_LP
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- jb L(less_vec)
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+ /* Fall through for [0, VEC_SIZE] as its the hottest. */
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+ ja L(more_1x_vec)
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+
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+ /* Create mask for CHAR's we want to compare. This allows us to
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+ avoid having to include page cross logic. */
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+ movl $-1, %ecx
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+ bzhil %edx, %ecx, %ecx
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+ kmovd %ecx, %k2
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+
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+ /* Safe to load full ymm with mask. */
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+ VMOVU_MASK (%rsi), %YMM2{%k2}
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+ VPCMP $4,(%rdi), %YMM2, %k1{%k2}
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+ kmovd %k1, %eax
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+ testl %eax, %eax
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+ jnz L(return_vec_0)
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+ ret
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+ .p2align 4
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+L(return_vec_0):
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+ tzcntl %eax, %eax
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+# ifdef USE_AS_WMEMCMP
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+ movl (%rdi, %rax, CHAR_SIZE), %ecx
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+ xorl %edx, %edx
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+ cmpl (%rsi, %rax, CHAR_SIZE), %ecx
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+ /* NB: no partial register stall here because xorl zero idiom
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+ above. */
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+ setg %dl
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+ leal -1(%rdx, %rdx), %eax
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+# else
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+ movzbl (%rsi, %rax), %ecx
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+ movzbl (%rdi, %rax), %eax
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+ subl %ecx, %eax
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+# endif
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+ ret
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+
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+
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+ .p2align 4
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+L(more_1x_vec):
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/* From VEC to 2 * VEC. No branch when size == VEC_SIZE. */
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VMOVU (%rsi), %YMM1
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/* Use compare not equals to directly check for mismatch. */
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- VPCMP $4, (%rdi), %YMM1, %k1
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+ VPCMP $4,(%rdi), %YMM1, %k1
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kmovd %k1, %eax
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/* NB: eax must be destination register if going to
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L(return_vec_[0,2]). For L(return_vec_3) destination register
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@@ -131,13 +170,13 @@ ENTRY_P2ALIGN (MEMCMP, 6)
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/* Check third and fourth VEC no matter what. */
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VMOVU (VEC_SIZE * 2)(%rsi), %YMM3
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- VPCMP $4, (VEC_SIZE * 2)(%rdi), %YMM3, %k1
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+ VPCMP $4,(VEC_SIZE * 2)(%rdi), %YMM3, %k1
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kmovd %k1, %eax
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testl %eax, %eax
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jnz L(return_vec_2)
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VMOVU (VEC_SIZE * 3)(%rsi), %YMM4
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- VPCMP $4, (VEC_SIZE * 3)(%rdi), %YMM4, %k1
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+ VPCMP $4,(VEC_SIZE * 3)(%rdi), %YMM4, %k1
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kmovd %k1, %ecx
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testl %ecx, %ecx
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jnz L(return_vec_3)
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@@ -169,7 +208,7 @@ ENTRY_P2ALIGN (MEMCMP, 6)
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VMOVU (VEC_SIZE * 3)(%rsi), %YMM4
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/* Ternary logic to xor (VEC_SIZE * 3)(%rdi) with YMM4 while
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oring with YMM1. Result is stored in YMM4. */
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- vpternlogd $0xde, (VEC_SIZE * 3)(%rdi), %YMM1, %YMM4
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+ vpternlogd $0xde,(VEC_SIZE * 3)(%rdi), %YMM1, %YMM4
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/* Or together YMM2, YMM3, and YMM4 into YMM4. */
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vpternlogd $0xfe, %YMM2, %YMM3, %YMM4
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@@ -184,7 +223,8 @@ ENTRY_P2ALIGN (MEMCMP, 6)
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/* NB: eax must be zero to reach here. */
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ret
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- .p2align 4
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+
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+ .p2align 4,, 8
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L(8x_end_return_vec_0_1_2_3):
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movq %rdx, %rdi
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L(8x_return_vec_0_1_2_3):
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@@ -222,23 +262,6 @@ L(return_vec_3):
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# endif
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ret
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- .p2align 4
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-L(return_vec_0):
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- tzcntl %eax, %eax
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-# ifdef USE_AS_WMEMCMP
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- movl (%rdi, %rax, CHAR_SIZE), %ecx
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- xorl %edx, %edx
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- cmpl (%rsi, %rax, CHAR_SIZE), %ecx
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- /* NB: no partial register stall here because xorl zero idiom
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- above. */
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- setg %dl
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- leal -1(%rdx, %rdx), %eax
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-# else
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- movzbl (%rsi, %rax), %ecx
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- movzbl (%rdi, %rax), %eax
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- subl %ecx, %eax
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-# endif
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- ret
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.p2align 4
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L(return_vec_1):
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@@ -297,7 +320,7 @@ L(loop_4x_vec):
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VMOVU (VEC_SIZE * 2)(%rsi, %rdi), %YMM3
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vpxorq (VEC_SIZE * 2)(%rdi), %YMM3, %YMM3
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VMOVU (VEC_SIZE * 3)(%rsi, %rdi), %YMM4
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- vpternlogd $0xde, (VEC_SIZE * 3)(%rdi), %YMM1, %YMM4
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+ vpternlogd $0xde,(VEC_SIZE * 3)(%rdi), %YMM1, %YMM4
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vpternlogd $0xfe, %YMM2, %YMM3, %YMM4
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VPTEST %YMM4, %YMM4, %k1
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kmovd %k1, %ecx
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@@ -324,7 +347,7 @@ L(loop_4x_vec):
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VMOVU VEC_SIZE(%rsi, %rdx), %YMM2
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vpxorq VEC_SIZE(%rdx), %YMM2, %YMM2
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VMOVU (VEC_SIZE * 3)(%rsi, %rdx), %YMM4
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- vpternlogd $0xde, (VEC_SIZE * 3)(%rdx), %YMM1, %YMM4
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+ vpternlogd $0xde,(VEC_SIZE * 3)(%rdx), %YMM1, %YMM4
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vpternlogd $0xfe, %YMM2, %YMM3, %YMM4
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VPTEST %YMM4, %YMM4, %k1
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kmovd %k1, %ecx
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@@ -336,14 +359,14 @@ L(loop_4x_vec):
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/* Only entry is from L(more_8x_vec). */
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.p2align 4,, 10
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L(8x_last_2x_vec):
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- VPCMP $4, (VEC_SIZE * 2)(%rdx), %YMM3, %k1
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+ VPCMP $4,(VEC_SIZE * 2)(%rdx), %YMM3, %k1
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kmovd %k1, %eax
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testl %eax, %eax
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jnz L(8x_return_vec_2)
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/* Naturally aligned to 16 bytes. */
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L(8x_last_1x_vec):
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VMOVU (VEC_SIZE * 3)(%rsi, %rdx), %YMM1
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- VPCMP $4, (VEC_SIZE * 3)(%rdx), %YMM1, %k1
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+ VPCMP $4,(VEC_SIZE * 3)(%rdx), %YMM1, %k1
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kmovd %k1, %eax
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testl %eax, %eax
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jnz L(8x_return_vec_3)
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@@ -392,7 +415,9 @@ L(last_1x_vec):
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jnz L(return_vec_0_end)
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ret
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- .p2align 4,, 10
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+
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+ /* Don't align. Takes 2-fetch blocks either way and aligning
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+ will cause code to spill into another cacheline. */
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L(return_vec_1_end):
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/* Use bsf to save code size. This is necessary to have
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L(one_or_less) fit in aligning bytes between. */
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@@ -411,31 +436,8 @@ L(return_vec_1_end):
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# endif
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ret
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- /* NB: L(one_or_less) fits in alignment padding between
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- L(return_vec_1_end) and L(return_vec_0_end). */
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-# ifdef USE_AS_WMEMCMP
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-L(one_or_less):
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- jb L(zero)
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- movl (%rdi), %ecx
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- xorl %edx, %edx
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- cmpl (%rsi), %ecx
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- je L(zero)
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- setg %dl
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- leal -1(%rdx, %rdx), %eax
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- ret
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-# else
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-L(one_or_less):
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- jb L(zero)
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- movzbl (%rsi), %ecx
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- movzbl (%rdi), %eax
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- subl %ecx, %eax
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- ret
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-# endif
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-L(zero):
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- xorl %eax, %eax
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- ret
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-
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- .p2align 4
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+ /* Don't align. Takes 2-fetch blocks either way and aligning
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+ will cause code to spill into another cacheline. */
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L(return_vec_0_end):
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tzcntl %eax, %eax
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addl %edx, %eax
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@@ -451,146 +453,7 @@ L(return_vec_0_end):
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subl %ecx, %eax
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# endif
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ret
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+ /* 1-byte until next cache line. */
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- .p2align 4
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-L(less_vec):
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- /* Check if one or less CHAR. This is necessary for size == 0
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- but is also faster for size == CHAR_SIZE. */
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- cmpl $1, %edx
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- jbe L(one_or_less)
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-
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- /* Check if loading one VEC from either s1 or s2 could cause a
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- page cross. This can have false positives but is by far the
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- fastest method. */
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- movl %edi, %eax
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- orl %esi, %eax
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- andl $(PAGE_SIZE - 1), %eax
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- cmpl $(PAGE_SIZE - VEC_SIZE), %eax
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- jg L(page_cross_less_vec)
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-
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- /* No page cross possible. */
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- VMOVU (%rsi), %YMM2
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- VPCMP $4, (%rdi), %YMM2, %k1
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- kmovd %k1, %eax
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- /* Check if any matches where in bounds. Intentionally not
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- storing result in eax to limit dependency chain if it goes to
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- L(return_vec_0_lv). */
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- bzhil %edx, %eax, %edx
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- jnz L(return_vec_0_lv)
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- xorl %eax, %eax
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- ret
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-
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- /* Essentially duplicate of L(return_vec_0). Ends up not costing
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- any code as shrinks L(less_vec) by allowing 2-byte encoding of
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- the jump and ends up fitting in aligning bytes. As well fits on
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- same cache line as L(less_vec) so also saves a line from having
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- to be fetched on cold calls to memcmp. */
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- .p2align 4,, 4
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-L(return_vec_0_lv):
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- tzcntl %eax, %eax
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-# ifdef USE_AS_WMEMCMP
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- movl (%rdi, %rax, CHAR_SIZE), %ecx
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- xorl %edx, %edx
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- cmpl (%rsi, %rax, CHAR_SIZE), %ecx
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- /* NB: no partial register stall here because xorl zero idiom
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- above. */
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- setg %dl
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- leal -1(%rdx, %rdx), %eax
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-# else
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- movzbl (%rsi, %rax), %ecx
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- movzbl (%rdi, %rax), %eax
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- subl %ecx, %eax
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-# endif
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- ret
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-
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- .p2align 4
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-L(page_cross_less_vec):
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- /* if USE_AS_WMEMCMP it can only be 0, 4, 8, 12, 16, 20, 24, 28
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- bytes. */
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- cmpl $(16 / CHAR_SIZE), %edx
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- jae L(between_16_31)
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-# ifndef USE_AS_WMEMCMP
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- cmpl $8, %edx
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- jae L(between_8_15)
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- cmpl $4, %edx
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- jb L(between_2_3)
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-
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- /* Load as big endian with overlapping movbe to avoid branches.
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- */
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- movbe (%rdi), %eax
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- movbe (%rsi), %ecx
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- shlq $32, %rax
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- shlq $32, %rcx
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- movbe -4(%rdi, %rdx), %edi
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- movbe -4(%rsi, %rdx), %esi
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- orq %rdi, %rax
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- orq %rsi, %rcx
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- subq %rcx, %rax
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- /* edx is guranteed to be positive int32 in range [4, 7]. */
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- cmovne %edx, %eax
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- /* ecx is -1 if rcx > rax. Otherwise 0. */
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- sbbl %ecx, %ecx
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- /* If rcx > rax, then ecx is 0 and eax is positive. If rcx ==
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- rax then eax and ecx are zero. If rax < rax then ecx is -1 so
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- eax doesn't matter. */
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- orl %ecx, %eax
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- ret
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-
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- .p2align 4,, 8
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-L(between_8_15):
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-# endif
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- /* If USE_AS_WMEMCMP fall through into 8-15 byte case. */
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- vmovq (%rdi), %xmm1
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- vmovq (%rsi), %xmm2
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- VPCMP $4, %xmm1, %xmm2, %k1
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- kmovd %k1, %eax
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- testl %eax, %eax
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- jnz L(return_vec_0_lv)
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- /* Use overlapping loads to avoid branches. */
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- vmovq -8(%rdi, %rdx, CHAR_SIZE), %xmm1
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- vmovq -8(%rsi, %rdx, CHAR_SIZE), %xmm2
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- VPCMP $4, %xmm1, %xmm2, %k1
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- addl $(CHAR_PER_VEC - (8 / CHAR_SIZE)), %edx
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- kmovd %k1, %eax
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- testl %eax, %eax
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- jnz L(return_vec_0_end)
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- ret
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-
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- .p2align 4,, 8
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-L(between_16_31):
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- /* From 16 to 31 bytes. No branch when size == 16. */
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-
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- /* Use movups to save code size. */
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- vmovdqu (%rsi), %xmm2
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- VPCMP $4, (%rdi), %xmm2, %k1
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- kmovd %k1, %eax
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- testl %eax, %eax
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- jnz L(return_vec_0_lv)
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- /* Use overlapping loads to avoid branches. */
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- vmovdqu -16(%rsi, %rdx, CHAR_SIZE), %xmm2
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- VPCMP $4, -16(%rdi, %rdx, CHAR_SIZE), %xmm2, %k1
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- addl $(CHAR_PER_VEC - (16 / CHAR_SIZE)), %edx
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- kmovd %k1, %eax
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- testl %eax, %eax
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- jnz L(return_vec_0_end)
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- ret
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-
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-# ifndef USE_AS_WMEMCMP
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-L(between_2_3):
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- /* Load as big endian to avoid branches. */
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- movzwl (%rdi), %eax
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- movzwl (%rsi), %ecx
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- shll $8, %eax
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- shll $8, %ecx
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- bswap %eax
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- bswap %ecx
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- movzbl -1(%rdi, %rdx), %edi
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- movzbl -1(%rsi, %rdx), %esi
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- orl %edi, %eax
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- orl %esi, %ecx
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- /* Subtraction is okay because the upper 8 bits are zero. */
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- subl %ecx, %eax
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- ret
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-# endif
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END (MEMCMP)
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#endif
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--
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GitLab
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