450 lines
15 KiB
Diff
450 lines
15 KiB
Diff
From 1a8605b6cd257e8a74e29b5b71c057211f5fb847 Mon Sep 17 00:00:00 2001
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From: noah <goldstein.w.n@gmail.com>
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Date: Sat, 3 Apr 2021 04:12:15 -0400
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Subject: [PATCH] x86: Update large memcpy case in memmove-vec-unaligned-erms.S
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Content-type: text/plain; charset=UTF-8
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No Bug. This commit updates the large memcpy case (no overlap). The
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update is to perform memcpy on either 2 or 4 contiguous pages at
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once. This 1) helps to alleviate the affects of false memory aliasing
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when destination and source have a close 4k alignment and 2) In most
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cases and for most DRAM units is a modestly more efficient access
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pattern. These changes are a clear performance improvement for
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VEC_SIZE =16/32, though more ambiguous for VEC_SIZE=64. test-memcpy,
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test-memccpy, test-mempcpy, test-memmove, and tst-memmove-overflow all
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pass.
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Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
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---
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.../multiarch/memmove-vec-unaligned-erms.S | 338 ++++++++++++++----
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1 file changed, 265 insertions(+), 73 deletions(-)
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Conflicts:
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sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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(different number of sections)
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diff --git a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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index c475fed4..3e2dd6bc 100644
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--- a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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+++ b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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@@ -32,7 +32,16 @@
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overlapping addresses.
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6. If size >= __x86_shared_non_temporal_threshold and there is no
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overlap between destination and source, use non-temporal store
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- instead of aligned store. */
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+ instead of aligned store copying from either 2 or 4 pages at
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+ once.
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+ 8. For point 7) if size < 16 * __x86_shared_non_temporal_threshold
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+ and source and destination do not page alias, copy from 2 pages
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+ at once using non-temporal stores. Page aliasing in this case is
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+ considered true if destination's page alignment - sources' page
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+ alignment is less than 8 * VEC_SIZE.
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+ 9. If size >= 16 * __x86_shared_non_temporal_threshold or source
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+ and destination do page alias copy from 4 pages at once using
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+ non-temporal stores. */
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#include <sysdep.h>
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@@ -64,6 +73,34 @@
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# endif
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#endif
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+#ifndef PAGE_SIZE
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+# define PAGE_SIZE 4096
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+#endif
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+
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+#if PAGE_SIZE != 4096
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+# error Unsupported PAGE_SIZE
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+#endif
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+
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+#ifndef LOG_PAGE_SIZE
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+# define LOG_PAGE_SIZE 12
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+#endif
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+
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+#if PAGE_SIZE != (1 << LOG_PAGE_SIZE)
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+# error Invalid LOG_PAGE_SIZE
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+#endif
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+
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+/* Byte per page for large_memcpy inner loop. */
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+#if VEC_SIZE == 64
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+# define LARGE_LOAD_SIZE (VEC_SIZE * 2)
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+#else
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+# define LARGE_LOAD_SIZE (VEC_SIZE * 4)
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+#endif
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+
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+/* Amount to shift rdx by to compare for memcpy_large_4x. */
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+#ifndef LOG_4X_MEMCPY_THRESH
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+# define LOG_4X_MEMCPY_THRESH 4
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+#endif
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+
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/* Avoid short distance rep movsb only with non-SSE vector. */
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#ifndef AVOID_SHORT_DISTANCE_REP_MOVSB
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# define AVOID_SHORT_DISTANCE_REP_MOVSB (VEC_SIZE > 16)
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@@ -103,6 +140,28 @@
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# error Unsupported PREFETCH_SIZE!
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#endif
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+#if LARGE_LOAD_SIZE == (VEC_SIZE * 2)
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+# define LOAD_ONE_SET(base, offset, vec0, vec1, ...) \
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+ VMOVU (offset)base, vec0; \
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+ VMOVU ((offset) + VEC_SIZE)base, vec1;
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+# define STORE_ONE_SET(base, offset, vec0, vec1, ...) \
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+ VMOVNT vec0, (offset)base; \
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+ VMOVNT vec1, ((offset) + VEC_SIZE)base;
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+#elif LARGE_LOAD_SIZE == (VEC_SIZE * 4)
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+# define LOAD_ONE_SET(base, offset, vec0, vec1, vec2, vec3) \
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+ VMOVU (offset)base, vec0; \
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+ VMOVU ((offset) + VEC_SIZE)base, vec1; \
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+ VMOVU ((offset) + VEC_SIZE * 2)base, vec2; \
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+ VMOVU ((offset) + VEC_SIZE * 3)base, vec3;
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+# define STORE_ONE_SET(base, offset, vec0, vec1, vec2, vec3) \
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+ VMOVNT vec0, (offset)base; \
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+ VMOVNT vec1, ((offset) + VEC_SIZE)base; \
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+ VMOVNT vec2, ((offset) + VEC_SIZE * 2)base; \
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+ VMOVNT vec3, ((offset) + VEC_SIZE * 3)base;
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+#else
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+# error Invalid LARGE_LOAD_SIZE
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+#endif
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+
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#ifndef SECTION
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# error SECTION is not defined!
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#endif
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@@ -390,6 +449,15 @@ L(last_4x_vec):
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VZEROUPPER_RETURN
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L(more_8x_vec):
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+ /* Check if non-temporal move candidate. */
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+#if (defined USE_MULTIARCH || VEC_SIZE == 16) && IS_IN (libc)
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+ /* Check non-temporal store threshold. */
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+ cmp __x86_shared_non_temporal_threshold(%rip), %RDX_LP
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+ ja L(large_memcpy_2x)
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+#endif
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+ /* Entry if rdx is greater than non-temporal threshold but there
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+ is overlap. */
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+L(more_8x_vec_check):
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cmpq %rsi, %rdi
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ja L(more_8x_vec_backward)
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/* Source == destination is less common. */
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@@ -416,24 +484,21 @@ L(more_8x_vec):
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subq %r8, %rdi
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/* Adjust length. */
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addq %r8, %rdx
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-#if (defined USE_MULTIARCH || VEC_SIZE == 16) && IS_IN (libc)
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- /* Check non-temporal store threshold. */
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- cmp __x86_shared_non_temporal_threshold(%rip), %RDX_LP
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- ja L(large_forward)
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-#endif
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+
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+ .p2align 4
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L(loop_4x_vec_forward):
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/* Copy 4 * VEC a time forward. */
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VMOVU (%rsi), %VEC(0)
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VMOVU VEC_SIZE(%rsi), %VEC(1)
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VMOVU (VEC_SIZE * 2)(%rsi), %VEC(2)
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VMOVU (VEC_SIZE * 3)(%rsi), %VEC(3)
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- addq $(VEC_SIZE * 4), %rsi
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- subq $(VEC_SIZE * 4), %rdx
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+ subq $-(VEC_SIZE * 4), %rsi
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+ addq $-(VEC_SIZE * 4), %rdx
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VMOVA %VEC(0), (%rdi)
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VMOVA %VEC(1), VEC_SIZE(%rdi)
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VMOVA %VEC(2), (VEC_SIZE * 2)(%rdi)
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VMOVA %VEC(3), (VEC_SIZE * 3)(%rdi)
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- addq $(VEC_SIZE * 4), %rdi
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+ subq $-(VEC_SIZE * 4), %rdi
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cmpq $(VEC_SIZE * 4), %rdx
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ja L(loop_4x_vec_forward)
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/* Store the last 4 * VEC. */
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@@ -467,24 +532,21 @@ L(more_8x_vec_backward):
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subq %r8, %r9
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/* Adjust length. */
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subq %r8, %rdx
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-#if (defined USE_MULTIARCH || VEC_SIZE == 16) && IS_IN (libc)
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- /* Check non-temporal store threshold. */
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- cmp __x86_shared_non_temporal_threshold(%rip), %RDX_LP
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- ja L(large_backward)
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-#endif
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+
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+ .p2align 4
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L(loop_4x_vec_backward):
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/* Copy 4 * VEC a time backward. */
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VMOVU (%rcx), %VEC(0)
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VMOVU -VEC_SIZE(%rcx), %VEC(1)
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VMOVU -(VEC_SIZE * 2)(%rcx), %VEC(2)
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VMOVU -(VEC_SIZE * 3)(%rcx), %VEC(3)
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- subq $(VEC_SIZE * 4), %rcx
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- subq $(VEC_SIZE * 4), %rdx
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+ addq $-(VEC_SIZE * 4), %rcx
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+ addq $-(VEC_SIZE * 4), %rdx
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VMOVA %VEC(0), (%r9)
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VMOVA %VEC(1), -VEC_SIZE(%r9)
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VMOVA %VEC(2), -(VEC_SIZE * 2)(%r9)
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VMOVA %VEC(3), -(VEC_SIZE * 3)(%r9)
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- subq $(VEC_SIZE * 4), %r9
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+ addq $-(VEC_SIZE * 4), %r9
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cmpq $(VEC_SIZE * 4), %rdx
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ja L(loop_4x_vec_backward)
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/* Store the first 4 * VEC. */
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@@ -497,72 +559,202 @@ L(loop_4x_vec_backward):
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VZEROUPPER_RETURN
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#if (defined USE_MULTIARCH || VEC_SIZE == 16) && IS_IN (libc)
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-L(large_forward):
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+ .p2align 4
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+L(large_memcpy_2x):
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+ /* Compute absolute value of difference between source and
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+ destination. */
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+ movq %rdi, %r9
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+ subq %rsi, %r9
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+ movq %r9, %r8
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+ leaq -1(%r9), %rcx
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+ sarq $63, %r8
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+ xorq %r8, %r9
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+ subq %r8, %r9
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/* Don't use non-temporal store if there is overlap between
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- destination and source since destination may be in cache
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- when source is loaded. */
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- leaq (%rdi, %rdx), %r10
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- cmpq %r10, %rsi
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- jb L(loop_4x_vec_forward)
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-L(loop_large_forward):
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+ destination and source since destination may be in cache when
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+ source is loaded. */
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+ cmpq %r9, %rdx
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+ ja L(more_8x_vec_check)
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+
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+ /* Cache align destination. First store the first 64 bytes then
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+ adjust alignments. */
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+ VMOVU (%rsi), %VEC(8)
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+#if VEC_SIZE < 64
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+ VMOVU VEC_SIZE(%rsi), %VEC(9)
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+#if VEC_SIZE < 32
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+ VMOVU (VEC_SIZE * 2)(%rsi), %VEC(10)
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+ VMOVU (VEC_SIZE * 3)(%rsi), %VEC(11)
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+#endif
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+#endif
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+ VMOVU %VEC(8), (%rdi)
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+#if VEC_SIZE < 64
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+ VMOVU %VEC(9), VEC_SIZE(%rdi)
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+#if VEC_SIZE < 32
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+ VMOVU %VEC(10), (VEC_SIZE * 2)(%rdi)
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+ VMOVU %VEC(11), (VEC_SIZE * 3)(%rdi)
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+#endif
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+#endif
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+ /* Adjust source, destination, and size. */
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+ movq %rdi, %r8
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+ andq $63, %r8
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+ /* Get the negative of offset for alignment. */
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+ subq $64, %r8
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+ /* Adjust source. */
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+ subq %r8, %rsi
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+ /* Adjust destination which should be aligned now. */
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+ subq %r8, %rdi
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+ /* Adjust length. */
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+ addq %r8, %rdx
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+
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+ /* Test if source and destination addresses will alias. If they do
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+ the larger pipeline in large_memcpy_4x alleviated the
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+ performance drop. */
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+ testl $(PAGE_SIZE - VEC_SIZE * 8), %ecx
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+ jz L(large_memcpy_4x)
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+
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+ movq %rdx, %r10
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+ shrq $LOG_4X_MEMCPY_THRESH, %r10
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+ cmp __x86_shared_non_temporal_threshold(%rip), %r10
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+ jae L(large_memcpy_4x)
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+
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+ /* edx will store remainder size for copying tail. */
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+ andl $(PAGE_SIZE * 2 - 1), %edx
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+ /* r10 stores outer loop counter. */
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+ shrq $((LOG_PAGE_SIZE + 1) - LOG_4X_MEMCPY_THRESH), %r10
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+ /* Copy 4x VEC at a time from 2 pages. */
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+ .p2align 4
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+L(loop_large_memcpy_2x_outer):
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+ /* ecx stores inner loop counter. */
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+ movl $(PAGE_SIZE / LARGE_LOAD_SIZE), %ecx
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+L(loop_large_memcpy_2x_inner):
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+ PREFETCH_ONE_SET(1, (%rsi), PREFETCHED_LOAD_SIZE)
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+ PREFETCH_ONE_SET(1, (%rsi), PREFETCHED_LOAD_SIZE * 2)
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+ PREFETCH_ONE_SET(1, (%rsi), PAGE_SIZE + PREFETCHED_LOAD_SIZE)
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+ PREFETCH_ONE_SET(1, (%rsi), PAGE_SIZE + PREFETCHED_LOAD_SIZE * 2)
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+ /* Load vectors from rsi. */
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+ LOAD_ONE_SET((%rsi), 0, %VEC(0), %VEC(1), %VEC(2), %VEC(3))
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+ LOAD_ONE_SET((%rsi), PAGE_SIZE, %VEC(4), %VEC(5), %VEC(6), %VEC(7))
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+ subq $-LARGE_LOAD_SIZE, %rsi
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+ /* Non-temporal store vectors to rdi. */
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+ STORE_ONE_SET((%rdi), 0, %VEC(0), %VEC(1), %VEC(2), %VEC(3))
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+ STORE_ONE_SET((%rdi), PAGE_SIZE, %VEC(4), %VEC(5), %VEC(6), %VEC(7))
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+ subq $-LARGE_LOAD_SIZE, %rdi
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+ decl %ecx
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+ jnz L(loop_large_memcpy_2x_inner)
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+ addq $PAGE_SIZE, %rdi
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+ addq $PAGE_SIZE, %rsi
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+ decq %r10
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+ jne L(loop_large_memcpy_2x_outer)
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+ sfence
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+
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+ /* Check if only last 4 loads are needed. */
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+ cmpl $(VEC_SIZE * 4), %edx
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+ jbe L(large_memcpy_2x_end)
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+
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+ /* Handle the last 2 * PAGE_SIZE bytes. */
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+L(loop_large_memcpy_2x_tail):
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/* Copy 4 * VEC a time forward with non-temporal stores. */
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- PREFETCH_ONE_SET (1, (%rsi), PREFETCHED_LOAD_SIZE * 2)
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- PREFETCH_ONE_SET (1, (%rsi), PREFETCHED_LOAD_SIZE * 3)
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+ PREFETCH_ONE_SET (1, (%rsi), PREFETCHED_LOAD_SIZE)
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+ PREFETCH_ONE_SET (1, (%rdi), PREFETCHED_LOAD_SIZE)
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VMOVU (%rsi), %VEC(0)
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VMOVU VEC_SIZE(%rsi), %VEC(1)
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VMOVU (VEC_SIZE * 2)(%rsi), %VEC(2)
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VMOVU (VEC_SIZE * 3)(%rsi), %VEC(3)
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- addq $PREFETCHED_LOAD_SIZE, %rsi
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- subq $PREFETCHED_LOAD_SIZE, %rdx
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- VMOVNT %VEC(0), (%rdi)
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- VMOVNT %VEC(1), VEC_SIZE(%rdi)
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- VMOVNT %VEC(2), (VEC_SIZE * 2)(%rdi)
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- VMOVNT %VEC(3), (VEC_SIZE * 3)(%rdi)
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- addq $PREFETCHED_LOAD_SIZE, %rdi
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- cmpq $PREFETCHED_LOAD_SIZE, %rdx
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- ja L(loop_large_forward)
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- sfence
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+ subq $-(VEC_SIZE * 4), %rsi
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+ addl $-(VEC_SIZE * 4), %edx
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+ VMOVA %VEC(0), (%rdi)
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+ VMOVA %VEC(1), VEC_SIZE(%rdi)
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+ VMOVA %VEC(2), (VEC_SIZE * 2)(%rdi)
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+ VMOVA %VEC(3), (VEC_SIZE * 3)(%rdi)
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+ subq $-(VEC_SIZE * 4), %rdi
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+ cmpl $(VEC_SIZE * 4), %edx
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+ ja L(loop_large_memcpy_2x_tail)
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+
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+L(large_memcpy_2x_end):
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/* Store the last 4 * VEC. */
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- VMOVU %VEC(5), (%rcx)
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- VMOVU %VEC(6), -VEC_SIZE(%rcx)
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- VMOVU %VEC(7), -(VEC_SIZE * 2)(%rcx)
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- VMOVU %VEC(8), -(VEC_SIZE * 3)(%rcx)
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- /* Store the first VEC. */
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- VMOVU %VEC(4), (%r11)
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+ VMOVU -(VEC_SIZE * 4)(%rsi, %rdx), %VEC(0)
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+ VMOVU -(VEC_SIZE * 3)(%rsi, %rdx), %VEC(1)
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+ VMOVU -(VEC_SIZE * 2)(%rsi, %rdx), %VEC(2)
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+ VMOVU -VEC_SIZE(%rsi, %rdx), %VEC(3)
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+
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+ VMOVU %VEC(0), -(VEC_SIZE * 4)(%rdi, %rdx)
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+ VMOVU %VEC(1), -(VEC_SIZE * 3)(%rdi, %rdx)
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+ VMOVU %VEC(2), -(VEC_SIZE * 2)(%rdi, %rdx)
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+ VMOVU %VEC(3), -VEC_SIZE(%rdi, %rdx)
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VZEROUPPER_RETURN
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-L(large_backward):
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- /* Don't use non-temporal store if there is overlap between
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- destination and source since destination may be in cache
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- when source is loaded. */
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- leaq (%rcx, %rdx), %r10
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- cmpq %r10, %r9
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- jb L(loop_4x_vec_backward)
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-L(loop_large_backward):
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- /* Copy 4 * VEC a time backward with non-temporal stores. */
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- PREFETCH_ONE_SET (-1, (%rcx), -PREFETCHED_LOAD_SIZE * 2)
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- PREFETCH_ONE_SET (-1, (%rcx), -PREFETCHED_LOAD_SIZE * 3)
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- VMOVU (%rcx), %VEC(0)
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- VMOVU -VEC_SIZE(%rcx), %VEC(1)
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- VMOVU -(VEC_SIZE * 2)(%rcx), %VEC(2)
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- VMOVU -(VEC_SIZE * 3)(%rcx), %VEC(3)
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- subq $PREFETCHED_LOAD_SIZE, %rcx
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- subq $PREFETCHED_LOAD_SIZE, %rdx
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- VMOVNT %VEC(0), (%r9)
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- VMOVNT %VEC(1), -VEC_SIZE(%r9)
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- VMOVNT %VEC(2), -(VEC_SIZE * 2)(%r9)
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- VMOVNT %VEC(3), -(VEC_SIZE * 3)(%r9)
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- subq $PREFETCHED_LOAD_SIZE, %r9
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- cmpq $PREFETCHED_LOAD_SIZE, %rdx
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- ja L(loop_large_backward)
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+ .p2align 4
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+L(large_memcpy_4x):
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+ movq %rdx, %r10
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+ /* edx will store remainder size for copying tail. */
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+ andl $(PAGE_SIZE * 4 - 1), %edx
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+ /* r10 stores outer loop counter. */
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+ shrq $(LOG_PAGE_SIZE + 2), %r10
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+ /* Copy 4x VEC at a time from 4 pages. */
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+ .p2align 4
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+L(loop_large_memcpy_4x_outer):
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+ /* ecx stores inner loop counter. */
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+ movl $(PAGE_SIZE / LARGE_LOAD_SIZE), %ecx
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+L(loop_large_memcpy_4x_inner):
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+ /* Only one prefetch set per page as doing 4 pages give more time
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+ for prefetcher to keep up. */
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+ PREFETCH_ONE_SET(1, (%rsi), PREFETCHED_LOAD_SIZE)
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+ PREFETCH_ONE_SET(1, (%rsi), PAGE_SIZE + PREFETCHED_LOAD_SIZE)
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+ PREFETCH_ONE_SET(1, (%rsi), PAGE_SIZE * 2 + PREFETCHED_LOAD_SIZE)
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+ PREFETCH_ONE_SET(1, (%rsi), PAGE_SIZE * 3 + PREFETCHED_LOAD_SIZE)
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+ /* Load vectors from rsi. */
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+ LOAD_ONE_SET((%rsi), 0, %VEC(0), %VEC(1), %VEC(2), %VEC(3))
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+ LOAD_ONE_SET((%rsi), PAGE_SIZE, %VEC(4), %VEC(5), %VEC(6), %VEC(7))
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+ LOAD_ONE_SET((%rsi), PAGE_SIZE * 2, %VEC(8), %VEC(9), %VEC(10), %VEC(11))
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+ LOAD_ONE_SET((%rsi), PAGE_SIZE * 3, %VEC(12), %VEC(13), %VEC(14), %VEC(15))
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+ subq $-LARGE_LOAD_SIZE, %rsi
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+ /* Non-temporal store vectors to rdi. */
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+ STORE_ONE_SET((%rdi), 0, %VEC(0), %VEC(1), %VEC(2), %VEC(3))
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+ STORE_ONE_SET((%rdi), PAGE_SIZE, %VEC(4), %VEC(5), %VEC(6), %VEC(7))
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+ STORE_ONE_SET((%rdi), PAGE_SIZE * 2, %VEC(8), %VEC(9), %VEC(10), %VEC(11))
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+ STORE_ONE_SET((%rdi), PAGE_SIZE * 3, %VEC(12), %VEC(13), %VEC(14), %VEC(15))
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+ subq $-LARGE_LOAD_SIZE, %rdi
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+ decl %ecx
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+ jnz L(loop_large_memcpy_4x_inner)
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+ addq $(PAGE_SIZE * 3), %rdi
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+ addq $(PAGE_SIZE * 3), %rsi
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+ decq %r10
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+ jne L(loop_large_memcpy_4x_outer)
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sfence
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- /* Store the first 4 * VEC. */
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- VMOVU %VEC(4), (%rdi)
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- VMOVU %VEC(5), VEC_SIZE(%rdi)
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- VMOVU %VEC(6), (VEC_SIZE * 2)(%rdi)
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- VMOVU %VEC(7), (VEC_SIZE * 3)(%rdi)
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- /* Store the last VEC. */
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- VMOVU %VEC(8), (%r11)
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+ /* Check if only last 4 loads are needed. */
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+ cmpl $(VEC_SIZE * 4), %edx
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+ jbe L(large_memcpy_4x_end)
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+
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+ /* Handle the last 4 * PAGE_SIZE bytes. */
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+L(loop_large_memcpy_4x_tail):
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+ /* Copy 4 * VEC a time forward with non-temporal stores. */
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+ PREFETCH_ONE_SET (1, (%rsi), PREFETCHED_LOAD_SIZE)
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+ PREFETCH_ONE_SET (1, (%rdi), PREFETCHED_LOAD_SIZE)
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+ VMOVU (%rsi), %VEC(0)
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+ VMOVU VEC_SIZE(%rsi), %VEC(1)
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+ VMOVU (VEC_SIZE * 2)(%rsi), %VEC(2)
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+ VMOVU (VEC_SIZE * 3)(%rsi), %VEC(3)
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+ subq $-(VEC_SIZE * 4), %rsi
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+ addl $-(VEC_SIZE * 4), %edx
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+ VMOVA %VEC(0), (%rdi)
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+ VMOVA %VEC(1), VEC_SIZE(%rdi)
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+ VMOVA %VEC(2), (VEC_SIZE * 2)(%rdi)
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+ VMOVA %VEC(3), (VEC_SIZE * 3)(%rdi)
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+ subq $-(VEC_SIZE * 4), %rdi
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+ cmpl $(VEC_SIZE * 4), %edx
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+ ja L(loop_large_memcpy_4x_tail)
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+
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+L(large_memcpy_4x_end):
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+ /* Store the last 4 * VEC. */
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+ VMOVU -(VEC_SIZE * 4)(%rsi, %rdx), %VEC(0)
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|
+ VMOVU -(VEC_SIZE * 3)(%rsi, %rdx), %VEC(1)
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+ VMOVU -(VEC_SIZE * 2)(%rsi, %rdx), %VEC(2)
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+ VMOVU -VEC_SIZE(%rsi, %rdx), %VEC(3)
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+
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+ VMOVU %VEC(0), -(VEC_SIZE * 4)(%rdi, %rdx)
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+ VMOVU %VEC(1), -(VEC_SIZE * 3)(%rdi, %rdx)
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+ VMOVU %VEC(2), -(VEC_SIZE * 2)(%rdi, %rdx)
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+ VMOVU %VEC(3), -VEC_SIZE(%rdi, %rdx)
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VZEROUPPER_RETURN
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#endif
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END (MEMMOVE_SYMBOL (__memmove, unaligned_erms))
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--
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GitLab
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