335 lines
11 KiB
Diff
335 lines
11 KiB
Diff
commit 10624a97e8e47004985740cbb04060a84cfada76
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Author: Matheus Castanho <msc@linux.ibm.com>
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Date: Tue Sep 29 15:40:08 2020 -0300
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powerpc: Add optimized strlen for POWER10
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Improvements compared to POWER9 version:
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1. Take into account first 16B comparison for aligned strings
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The previous version compares the first 16B and increments r4 by the number
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of bytes until the address is 16B-aligned, then starts doing aligned loads at
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that address. For aligned strings, this causes the first 16B to be compared
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twice, because the increment is 0. Here we calculate the next 16B-aligned
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address differently, which avoids that issue.
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2. Use simple comparisons for the first ~192 bytes
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The main loop is good for big strings, but comparing 16B each time is better
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for smaller strings. So after aligning the address to 16 Bytes, we check
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more 176B in 16B chunks. There may be some overlaps with the main loop for
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unaligned strings, but we avoid using the more aggressive strategy too soon,
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and also allow the loop to start at a 64B-aligned address. This greatly
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benefits smaller strings and avoids overlapping checks if the string is
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already aligned at a 64B boundary.
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3. Reduce dependencies between load blocks caused by address calculation on loop
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Doing a precise time tracing on the code showed many loads in the loop were
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stalled waiting for updates to r4 from previous code blocks. This
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implementation avoids that as much as possible by using 2 registers (r4 and
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r5) to hold addresses to be used by different parts of the code.
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Also, the previous code aligned the address to 16B, then to 64B by doing a
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few 48B loops (if needed) until the address was aligned. The main loop could
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not start until that 48B loop had finished and r4 was updated with the
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current address. Here we calculate the address used by the loop very early,
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so it can start sooner.
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The main loop now uses 2 pointers 128B apart to make pointer updates less
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frequent, and also unrolls 1 iteration to guarantee there is enough time
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between iterations to update the pointers, reducing stalled cycles.
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4. Use new P10 instructions
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lxvp is used to load 32B with a single instruction, reducing contention in
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the load queue.
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vextractbm allows simplifying the tail code for the loop, replacing
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vbpermq and avoiding having to generate a permute control vector.
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Reviewed-by: Paul E Murphy <murphyp@linux.ibm.com>
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Reviewed-by: Raphael M Zinsly <rzinsly@linux.ibm.com>
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Reviewed-by: Lucas A. M. Magalhaes <lamm@linux.ibm.com>
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diff --git a/sysdeps/powerpc/powerpc64/le/power10/strlen.S b/sysdeps/powerpc/powerpc64/le/power10/strlen.S
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new file mode 100644
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index 0000000000000000..ca7e9eb3d84c9b00
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--- /dev/null
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+++ b/sysdeps/powerpc/powerpc64/le/power10/strlen.S
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@@ -0,0 +1,221 @@
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+/* Optimized strlen implementation for POWER10 LE.
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+ Copyright (C) 2021 Free Software Foundation, Inc.
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+ This file is part of the GNU C Library.
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+
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+ The GNU C Library is free software; you can redistribute it and/or
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+ modify it under the terms of the GNU Lesser General Public
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+ License as published by the Free Software Foundation; either
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+ version 2.1 of the License, or (at your option) any later version.
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+
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+ The GNU C Library is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ Lesser General Public License for more details.
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+
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+ You should have received a copy of the GNU Lesser General Public
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+ License along with the GNU C Library; if not, see
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+ <https://www.gnu.org/licenses/>. */
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+
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+#include <sysdep.h>
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+
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+#ifndef STRLEN
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+# define STRLEN __strlen
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+# define DEFINE_STRLEN_HIDDEN_DEF 1
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+#endif
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+
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+/* TODO: Replace macros by the actual instructions when minimum binutils becomes
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+ >= 2.35. This is used to keep compatibility with older versions. */
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+#define VEXTRACTBM(rt,vrb) \
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+ .long(((4)<<(32-6)) \
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+ | ((rt)<<(32-11)) \
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+ | ((8)<<(32-16)) \
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+ | ((vrb)<<(32-21)) \
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+ | 1602)
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+
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+#define LXVP(xtp,dq,ra) \
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+ .long(((6)<<(32-6)) \
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+ | ((((xtp)-32)>>1)<<(32-10)) \
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+ | ((1)<<(32-11)) \
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+ | ((ra)<<(32-16)) \
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+ | dq)
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+
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+#define CHECK16(vreg,offset,addr,label) \
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+ lxv vreg+32,offset(addr); \
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+ vcmpequb. vreg,vreg,v18; \
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+ bne cr6,L(label);
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+
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+/* Load 4 quadwords, merge into one VR for speed and check for NULLs. r6 has #
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+ of bytes already checked. */
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+#define CHECK64(offset,addr,label) \
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+ li r6,offset; \
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+ LXVP(v4+32,offset,addr); \
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+ LXVP(v6+32,offset+32,addr); \
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+ vminub v14,v4,v5; \
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+ vminub v15,v6,v7; \
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+ vminub v16,v14,v15; \
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+ vcmpequb. v0,v16,v18; \
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+ bne cr6,L(label)
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+
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+#define TAIL(vreg,increment) \
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+ vctzlsbb r4,vreg; \
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+ subf r3,r3,r5; \
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+ addi r4,r4,increment; \
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+ add r3,r3,r4; \
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+ blr
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+
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+/* Implements the function
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+
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+ int [r3] strlen (const void *s [r3])
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+
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+ The implementation can load bytes past a matching byte, but only
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+ up to the next 64B boundary, so it never crosses a page. */
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+
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+.machine power9
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+
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+ENTRY_TOCLESS (STRLEN, 4)
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+ CALL_MCOUNT 1
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+
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+ vspltisb v18,0
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+ vspltisb v19,-1
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+
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+ /* Next 16B-aligned address. Prepare address for L(aligned). */
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+ addi r5,r3,16
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+ clrrdi r5,r5,4
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+
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+ /* Align data and fill bytes not loaded with non matching char. */
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+ lvx v0,0,r3
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+ lvsr v1,0,r3
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+ vperm v0,v19,v0,v1
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+
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+ vcmpequb. v6,v0,v18
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+ beq cr6,L(aligned)
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+
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+ vctzlsbb r3,v6
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+ blr
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+
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+ /* Test next 176B, 16B at a time. The main loop is optimized for longer
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+ strings, so checking the first bytes in 16B chunks benefits a lot
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+ small strings. */
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+ .p2align 5
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+L(aligned):
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+ /* Prepare address for the loop. */
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+ addi r4,r3,192
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+ clrrdi r4,r4,6
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+
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+ CHECK16(v0,0,r5,tail1)
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+ CHECK16(v1,16,r5,tail2)
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+ CHECK16(v2,32,r5,tail3)
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+ CHECK16(v3,48,r5,tail4)
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+ CHECK16(v4,64,r5,tail5)
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+ CHECK16(v5,80,r5,tail6)
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+ CHECK16(v6,96,r5,tail7)
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+ CHECK16(v7,112,r5,tail8)
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+ CHECK16(v8,128,r5,tail9)
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+ CHECK16(v9,144,r5,tail10)
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+ CHECK16(v10,160,r5,tail11)
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+
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+ addi r5,r4,128
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+
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+ /* Switch to a more aggressive approach checking 64B each time. Use 2
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+ pointers 128B apart and unroll the loop once to make the pointer
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+ updates and usages separated enough to avoid stalls waiting for
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+ address calculation. */
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+ .p2align 5
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+L(loop):
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+ CHECK64(0,r4,pre_tail_64b)
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+ CHECK64(64,r4,pre_tail_64b)
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+ addi r4,r4,256
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+
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+ CHECK64(0,r5,tail_64b)
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+ CHECK64(64,r5,tail_64b)
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+ addi r5,r5,256
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+
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+ b L(loop)
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+
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+ .p2align 5
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+L(pre_tail_64b):
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+ mr r5,r4
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+L(tail_64b):
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+ /* OK, we found a null byte. Let's look for it in the current 64-byte
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+ block and mark it in its corresponding VR. lxvp vx,0(ry) puts the
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+ low 16B bytes into vx+1, and the high into vx, so the order here is
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+ v5, v4, v7, v6. */
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+ vcmpequb v1,v5,v18
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+ vcmpequb v2,v4,v18
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+ vcmpequb v3,v7,v18
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+ vcmpequb v4,v6,v18
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+
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+ /* Take into account the other 64B blocks we had already checked. */
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+ add r5,r5,r6
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+
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+ /* Extract first bit of each byte. */
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+ VEXTRACTBM(r7,v1)
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+ VEXTRACTBM(r8,v2)
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+ VEXTRACTBM(r9,v3)
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+ VEXTRACTBM(r10,v4)
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+
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+ /* Shift each value into their corresponding position. */
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+ sldi r8,r8,16
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+ sldi r9,r9,32
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+ sldi r10,r10,48
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+
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+ /* Merge the results. */
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+ or r7,r7,r8
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+ or r8,r9,r10
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+ or r10,r8,r7
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+
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+ cnttzd r0,r10 /* Count trailing zeros before the match. */
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+ subf r5,r3,r5
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+ add r3,r5,r0 /* Compute final length. */
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+ blr
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+
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+ .p2align 5
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+L(tail1):
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+ TAIL(v0,0)
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+
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+ .p2align 5
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+L(tail2):
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+ TAIL(v1,16)
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+
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+ .p2align 5
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+L(tail3):
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+ TAIL(v2,32)
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+
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+ .p2align 5
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+L(tail4):
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+ TAIL(v3,48)
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+
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+ .p2align 5
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+L(tail5):
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+ TAIL(v4,64)
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+
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+ .p2align 5
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+L(tail6):
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+ TAIL(v5,80)
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+
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+ .p2align 5
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+L(tail7):
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+ TAIL(v6,96)
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+
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+ .p2align 5
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+L(tail8):
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+ TAIL(v7,112)
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+
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+ .p2align 5
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+L(tail9):
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+ TAIL(v8,128)
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+
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+ .p2align 5
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+L(tail10):
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+ TAIL(v9,144)
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+
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+ .p2align 5
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+L(tail11):
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+ TAIL(v10,160)
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+
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+END (STRLEN)
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+
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+#ifdef DEFINE_STRLEN_HIDDEN_DEF
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+weak_alias (__strlen, strlen)
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+libc_hidden_builtin_def (strlen)
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+#endif
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/Makefile b/sysdeps/powerpc/powerpc64/multiarch/Makefile
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index a9e13e05e90601cd..61652b65dd223018 100644
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--- a/sysdeps/powerpc/powerpc64/multiarch/Makefile
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+++ b/sysdeps/powerpc/powerpc64/multiarch/Makefile
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@@ -33,7 +33,8 @@ sysdep_routines += memcpy-power8-cached memcpy-power7 memcpy-a2 memcpy-power6 \
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ifneq (,$(filter %le,$(config-machine)))
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sysdep_routines += strcmp-power9 strncmp-power9 strcpy-power9 stpcpy-power9 \
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- rawmemchr-power9 strlen-power9 strncpy-power9 stpncpy-power9
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+ rawmemchr-power9 strlen-power9 strncpy-power9 stpncpy-power9 \
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+ strlen-power10
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endif
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CFLAGS-strncase-power7.c += -mcpu=power7 -funroll-loops
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CFLAGS-strncase_l-power7.c += -mcpu=power7 -funroll-loops
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
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index b30bc53930fc0e36..46d5956adda72b86 100644
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--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
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+++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
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@@ -112,6 +112,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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/* Support sysdeps/powerpc/powerpc64/multiarch/strlen.c. */
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IFUNC_IMPL (i, name, strlen,
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#ifdef __LITTLE_ENDIAN__
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+ IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_3_1,
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+ __strlen_power10)
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IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_3_00,
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__strlen_power9)
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#endif
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/strlen-power10.S b/sysdeps/powerpc/powerpc64/multiarch/strlen-power10.S
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new file mode 100644
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index 0000000000000000..6a774fad58c77179
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--- /dev/null
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+++ b/sysdeps/powerpc/powerpc64/multiarch/strlen-power10.S
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@@ -0,0 +1,2 @@
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+#define STRLEN __strlen_power10
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+#include <sysdeps/powerpc/powerpc64/le/power10/strlen.S>
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/strlen.c b/sysdeps/powerpc/powerpc64/multiarch/strlen.c
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index b7f0fbb13fb97783..11bdb96de2d2aa66 100644
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--- a/sysdeps/powerpc/powerpc64/multiarch/strlen.c
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+++ b/sysdeps/powerpc/powerpc64/multiarch/strlen.c
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@@ -31,9 +31,12 @@ extern __typeof (__redirect_strlen) __strlen_ppc attribute_hidden;
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extern __typeof (__redirect_strlen) __strlen_power7 attribute_hidden;
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extern __typeof (__redirect_strlen) __strlen_power8 attribute_hidden;
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extern __typeof (__redirect_strlen) __strlen_power9 attribute_hidden;
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+extern __typeof (__redirect_strlen) __strlen_power10 attribute_hidden;
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libc_ifunc (__libc_strlen,
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# ifdef __LITTLE_ENDIAN__
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+ (hwcap2 & PPC_FEATURE2_ARCH_3_1)
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+ ? __strlen_power10 :
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(hwcap2 & PPC_FEATURE2_ARCH_3_00)
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? __strlen_power9 :
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# endif
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