02cfe04e36
Resolves: RHEL-15696 Includes two additional (well, 1.5) upstream patches to resolve roundeven redirects.
144 lines
4.4 KiB
Diff
144 lines
4.4 KiB
Diff
From d154758e618ec9324f5d339c46db0aa27e8b1226 Mon Sep 17 00:00:00 2001
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From: Noah Goldstein <goldstein.w.n@gmail.com>
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Date: Wed, 23 Mar 2022 16:57:38 -0500
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Subject: [PATCH] x86: Optimize str{n}casecmp TOLOWER logic in strcmp-sse42.S
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Content-type: text/plain; charset=UTF-8
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Slightly faster method of doing TOLOWER that saves an
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instruction.
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Also replace the hard coded 5-byte no with .p2align 4. On builds with
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CET enabled this misaligned entry to strcasecmp.
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geometric_mean(N=40) of all benchmarks New / Original: .920
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All string/memory tests pass.
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Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
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---
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sysdeps/x86_64/multiarch/strcmp-sse42.S | 83 +++++++++++--------------
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1 file changed, 35 insertions(+), 48 deletions(-)
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diff --git a/sysdeps/x86_64/multiarch/strcmp-sse42.S b/sysdeps/x86_64/multiarch/strcmp-sse42.S
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index d8fdeb3a..59e8ddfc 100644
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--- a/sysdeps/x86_64/multiarch/strcmp-sse42.S
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+++ b/sysdeps/x86_64/multiarch/strcmp-sse42.S
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@@ -89,9 +89,8 @@ ENTRY (GLABEL(__strcasecmp))
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movq __libc_tsd_LOCALE@gottpoff(%rip),%rax
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mov %fs:(%rax),%RDX_LP
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- // XXX 5 byte should be before the function
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- /* 5-byte NOP. */
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- .byte 0x0f,0x1f,0x44,0x00,0x00
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+ /* Either 1 or 5 bytes (dependeing if CET is enabled). */
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+ .p2align 4
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END (GLABEL(__strcasecmp))
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/* FALLTHROUGH to strcasecmp_l. */
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#endif
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@@ -100,9 +99,8 @@ ENTRY (GLABEL(__strncasecmp))
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movq __libc_tsd_LOCALE@gottpoff(%rip),%rax
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mov %fs:(%rax),%RCX_LP
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- // XXX 5 byte should be before the function
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- /* 5-byte NOP. */
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- .byte 0x0f,0x1f,0x44,0x00,0x00
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+ /* Either 1 or 5 bytes (dependeing if CET is enabled). */
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+ .p2align 4
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END (GLABEL(__strncasecmp))
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/* FALLTHROUGH to strncasecmp_l. */
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#endif
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@@ -170,27 +168,22 @@ STRCMP_SSE42:
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#if defined USE_AS_STRCASECMP_L || defined USE_AS_STRNCASECMP_L
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.section .rodata.cst16,"aM",@progbits,16
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.align 16
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-LABEL(belowupper):
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- .quad 0x4040404040404040
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- .quad 0x4040404040404040
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-LABEL(topupper):
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-# ifdef USE_AVX
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- .quad 0x5a5a5a5a5a5a5a5a
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- .quad 0x5a5a5a5a5a5a5a5a
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-# else
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- .quad 0x5b5b5b5b5b5b5b5b
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- .quad 0x5b5b5b5b5b5b5b5b
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-# endif
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-LABEL(touppermask):
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+LABEL(lcase_min):
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+ .quad 0x3f3f3f3f3f3f3f3f
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+ .quad 0x3f3f3f3f3f3f3f3f
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+LABEL(lcase_max):
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+ .quad 0x9999999999999999
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+ .quad 0x9999999999999999
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+LABEL(case_add):
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.quad 0x2020202020202020
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.quad 0x2020202020202020
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.previous
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- movdqa LABEL(belowupper)(%rip), %xmm4
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-# define UCLOW_reg %xmm4
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- movdqa LABEL(topupper)(%rip), %xmm5
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-# define UCHIGH_reg %xmm5
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- movdqa LABEL(touppermask)(%rip), %xmm6
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-# define LCQWORD_reg %xmm6
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+ movdqa LABEL(lcase_min)(%rip), %xmm4
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+# define LCASE_MIN_reg %xmm4
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+ movdqa LABEL(lcase_max)(%rip), %xmm5
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+# define LCASE_MAX_reg %xmm5
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+ movdqa LABEL(case_add)(%rip), %xmm6
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+# define CASE_ADD_reg %xmm6
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#endif
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cmp $0x30, %ecx
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ja LABEL(crosscache)/* rsi: 16-byte load will cross cache line */
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@@ -201,32 +194,26 @@ LABEL(touppermask):
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#if defined USE_AS_STRCASECMP_L || defined USE_AS_STRNCASECMP_L
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# ifdef USE_AVX
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# define TOLOWER(reg1, reg2) \
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- vpcmpgtb UCLOW_reg, reg1, %xmm7; \
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- vpcmpgtb UCHIGH_reg, reg1, %xmm8; \
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- vpcmpgtb UCLOW_reg, reg2, %xmm9; \
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- vpcmpgtb UCHIGH_reg, reg2, %xmm10; \
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- vpandn %xmm7, %xmm8, %xmm8; \
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- vpandn %xmm9, %xmm10, %xmm10; \
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- vpand LCQWORD_reg, %xmm8, %xmm8; \
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- vpand LCQWORD_reg, %xmm10, %xmm10; \
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- vpor reg1, %xmm8, reg1; \
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- vpor reg2, %xmm10, reg2
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+ vpaddb LCASE_MIN_reg, reg1, %xmm7; \
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+ vpaddb LCASE_MIN_reg, reg2, %xmm8; \
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+ vpcmpgtb LCASE_MAX_reg, %xmm7, %xmm7; \
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+ vpcmpgtb LCASE_MAX_reg, %xmm8, %xmm8; \
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+ vpandn CASE_ADD_reg, %xmm7, %xmm7; \
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+ vpandn CASE_ADD_reg, %xmm8, %xmm8; \
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+ vpaddb %xmm7, reg1, reg1; \
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+ vpaddb %xmm8, reg2, reg2
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# else
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# define TOLOWER(reg1, reg2) \
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- movdqa reg1, %xmm7; \
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- movdqa UCHIGH_reg, %xmm8; \
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- movdqa reg2, %xmm9; \
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- movdqa UCHIGH_reg, %xmm10; \
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- pcmpgtb UCLOW_reg, %xmm7; \
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- pcmpgtb reg1, %xmm8; \
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- pcmpgtb UCLOW_reg, %xmm9; \
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- pcmpgtb reg2, %xmm10; \
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- pand %xmm8, %xmm7; \
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- pand %xmm10, %xmm9; \
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- pand LCQWORD_reg, %xmm7; \
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- pand LCQWORD_reg, %xmm9; \
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- por %xmm7, reg1; \
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- por %xmm9, reg2
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+ movdqa LCASE_MIN_reg, %xmm7; \
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+ movdqa LCASE_MIN_reg, %xmm8; \
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+ paddb reg1, %xmm7; \
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+ paddb reg2, %xmm8; \
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+ pcmpgtb LCASE_MAX_reg, %xmm7; \
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+ pcmpgtb LCASE_MAX_reg, %xmm8; \
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+ pandn CASE_ADD_reg, %xmm7; \
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+ pandn CASE_ADD_reg, %xmm8; \
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+ paddb %xmm7, reg1; \
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+ paddb %xmm8, reg2
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# endif
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TOLOWER (%xmm1, %xmm2)
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#else
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--
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GitLab
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