02cfe04e36
Resolves: RHEL-15696 Includes two additional (well, 1.5) upstream patches to resolve roundeven redirects.
562 lines
15 KiB
Diff
562 lines
15 KiB
Diff
From 91264fe3577fe887b4860923fa6142b5274c8965 Mon Sep 17 00:00:00 2001
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From: "H.J. Lu" <hjl.tools@gmail.com>
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Date: Fri, 5 Mar 2021 07:20:28 -0800
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Subject: [PATCH] x86-64: Add memcmp family functions with 256-bit EVEX
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Content-type: text/plain; charset=UTF-8
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Update ifunc-memcmp.h to select the function optimized with 256-bit EVEX
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instructions using YMM16-YMM31 registers to avoid RTM abort with usable
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AVX512VL, AVX512BW and MOVBE since VZEROUPPER isn't needed at function
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exit.
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---
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sysdeps/x86_64/multiarch/Makefile | 4 +-
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sysdeps/x86_64/multiarch/ifunc-impl-list.c | 10 +
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sysdeps/x86_64/multiarch/ifunc-memcmp.h | 13 +-
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sysdeps/x86_64/multiarch/memcmp-evex-movbe.S | 440 ++++++++++++++++++
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sysdeps/x86_64/multiarch/wmemcmp-evex-movbe.S | 4 +
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5 files changed, 467 insertions(+), 4 deletions(-)
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create mode 100644 sysdeps/x86_64/multiarch/memcmp-evex-movbe.S
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create mode 100644 sysdeps/x86_64/multiarch/wmemcmp-evex-movbe.S
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diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile
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index 1cc0a10e..9d79b138 100644
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--- a/sysdeps/x86_64/multiarch/Makefile
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+++ b/sysdeps/x86_64/multiarch/Makefile
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@@ -41,6 +41,7 @@ sysdep_routines += strncat-c stpncpy-c strncpy-c \
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memset-avx2-unaligned-erms \
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memset-avx512-unaligned-erms \
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memchr-evex \
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+ memcmp-evex-movbe \
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memmove-evex-unaligned-erms \
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memrchr-evex \
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memset-evex-unaligned-erms \
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@@ -81,7 +82,8 @@ sysdep_routines += wmemcmp-sse4 wmemcmp-ssse3 wmemcmp-c \
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wcsncmp-evex \
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wcsnlen-evex \
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wcsrchr-evex \
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- wmemchr-evex
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+ wmemchr-evex \
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+ wmemcmp-evex-movbe
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endif
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ifeq ($(subdir),debug)
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diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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index 7cf83485..c8da910e 100644
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--- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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+++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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@@ -56,6 +56,11 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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(CPU_FEATURE_USABLE (AVX2)
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&& CPU_FEATURE_USABLE (MOVBE)),
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__memcmp_avx2_movbe)
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+ IFUNC_IMPL_ADD (array, i, memcmp,
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (MOVBE)),
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+ __memcmp_evex_movbe)
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IFUNC_IMPL_ADD (array, i, memcmp, CPU_FEATURE_USABLE (SSE4_1),
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__memcmp_sse4_1)
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IFUNC_IMPL_ADD (array, i, memcmp, CPU_FEATURE_USABLE (SSSE3),
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@@ -558,6 +563,11 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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(CPU_FEATURE_USABLE (AVX2)
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&& CPU_FEATURE_USABLE (MOVBE)),
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__wmemcmp_avx2_movbe)
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+ IFUNC_IMPL_ADD (array, i, wmemcmp,
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (MOVBE)),
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+ __wmemcmp_evex_movbe)
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IFUNC_IMPL_ADD (array, i, wmemcmp, CPU_FEATURE_USABLE (SSE4_1),
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__wmemcmp_sse4_1)
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IFUNC_IMPL_ADD (array, i, wmemcmp, CPU_FEATURE_USABLE (SSSE3),
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diff --git a/sysdeps/x86_64/multiarch/ifunc-memcmp.h b/sysdeps/x86_64/multiarch/ifunc-memcmp.h
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index 6c1f3153..3ca1f0a6 100644
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--- a/sysdeps/x86_64/multiarch/ifunc-memcmp.h
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+++ b/sysdeps/x86_64/multiarch/ifunc-memcmp.h
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@@ -23,17 +23,24 @@ extern __typeof (REDIRECT_NAME) OPTIMIZE (sse2) attribute_hidden;
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extern __typeof (REDIRECT_NAME) OPTIMIZE (ssse3) attribute_hidden;
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extern __typeof (REDIRECT_NAME) OPTIMIZE (sse4_1) attribute_hidden;
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extern __typeof (REDIRECT_NAME) OPTIMIZE (avx2_movbe) attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE (evex_movbe) attribute_hidden;
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static inline void *
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IFUNC_SELECTOR (void)
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{
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const struct cpu_features* cpu_features = __get_cpu_features ();
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- if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER)
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- && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
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+ if (CPU_FEATURE_USABLE_P (cpu_features, AVX2)
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&& CPU_FEATURE_USABLE_P (cpu_features, MOVBE)
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&& CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
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- return OPTIMIZE (avx2_movbe);
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+ {
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+ if (CPU_FEATURE_USABLE_P (cpu_features, AVX512VL)
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+ && CPU_FEATURE_USABLE_P (cpu_features, AVX512BW))
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+ return OPTIMIZE (evex_movbe);
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+
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+ if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER))
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+ return OPTIMIZE (avx2_movbe);
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+ }
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if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_1))
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return OPTIMIZE (sse4_1);
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diff --git a/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S b/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S
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new file mode 100644
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index 00000000..9c093972
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--- /dev/null
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+++ b/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S
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@@ -0,0 +1,440 @@
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+/* memcmp/wmemcmp optimized with 256-bit EVEX instructions.
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+ Copyright (C) 2021 Free Software Foundation, Inc.
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+ This file is part of the GNU C Library.
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+
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+ The GNU C Library is free software; you can redistribute it and/or
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+ modify it under the terms of the GNU Lesser General Public
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+ License as published by the Free Software Foundation; either
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+ version 2.1 of the License, or (at your option) any later version.
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+
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+ The GNU C Library is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ Lesser General Public License for more details.
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+
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+ You should have received a copy of the GNU Lesser General Public
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+ License along with the GNU C Library; if not, see
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+ <https://www.gnu.org/licenses/>. */
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+
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+#if IS_IN (libc)
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+
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+/* memcmp/wmemcmp is implemented as:
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+ 1. For size from 2 to 7 bytes, load as big endian with movbe and bswap
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+ to avoid branches.
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+ 2. Use overlapping compare to avoid branch.
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+ 3. Use vector compare when size >= 4 bytes for memcmp or size >= 8
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+ bytes for wmemcmp.
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+ 4. If size is 8 * VEC_SIZE or less, unroll the loop.
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+ 5. Compare 4 * VEC_SIZE at a time with the aligned first memory
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+ area.
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+ 6. Use 2 vector compares when size is 2 * VEC_SIZE or less.
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+ 7. Use 4 vector compares when size is 4 * VEC_SIZE or less.
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+ 8. Use 8 vector compares when size is 8 * VEC_SIZE or less. */
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+
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+# include <sysdep.h>
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+
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+# ifndef MEMCMP
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+# define MEMCMP __memcmp_evex_movbe
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+# endif
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+
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+# define VMOVU vmovdqu64
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+
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+# ifdef USE_AS_WMEMCMP
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+# define VPCMPEQ vpcmpeqd
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+# else
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+# define VPCMPEQ vpcmpeqb
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+# endif
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+
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+# define XMM1 xmm17
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+# define XMM2 xmm18
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+# define YMM1 ymm17
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+# define YMM2 ymm18
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+# define YMM3 ymm19
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+# define YMM4 ymm20
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+# define YMM5 ymm21
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+# define YMM6 ymm22
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+
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+# define VEC_SIZE 32
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+# ifdef USE_AS_WMEMCMP
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+# define VEC_MASK 0xff
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+# define XMM_MASK 0xf
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+# else
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+# define VEC_MASK 0xffffffff
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+# define XMM_MASK 0xffff
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+# endif
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+
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+/* Warning!
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+ wmemcmp has to use SIGNED comparison for elements.
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+ memcmp has to use UNSIGNED comparison for elemnts.
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+*/
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+
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+ .section .text.evex,"ax",@progbits
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+ENTRY (MEMCMP)
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+# ifdef USE_AS_WMEMCMP
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+ shl $2, %RDX_LP
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+# elif defined __ILP32__
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+ /* Clear the upper 32 bits. */
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+ movl %edx, %edx
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+# endif
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+ cmp $VEC_SIZE, %RDX_LP
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+ jb L(less_vec)
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+
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+ /* From VEC to 2 * VEC. No branch when size == VEC_SIZE. */
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+ VMOVU (%rsi), %YMM2
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+ VPCMPEQ (%rdi), %YMM2, %k1
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+ kmovd %k1, %eax
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+ subl $VEC_MASK, %eax
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+ jnz L(first_vec)
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+
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+ cmpq $(VEC_SIZE * 2), %rdx
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+ jbe L(last_vec)
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+
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+ /* More than 2 * VEC. */
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+ cmpq $(VEC_SIZE * 8), %rdx
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+ ja L(more_8x_vec)
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+ cmpq $(VEC_SIZE * 4), %rdx
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+ jb L(last_4x_vec)
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+
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+ /* From 4 * VEC to 8 * VEC, inclusively. */
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+ VMOVU (%rsi), %YMM1
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+ VPCMPEQ (%rdi), %YMM1, %k1
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+
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+ VMOVU VEC_SIZE(%rsi), %YMM2
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+ VPCMPEQ VEC_SIZE(%rdi), %YMM2, %k2
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+
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+ VMOVU (VEC_SIZE * 2)(%rsi), %YMM3
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+ VPCMPEQ (VEC_SIZE * 2)(%rdi), %YMM3, %k3
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+
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+ VMOVU (VEC_SIZE * 3)(%rsi), %YMM4
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+ VPCMPEQ (VEC_SIZE * 3)(%rdi), %YMM4, %k4
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+
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+ kandd %k1, %k2, %k5
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+ kandd %k3, %k4, %k6
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+ kandd %k5, %k6, %k6
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+
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+ kmovd %k6, %eax
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+ cmpl $VEC_MASK, %eax
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+ jne L(4x_vec_end)
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+
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+ leaq -(4 * VEC_SIZE)(%rdi, %rdx), %rdi
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+ leaq -(4 * VEC_SIZE)(%rsi, %rdx), %rsi
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+ VMOVU (%rsi), %YMM1
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+ VPCMPEQ (%rdi), %YMM1, %k1
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+
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+ VMOVU VEC_SIZE(%rsi), %YMM2
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+ VPCMPEQ VEC_SIZE(%rdi), %YMM2, %k2
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+ kandd %k1, %k2, %k5
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+
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+ VMOVU (VEC_SIZE * 2)(%rsi), %YMM3
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+ VPCMPEQ (VEC_SIZE * 2)(%rdi), %YMM3, %k3
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+ kandd %k3, %k5, %k5
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+
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+ VMOVU (VEC_SIZE * 3)(%rsi), %YMM4
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+ VPCMPEQ (VEC_SIZE * 3)(%rdi), %YMM4, %k4
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+ kandd %k4, %k5, %k5
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+
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+ kmovd %k5, %eax
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+ cmpl $VEC_MASK, %eax
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+ jne L(4x_vec_end)
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+ xorl %eax, %eax
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+ ret
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+
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+ .p2align 4
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+L(last_2x_vec):
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+ /* From VEC to 2 * VEC. No branch when size == VEC_SIZE. */
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+ VMOVU (%rsi), %YMM2
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+ VPCMPEQ (%rdi), %YMM2, %k2
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+ kmovd %k2, %eax
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+ subl $VEC_MASK, %eax
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+ jnz L(first_vec)
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+
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+L(last_vec):
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+ /* Use overlapping loads to avoid branches. */
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+ leaq -VEC_SIZE(%rdi, %rdx), %rdi
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+ leaq -VEC_SIZE(%rsi, %rdx), %rsi
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+ VMOVU (%rsi), %YMM2
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+ VPCMPEQ (%rdi), %YMM2, %k2
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+ kmovd %k2, %eax
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+ subl $VEC_MASK, %eax
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+ jnz L(first_vec)
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+ ret
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+
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+ .p2align 4
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+L(first_vec):
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+ /* A byte or int32 is different within 16 or 32 bytes. */
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+ tzcntl %eax, %ecx
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+# ifdef USE_AS_WMEMCMP
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+ xorl %eax, %eax
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+ movl (%rdi, %rcx, 4), %edx
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+ cmpl (%rsi, %rcx, 4), %edx
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+L(wmemcmp_return):
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+ setl %al
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+ negl %eax
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+ orl $1, %eax
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+# else
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+ movzbl (%rdi, %rcx), %eax
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+ movzbl (%rsi, %rcx), %edx
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+ sub %edx, %eax
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+# endif
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+ ret
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+
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+# ifdef USE_AS_WMEMCMP
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+ .p2align 4
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+L(4):
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+ xorl %eax, %eax
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+ movl (%rdi), %edx
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+ cmpl (%rsi), %edx
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+ jne L(wmemcmp_return)
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+ ret
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+# else
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+ .p2align 4
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+L(between_4_7):
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+ /* Load as big endian with overlapping movbe to avoid branches. */
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+ movbe (%rdi), %eax
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+ movbe (%rsi), %ecx
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+ shlq $32, %rax
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+ shlq $32, %rcx
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+ movbe -4(%rdi, %rdx), %edi
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+ movbe -4(%rsi, %rdx), %esi
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+ orq %rdi, %rax
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+ orq %rsi, %rcx
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+ subq %rcx, %rax
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+ je L(exit)
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+ sbbl %eax, %eax
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+ orl $1, %eax
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+ ret
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+
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+ .p2align 4
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+L(exit):
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+ ret
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+
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+ .p2align 4
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+L(between_2_3):
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+ /* Load as big endian to avoid branches. */
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+ movzwl (%rdi), %eax
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+ movzwl (%rsi), %ecx
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+ shll $8, %eax
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+ shll $8, %ecx
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+ bswap %eax
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+ bswap %ecx
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+ movb -1(%rdi, %rdx), %al
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+ movb -1(%rsi, %rdx), %cl
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+ /* Subtraction is okay because the upper 8 bits are zero. */
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+ subl %ecx, %eax
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+ ret
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+
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+ .p2align 4
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+L(1):
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+ movzbl (%rdi), %eax
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+ movzbl (%rsi), %ecx
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+ subl %ecx, %eax
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+ ret
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+# endif
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+
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+ .p2align 4
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+L(zero):
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+ xorl %eax, %eax
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+ ret
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+
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+ .p2align 4
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+L(less_vec):
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+# ifdef USE_AS_WMEMCMP
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+ /* It can only be 0, 4, 8, 12, 16, 20, 24, 28 bytes. */
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+ cmpb $4, %dl
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+ je L(4)
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+ jb L(zero)
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+# else
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+ cmpb $1, %dl
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+ je L(1)
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+ jb L(zero)
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+ cmpb $4, %dl
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+ jb L(between_2_3)
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+ cmpb $8, %dl
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+ jb L(between_4_7)
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+# endif
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+ cmpb $16, %dl
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+ jae L(between_16_31)
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+ /* It is between 8 and 15 bytes. */
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+ vmovq (%rdi), %XMM1
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+ vmovq (%rsi), %XMM2
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+ VPCMPEQ %XMM1, %XMM2, %k2
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+ kmovw %k2, %eax
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+ subl $XMM_MASK, %eax
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+ jnz L(first_vec)
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+ /* Use overlapping loads to avoid branches. */
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+ leaq -8(%rdi, %rdx), %rdi
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+ leaq -8(%rsi, %rdx), %rsi
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+ vmovq (%rdi), %XMM1
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+ vmovq (%rsi), %XMM2
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+ VPCMPEQ %XMM1, %XMM2, %k2
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+ kmovw %k2, %eax
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+ subl $XMM_MASK, %eax
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+ jnz L(first_vec)
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+ ret
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+
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+ .p2align 4
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+L(between_16_31):
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+ /* From 16 to 31 bytes. No branch when size == 16. */
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+ VMOVU (%rsi), %XMM2
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+ VPCMPEQ (%rdi), %XMM2, %k2
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+ kmovw %k2, %eax
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+ subl $XMM_MASK, %eax
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+ jnz L(first_vec)
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+
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+ /* Use overlapping loads to avoid branches. */
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+ leaq -16(%rdi, %rdx), %rdi
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+ leaq -16(%rsi, %rdx), %rsi
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+ VMOVU (%rsi), %XMM2
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+ VPCMPEQ (%rdi), %XMM2, %k2
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+ kmovw %k2, %eax
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+ subl $XMM_MASK, %eax
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+ jnz L(first_vec)
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+ ret
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+
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+ .p2align 4
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+L(more_8x_vec):
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+ /* More than 8 * VEC. Check the first VEC. */
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+ VMOVU (%rsi), %YMM2
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+ VPCMPEQ (%rdi), %YMM2, %k2
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+ kmovd %k2, %eax
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+ subl $VEC_MASK, %eax
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+ jnz L(first_vec)
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+
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+ /* Align the first memory area for aligned loads in the loop.
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+ Compute how much the first memory area is misaligned. */
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+ movq %rdi, %rcx
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+ andl $(VEC_SIZE - 1), %ecx
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+ /* Get the negative of offset for alignment. */
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+ subq $VEC_SIZE, %rcx
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+ /* Adjust the second memory area. */
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+ subq %rcx, %rsi
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|
+ /* Adjust the first memory area which should be aligned now. */
|
|
+ subq %rcx, %rdi
|
|
+ /* Adjust length. */
|
|
+ addq %rcx, %rdx
|
|
+
|
|
+L(loop_4x_vec):
|
|
+ /* Compare 4 * VEC at a time forward. */
|
|
+ VMOVU (%rsi), %YMM1
|
|
+ VPCMPEQ (%rdi), %YMM1, %k1
|
|
+
|
|
+ VMOVU VEC_SIZE(%rsi), %YMM2
|
|
+ VPCMPEQ VEC_SIZE(%rdi), %YMM2, %k2
|
|
+ kandd %k2, %k1, %k5
|
|
+
|
|
+ VMOVU (VEC_SIZE * 2)(%rsi), %YMM3
|
|
+ VPCMPEQ (VEC_SIZE * 2)(%rdi), %YMM3, %k3
|
|
+ kandd %k3, %k5, %k5
|
|
+
|
|
+ VMOVU (VEC_SIZE * 3)(%rsi), %YMM4
|
|
+ VPCMPEQ (VEC_SIZE * 3)(%rdi), %YMM4, %k4
|
|
+ kandd %k4, %k5, %k5
|
|
+
|
|
+ kmovd %k5, %eax
|
|
+ cmpl $VEC_MASK, %eax
|
|
+ jne L(4x_vec_end)
|
|
+
|
|
+ addq $(VEC_SIZE * 4), %rdi
|
|
+ addq $(VEC_SIZE * 4), %rsi
|
|
+
|
|
+ subq $(VEC_SIZE * 4), %rdx
|
|
+ cmpq $(VEC_SIZE * 4), %rdx
|
|
+ jae L(loop_4x_vec)
|
|
+
|
|
+ /* Less than 4 * VEC. */
|
|
+ cmpq $VEC_SIZE, %rdx
|
|
+ jbe L(last_vec)
|
|
+ cmpq $(VEC_SIZE * 2), %rdx
|
|
+ jbe L(last_2x_vec)
|
|
+
|
|
+L(last_4x_vec):
|
|
+ /* From 2 * VEC to 4 * VEC. */
|
|
+ VMOVU (%rsi), %YMM2
|
|
+ VPCMPEQ (%rdi), %YMM2, %k2
|
|
+ kmovd %k2, %eax
|
|
+ subl $VEC_MASK, %eax
|
|
+ jnz L(first_vec)
|
|
+
|
|
+ addq $VEC_SIZE, %rdi
|
|
+ addq $VEC_SIZE, %rsi
|
|
+ VMOVU (%rsi), %YMM2
|
|
+ VPCMPEQ (%rdi), %YMM2, %k2
|
|
+ kmovd %k2, %eax
|
|
+ subl $VEC_MASK, %eax
|
|
+ jnz L(first_vec)
|
|
+
|
|
+ /* Use overlapping loads to avoid branches. */
|
|
+ leaq -(3 * VEC_SIZE)(%rdi, %rdx), %rdi
|
|
+ leaq -(3 * VEC_SIZE)(%rsi, %rdx), %rsi
|
|
+ VMOVU (%rsi), %YMM2
|
|
+ VPCMPEQ (%rdi), %YMM2, %k2
|
|
+ kmovd %k2, %eax
|
|
+ subl $VEC_MASK, %eax
|
|
+ jnz L(first_vec)
|
|
+
|
|
+ addq $VEC_SIZE, %rdi
|
|
+ addq $VEC_SIZE, %rsi
|
|
+ VMOVU (%rsi), %YMM2
|
|
+ VPCMPEQ (%rdi), %YMM2, %k2
|
|
+ kmovd %k2, %eax
|
|
+ subl $VEC_MASK, %eax
|
|
+ jnz L(first_vec)
|
|
+ ret
|
|
+
|
|
+ .p2align 4
|
|
+L(4x_vec_end):
|
|
+ kmovd %k1, %eax
|
|
+ subl $VEC_MASK, %eax
|
|
+ jnz L(first_vec)
|
|
+ kmovd %k2, %eax
|
|
+ subl $VEC_MASK, %eax
|
|
+ jnz L(first_vec_x1)
|
|
+ kmovd %k3, %eax
|
|
+ subl $VEC_MASK, %eax
|
|
+ jnz L(first_vec_x2)
|
|
+ kmovd %k4, %eax
|
|
+ subl $VEC_MASK, %eax
|
|
+ tzcntl %eax, %ecx
|
|
+# ifdef USE_AS_WMEMCMP
|
|
+ xorl %eax, %eax
|
|
+ movl (VEC_SIZE * 3)(%rdi, %rcx, 4), %edx
|
|
+ cmpl (VEC_SIZE * 3)(%rsi, %rcx, 4), %edx
|
|
+ jmp L(wmemcmp_return)
|
|
+# else
|
|
+ movzbl (VEC_SIZE * 3)(%rdi, %rcx), %eax
|
|
+ movzbl (VEC_SIZE * 3)(%rsi, %rcx), %edx
|
|
+ sub %edx, %eax
|
|
+# endif
|
|
+ ret
|
|
+
|
|
+ .p2align 4
|
|
+L(first_vec_x1):
|
|
+ tzcntl %eax, %ecx
|
|
+# ifdef USE_AS_WMEMCMP
|
|
+ xorl %eax, %eax
|
|
+ movl VEC_SIZE(%rdi, %rcx, 4), %edx
|
|
+ cmpl VEC_SIZE(%rsi, %rcx, 4), %edx
|
|
+ jmp L(wmemcmp_return)
|
|
+# else
|
|
+ movzbl VEC_SIZE(%rdi, %rcx), %eax
|
|
+ movzbl VEC_SIZE(%rsi, %rcx), %edx
|
|
+ sub %edx, %eax
|
|
+# endif
|
|
+ ret
|
|
+
|
|
+ .p2align 4
|
|
+L(first_vec_x2):
|
|
+ tzcntl %eax, %ecx
|
|
+# ifdef USE_AS_WMEMCMP
|
|
+ xorl %eax, %eax
|
|
+ movl (VEC_SIZE * 2)(%rdi, %rcx, 4), %edx
|
|
+ cmpl (VEC_SIZE * 2)(%rsi, %rcx, 4), %edx
|
|
+ jmp L(wmemcmp_return)
|
|
+# else
|
|
+ movzbl (VEC_SIZE * 2)(%rdi, %rcx), %eax
|
|
+ movzbl (VEC_SIZE * 2)(%rsi, %rcx), %edx
|
|
+ sub %edx, %eax
|
|
+# endif
|
|
+ ret
|
|
+END (MEMCMP)
|
|
+#endif
|
|
diff --git a/sysdeps/x86_64/multiarch/wmemcmp-evex-movbe.S b/sysdeps/x86_64/multiarch/wmemcmp-evex-movbe.S
|
|
new file mode 100644
|
|
index 00000000..4726d74a
|
|
--- /dev/null
|
|
+++ b/sysdeps/x86_64/multiarch/wmemcmp-evex-movbe.S
|
|
@@ -0,0 +1,4 @@
|
|
+#define MEMCMP __wmemcmp_evex_movbe
|
|
+#define USE_AS_WMEMCMP 1
|
|
+
|
|
+#include "memcmp-evex-movbe.S"
|
|
--
|
|
GitLab
|
|
|