commit 64f6c287ad3ccd807b7d4c694f4a91e2a662fed5 Author: H.J. Lu Date: Sat Mar 6 10:19:32 2021 -0800 x86: Handle _SC_LEVEL1_ICACHE_LINESIZE [BZ #27444] commit 2d651eb9265d1366d7b9e881bfddd46db9c1ecc4 Author: H.J. Lu Date: Fri Sep 18 07:55:14 2020 -0700 x86: Move x86 processor cache info to cpu_features missed _SC_LEVEL1_ICACHE_LINESIZE. 1. Add level1_icache_linesize to struct cpu_features. 2. Initialize level1_icache_linesize by calling handle_intel, handle_zhaoxin and handle_amd with _SC_LEVEL1_ICACHE_LINESIZE. 3. Return level1_icache_linesize for _SC_LEVEL1_ICACHE_LINESIZE. Reviewed-by: Carlos O'Donell (cherry picked from commit f53ffc9b90cbd92fa5518686daf4091bdd1d4889) diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index dd826743426ffc9c..d231263051f1c242 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -208,3 +208,11 @@ $(objpfx)check-cet.out: $(..)sysdeps/x86/check-cet.awk \ generated += check-cet.out endif endif + +ifeq ($(subdir),posix) +tests += \ + tst-sysconf-cache-linesize \ + tst-sysconf-cache-linesize-static +tests-static += \ + tst-sysconf-cache-linesize-static +endif diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index 7b8df45e3bb6eaa1..5ea4723ca69d7b62 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -32,6 +32,9 @@ __cache_sysconf (int name) case _SC_LEVEL1_ICACHE_SIZE: return cpu_features->level1_icache_size; + case _SC_LEVEL1_ICACHE_LINESIZE: + return cpu_features->level1_icache_linesize; + case _SC_LEVEL1_DCACHE_SIZE: return cpu_features->level1_dcache_size; diff --git a/sysdeps/x86/dl-cacheinfo.h b/sysdeps/x86/dl-cacheinfo.h index 6f91651f0da1d46a..2ab3acd83e1cfd97 100644 --- a/sysdeps/x86/dl-cacheinfo.h +++ b/sysdeps/x86/dl-cacheinfo.h @@ -707,6 +707,7 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) long int core; unsigned int threads = 0; unsigned long int level1_icache_size = -1; + unsigned long int level1_icache_linesize = -1; unsigned long int level1_dcache_size = -1; unsigned long int level1_dcache_assoc = -1; unsigned long int level1_dcache_linesize = -1; @@ -726,6 +727,8 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) level1_icache_size = handle_intel (_SC_LEVEL1_ICACHE_SIZE, cpu_features); + level1_icache_linesize + = handle_intel (_SC_LEVEL1_ICACHE_LINESIZE, cpu_features); level1_dcache_size = data; level1_dcache_assoc = handle_intel (_SC_LEVEL1_DCACHE_ASSOC, cpu_features); @@ -753,6 +756,7 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) shared = handle_zhaoxin (_SC_LEVEL3_CACHE_SIZE); level1_icache_size = handle_zhaoxin (_SC_LEVEL1_ICACHE_SIZE); + level1_icache_linesize = handle_zhaoxin (_SC_LEVEL1_ICACHE_LINESIZE); level1_dcache_size = data; level1_dcache_assoc = handle_zhaoxin (_SC_LEVEL1_DCACHE_ASSOC); level1_dcache_linesize = handle_zhaoxin (_SC_LEVEL1_DCACHE_LINESIZE); @@ -772,6 +776,7 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) shared = handle_amd (_SC_LEVEL3_CACHE_SIZE); level1_icache_size = handle_amd (_SC_LEVEL1_ICACHE_SIZE); + level1_icache_linesize = handle_amd (_SC_LEVEL1_ICACHE_LINESIZE); level1_dcache_size = data; level1_dcache_assoc = handle_amd (_SC_LEVEL1_DCACHE_ASSOC); level1_dcache_linesize = handle_amd (_SC_LEVEL1_DCACHE_LINESIZE); @@ -833,6 +838,7 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) } cpu_features->level1_icache_size = level1_icache_size; + cpu_features->level1_icache_linesize = level1_icache_linesize; cpu_features->level1_dcache_size = level1_dcache_size; cpu_features->level1_dcache_assoc = level1_dcache_assoc; cpu_features->level1_dcache_linesize = level1_dcache_linesize; diff --git a/sysdeps/x86/dl-diagnostics-cpu.c b/sysdeps/x86/dl-diagnostics-cpu.c index 55c6f35c7cabb4da..af8486470826426d 100644 --- a/sysdeps/x86/dl-diagnostics-cpu.c +++ b/sysdeps/x86/dl-diagnostics-cpu.c @@ -89,6 +89,8 @@ _dl_diagnostics_cpu (void) cpu_features->rep_stosb_threshold); print_cpu_features_value ("level1_icache_size", cpu_features->level1_icache_size); + print_cpu_features_value ("level1_icache_linesize", + cpu_features->level1_icache_linesize); print_cpu_features_value ("level1_dcache_size", cpu_features->level1_dcache_size); print_cpu_features_value ("level1_dcache_assoc", diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h index 184dc93c699d9b91..04d8e5734eb53e2b 100644 --- a/sysdeps/x86/include/cpu-features.h +++ b/sysdeps/x86/include/cpu-features.h @@ -859,6 +859,8 @@ struct cpu_features unsigned long int rep_stosb_threshold; /* _SC_LEVEL1_ICACHE_SIZE. */ unsigned long int level1_icache_size; + /* _SC_LEVEL1_ICACHE_LINESIZE. */ + unsigned long int level1_icache_linesize; /* _SC_LEVEL1_DCACHE_SIZE. */ unsigned long int level1_dcache_size; /* _SC_LEVEL1_DCACHE_ASSOC. */ diff --git a/sysdeps/x86/tst-sysconf-cache-linesize-static.c b/sysdeps/x86/tst-sysconf-cache-linesize-static.c new file mode 100644 index 0000000000000000..152ae68821748b3d --- /dev/null +++ b/sysdeps/x86/tst-sysconf-cache-linesize-static.c @@ -0,0 +1 @@ +#include "tst-sysconf-cache-linesize.c" diff --git a/sysdeps/x86/tst-sysconf-cache-linesize.c b/sysdeps/x86/tst-sysconf-cache-linesize.c new file mode 100644 index 0000000000000000..642dbde5d25b7c5e --- /dev/null +++ b/sysdeps/x86/tst-sysconf-cache-linesize.c @@ -0,0 +1,57 @@ +/* Test system cache line sizes. + Copyright (C) 2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include +#include +#include + +static struct +{ + const char *name; + int _SC_val; +} sc_options[] = + { +#define N(name) { "_SC_"#name, _SC_##name } + N (LEVEL1_ICACHE_LINESIZE), + N (LEVEL1_DCACHE_LINESIZE), + N (LEVEL2_CACHE_LINESIZE) + }; + +static int +do_test (void) +{ + int result = EXIT_SUCCESS; + + for (int i = 0; i < array_length (sc_options); ++i) + { + long int scret = sysconf (sc_options[i]._SC_val); + if (scret < 0) + { + printf ("sysconf (%s) returned < 0 (%ld)\n", + sc_options[i].name, scret); + result = EXIT_FAILURE; + } + else + printf ("sysconf (%s): %ld\n", sc_options[i].name, scret); + } + + return result; +} + +#include