From ddbe2358d138425620b4c302a2648aeba1ae8a6a Mon Sep 17 00:00:00 2001 From: Florian Weimer Date: Wed, 17 Dec 2025 10:11:26 +0100 Subject: [PATCH] x86-64: Additional math routines optimizes with FMA Resolves: RHEL-1063 --- glibc-RHEL-1063-1.patch | 154 +++ glibc-RHEL-1063-10.patch | 123 +++ glibc-RHEL-1063-11.patch | 128 +++ glibc-RHEL-1063-12.patch | 177 ++++ glibc-RHEL-1063-13.patch | 100 ++ glibc-RHEL-1063-14.patch | 2138 ++++++++++++++++++++++++++++++++++++++ glibc-RHEL-1063-15.patch | 191 ++++ glibc-RHEL-1063-16.patch | 105 ++ glibc-RHEL-1063-17.patch | 129 +++ glibc-RHEL-1063-18.patch | 122 +++ glibc-RHEL-1063-2.patch | 321 ++++++ glibc-RHEL-1063-3.patch | 109 ++ glibc-RHEL-1063-4.patch | 80 ++ glibc-RHEL-1063-5.patch | 153 +++ glibc-RHEL-1063-6.patch | 51 + glibc-RHEL-1063-7.patch | 100 ++ glibc-RHEL-1063-8.patch | 137 +++ glibc-RHEL-1063-9.patch | 91 ++ 18 files changed, 4409 insertions(+) create mode 100644 glibc-RHEL-1063-1.patch create mode 100644 glibc-RHEL-1063-10.patch create mode 100644 glibc-RHEL-1063-11.patch create mode 100644 glibc-RHEL-1063-12.patch create mode 100644 glibc-RHEL-1063-13.patch create mode 100644 glibc-RHEL-1063-14.patch create mode 100644 glibc-RHEL-1063-15.patch create mode 100644 glibc-RHEL-1063-16.patch create mode 100644 glibc-RHEL-1063-17.patch create mode 100644 glibc-RHEL-1063-18.patch create mode 100644 glibc-RHEL-1063-2.patch create mode 100644 glibc-RHEL-1063-3.patch create mode 100644 glibc-RHEL-1063-4.patch create mode 100644 glibc-RHEL-1063-5.patch create mode 100644 glibc-RHEL-1063-6.patch create mode 100644 glibc-RHEL-1063-7.patch create mode 100644 glibc-RHEL-1063-8.patch create mode 100644 glibc-RHEL-1063-9.patch diff --git a/glibc-RHEL-1063-1.patch b/glibc-RHEL-1063-1.patch new file mode 100644 index 0000000..d95530d --- /dev/null +++ b/glibc-RHEL-1063-1.patch @@ -0,0 +1,154 @@ +commit dc1e5eeb25c4bcb1cc0c883a2d67cf93eb252478 +Author: Andreas Schwab +Date: Tue May 31 13:09:38 2022 +0200 + + x86_64: Optimize sincos where sin/cos is optimized (bug 29193) + + The compiler may substitute calls to sin or cos with calls to sincos, thus + we should have the same optimized implementations for sincos. The + optimized implementations may produce results that differ, that also makes + sure that the sincos call aggrees with the sin and cos calls. + +diff --git a/sysdeps/ieee754/dbl-64/s_sincos.c b/sysdeps/ieee754/dbl-64/s_sincos.c +index a4a521d74227c06d..afd4179b9c04b932 100644 +--- a/sysdeps/ieee754/dbl-64/s_sincos.c ++++ b/sysdeps/ieee754/dbl-64/s_sincos.c +@@ -25,10 +25,15 @@ + #include + #include + ++#ifndef SECTION ++# define SECTION ++#endif ++ + #define IN_SINCOS + #include "s_sin.c" + + void ++SECTION + __sincos (double x, double *sinx, double *cosx) + { + mynumber u; +@@ -101,4 +106,6 @@ __sincos (double x, double *sinx, double *cosx) + + *sinx = *cosx = x / x; + } ++#ifndef __sincos + libm_alias_double (__sincos, sincos) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index d425ffd6d32e13ed..4d00a27988073c40 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -10,7 +10,8 @@ libm-sysdep_routines += s_ceil-sse4_1 s_ceilf-sse4_1 s_floor-sse4_1 \ + s_trunc-sse4_1 s_truncf-sse4_1 + + libm-sysdep_routines += e_exp-fma e_log-fma e_pow-fma s_atan-fma \ +- e_asin-fma e_atan2-fma s_sin-fma s_tan-fma ++ e_asin-fma e_atan2-fma s_sin-fma s_tan-fma \ ++ s_sincos-fma + + CFLAGS-e_asin-fma.c = -mfma -mavx2 + CFLAGS-e_atan2-fma.c = -mfma -mavx2 +@@ -20,6 +21,7 @@ CFLAGS-e_pow-fma.c = -mfma -mavx2 + CFLAGS-s_atan-fma.c = -mfma -mavx2 + CFLAGS-s_sin-fma.c = -mfma -mavx2 + CFLAGS-s_tan-fma.c = -mfma -mavx2 ++CFLAGS-s_sincos-fma.c = -mfma -mavx2 + + libm-sysdep_routines += s_sinf-sse2 s_cosf-sse2 s_sincosf-sse2 + +@@ -36,7 +38,8 @@ CFLAGS-s_cosf-fma.c = -mfma -mavx2 + CFLAGS-s_sincosf-fma.c = -mfma -mavx2 + + libm-sysdep_routines += e_exp-fma4 e_log-fma4 e_pow-fma4 s_atan-fma4 \ +- e_asin-fma4 e_atan2-fma4 s_sin-fma4 s_tan-fma4 ++ e_asin-fma4 e_atan2-fma4 s_sin-fma4 s_tan-fma4 \ ++ s_sincos-fma4 + + CFLAGS-e_asin-fma4.c = -mfma4 + CFLAGS-e_atan2-fma4.c = -mfma4 +@@ -46,9 +49,11 @@ CFLAGS-e_pow-fma4.c = -mfma4 + CFLAGS-s_atan-fma4.c = -mfma4 + CFLAGS-s_sin-fma4.c = -mfma4 + CFLAGS-s_tan-fma4.c = -mfma4 ++CFLAGS-s_sincos-fma4.c = -mfma4 + + libm-sysdep_routines += e_exp-avx e_log-avx s_atan-avx \ +- e_atan2-avx s_sin-avx s_tan-avx ++ e_atan2-avx s_sin-avx s_tan-avx \ ++ s_sincos-avx + + CFLAGS-e_atan2-avx.c = -msse2avx -DSSE2AVX + CFLAGS-e_exp-avx.c = -msse2avx -DSSE2AVX +@@ -56,6 +61,7 @@ CFLAGS-e_log-avx.c = -msse2avx -DSSE2AVX + CFLAGS-s_atan-avx.c = -msse2avx -DSSE2AVX + CFLAGS-s_sin-avx.c = -msse2avx -DSSE2AVX + CFLAGS-s_tan-avx.c = -msse2avx -DSSE2AVX ++CFLAGS-s_sincos-avx.c = -msse2avx -DSSE2AVX + endif + + ifeq ($(subdir),mathvec) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_sincos-avx.c b/sysdeps/x86_64/fpu/multiarch/s_sincos-avx.c +new file mode 100644 +index 0000000000000000..debea0f619ab1062 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_sincos-avx.c +@@ -0,0 +1,3 @@ ++#define __sincos __sincos_avx ++#define SECTION __attribute__ ((section (".text.avx"))) ++#include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_sincos-fma.c b/sysdeps/x86_64/fpu/multiarch/s_sincos-fma.c +new file mode 100644 +index 0000000000000000..31610b335613500e +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_sincos-fma.c +@@ -0,0 +1,3 @@ ++#define __sincos __sincos_fma ++#define SECTION __attribute__ ((section (".text.fma"))) ++#include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_sincos-fma4.c b/sysdeps/x86_64/fpu/multiarch/s_sincos-fma4.c +new file mode 100644 +index 0000000000000000..7e8b8e64846a9b96 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_sincos-fma4.c +@@ -0,0 +1,3 @@ ++#define __sincos __sincos_fma4 ++#define SECTION __attribute__ ((section (".text.fma4"))) ++#include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_sincos.c b/sysdeps/x86_64/fpu/multiarch/s_sincos.c +new file mode 100644 +index 0000000000000000..67c2817d688379ab +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_sincos.c +@@ -0,0 +1,30 @@ ++/* Multiple versions of sincos. ++ Copyright (C) 2017-2022 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++ ++extern void __redirect_sincos (double, double *, double *); ++ ++#define SYMBOL_NAME sincos ++#include "ifunc-fma4.h" ++ ++libc_ifunc_redirected (__redirect_sincos, __sincos, IFUNC_SELECTOR ()); ++libm_alias_double (__sincos, sincos) ++ ++#define __sincos __sincos_sse2 ++#include diff --git a/glibc-RHEL-1063-10.patch b/glibc-RHEL-1063-10.patch new file mode 100644 index 0000000..3eee7d2 --- /dev/null +++ b/glibc-RHEL-1063-10.patch @@ -0,0 +1,123 @@ +commit 1b214630ce6f7e0099b8b6f87246246739b079cf +Author: H.J. Lu +Date: Fri Aug 11 08:04:08 2023 -0700 + + x86_64: Add expm1 with FMA + + On Skylake, it improves expm1 bench performance by: + + Before After Improvement + max 70.204 68.054 3% + min 20.709 16.2 22% + mean 22.1221 16.7367 24% + + NB: Add + + extern long double __expm1l (long double); + extern long double __expm1f128 (long double); + + for __typeof (__expm1l) and __typeof (__expm1f128) when __expm1 is + defined since __expm1 may be expanded in their declarations which + causes the build failure. + +diff --git a/sysdeps/ieee754/dbl-64/s_expm1.c b/sysdeps/ieee754/dbl-64/s_expm1.c +index 8f1c95bd04bdb0bc..1cafeca9c02381a1 100644 +--- a/sysdeps/ieee754/dbl-64/s_expm1.c ++++ b/sysdeps/ieee754/dbl-64/s_expm1.c +@@ -130,6 +130,11 @@ static const double + 4.00821782732936239552e-06, /* 3ED0CFCA 86E65239 */ + -2.01099218183624371326e-07 }; /* BE8AFDB7 6E09C32D */ + ++#ifndef SECTION ++# define SECTION ++#endif ++ ++SECTION + double + __expm1 (double x) + { +@@ -258,4 +263,6 @@ __expm1 (double x) + } + return y; + } ++#ifndef __expm1 + libm_alias_double (__expm1, expm1) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index 56ef0482a2a8f498..069ea227dbd1965e 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -37,6 +37,7 @@ libm-sysdep_routines += \ + e_log2-fma \ + e_pow-fma \ + s_atan-fma \ ++ s_expm1-fma \ + s_sin-fma \ + s_sincos-fma \ + s_tan-fma \ +@@ -49,6 +50,7 @@ CFLAGS-e_log-fma.c = -mfma -mavx2 + CFLAGS-e_log2-fma.c = -mfma -mavx2 + CFLAGS-e_pow-fma.c = -mfma -mavx2 + CFLAGS-s_atan-fma.c = -mfma -mavx2 ++CFLAGS-s_expm1-fma.c = -mfma -mavx2 + CFLAGS-s_sin-fma.c = -mfma -mavx2 + CFLAGS-s_tan-fma.c = -mfma -mavx2 + CFLAGS-s_sincos-fma.c = -mfma -mavx2 +diff --git a/sysdeps/x86_64/fpu/multiarch/s_expm1-fma.c b/sysdeps/x86_64/fpu/multiarch/s_expm1-fma.c +new file mode 100644 +index 0000000000000000..3ee2bd804ebdea4d +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_expm1-fma.c +@@ -0,0 +1,10 @@ ++#define __expm1 __expm1_fma ++ ++/* NB: __expm1 may be expanded to __expm1_fma in the following ++ prototypes. */ ++extern long double __expm1l (long double); ++extern long double __expm1f128 (long double); ++ ++#define SECTION __attribute__ ((section (".text.fma"))) ++ ++#include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_expm1.c b/sysdeps/x86_64/fpu/multiarch/s_expm1.c +new file mode 100644 +index 0000000000000000..2cae83fb7f21bb99 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_expm1.c +@@ -0,0 +1,36 @@ ++/* Multiple versions of expm1. ++ Copyright (C) 2023 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++ ++extern double __redirect_expm1 (double); ++ ++#define SYMBOL_NAME expm1 ++#include "ifunc-fma.h" ++ ++libc_ifunc_redirected (__redirect_expm1, __expm1, IFUNC_SELECTOR ()); ++libm_alias_double (__expm1, expm1) ++ ++#define __expm1 __expm1_sse2 ++ ++/* NB: __expm1 may be expanded to __expm1_sse2 in the following ++ prototypes. */ ++extern long double __expm1l (long double); ++extern long double __expm1f128 (long double); ++ ++#include diff --git a/glibc-RHEL-1063-11.patch b/glibc-RHEL-1063-11.patch new file mode 100644 index 0000000..0e5c8fe --- /dev/null +++ b/glibc-RHEL-1063-11.patch @@ -0,0 +1,128 @@ +commit a8ecb126d4c26c52f4ad828c566afe4043a28155 +Author: H.J. Lu +Date: Thu Aug 17 09:42:29 2023 -0700 + + x86_64: Add log1p with FMA + + On Skylake, it changes log1p bench performance by: + + Before After Improvement + max 63.349 58.347 8% + min 4.448 5.651 -30% + mean 12.0674 10.336 14% + + The minimum code path is + + if (hx < 0x3FDA827A) /* x < 0.41422 */ + { + if (__glibc_unlikely (ax >= 0x3ff00000)) /* x <= -1.0 */ + { + ... + } + if (__glibc_unlikely (ax < 0x3e200000)) /* |x| < 2**-29 */ + { + math_force_eval (two54 + x); /* raise inexact */ + if (ax < 0x3c900000) /* |x| < 2**-54 */ + { + ... + } + else + return x - x * x * 0.5; + + FMA and non-FMA code sequences look similar. Non-FMA version is slightly + faster. Since log1p is called by asinh and atanh, it improves asinh + performance by: + + Before After Improvement + max 75.645 63.135 16% + min 10.074 10.071 0% + mean 15.9483 14.9089 6% + + and improves atanh performance by: + + Before After Improvement + max 91.768 75.081 18% + min 15.548 13.883 10% + mean 18.3713 16.8011 8% + +diff --git a/sysdeps/ieee754/dbl-64/s_log1p.c b/sysdeps/ieee754/dbl-64/s_log1p.c +index e6476a826039ea8c..eeb0af859ffce7da 100644 +--- a/sysdeps/ieee754/dbl-64/s_log1p.c ++++ b/sysdeps/ieee754/dbl-64/s_log1p.c +@@ -99,6 +99,11 @@ static const double + + static const double zero = 0.0; + ++#ifndef SECTION ++# define SECTION ++#endif ++ ++SECTION + double + __log1p (double x) + { +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index 069ea227dbd1965e..29ab16d2f3d1e38f 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -38,6 +38,7 @@ libm-sysdep_routines += \ + e_pow-fma \ + s_atan-fma \ + s_expm1-fma \ ++ s_log1p-fma \ + s_sin-fma \ + s_sincos-fma \ + s_tan-fma \ +@@ -51,6 +52,7 @@ CFLAGS-e_log2-fma.c = -mfma -mavx2 + CFLAGS-e_pow-fma.c = -mfma -mavx2 + CFLAGS-s_atan-fma.c = -mfma -mavx2 + CFLAGS-s_expm1-fma.c = -mfma -mavx2 ++CFLAGS-s_log1p-fma.c = -mfma -mavx2 + CFLAGS-s_sin-fma.c = -mfma -mavx2 + CFLAGS-s_tan-fma.c = -mfma -mavx2 + CFLAGS-s_sincos-fma.c = -mfma -mavx2 +diff --git a/sysdeps/x86_64/fpu/multiarch/s_log1p-fma.c b/sysdeps/x86_64/fpu/multiarch/s_log1p-fma.c +new file mode 100644 +index 0000000000000000..8952df8f9e08d49a +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_log1p-fma.c +@@ -0,0 +1,4 @@ ++#define __log1p __log1p_fma ++#define SECTION __attribute__ ((section (".text.fma"))) ++ ++#include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_log1p.c b/sysdeps/x86_64/fpu/multiarch/s_log1p.c +new file mode 100644 +index 0000000000000000..6ce5198d6d844c1c +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_log1p.c +@@ -0,0 +1,29 @@ ++/* Multiple versions of log1p. ++ Copyright (C) 2023 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++ ++extern double __redirect_log1p (double); ++ ++#define SYMBOL_NAME log1p ++#include "ifunc-fma.h" ++ ++libc_ifunc_redirected (__redirect_log1p, __log1p, IFUNC_SELECTOR ()); ++ ++#define __log1p __log1p_sse2 ++#include diff --git a/glibc-RHEL-1063-12.patch b/glibc-RHEL-1063-12.patch new file mode 100644 index 0000000..9a0aa5b --- /dev/null +++ b/glibc-RHEL-1063-12.patch @@ -0,0 +1,177 @@ +commit 7e03e0de7e7c2de975b5c5e18f5a4b0c75816674 +Author: H.J. Lu +Date: Thu Dec 7 09:00:11 2023 -0800 + + sysdeps/x86/Makefile: Split and sort tests + + Put each test on a separate line and sort tests. + +Conflicts: + sysdeps/x86/Makefile + (tunables are still optional downstream) + +diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile +index cd94e683afd5b4a4..60feef5d87fef1fd 100644 +--- a/sysdeps/x86/Makefile ++++ b/sysdeps/x86/Makefile +@@ -10,34 +10,49 @@ sysdep_headers += sys/platform/x86.h bits/platform/x86.h + CFLAGS-dl-get-cpu-features.os += $(rtld-early-cflags) + CFLAGS-get-cpuid-feature-leaf.o += $(no-stack-protector) + +-tests += tst-get-cpu-features tst-get-cpu-features-static \ +- tst-cpu-features-cpuinfo tst-cpu-features-cpuinfo-static \ +- tst-cpu-features-supports tst-cpu-features-supports-static +-tests-static += tst-get-cpu-features-static \ +- tst-cpu-features-cpuinfo-static \ +- tst-cpu-features-supports-static ++tests += \ ++ tst-get-cpu-features \ ++ tst-get-cpu-features-static \ ++ tst-cpu-features-cpuinfo \ ++ tst-cpu-features-cpuinfo-static \ ++ tst-cpu-features-supports \ ++ tst-cpu-features-supports-static \ ++# tests ++tests-static += \ ++ tst-get-cpu-features-static \ ++ tst-cpu-features-cpuinfo-static \ ++ tst-cpu-features-supports-static \ ++# tests-static + ifeq (yes,$(have-ifunc)) + ifeq (yes,$(have-gcc-ifunc)) + tests += \ + tst-ifunc-isa-1 \ +- tst-ifunc-isa-1-static +-tests-static += \ +- tst-ifunc-isa-1-static ++ tst-ifunc-isa-1-static \ ++# tests + ifneq ($(have-tunables),no) ++tests-static += \ ++ tst-ifunc-isa-1-static \ ++# tests-static + tests += \ + tst-ifunc-isa-2 \ +- tst-ifunc-isa-2-static ++ tst-ifunc-isa-2-static \ ++# tests + tests-static += \ +- tst-ifunc-isa-2-static ++ tst-ifunc-isa-2-static \ ++# tests-static + endif + endif + endif + ifeq (yes,$(enable-x86-isa-level)) +-tests += tst-isa-level-1 +-modules-names += tst-isa-level-mod-1-baseline \ +- tst-isa-level-mod-1-v2 \ +- tst-isa-level-mod-1-v3 \ +- tst-isa-level-mod-1-v4 \ ++tests += \ ++ tst-isa-level-1 \ ++# tests ++modules-names += \ ++ tst-isa-level-mod-1-baseline \ ++ tst-isa-level-mod-1-v2 \ ++ tst-isa-level-mod-1-v3 \ ++ tst-isa-level-mod-1-v4 \ ++# modules-names + + # X86 ISA level baseline + CFLAGS-tst-isa-level-mod-1-baseline.c += -DINCLUDE_X86_ISA_LEVEL \ +@@ -68,7 +83,9 @@ endif + endif + + ifeq ($(subdir),math) +-tests += tst-ldbl-nonnormal-printf ++tests += \ ++ tst-ldbl-nonnormal-printf \ ++# tests + endif # $(subdir) == math + + ifeq ($(subdir),setjmp) +@@ -76,7 +93,9 @@ gen-as-const-headers += jmp_buf-ssp.sym + sysdep_routines += __longjmp_cancel + ifneq ($(enable-cet),no) + ifneq ($(have-tunables),no) +-tests += tst-setjmp-cet ++tests += \ ++ tst-setjmp-cet \ ++# tests + tst-setjmp-cet-ENV = GLIBC_TUNABLES=glibc.cpu.x86_ibt=on:glibc.cpu.x86_shstk=on + endif + endif +@@ -116,22 +135,47 @@ ifneq ($(enable-cet),no) + ifeq ($(subdir),elf) + sysdep-dl-routines += dl-cet + +-tests += tst-cet-legacy-1 tst-cet-legacy-1a tst-cet-legacy-2 \ +- tst-cet-legacy-2a tst-cet-legacy-3 tst-cet-legacy-4 \ +- tst-cet-legacy-5a tst-cet-legacy-6a tst-cet-legacy-7 \ +- tst-cet-legacy-8 tst-cet-legacy-9 tst-cet-legacy-9-static \ +- tst-cet-legacy-10 tst-cet-legacy-10-static +-tests-static += tst-cet-legacy-9-static tst-cet-legacy-10-static ++tests += \ ++ tst-cet-legacy-1 \ ++ tst-cet-legacy-1a \ ++ tst-cet-legacy-2 \ ++ tst-cet-legacy-2a \ ++ tst-cet-legacy-3 \ ++ tst-cet-legacy-4 \ ++ tst-cet-legacy-5a \ ++ tst-cet-legacy-6a \ ++ tst-cet-legacy-7 \ ++ tst-cet-legacy-8 \ ++ tst-cet-legacy-9 \ ++ tst-cet-legacy-9-static \ ++ tst-cet-legacy-10 \ ++ tst-cet-legacy-10-static \ ++# tests ++tests-static += \ ++ tst-cet-legacy-9-static \ ++ tst-cet-legacy-10-static \ ++# tests-static + tst-cet-legacy-1a-ARGS = -- $(host-test-program-cmd) + ifneq (no,$(have-tunables)) +-tests += tst-cet-legacy-4a tst-cet-legacy-4b tst-cet-legacy-4c \ +- tst-cet-legacy-5b tst-cet-legacy-6b ++tests += \ ++ tst-cet-legacy-4a \ ++ tst-cet-legacy-4b \ ++ tst-cet-legacy-4c \ ++ tst-cet-legacy-5b \ ++ tst-cet-legacy-6b \ ++# tests + endif +-modules-names += tst-cet-legacy-mod-1 tst-cet-legacy-mod-2 \ +- tst-cet-legacy-mod-4 tst-cet-legacy-mod-5a \ +- tst-cet-legacy-mod-5b tst-cet-legacy-mod-5c \ +- tst-cet-legacy-mod-6a tst-cet-legacy-mod-6b \ +- tst-cet-legacy-mod-6c ++modules-names += \ ++ tst-cet-legacy-mod-1 \ ++ tst-cet-legacy-mod-2 \ ++ tst-cet-legacy-mod-4 \ ++ tst-cet-legacy-mod-5a \ ++ tst-cet-legacy-mod-5b \ ++ tst-cet-legacy-mod-5c \ ++ tst-cet-legacy-mod-6a \ ++ tst-cet-legacy-mod-6b \ ++ tst-cet-legacy-mod-6c \ ++# modules-names + + CFLAGS-tst-cet-legacy-2.c += -fcf-protection=branch + CFLAGS-tst-cet-legacy-2a.c += -fcf-protection +@@ -241,7 +285,9 @@ endif + ifeq ($(subdir),posix) + tests += \ + tst-sysconf-cache-linesize \ +- tst-sysconf-cache-linesize-static ++ tst-sysconf-cache-linesize-static \ ++# tests + tests-static += \ +- tst-sysconf-cache-linesize-static ++ tst-sysconf-cache-linesize-static \ ++# tests-static + endif diff --git a/glibc-RHEL-1063-13.patch b/glibc-RHEL-1063-13.patch new file mode 100644 index 0000000..6af3ba4 --- /dev/null +++ b/glibc-RHEL-1063-13.patch @@ -0,0 +1,100 @@ +commit ef7f4b1fef67430a8f3cfc77fa6aada2add851d7 +Author: H.J. Lu +Date: Thu Feb 15 11:19:56 2024 -0800 + + Apply the Makefile sorting fix + + Apply the Makefile sorting fix generated by sort-makefile-lines.py. + +Conflicts: + sysdeps/loongarch/lp64/multiarch/Makefile + (loongarch does not exist downstream) + sysdeps/x86/Makefile + (missing commit 2a969b53c0b02fed7e43473a92f219d737fd217a) + sysdeps/x86_64/Makefile + (CET support is not specific to x86-64 downstream) + sysdeps/x86_64/multiarch/Makefile + (memchr-evex512, rawmemchr-evex512 not present downstream) + +diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile +index 60feef5d87fef1fd..e938d2f821d7f839 100644 +--- a/sysdeps/x86/Makefile ++++ b/sysdeps/x86/Makefile +@@ -11,17 +11,17 @@ CFLAGS-dl-get-cpu-features.os += $(rtld-early-cflags) + CFLAGS-get-cpuid-feature-leaf.o += $(no-stack-protector) + + tests += \ +- tst-get-cpu-features \ +- tst-get-cpu-features-static \ + tst-cpu-features-cpuinfo \ + tst-cpu-features-cpuinfo-static \ + tst-cpu-features-supports \ + tst-cpu-features-supports-static \ ++ tst-get-cpu-features \ ++ tst-get-cpu-features-static \ + # tests + tests-static += \ +- tst-get-cpu-features-static \ + tst-cpu-features-cpuinfo-static \ + tst-cpu-features-supports-static \ ++ tst-get-cpu-features-static \ + # tests-static + ifeq (yes,$(have-ifunc)) + ifeq (yes,$(have-gcc-ifunc)) +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index 29ab16d2f3d1e38f..6843bb99ca99a07d 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -4,10 +4,10 @@ libm-sysdep_routines += \ + s_ceilf-c \ + s_floor-c \ + s_floorf-c \ +- s_rint-c \ +- s_rintf-c \ + s_nearbyint-c \ + s_nearbyintf-c \ ++ s_rint-c \ ++ s_rintf-c \ + s_roundeven-c \ + s_roundevenf-c \ + s_trunc-c \ +@@ -21,10 +21,10 @@ libm-sysdep_routines += \ + s_floorf-sse4_1 \ + s_nearbyint-sse4_1 \ + s_nearbyintf-sse4_1 \ +- s_roundeven-sse4_1 \ +- s_roundevenf-sse4_1 \ + s_rint-sse4_1 \ + s_rintf-sse4_1 \ ++ s_roundeven-sse4_1 \ ++ s_roundevenf-sse4_1 \ + s_trunc-sse4_1 \ + s_truncf-sse4_1 \ + # libm-sysdep_routines +@@ -84,12 +84,12 @@ CFLAGS-s_cosf-fma.c = -mfma -mavx2 + CFLAGS-s_sincosf-fma.c = -mfma -mavx2 + + libm-sysdep_routines += \ ++ e_asin-fma4 \ ++ e_atan2-fma4 \ + e_exp-fma4 \ + e_log-fma4 \ + e_pow-fma4 \ +- e_asin-fma4 \ + s_atan-fma4 \ +- e_atan2-fma4 \ + s_sin-fma4 \ + s_sincos-fma4 \ + s_tan-fma4 \ +@@ -106,10 +106,10 @@ CFLAGS-s_tan-fma4.c = -mfma4 + CFLAGS-s_sincos-fma4.c = -mfma4 + + libm-sysdep_routines += \ ++ e_atan2-avx \ + e_exp-avx \ + e_log-avx \ + s_atan-avx \ +- e_atan2-avx \ + s_sin-avx \ + s_sincos-avx \ + s_tan-avx \ diff --git a/glibc-RHEL-1063-14.patch b/glibc-RHEL-1063-14.patch new file mode 100644 index 0000000..6e70e26 --- /dev/null +++ b/glibc-RHEL-1063-14.patch @@ -0,0 +1,2138 @@ +commit 9f78a7c1d0963282608da836b840f0d5ae1c478e +Author: Sunil K Pandey +Date: Tue Feb 13 12:23:14 2024 -0800 + + x86_64: Exclude SSE, AVX and FMA4 variants in libm multiarch + + When glibc is built with ISA level 3 or higher by default, the resulting + glibc binaries won't run on SSE or FMA4 processors. Exclude SSE, AVX and + FMA4 variants in libm multiarch when ISA level 3 or higher is enabled by + default. + + When glibc is built with ISA level 2 enabled by default, only keep SSE4.1 + variant. + + Fixes BZ 31335. + + NB: elf/tst-valgrind-smoke test fails with ISA level 4, because valgrind + doesn't support AVX512 instructions: + + https://bugs.kde.org/show_bug.cgi?id=383010 + + Reviewed-by: H.J. Lu + +diff --git a/sysdeps/x86/configure b/sysdeps/x86/configure +index 7bdbfdc6dc2ad38f..a09712a924b299d9 100644 +--- a/sysdeps/x86/configure ++++ b/sysdeps/x86/configure +@@ -164,6 +164,7 @@ $as_echo "$libc_cv_have_x86_lahf_sahf" >&6; } + if test $libc_cv_have_x86_lahf_sahf = yes; then + $as_echo "#define HAVE_X86_LAHF_SAHF 1" >>confdefs.h + ++ ISAFLAG="-DHAVE_X86_LAHF_SAHF" + fi + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for MOVBE instruction support" >&5 + $as_echo_n "checking for MOVBE instruction support... " >&6; } +@@ -185,7 +186,39 @@ $as_echo "$libc_cv_have_x86_movbe" >&6; } + if test $libc_cv_have_x86_movbe = yes; then + $as_echo "#define HAVE_X86_MOVBE 1" >>confdefs.h + ++ ISAFLAG="$ISAFLAG -DHAVE_X86_MOVBE" + fi ++ ++ # Check for ISA level support. ++ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for ISA level support" >&5 ++printf %s "checking for ISA level support... " >&6; } ++if test ${libc_cv_have_x86_isa_level+y} ++then : ++ printf %s "(cached) " >&6 ++else $as_nop ++ cat > conftest.c < ++#if MINIMUM_X86_ISA_LEVEL >= 4 ++libc_cv_have_x86_isa_level=4 ++#elif MINIMUM_X86_ISA_LEVEL == 3 ++libc_cv_have_x86_isa_level=3 ++#elif MINIMUM_X86_ISA_LEVEL == 2 ++libc_cv_have_x86_isa_level=2 ++#else ++libc_cv_have_x86_isa_level=baseline ++#endif ++EOF ++ eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -I$srcdir -E conftest.c | grep libc_cv_have_x86_isa_level` ++ rm -rf conftest* ++fi ++{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_have_x86_isa_level" >&5 ++printf "%s\n" "$libc_cv_have_x86_isa_level" >&6; } ++else ++ libc_cv_have_x86_isa_level=baseline + fi + config_vars="$config_vars ++have-x86-isa-level = $libc_cv_have_x86_isa_level" ++config_vars="$config_vars ++x86-isa-level-3-or-above = 3 4" ++config_vars="$config_vars + enable-x86-isa-level = $libc_cv_include_x86_isa_level" +diff --git a/sysdeps/x86/configure.ac b/sysdeps/x86/configure.ac +index 10d5c2e0e555fc79..2e03ee3d3bd044d6 100644 +--- a/sysdeps/x86/configure.ac ++++ b/sysdeps/x86/configure.ac +@@ -115,6 +115,7 @@ if test $libc_cv_include_x86_isa_level = yes; then + fi]) + if test $libc_cv_have_x86_lahf_sahf = yes; then + AC_DEFINE(HAVE_X86_LAHF_SAHF) ++ ISAFLAG="-DHAVE_X86_LAHF_SAHF" + fi + AC_CACHE_CHECK([for MOVBE instruction support], + libc_cv_have_x86_movbe, [dnl +@@ -124,6 +125,29 @@ if test $libc_cv_include_x86_isa_level = yes; then + fi]) + if test $libc_cv_have_x86_movbe = yes; then + AC_DEFINE(HAVE_X86_MOVBE) ++ ISAFLAG="$ISAFLAG -DHAVE_X86_MOVBE" + fi ++ ++ # Check for ISA level support. ++ AC_CACHE_CHECK([for ISA level support], ++ libc_cv_have_x86_isa_level, [dnl ++cat > conftest.c < ++#if MINIMUM_X86_ISA_LEVEL >= 4 ++libc_cv_have_x86_isa_level=4 ++#elif MINIMUM_X86_ISA_LEVEL == 3 ++libc_cv_have_x86_isa_level=3 ++#elif MINIMUM_X86_ISA_LEVEL == 2 ++libc_cv_have_x86_isa_level=2 ++#else ++libc_cv_have_x86_isa_level=baseline ++#endif ++EOF ++ eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -I$srcdir -E conftest.c | grep libc_cv_have_x86_isa_level` ++ rm -rf conftest*]) ++else ++ libc_cv_have_x86_isa_level=baseline + fi ++LIBC_CONFIG_VAR([have-x86-isa-level], [$libc_cv_have_x86_isa_level]) ++LIBC_CONFIG_VAR([x86-isa-level-3-or-above], [3 4]) + LIBC_CONFIG_VAR([enable-x86-isa-level], [$libc_cv_include_x86_isa_level]) +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index 6843bb99ca99a07d..73f9af871b9bad45 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -1,49 +1,4 @@ + ifeq ($(subdir),math) +-libm-sysdep_routines += \ +- s_ceil-c \ +- s_ceilf-c \ +- s_floor-c \ +- s_floorf-c \ +- s_nearbyint-c \ +- s_nearbyintf-c \ +- s_rint-c \ +- s_rintf-c \ +- s_roundeven-c \ +- s_roundevenf-c \ +- s_trunc-c \ +- s_truncf-c \ +-# libm-sysdep_routines +- +-libm-sysdep_routines += \ +- s_ceil-sse4_1 \ +- s_ceilf-sse4_1 \ +- s_floor-sse4_1 \ +- s_floorf-sse4_1 \ +- s_nearbyint-sse4_1 \ +- s_nearbyintf-sse4_1 \ +- s_rint-sse4_1 \ +- s_rintf-sse4_1 \ +- s_roundeven-sse4_1 \ +- s_roundevenf-sse4_1 \ +- s_trunc-sse4_1 \ +- s_truncf-sse4_1 \ +-# libm-sysdep_routines +- +-libm-sysdep_routines += \ +- e_asin-fma \ +- e_atan2-fma \ +- e_exp-fma \ +- e_log-fma \ +- e_log2-fma \ +- e_pow-fma \ +- s_atan-fma \ +- s_expm1-fma \ +- s_log1p-fma \ +- s_sin-fma \ +- s_sincos-fma \ +- s_tan-fma \ +-# libm-sysdep_routines +- + CFLAGS-e_asin-fma.c = -mfma -mavx2 + CFLAGS-e_atan2-fma.c = -mfma -mavx2 + CFLAGS-e_exp-fma.c = -mfma -mavx2 +@@ -57,23 +12,6 @@ CFLAGS-s_sin-fma.c = -mfma -mavx2 + CFLAGS-s_tan-fma.c = -mfma -mavx2 + CFLAGS-s_sincos-fma.c = -mfma -mavx2 + +-libm-sysdep_routines += \ +- s_cosf-sse2 \ +- s_sincosf-sse2 \ +- s_sinf-sse2 \ +-# libm-sysdep_routines +- +-libm-sysdep_routines += \ +- e_exp2f-fma \ +- e_expf-fma \ +- e_log2f-fma \ +- e_logf-fma \ +- e_powf-fma \ +- s_cosf-fma \ +- s_sincosf-fma \ +- s_sinf-fma \ +-# libm-sysdep_routines +- + CFLAGS-e_exp2f-fma.c = -mfma -mavx2 + CFLAGS-e_expf-fma.c = -mfma -mavx2 + CFLAGS-e_log2f-fma.c = -mfma -mavx2 +@@ -83,17 +21,93 @@ CFLAGS-s_sinf-fma.c = -mfma -mavx2 + CFLAGS-s_cosf-fma.c = -mfma -mavx2 + CFLAGS-s_sincosf-fma.c = -mfma -mavx2 + ++# Check if ISA level is 3 or above. ++ifneq (,$(filter $(have-x86-isa-level),$(x86-isa-level-3-or-above))) + libm-sysdep_routines += \ ++ s_ceil-avx \ ++ s_ceilf-avx \ ++ s_floor-avx \ ++ s_floorf-avx \ ++ s_nearbyint-avx \ ++ s_nearbyintf-avx \ ++ s_rint-avx \ ++ s_rintf-avx \ ++ s_roundeven-avx \ ++ s_roundevenf-avx \ ++ s_trunc-avx \ ++ s_truncf-avx \ ++# libm-sysdep_routines ++else ++libm-sysdep_routines += \ ++ e_asin-fma \ + e_asin-fma4 \ ++ e_atan2-avx \ ++ e_atan2-fma \ + e_atan2-fma4 \ ++ e_exp-avx \ ++ e_exp-fma \ + e_exp-fma4 \ ++ e_exp2f-fma \ ++ e_expf-fma \ ++ e_log-avx \ ++ e_log-fma \ + e_log-fma4 \ ++ e_log2-fma \ ++ e_log2f-fma \ ++ e_logf-fma \ ++ e_pow-fma \ + e_pow-fma4 \ ++ e_powf-fma \ ++ s_atan-avx \ ++ s_atan-fma \ + s_atan-fma4 \ ++ s_ceil-sse4_1 \ ++ s_ceilf-sse4_1 \ ++ s_cosf-fma \ ++ s_cosf-sse2 \ ++ s_expm1-fma \ ++ s_floor-sse4_1 \ ++ s_floorf-sse4_1 \ ++ s_log1p-fma \ ++ s_nearbyint-sse4_1 \ ++ s_nearbyintf-sse4_1 \ ++ s_rint-sse4_1 \ ++ s_rintf-sse4_1 \ ++ s_roundeven-sse4_1 \ ++ s_roundevenf-sse4_1 \ ++ s_sin-avx \ ++ s_sin-fma \ + s_sin-fma4 \ ++ s_sincos-avx \ ++ s_sincos-fma \ + s_sincos-fma4 \ ++ s_sincosf-fma \ ++ s_sincosf-sse2 \ ++ s_sinf-fma \ ++ s_sinf-sse2 \ ++ s_tan-avx \ ++ s_tan-fma \ + s_tan-fma4 \ ++ s_trunc-sse4_1 \ ++ s_truncf-sse4_1 \ + # libm-sysdep_routines ++ifeq ($(have-x86-isa-level),baseline) ++libm-sysdep_routines += \ ++ s_ceil-c \ ++ s_ceilf-c \ ++ s_floor-c \ ++ s_floorf-c \ ++ s_nearbyint-c \ ++ s_nearbyintf-c \ ++ s_rint-c \ ++ s_rintf-c \ ++ s_roundeven-c \ ++ s_roundevenf-c \ ++ s_trunc-c \ ++ s_truncf-c \ ++# libm-sysdep_routines ++endif ++endif + + CFLAGS-e_asin-fma4.c = -mfma4 + CFLAGS-e_atan2-fma4.c = -mfma4 +@@ -105,16 +119,6 @@ CFLAGS-s_sin-fma4.c = -mfma4 + CFLAGS-s_tan-fma4.c = -mfma4 + CFLAGS-s_sincos-fma4.c = -mfma4 + +-libm-sysdep_routines += \ +- e_atan2-avx \ +- e_exp-avx \ +- e_log-avx \ +- s_atan-avx \ +- s_sin-avx \ +- s_sincos-avx \ +- s_tan-avx \ +-# libm-sysdep_routines +- + CFLAGS-e_atan2-avx.c = -msse2avx -DSSE2AVX + CFLAGS-e_exp-avx.c = -msse2avx -DSSE2AVX + CFLAGS-e_log-avx.c = -msse2avx -DSSE2AVX +diff --git a/sysdeps/x86_64/fpu/multiarch/e_asin.c b/sysdeps/x86_64/fpu/multiarch/e_asin.c +index c6452866e711037d..a306730bade9b298 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_asin.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_asin.c +@@ -16,26 +16,29 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern double __redirect_ieee754_asin (double); + extern double __redirect_ieee754_acos (double); + +-#define SYMBOL_NAME ieee754_asin +-#include "ifunc-fma4.h" ++# define SYMBOL_NAME ieee754_asin ++# include "ifunc-fma4.h" + + libc_ifunc_redirected (__redirect_ieee754_asin, __ieee754_asin, + IFUNC_SELECTOR ()); + libm_alias_finite (__ieee754_asin, __asin) + +-#undef SYMBOL_NAME +-#define SYMBOL_NAME ieee754_acos +-#include "ifunc-fma4.h" ++# undef SYMBOL_NAME ++# define SYMBOL_NAME ieee754_acos ++# include "ifunc-fma4.h" + + libc_ifunc_redirected (__redirect_ieee754_acos, __ieee754_acos, + IFUNC_SELECTOR ()); + libm_alias_finite (__ieee754_acos, __acos) + +-#define __ieee754_acos __ieee754_acos_sse2 +-#define __ieee754_asin __ieee754_asin_sse2 ++# define __ieee754_acos __ieee754_acos_sse2 ++# define __ieee754_asin __ieee754_asin_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_atan2.c b/sysdeps/x86_64/fpu/multiarch/e_atan2.c +index b2d95ffdeb4d34ae..b27a5f50d9eb4b29 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_atan2.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_atan2.c +@@ -16,16 +16,19 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern double __redirect_ieee754_atan2 (double, double); + +-#define SYMBOL_NAME ieee754_atan2 +-#include "ifunc-avx-fma4.h" ++# define SYMBOL_NAME ieee754_atan2 ++# include "ifunc-avx-fma4.h" + + libc_ifunc_redirected (__redirect_ieee754_atan2, + __ieee754_atan2, IFUNC_SELECTOR ()); + libm_alias_finite (__ieee754_atan2, __atan2) + +-#define __ieee754_atan2 __ieee754_atan2_sse2 ++# define __ieee754_atan2 __ieee754_atan2_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_exp.c b/sysdeps/x86_64/fpu/multiarch/e_exp.c +index cbf7bea0e8b96abb..5cceff90264d6430 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_exp.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_exp.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#include +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++# include + + extern double __redirect_ieee754_exp (double); + +-#define SYMBOL_NAME ieee754_exp +-#include "ifunc-avx-fma4.h" ++# define SYMBOL_NAME ieee754_exp ++# include "ifunc-avx-fma4.h" + + libc_ifunc_redirected (__redirect_ieee754_exp, __ieee754_exp, + IFUNC_SELECTOR ()); + libm_alias_finite (__ieee754_exp, __exp) + +-#define __exp __ieee754_exp_sse2 ++# define __exp __ieee754_exp_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_exp2f.c b/sysdeps/x86_64/fpu/multiarch/e_exp2f.c +index 5edb98b670e61742..3e19cb3ef894142c 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_exp2f.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_exp2f.c +@@ -16,25 +16,28 @@ + License along with the GNU C Library; if not, see + . */ + +-#include +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++# include + + extern float __redirect_exp2f (float); + +-#define SYMBOL_NAME exp2f +-#include "ifunc-fma.h" ++# define SYMBOL_NAME exp2f ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_exp2f, __exp2f, IFUNC_SELECTOR ()); + +-#ifdef SHARED ++# ifdef SHARED + versioned_symbol (libm, __ieee754_exp2f, exp2f, GLIBC_2_27); + libm_alias_float_other (__exp2, exp2) +-#else ++# else + libm_alias_float (__exp2, exp2) +-#endif ++# endif + + strong_alias (__exp2f, __ieee754_exp2f) + libm_alias_finite (__exp2f, __exp2f) + +-#define __exp2f __exp2f_sse2 ++# define __exp2f __exp2f_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_expf.c b/sysdeps/x86_64/fpu/multiarch/e_expf.c +index 58d2bb8840341a0c..4b87ecc5dd6dca7b 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_expf.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_expf.c +@@ -16,28 +16,31 @@ + License along with the GNU C Library; if not, see + . */ + +-#include +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++# include + + extern float __redirect_expf (float); + +-#define SYMBOL_NAME expf +-#include "ifunc-fma.h" ++# define SYMBOL_NAME expf ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_expf, __expf, IFUNC_SELECTOR ()); + +-#ifdef SHARED ++# ifdef SHARED + __hidden_ver1 (__expf, __GI___expf, __redirect_expf) + __attribute__ ((visibility ("hidden"))); + + versioned_symbol (libm, __ieee754_expf, expf, GLIBC_2_27); + libm_alias_float_other (__exp, exp) +-#else ++# else + libm_alias_float (__exp, exp) +-#endif ++# endif + + strong_alias (__expf, __ieee754_expf) + libm_alias_finite (__expf, __expf) + +-#define __expf __expf_sse2 ++# define __expf __expf_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_log.c b/sysdeps/x86_64/fpu/multiarch/e_log.c +index 43d9e70c9051db60..908fb2c0383d5763 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_log.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_log.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#include +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++# include + + extern double __redirect_ieee754_log (double); + +-#define SYMBOL_NAME ieee754_log +-#include "ifunc-avx-fma4.h" ++# define SYMBOL_NAME ieee754_log ++# include "ifunc-avx-fma4.h" + + libc_ifunc_redirected (__redirect_ieee754_log, __ieee754_log, + IFUNC_SELECTOR ()); + libm_alias_finite (__ieee754_log, __log) + +-#define __log __ieee754_log_sse2 ++# define __log __ieee754_log_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_log2.c b/sysdeps/x86_64/fpu/multiarch/e_log2.c +index c0320caf368b1bf0..b3523d1e2fdc2d0f 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_log2.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_log2.c +@@ -16,28 +16,31 @@ + License along with the GNU C Library; if not, see + . */ + +-#include +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++# include + + extern double __redirect_log2 (double); + +-#define SYMBOL_NAME log2 +-#include "ifunc-fma.h" ++# define SYMBOL_NAME log2 ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_log2, __log2, IFUNC_SELECTOR ()); + +-#ifdef SHARED ++# ifdef SHARED + __hidden_ver1 (__log2, __GI___log2, __redirect_log2) + __attribute__ ((visibility ("hidden"))); + + versioned_symbol (libm, __ieee754_log2, log2, GLIBC_2_29); + libm_alias_double_other (__log2, log2) +-#else ++# else + libm_alias_double (__log2, log2) +-#endif ++# endif + + strong_alias (__log2, __ieee754_log2) + libm_alias_finite (__log2, __log2) + +-#define __log2 __log2_sse2 ++# define __log2 __log2_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_log2f.c b/sysdeps/x86_64/fpu/multiarch/e_log2f.c +index 2b08a7e5451c5ea3..6c61340f86e2870f 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_log2f.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_log2f.c +@@ -16,28 +16,31 @@ + License along with the GNU C Library; if not, see + . */ + +-#include +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++# include + + extern float __redirect_log2f (float); + +-#define SYMBOL_NAME log2f +-#include "ifunc-fma.h" ++# define SYMBOL_NAME log2f ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_log2f, __log2f, IFUNC_SELECTOR ()); + +-#ifdef SHARED ++# ifdef SHARED + __hidden_ver1 (__log2f, __GI___log2f, __redirect_log2f) + __attribute__ ((visibility ("hidden"))); + + versioned_symbol (libm, __ieee754_log2f, log2f, GLIBC_2_27); + libm_alias_float_other (__log2, log2) +-#else ++# else + libm_alias_float (__log2, log2) +-#endif ++# endif + + strong_alias (__log2f, __ieee754_log2f) + libm_alias_finite (__log2f, __log2f) + +-#define __log2f __log2f_sse2 ++# define __log2f __log2f_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_logf.c b/sysdeps/x86_64/fpu/multiarch/e_logf.c +index b071b09e683d00f8..a29742deddff7dfe 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_logf.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_logf.c +@@ -16,28 +16,31 @@ + License along with the GNU C Library; if not, see + . */ + +-#include +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++# include + + extern float __redirect_logf (float); + +-#define SYMBOL_NAME logf +-#include "ifunc-fma.h" ++# define SYMBOL_NAME logf ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_logf, __logf, IFUNC_SELECTOR ()); + +-#ifdef SHARED ++# ifdef SHARED + __hidden_ver1 (__logf, __GI___logf, __redirect_logf) + __attribute__ ((visibility ("hidden"))); + + versioned_symbol (libm, __ieee754_logf, logf, GLIBC_2_27); + libm_alias_float_other (__log, log) +-#else ++# else + libm_alias_float (__log, log) +-#endif ++# endif + + strong_alias (__logf, __ieee754_logf) + libm_alias_finite (__logf, __logf) + +-#define __logf __logf_sse2 ++# define __logf __logf_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_pow.c b/sysdeps/x86_64/fpu/multiarch/e_pow.c +index 66706c5814bdcdea..db72b4144440eba3 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_pow.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_pow.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#include +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++# include + + extern double __redirect_ieee754_pow (double, double); + +-#define SYMBOL_NAME ieee754_pow +-#include "ifunc-fma4.h" ++# define SYMBOL_NAME ieee754_pow ++# include "ifunc-fma4.h" + + libc_ifunc_redirected (__redirect_ieee754_pow, + __ieee754_pow, IFUNC_SELECTOR ()); + libm_alias_finite (__ieee754_pow, __pow) + +-#define __pow __ieee754_pow_sse2 ++# define __pow __ieee754_pow_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_powf.c b/sysdeps/x86_64/fpu/multiarch/e_powf.c +index 246669b7b00ff5aa..490b768c5a702cbd 100644 +--- a/sysdeps/x86_64/fpu/multiarch/e_powf.c ++++ b/sysdeps/x86_64/fpu/multiarch/e_powf.c +@@ -16,31 +16,34 @@ + License along with the GNU C Library; if not, see + . */ + +-#include +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++# include + +-#define powf __redirect_powf +-#define __DECL_SIMD___redirect_powf +-#include +-#undef powf ++# define powf __redirect_powf ++# define __DECL_SIMD___redirect_powf ++# include ++# undef powf + +-#define SYMBOL_NAME powf +-#include "ifunc-fma.h" ++# define SYMBOL_NAME powf ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_powf, __powf, IFUNC_SELECTOR ()); + +-#ifdef SHARED ++# ifdef SHARED + __hidden_ver1 (__powf, __GI___powf, __redirect_powf) + __attribute__ ((visibility ("hidden"))); + + versioned_symbol (libm, __ieee754_powf, powf, GLIBC_2_27); + libm_alias_float_other (__pow, pow) +-#else ++# else + libm_alias_float (__pow, pow) +-#endif ++# endif + + strong_alias (__powf, __ieee754_powf) + libm_alias_finite (__powf, __powf) + +-#define __powf __powf_sse2 ++# define __powf __powf_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_atan.c b/sysdeps/x86_64/fpu/multiarch/s_atan.c +index 45735d1c229dc50d..e88fa079715b1a53 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_atan.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_atan.c +@@ -16,15 +16,18 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern double __redirect_atan (double); + +-#define SYMBOL_NAME atan +-#include "ifunc-avx-fma4.h" ++# define SYMBOL_NAME atan ++# include "ifunc-avx-fma4.h" + + libc_ifunc_redirected (__redirect_atan, __atan, IFUNC_SELECTOR ()); + libm_alias_double (__atan, atan) + +-#define __atan __atan_sse2 ++# define __atan __atan_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceil-avx.S b/sysdeps/x86_64/fpu/multiarch/s_ceil-avx.S +new file mode 100644 +index 0000000000000000..e6c1106753f29600 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_ceil-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of ceil function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__ceil) ++ vroundsd $10, %xmm0, %xmm0, %xmm0 ++ ret ++END(__ceil) ++ ++libm_alias_double (__ceil, ceil) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S +index 41bdccfcdfabe800..f0803efc794b4a8b 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __ceil_sse41 __ceil ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__ceil_sse41) + roundsd $10, %xmm0, %xmm0 + ret + END(__ceil_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_double (__ceil, ceil) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceil.c b/sysdeps/x86_64/fpu/multiarch/s_ceil.c +index 315a0525a295d93d..7d0d153382beaa5c 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_ceil.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_ceil.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#define NO_MATH_REDIRECT +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# define NO_MATH_REDIRECT ++# include + +-#define ceil __redirect_ceil +-#define __ceil __redirect___ceil +-#include +-#undef ceil +-#undef __ceil ++# define ceil __redirect_ceil ++# define __ceil __redirect___ceil ++# include ++# undef ceil ++# undef __ceil + +-#define SYMBOL_NAME ceil +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME ceil ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_ceil, __ceil, IFUNC_SELECTOR ()); + libm_alias_double (__ceil, ceil) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceilf-avx.S b/sysdeps/x86_64/fpu/multiarch/s_ceilf-avx.S +new file mode 100644 +index 0000000000000000..b4d8ac045569900c +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_ceilf-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of ceilf function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__ceilf) ++ vroundss $10, %xmm0, %xmm0, %xmm0 ++ ret ++END(__ceilf) ++ ++libm_alias_float (__ceil, ceil) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S +index fae7d7893b4406f8..77f56c0ab702e14b 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __ceilf_sse41 __ceilf ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__ceilf_sse41) + roundss $10, %xmm0, %xmm0 + ret + END(__ceilf_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_float (__ceil, ceil) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceilf.c b/sysdeps/x86_64/fpu/multiarch/s_ceilf.c +index f06ca2eb6e0abb29..5bd4a447bf3ef429 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_ceilf.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_ceilf.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#define NO_MATH_REDIRECT +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# define NO_MATH_REDIRECT ++# include + +-#define ceilf __redirect_ceilf +-#define __ceilf __redirect___ceilf +-#include +-#undef ceilf +-#undef __ceilf ++# define ceilf __redirect_ceilf ++# define __ceilf __redirect___ceilf ++# include ++# undef ceilf ++# undef __ceilf + +-#define SYMBOL_NAME ceilf +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME ceilf ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_ceilf, __ceilf, IFUNC_SELECTOR ()); + libm_alias_float (__ceil, ceil) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_cosf.c b/sysdeps/x86_64/fpu/multiarch/s_cosf.c +index ae7d9717d5ee0539..c4a81ae347bf360a 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_cosf.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_cosf.c +@@ -16,13 +16,18 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern float __redirect_cosf (float); + +-#define SYMBOL_NAME cosf +-#include "ifunc-fma.h" ++# define SYMBOL_NAME cosf ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_cosf, __cosf, IFUNC_SELECTOR ()); + + libm_alias_float (__cos, cos) ++#else ++# include ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_expm1.c b/sysdeps/x86_64/fpu/multiarch/s_expm1.c +index 2cae83fb7f21bb99..56ed22ac5fdc662b 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_expm1.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_expm1.c +@@ -16,21 +16,24 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern double __redirect_expm1 (double); + +-#define SYMBOL_NAME expm1 +-#include "ifunc-fma.h" ++# define SYMBOL_NAME expm1 ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_expm1, __expm1, IFUNC_SELECTOR ()); + libm_alias_double (__expm1, expm1) + +-#define __expm1 __expm1_sse2 ++# define __expm1 __expm1_sse2 + + /* NB: __expm1 may be expanded to __expm1_sse2 in the following + prototypes. */ + extern long double __expm1l (long double); + extern long double __expm1f128 (long double); + ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_floor-avx.S b/sysdeps/x86_64/fpu/multiarch/s_floor-avx.S +new file mode 100644 +index 0000000000000000..ff74b5a8bfe69423 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_floor-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of floor function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__floor) ++ vroundsd $9, %xmm0, %xmm0, %xmm0 ++ ret ++END(__floor) ++ ++libm_alias_double (__floor, floor) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S +index 4e8ec26da6e83713..253c8f68c5170b13 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __floor_sse41 __floor ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__floor_sse41) + roundsd $9, %xmm0, %xmm0 + ret + END(__floor_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_double (__floor, floor) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_floor.c b/sysdeps/x86_64/fpu/multiarch/s_floor.c +index 12e1382e9bd28de4..da7805dfc0260042 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_floor.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_floor.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#define NO_MATH_REDIRECT +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# define NO_MATH_REDIRECT ++# include + +-#define floor __redirect_floor +-#define __floor __redirect___floor +-#include +-#undef floor +-#undef __floor ++# define floor __redirect_floor ++# define __floor __redirect___floor ++# include ++# undef floor ++# undef __floor + +-#define SYMBOL_NAME floor +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME floor ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_floor, __floor, IFUNC_SELECTOR ()); + libm_alias_double (__floor, floor) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_floorf-avx.S b/sysdeps/x86_64/fpu/multiarch/s_floorf-avx.S +new file mode 100644 +index 0000000000000000..c378baae8e9c7ac7 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_floorf-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of floorf function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__floorf) ++ vroundss $9, %xmm0, %xmm0, %xmm0 ++ ret ++END(__floorf) ++ ++libm_alias_float (__floor, floor) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S +index 5d4151f64b7b47c1..3b843a62efcc8516 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __floorf_sse41 __floorf ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__floorf_sse41) + roundss $9, %xmm0, %xmm0 + ret + END(__floorf_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_float (__floor, floor) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_floorf.c b/sysdeps/x86_64/fpu/multiarch/s_floorf.c +index f5725721fadbe1f7..3930c5347af1d8ee 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_floorf.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_floorf.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#define NO_MATH_REDIRECT +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# define NO_MATH_REDIRECT ++# include + +-#define floorf __redirect_floorf +-#define __floorf __redirect___floorf +-#include +-#undef floorf +-#undef __floorf ++# define floorf __redirect_floorf ++# define __floorf __redirect___floorf ++# include ++# undef floorf ++# undef __floorf + +-#define SYMBOL_NAME floorf +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME floorf ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_floorf, __floorf, IFUNC_SELECTOR ()); + libm_alias_float (__floor, floor) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_log1p.c b/sysdeps/x86_64/fpu/multiarch/s_log1p.c +index 6ce5198d6d844c1c..cc1cace463c0a632 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_log1p.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_log1p.c +@@ -16,14 +16,17 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern double __redirect_log1p (double); + +-#define SYMBOL_NAME log1p +-#include "ifunc-fma.h" ++# define SYMBOL_NAME log1p ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_log1p, __log1p, IFUNC_SELECTOR ()); + +-#define __log1p __log1p_sse2 ++# define __log1p __log1p_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyint-avx.S b/sysdeps/x86_64/fpu/multiarch/s_nearbyint-avx.S +new file mode 100644 +index 0000000000000000..5bfdf73c28b34350 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyint-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of nearbyint function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__nearbyint) ++ vroundsd $0xc, %xmm0, %xmm0, %xmm0 ++ ret ++END(__nearbyint) ++ ++libm_alias_double (__nearbyint, nearbyint) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S +index 7844f8858b8d3ad5..a8848c2e15d615c8 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __nearbyint_sse41 __nearbyint ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__nearbyint_sse41) + roundsd $0xc, %xmm0, %xmm0 + ret + END(__nearbyint_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_double (__nearbyint, nearbyint) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyint.c b/sysdeps/x86_64/fpu/multiarch/s_nearbyint.c +index ad8df528c30709f6..eb03671216438a22 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_nearbyint.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyint.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# include + +-#define nearbyint __redirect_nearbyint +-#define __nearbyint __redirect___nearbyint +-#include +-#undef nearbyint +-#undef __nearbyint ++# define nearbyint __redirect_nearbyint ++# define __nearbyint __redirect___nearbyint ++# include ++# undef nearbyint ++# undef __nearbyint + +-#define SYMBOL_NAME nearbyint +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME nearbyint ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_nearbyint, __nearbyint, + IFUNC_SELECTOR ()); + libm_alias_double (__nearbyint, nearbyint) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyintf-avx.S b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf-avx.S +new file mode 100644 +index 0000000000000000..1dbaed0324daa024 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implmentation of nearbyintf function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__nearbyintf) ++ vroundss $0xc, %xmm0, %xmm0, %xmm0 ++ ret ++END(__nearbyintf) ++ ++libm_alias_float (__nearbyint, nearbyint) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S +index 710c2d227de9c937..b168bc55cd8507ef 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __nearbyintf_sse41 __nearbyintf ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__nearbyintf_sse41) + roundss $0xc, %xmm0, %xmm0 + ret + END(__nearbyintf_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_float (__nearbyint, nearbyint) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c +index ef9606d2599b1efd..c7aaa6ddb1a9bc15 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# include + +-#define nearbyintf __redirect_nearbyintf +-#define __nearbyintf __redirect___nearbyintf +-#include +-#undef nearbyintf +-#undef __nearbyintf ++# define nearbyintf __redirect_nearbyintf ++# define __nearbyintf __redirect___nearbyintf ++# include ++# undef nearbyintf ++# undef __nearbyintf + +-#define SYMBOL_NAME nearbyintf +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME nearbyintf ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_nearbyintf, __nearbyintf, + IFUNC_SELECTOR ()); + libm_alias_float (__nearbyint, nearbyint) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_rint-avx.S b/sysdeps/x86_64/fpu/multiarch/s_rint-avx.S +new file mode 100644 +index 0000000000000000..2b403b331f145221 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_rint-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of rint function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__rint) ++ vroundsd $4, %xmm0, %xmm0, %xmm0 ++ ret ++END(__rint) ++ ++libm_alias_double (__rint, rint) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S +index eb749fe79be41363..546d021c9ea1fe43 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __rint_sse41 __rint ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__rint_sse41) + roundsd $4, %xmm0, %xmm0 + ret + END(__rint_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_double (__rint, rint) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_rint.c b/sysdeps/x86_64/fpu/multiarch/s_rint.c +index ebe158b2dd97b778..c77e68f1240d3115 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_rint.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_rint.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#define NO_MATH_REDIRECT +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# define NO_MATH_REDIRECT ++# include + +-#define rint __redirect_rint +-#define __rint __redirect___rint +-#include +-#undef rint +-#undef __rint ++# define rint __redirect_rint ++# define __rint __redirect___rint ++# include ++# undef rint ++# undef __rint + +-#define SYMBOL_NAME rint +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME rint ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_rint, __rint, IFUNC_SELECTOR ()); + libm_alias_double (__rint, rint) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_rintf-avx.S b/sysdeps/x86_64/fpu/multiarch/s_rintf-avx.S +new file mode 100644 +index 0000000000000000..171c2867f4ab4e3c +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_rintf-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of rintf function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__rintf) ++ vroundss $4, %xmm0, %xmm0, %xmm0 ++ ret ++END(__rintf) ++ ++libm_alias_float (__rint, rint) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S +index f841d413568688a5..70e1807d6bfd1aa3 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __rintf_sse41 __rintf ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__rintf_sse41) + roundss $4, %xmm0, %xmm0 + ret + END(__rintf_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_float (__rint, rint) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_rintf.c b/sysdeps/x86_64/fpu/multiarch/s_rintf.c +index 65c0f105d5a5cdbd..657fe96dbba0b638 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_rintf.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_rintf.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#define NO_MATH_REDIRECT +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# define NO_MATH_REDIRECT ++# include + +-#define rintf __redirect_rintf +-#define __rintf __redirect___rintf +-#include +-#undef rintf +-#undef __rintf ++# define rintf __redirect_rintf ++# define __rintf __redirect___rintf ++# include ++# undef rintf ++# undef __rintf + +-#define SYMBOL_NAME rintf +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME rintf ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_rintf, __rintf, IFUNC_SELECTOR ()); + libm_alias_float (__rint, rint) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_roundeven-avx.S b/sysdeps/x86_64/fpu/multiarch/s_roundeven-avx.S +new file mode 100644 +index 0000000000000000..576790355c6b493f +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_roundeven-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of roundeven function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__roundeven) ++ vroundsd $8, %xmm0, %xmm0, %xmm0 ++ ret ++END(__roundeven) ++ ++libm_alias_double (__roundeven, roundeven) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_roundeven-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_roundeven-sse4_1.S +index 6ae8f6b1d3a2f79f..3d1fa251c5044945 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_roundeven-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_roundeven-sse4_1.S +@@ -17,8 +17,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __roundeven_sse41 __roundeven ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__roundeven_sse41) + roundsd $8, %xmm0, %xmm0 + ret + END(__roundeven_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_double (__roundeven, roundeven) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_roundeven.c b/sysdeps/x86_64/fpu/multiarch/s_roundeven.c +index d92eda652a8a3e25..4ac0eb6eaaa1e752 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_roundeven.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_roundeven.c +@@ -16,16 +16,19 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# include + +-#define roundeven __redirect_roundeven +-#define __roundeven __redirect___roundeven +-#include +-#undef roundeven +-#undef __roundeven ++# define roundeven __redirect_roundeven ++# define __roundeven __redirect___roundeven ++# include ++# undef roundeven ++# undef __roundeven + +-#define SYMBOL_NAME roundeven +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME roundeven ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_roundeven, __roundeven, IFUNC_SELECTOR ()); + libm_alias_double (__roundeven, roundeven) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_roundevenf-avx.S b/sysdeps/x86_64/fpu/multiarch/s_roundevenf-avx.S +new file mode 100644 +index 0000000000000000..42c359f4cd04fc56 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_roundevenf-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of roundevenf function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__roundevenf) ++ vroundss $8, %xmm0, %xmm0, %xmm0 ++ ret ++END(__roundevenf) ++ ++libm_alias_float (__roundeven, roundeven) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_roundevenf-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_roundevenf-sse4_1.S +index a76e10807e29d4ab..481daa9a5158fca4 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_roundevenf-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_roundevenf-sse4_1.S +@@ -17,8 +17,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __roundevenf_sse41 __roundevenf ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__roundevenf_sse41) + roundss $8, %xmm0, %xmm0 + ret + END(__roundevenf_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_float (__roundeven, roundeven) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_roundevenf.c b/sysdeps/x86_64/fpu/multiarch/s_roundevenf.c +index 2ee196e68ffa6b66..78a5f4ef2caa0633 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_roundevenf.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_roundevenf.c +@@ -16,16 +16,19 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# include + +-#define roundevenf __redirect_roundevenf +-#define __roundevenf __redirect___roundevenf +-#include +-#undef roundevenf +-#undef __roundevenf ++# define roundevenf __redirect_roundevenf ++# define __roundevenf __redirect___roundevenf ++# include ++# undef roundevenf ++# undef __roundevenf + +-#define SYMBOL_NAME roundevenf +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME roundevenf ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_roundevenf, __roundevenf, IFUNC_SELECTOR ()); + libm_alias_float (__roundeven, roundeven) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_sin.c b/sysdeps/x86_64/fpu/multiarch/s_sin.c +index 97ec5d032b11391b..81a5832340b27352 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_sin.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_sin.c +@@ -16,24 +16,27 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern double __redirect_sin (double); + extern double __redirect_cos (double); + +-#define SYMBOL_NAME sin +-#include "ifunc-avx-fma4.h" ++# define SYMBOL_NAME sin ++# include "ifunc-avx-fma4.h" + + libc_ifunc_redirected (__redirect_sin, __sin, IFUNC_SELECTOR ()); + libm_alias_double (__sin, sin) + +-#undef SYMBOL_NAME +-#define SYMBOL_NAME cos +-#include "ifunc-avx-fma4.h" ++# undef SYMBOL_NAME ++# define SYMBOL_NAME cos ++# include "ifunc-avx-fma4.h" + + libc_ifunc_redirected (__redirect_cos, __cos, IFUNC_SELECTOR ()); + libm_alias_double (__cos, cos) + +-#define __cos __cos_sse2 +-#define __sin __sin_sse2 ++# define __cos __cos_sse2 ++# define __sin __sin_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_sincos.c b/sysdeps/x86_64/fpu/multiarch/s_sincos.c +index 67c2817d688379ab..628e14b98fd42926 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_sincos.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_sincos.c +@@ -16,15 +16,18 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern void __redirect_sincos (double, double *, double *); + +-#define SYMBOL_NAME sincos +-#include "ifunc-fma4.h" ++# define SYMBOL_NAME sincos ++# include "ifunc-fma4.h" + + libc_ifunc_redirected (__redirect_sincos, __sincos, IFUNC_SELECTOR ()); + libm_alias_double (__sincos, sincos) + +-#define __sincos __sincos_sse2 ++# define __sincos __sincos_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_sincosf.c b/sysdeps/x86_64/fpu/multiarch/s_sincosf.c +index 0f2eec414e7426ed..43ec35898efb09b2 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_sincosf.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_sincosf.c +@@ -16,13 +16,18 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern void __redirect_sincosf (float, float *, float *); + +-#define SYMBOL_NAME sincosf +-#include "ifunc-fma.h" ++# define SYMBOL_NAME sincosf ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_sincosf, __sincosf, IFUNC_SELECTOR ()); + + libm_alias_float (__sincos, sincos) ++#else ++# include ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_sinf.c b/sysdeps/x86_64/fpu/multiarch/s_sinf.c +index 6fb652f394426807..1baa495ceef25b57 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_sinf.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_sinf.c +@@ -16,13 +16,18 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern float __redirect_sinf (float); + +-#define SYMBOL_NAME sinf +-#include "ifunc-fma.h" ++# define SYMBOL_NAME sinf ++# include "ifunc-fma.h" + + libc_ifunc_redirected (__redirect_sinf, __sinf, IFUNC_SELECTOR ()); + + libm_alias_float (__sin, sin) ++#else ++# include ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_tan.c b/sysdeps/x86_64/fpu/multiarch/s_tan.c +index 20ed8023da07a9ea..ff53b028c193b5ad 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_tan.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_tan.c +@@ -16,15 +16,18 @@ + License along with the GNU C Library; if not, see + . */ + +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include + + extern double __redirect_tan (double); + +-#define SYMBOL_NAME tan +-#include "ifunc-avx-fma4.h" ++# define SYMBOL_NAME tan ++# include "ifunc-avx-fma4.h" + + libc_ifunc_redirected (__redirect_tan, __tan, IFUNC_SELECTOR ()); + libm_alias_double (__tan, tan) + +-#define __tan __tan_sse2 ++# define __tan __tan_sse2 ++#endif + #include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_trunc-avx.S b/sysdeps/x86_64/fpu/multiarch/s_trunc-avx.S +new file mode 100644 +index 0000000000000000..b3e87e96068e5404 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_trunc-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of trunc function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__trunc) ++ vroundsd $11, %xmm0, %xmm0, %xmm0 ++ ret ++END(__trunc) ++ ++libm_alias_double (__trunc, trunc) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_trunc-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_trunc-sse4_1.S +index 34c144a545403bb1..74ebbc7ef6a4d6cb 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_trunc-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_trunc-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __trunc_sse41 __trunc ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__trunc_sse41) + roundsd $11, %xmm0, %xmm0 + ret + END(__trunc_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_double (__trunc, trunc) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_trunc.c b/sysdeps/x86_64/fpu/multiarch/s_trunc.c +index ff94ecbea17fae33..f59ed41846437ba9 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_trunc.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_trunc.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#define NO_MATH_REDIRECT +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# define NO_MATH_REDIRECT ++# include + +-#define trunc __redirect_trunc +-#define __trunc __redirect___trunc +-#include +-#undef trunc +-#undef __trunc ++# define trunc __redirect_trunc ++# define __trunc __redirect___trunc ++# include ++# undef trunc ++# undef __trunc + +-#define SYMBOL_NAME trunc +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME trunc ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_trunc, __trunc, IFUNC_SELECTOR ()); + libm_alias_double (__trunc, trunc) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_truncf-avx.S b/sysdeps/x86_64/fpu/multiarch/s_truncf-avx.S +new file mode 100644 +index 0000000000000000..f31ac7d7f7980f2e +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_truncf-avx.S +@@ -0,0 +1,28 @@ ++/* AVX implementation of truncf function. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++ .text ++ENTRY(__truncf) ++ vroundss $11, %xmm0, %xmm0, %xmm0 ++ ret ++END(__truncf) ++ ++libm_alias_float (__trunc, trunc) +diff --git a/sysdeps/x86_64/fpu/multiarch/s_truncf-sse4_1.S b/sysdeps/x86_64/fpu/multiarch/s_truncf-sse4_1.S +index a7bba51fff4d8013..fdf59280bb392abc 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_truncf-sse4_1.S ++++ b/sysdeps/x86_64/fpu/multiarch/s_truncf-sse4_1.S +@@ -18,8 +18,20 @@ + + #include + ++#include ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++# include ++# define __truncf_sse41 __truncf ++ .text ++#else + .section .text.sse4.1,"ax",@progbits ++#endif ++ + ENTRY(__truncf_sse41) + roundss $11, %xmm0, %xmm0 + ret + END(__truncf_sse41) ++ ++#if MINIMUM_X86_ISA_LEVEL == SSE4_1_X86_ISA_LEVEL ++libm_alias_float (__trunc, trunc) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/s_truncf.c b/sysdeps/x86_64/fpu/multiarch/s_truncf.c +index 9b4a34d96c4e48a3..42e4061e2194efa0 100644 +--- a/sysdeps/x86_64/fpu/multiarch/s_truncf.c ++++ b/sysdeps/x86_64/fpu/multiarch/s_truncf.c +@@ -16,17 +16,20 @@ + License along with the GNU C Library; if not, see + . */ + +-#define NO_MATH_REDIRECT +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL < SSE4_1_X86_ISA_LEVEL ++# define NO_MATH_REDIRECT ++# include + +-#define truncf __redirect_truncf +-#define __truncf __redirect___truncf +-#include +-#undef truncf +-#undef __truncf ++# define truncf __redirect_truncf ++# define __truncf __redirect___truncf ++# include ++# undef truncf ++# undef __truncf + +-#define SYMBOL_NAME truncf +-#include "ifunc-sse4_1.h" ++# define SYMBOL_NAME truncf ++# include "ifunc-sse4_1.h" + + libc_ifunc_redirected (__redirect_truncf, __truncf, IFUNC_SELECTOR ()); + libm_alias_float (__trunc, trunc) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/w_exp.c b/sysdeps/x86_64/fpu/multiarch/w_exp.c +index 27eee98a0a3e16f0..3584187e0e223195 100644 +--- a/sysdeps/x86_64/fpu/multiarch/w_exp.c ++++ b/sysdeps/x86_64/fpu/multiarch/w_exp.c +@@ -1 +1,6 @@ +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL >= AVX2_X86_ISA_LEVEL ++# include ++#else ++# include ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/w_log.c b/sysdeps/x86_64/fpu/multiarch/w_log.c +index 9b2b0187116bc48e..414ca3ca3ddf530a 100644 +--- a/sysdeps/x86_64/fpu/multiarch/w_log.c ++++ b/sysdeps/x86_64/fpu/multiarch/w_log.c +@@ -1 +1,6 @@ +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL >= AVX2_X86_ISA_LEVEL ++# include ++#else ++# include ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/w_pow.c b/sysdeps/x86_64/fpu/multiarch/w_pow.c +index b50c1988de597731..d5fcc4f871bd7eea 100644 +--- a/sysdeps/x86_64/fpu/multiarch/w_pow.c ++++ b/sysdeps/x86_64/fpu/multiarch/w_pow.c +@@ -1 +1,6 @@ +-#include ++#include ++#if MINIMUM_X86_ISA_LEVEL >= AVX2_X86_ISA_LEVEL ++# include ++#else ++# include ++#endif diff --git a/glibc-RHEL-1063-15.patch b/glibc-RHEL-1063-15.patch new file mode 100644 index 0000000..647b8cf --- /dev/null +++ b/glibc-RHEL-1063-15.patch @@ -0,0 +1,191 @@ +commit 9e1f4aef865ddeffeb4b5f6578fefab606783120 +Author: H.J. Lu +Date: Thu Apr 4 15:43:50 2024 -0700 + + x86-64: Exclude FMA4 IFUNC functions for -mapxf + + When -mapxf is used to build glibc, the resulting glibc will never run + on FMA4 machines. Exclude FMA4 IFUNC functions when -mapxf is used. + This requires GCC which defines __APX_F__ for -mapxf with commit: + + 1df56719bd8 x86: Define __APX_F__ for -mapxf + + Reviewed-by: Sunil K Pandey + +diff --git a/config.h.in b/config.h.in +index 790038fec60eb049..c95d510f078136b7 100644 +--- a/config.h.in ++++ b/config.h.in +@@ -298,4 +298,7 @@ + /* Define if -mmovbe is enabled by default on x86. */ + #undef HAVE_X86_MOVBE + ++/* Define if -mapxf is enabled by default on x86. */ ++#undef HAVE_X86_APX ++ + #endif +diff --git a/sysdeps/x86_64/configure b/sysdeps/x86_64/configure +index 75c96d60d4da5543..642386d8d185b37d 100755 +--- a/sysdeps/x86_64/configure ++++ b/sysdeps/x86_64/configure +@@ -113,5 +113,37 @@ $as_echo "#define PI_STATIC_AND_HIDDEN 1" >>confdefs.h + $as_echo "#define SUPPORT_STATIC_PIE 1" >>confdefs.h + + ++# Check if -mapxf is enabled. ++{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether -mapxf is enabled" >&5 ++printf %s "checking whether -mapxf is enabled... " >&6; } ++if test ${libc_cv_x86_have_apx+y} ++then : ++ printf %s "(cached) " >&6 ++else $as_nop ++ cat > conftest.c <&5 ++ (eval $ac_try) 2>&5 ++ ac_status=$? ++ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 ++ test $ac_status = 0; }; }; then ++ libc_cv_x86_have_apx=yes ++ fi ++ rm -rf conftest* ++fi ++{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_x86_have_apx" >&5 ++printf "%s\n" "$libc_cv_x86_have_apx" >&6; } ++if test $libc_cv_x86_have_apx = yes; then ++ printf "%s\n" "#define HAVE_X86_APX 1" >>confdefs.h ++ ++fi ++config_vars="$config_vars ++have-x86-apx = $libc_cv_x86_have_apx" ++ + test -n "$critic_missing" && as_fn_error $? " + *** $critic_missing" "$LINENO" 5 +diff --git a/sysdeps/x86_64/configure.ac b/sysdeps/x86_64/configure.ac +index 66219e7ce5e190ae..53259c24a9f49822 100644 +--- a/sysdeps/x86_64/configure.ac ++++ b/sysdeps/x86_64/configure.ac +@@ -60,5 +60,23 @@ AC_DEFINE(PI_STATIC_AND_HIDDEN) + dnl Static PIE is supported. + AC_DEFINE(SUPPORT_STATIC_PIE) + ++# Check if -mapxf is enabled. ++AC_CACHE_CHECK(whether -mapxf is enabled, ++ libc_cv_x86_have_apx, [dnl ++cat > conftest.c <&AS_MESSAGE_LOG_FD); then ++ libc_cv_x86_have_apx=yes ++ fi ++ rm -rf conftest*]) ++if test $libc_cv_x86_have_apx = yes; then ++ AC_DEFINE(HAVE_X86_APX) ++fi ++LIBC_CONFIG_VAR([have-x86-apx], [$libc_cv_x86_have_apx]) ++ + test -n "$critic_missing" && AC_MSG_ERROR([ + *** $critic_missing]) +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index 73f9af871b9bad45..e94c2c3ed78ca462 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -38,29 +38,36 @@ libm-sysdep_routines += \ + s_truncf-avx \ + # libm-sysdep_routines + else ++ifeq (no,$(have-x86-apx)) + libm-sysdep_routines += \ +- e_asin-fma \ + e_asin-fma4 \ ++ e_atan2-fma4 \ ++ e_exp-fma4 \ ++ e_log-fma4 \ ++ e_pow-fma4 \ ++ s_atan-fma4 \ ++ s_sin-fma4 \ ++ s_sincos-fma4 \ ++ s_tan-fma4 \ ++# libm-sysdep_routines ++endif ++libm-sysdep_routines += \ ++ e_asin-fma \ + e_atan2-avx \ + e_atan2-fma \ +- e_atan2-fma4 \ + e_exp-avx \ + e_exp-fma \ +- e_exp-fma4 \ + e_exp2f-fma \ + e_expf-fma \ + e_log-avx \ + e_log-fma \ +- e_log-fma4 \ + e_log2-fma \ + e_log2f-fma \ + e_logf-fma \ + e_pow-fma \ +- e_pow-fma4 \ + e_powf-fma \ + s_atan-avx \ + s_atan-fma \ +- s_atan-fma4 \ + s_ceil-sse4_1 \ + s_ceilf-sse4_1 \ + s_cosf-fma \ +@@ -77,17 +84,14 @@ libm-sysdep_routines += \ + s_roundevenf-sse4_1 \ + s_sin-avx \ + s_sin-fma \ +- s_sin-fma4 \ + s_sincos-avx \ + s_sincos-fma \ +- s_sincos-fma4 \ + s_sincosf-fma \ + s_sincosf-sse2 \ + s_sinf-fma \ + s_sinf-sse2 \ + s_tan-avx \ + s_tan-fma \ +- s_tan-fma4 \ + s_trunc-sse4_1 \ + s_truncf-sse4_1 \ + # libm-sysdep_routines +diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-avx-fma4.h b/sysdeps/x86_64/fpu/multiarch/ifunc-avx-fma4.h +index 997602b3b5ad5383..e1c01e6e07ea4a27 100644 +--- a/sysdeps/x86_64/fpu/multiarch/ifunc-avx-fma4.h ++++ b/sysdeps/x86_64/fpu/multiarch/ifunc-avx-fma4.h +@@ -33,8 +33,10 @@ IFUNC_SELECTOR (void) + && CPU_FEATURE_USABLE_P (cpu_features, AVX2)) + return OPTIMIZE (fma); + ++#ifndef HAVE_X86_APX + if (CPU_FEATURE_USABLE_P (cpu_features, FMA4)) + return OPTIMIZE (fma4); ++#endif + + if (CPU_FEATURE_USABLE_P (cpu_features, AVX)) + return OPTIMIZE (avx); +diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-fma4.h b/sysdeps/x86_64/fpu/multiarch/ifunc-fma4.h +index 20219ad2a38e6699..1299763fecea57ab 100644 +--- a/sysdeps/x86_64/fpu/multiarch/ifunc-fma4.h ++++ b/sysdeps/x86_64/fpu/multiarch/ifunc-fma4.h +@@ -32,8 +32,10 @@ IFUNC_SELECTOR (void) + && CPU_FEATURE_USABLE_P (cpu_features, AVX2)) + return OPTIMIZE (fma); + ++#ifndef HAVE_X86_APX + if (CPU_FEATURE_USABLE_P (cpu_features, FMA4)) + return OPTIMIZE (fma4); ++#endif + + return OPTIMIZE (sse2); + } diff --git a/glibc-RHEL-1063-16.patch b/glibc-RHEL-1063-16.patch new file mode 100644 index 0000000..4c1700b --- /dev/null +++ b/glibc-RHEL-1063-16.patch @@ -0,0 +1,105 @@ +commit c6352111c72a20b3588ae304dd99b63e25dd6d85 +Author: Sunil K Pandey +Date: Mon Mar 10 10:24:07 2025 -0700 + + x86_64: Add tanh with FMA + + On Skylake, it improves tanh bench performance by: + + Before After Improvement + max 110.89 95.826 14% + min 20.966 20.157 4% + mean 30.9601 29.8431 4% + + Reviewed-by: H.J. Lu + +diff --git a/sysdeps/ieee754/dbl-64/s_tanh.c b/sysdeps/ieee754/dbl-64/s_tanh.c +index 673a97102de292fd..13063db04ebb198c 100644 +--- a/sysdeps/ieee754/dbl-64/s_tanh.c ++++ b/sysdeps/ieee754/dbl-64/s_tanh.c +@@ -46,6 +46,11 @@ static char rcsid[] = "$NetBSD: s_tanh.c,v 1.7 1995/05/10 20:48:22 jtc Exp $"; + + static const double one = 1.0, two = 2.0, tiny = 1.0e-300; + ++#ifndef SECTION ++# define SECTION ++#endif ++ ++SECTION + double + __tanh (double x) + { +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index e94c2c3ed78ca462..75842a7d0a845600 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -10,6 +10,7 @@ CFLAGS-s_expm1-fma.c = -mfma -mavx2 + CFLAGS-s_log1p-fma.c = -mfma -mavx2 + CFLAGS-s_sin-fma.c = -mfma -mavx2 + CFLAGS-s_tan-fma.c = -mfma -mavx2 ++CFLAGS-s_tanh-fma.c = -mfma -mavx2 + CFLAGS-s_sincos-fma.c = -mfma -mavx2 + + CFLAGS-e_exp2f-fma.c = -mfma -mavx2 +@@ -92,6 +93,7 @@ libm-sysdep_routines += \ + s_sinf-sse2 \ + s_tan-avx \ + s_tan-fma \ ++ s_tanh-fma \ + s_trunc-sse4_1 \ + s_truncf-sse4_1 \ + # libm-sysdep_routines +diff --git a/sysdeps/x86_64/fpu/multiarch/s_tanh-fma.c b/sysdeps/x86_64/fpu/multiarch/s_tanh-fma.c +new file mode 100644 +index 0000000000000000..1b808b1227f50cf5 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_tanh-fma.c +@@ -0,0 +1,11 @@ ++#define __tanh __tanh_fma ++#define __expm1 __expm1_fma ++ ++/* NB: __expm1 may be expanded to __expm1_fma in the following ++ prototypes. */ ++extern long double __expm1l (long double); ++extern long double __expm1f128 (long double); ++ ++#define SECTION __attribute__ ((section (".text.fma"))) ++ ++#include +diff --git a/sysdeps/x86_64/fpu/multiarch/s_tanh.c b/sysdeps/x86_64/fpu/multiarch/s_tanh.c +new file mode 100644 +index 0000000000000000..5539b6c61c63548d +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/s_tanh.c +@@ -0,0 +1,31 @@ ++/* Multiple versions of tanh. ++ Copyright (C) 2025 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++ ++extern double __redirect_tanh (double); ++ ++# define SYMBOL_NAME tanh ++# include "ifunc-fma.h" ++ ++libc_ifunc_redirected (__redirect_tanh, __tanh, IFUNC_SELECTOR ()); ++ ++# define __tanh __tanh_sse2 ++#endif ++#include diff --git a/glibc-RHEL-1063-17.patch b/glibc-RHEL-1063-17.patch new file mode 100644 index 0000000..3b1dab0 --- /dev/null +++ b/glibc-RHEL-1063-17.patch @@ -0,0 +1,129 @@ +commit dded0d20f67ba1925ccbcb9cf28f0c75febe0dbe +Author: Sunil K Pandey +Date: Sat Mar 8 08:51:10 2025 -0800 + + x86_64: Add sinh with FMA + + On SPR, it improves sinh bench performance by: + + Before After Improvement + reciprocal-throughput 14.2017 11.815 17% + latency 36.4917 35.2114 4% + + Reviewed-by: H.J. Lu + +diff --git a/benchtests/sinh-inputs b/benchtests/sinh-inputs +index 7b1ac46a39c0a0b0..2fcb2fabf82ce778 100644 +--- a/benchtests/sinh-inputs ++++ b/benchtests/sinh-inputs +@@ -1,6 +1,7 @@ + ## args: double + ## ret: double + ## includes: math.h ++## name: workload-random + 0x1.bcb6129b5ff2bp8 + -0x1.63057386325ebp9 + 0x1.62f1d7dc4e8bfp9 +diff --git a/sysdeps/ieee754/dbl-64/e_sinh.c b/sysdeps/ieee754/dbl-64/e_sinh.c +index b4b5857dddf90f7a..3f787967f93d72f0 100644 +--- a/sysdeps/ieee754/dbl-64/e_sinh.c ++++ b/sysdeps/ieee754/dbl-64/e_sinh.c +@@ -41,6 +41,11 @@ static char rcsid[] = "$NetBSD: e_sinh.c,v 1.7 1995/05/10 20:46:13 jtc Exp $"; + + static const double one = 1.0, shuge = 1.0e307; + ++#ifndef SECTION ++# define SECTION ++#endif ++ ++SECTION + double + __ieee754_sinh (double x) + { +@@ -90,4 +95,7 @@ __ieee754_sinh (double x) + /* |x| > overflowthresold, sinh(x) overflow */ + return math_narrow_eval (x * shuge); + } ++ ++#ifndef __ieee754_sinh + libm_alias_finite (__ieee754_sinh, __sinh) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index 75842a7d0a845600..40a9654ecadca713 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -5,6 +5,7 @@ CFLAGS-e_exp-fma.c = -mfma -mavx2 + CFLAGS-e_log-fma.c = -mfma -mavx2 + CFLAGS-e_log2-fma.c = -mfma -mavx2 + CFLAGS-e_pow-fma.c = -mfma -mavx2 ++CFLAGS-e_sinh-fma.c = -mfma -mavx2 + CFLAGS-s_atan-fma.c = -mfma -mavx2 + CFLAGS-s_expm1-fma.c = -mfma -mavx2 + CFLAGS-s_log1p-fma.c = -mfma -mavx2 +@@ -67,6 +68,7 @@ libm-sysdep_routines += \ + e_logf-fma \ + e_pow-fma \ + e_powf-fma \ ++ e_sinh-fma \ + s_atan-avx \ + s_atan-fma \ + s_ceil-sse4_1 \ +diff --git a/sysdeps/x86_64/fpu/multiarch/e_sinh-fma.c b/sysdeps/x86_64/fpu/multiarch/e_sinh-fma.c +new file mode 100644 +index 0000000000000000..e0e1e39a7a606dc8 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/e_sinh-fma.c +@@ -0,0 +1,12 @@ ++#define __ieee754_sinh __ieee754_sinh_fma ++#define __ieee754_exp __ieee754_exp_fma ++#define __expm1 __expm1_fma ++ ++/* NB: __expm1 may be expanded to __expm1_fma in the following ++ prototypes. */ ++extern long double __expm1l (long double); ++extern long double __expm1f128 (long double); ++ ++#define SECTION __attribute__ ((section (".text.fma"))) ++ ++#include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_sinh.c b/sysdeps/x86_64/fpu/multiarch/e_sinh.c +new file mode 100644 +index 0000000000000000..3d3c18ccdf1d437a +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/e_sinh.c +@@ -0,0 +1,35 @@ ++/* Multiple versions of sinh. ++ Copyright (C) 2025 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++ ++extern double __redirect_ieee754_sinh (double); ++ ++# define SYMBOL_NAME ieee754_sinh ++# include "ifunc-fma.h" ++ ++libc_ifunc_redirected (__redirect_ieee754_sinh, __ieee754_sinh, ++ IFUNC_SELECTOR ()); ++ ++libm_alias_finite (__ieee754_sinh, __sinh) ++ ++# define __ieee754_sinh __ieee754_sinh_sse2 ++#endif ++#include diff --git a/glibc-RHEL-1063-18.patch b/glibc-RHEL-1063-18.patch new file mode 100644 index 0000000..0bb6044 --- /dev/null +++ b/glibc-RHEL-1063-18.patch @@ -0,0 +1,122 @@ +commit c7c4a5906f326f1290b1c2413a83c530564ec4b8 +Author: Sunil K Pandey +Date: Wed Mar 5 16:13:38 2025 -0800 + + x86_64: Add atanh with FMA + + On SPR, it improves atanh bench performance by: + + Before After Improvement + reciprocal-throughput 15.1715 14.8628 2% + latency 57.1941 56.1883 2% + + Reviewed-by: H.J. Lu + +diff --git a/benchtests/atanh-inputs b/benchtests/atanh-inputs +index 455aa65b6500bccb..498529325436d48f 100644 +--- a/benchtests/atanh-inputs ++++ b/benchtests/atanh-inputs +@@ -1,6 +1,7 @@ + ## args: double + ## ret: double + ## includes: math.h ++## name: workload-random + 0x1.5a2730bacd94ap-1 + -0x1.b57eb40fc048ep-21 + -0x1.c0b185fb450e2p-17 +diff --git a/sysdeps/ieee754/dbl-64/e_atanh.c b/sysdeps/ieee754/dbl-64/e_atanh.c +index db1f69f953e62166..fbfabf0ca0a35e92 100644 +--- a/sysdeps/ieee754/dbl-64/e_atanh.c ++++ b/sysdeps/ieee754/dbl-64/e_atanh.c +@@ -45,6 +45,11 @@ + + static const double huge = 1e300; + ++#ifndef SECTION ++# define SECTION ++#endif ++ ++SECTION + double + __ieee754_atanh (double x) + { +@@ -74,4 +79,7 @@ __ieee754_atanh (double x) + + return copysign (t, x); + } ++ ++#ifndef __ieee754_atanh + libm_alias_finite (__ieee754_atanh, __atanh) ++#endif +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index 40a9654ecadca713..9ebc7f62f7479eed 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -1,6 +1,7 @@ + ifeq ($(subdir),math) + CFLAGS-e_asin-fma.c = -mfma -mavx2 + CFLAGS-e_atan2-fma.c = -mfma -mavx2 ++CFLAGS-e_atanh-fma.c = -mfma -mavx2 + CFLAGS-e_exp-fma.c = -mfma -mavx2 + CFLAGS-e_log-fma.c = -mfma -mavx2 + CFLAGS-e_log2-fma.c = -mfma -mavx2 +@@ -57,6 +58,7 @@ libm-sysdep_routines += \ + e_asin-fma \ + e_atan2-avx \ + e_atan2-fma \ ++ e_atanh-fma \ + e_exp-avx \ + e_exp-fma \ + e_exp2f-fma \ +diff --git a/sysdeps/x86_64/fpu/multiarch/e_atanh-fma.c b/sysdeps/x86_64/fpu/multiarch/e_atanh-fma.c +new file mode 100644 +index 0000000000000000..c3f2f9e5506ae363 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/e_atanh-fma.c +@@ -0,0 +1,6 @@ ++#define __ieee754_atanh __ieee754_atanh_fma ++#define __log1p __log1p_fma ++ ++#define SECTION __attribute__ ((section (".text.fma"))) ++ ++#include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_atanh.c b/sysdeps/x86_64/fpu/multiarch/e_atanh.c +new file mode 100644 +index 0000000000000000..d2b785dfc0268df8 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/e_atanh.c +@@ -0,0 +1,34 @@ ++/* Multiple versions of atanh. ++ Copyright (C) 2025 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#if MINIMUM_X86_ISA_LEVEL < AVX2_X86_ISA_LEVEL ++# include ++ ++extern double __redirect_ieee754_atanh (double); ++ ++# define SYMBOL_NAME ieee754_atanh ++# include "ifunc-fma.h" ++ ++libc_ifunc_redirected (__redirect_ieee754_atanh, __ieee754_atanh, IFUNC_SELECTOR ()); ++ ++libm_alias_finite (__ieee754_atanh, __atanh) ++ ++# define __ieee754_atanh __ieee754_atanh_sse2 ++#endif ++#include diff --git a/glibc-RHEL-1063-2.patch b/glibc-RHEL-1063-2.patch new file mode 100644 index 0000000..5f26cb5 --- /dev/null +++ b/glibc-RHEL-1063-2.patch @@ -0,0 +1,321 @@ +commit 703f4341083afa7d71987aa96a35eab81309e634 +Author: Noah Goldstein +Date: Wed Jun 22 16:51:19 2022 -0700 + + x86: Add defines / utilities for making ISA specific x86 builds + + 1. Factor out some of the ISA level defines in isa-level.c to + standalone header isa-level.h + + 2. Add new headers with ISA level dependent macros for handling + ifuncs. + + Note, this file does not change any code. + + Tested with and without multiarch on x86_64 for ISA levels: + {generic, x86-64-v2, x86-64-v3, x86-64-v4} + + And m32 with and without multiarch. + +diff --git a/sysdeps/x86/init-arch.h b/sysdeps/x86/init-arch.h +index 2e8141ffbaecca69..df1bce2aae11450b 100644 +--- a/sysdeps/x86/init-arch.h ++++ b/sysdeps/x86/init-arch.h +@@ -19,7 +19,9 @@ + #include + #include + +-#ifndef __x86_64__ ++#ifdef __x86_64__ ++# include ++#else + /* Due to the reordering and the other nifty extensions in i686, it is + not really good to use heavily i586 optimized code on an i686. It's + better to use i486 code if it isn't an i586. */ +diff --git a/sysdeps/x86/isa-ifunc-macros.h b/sysdeps/x86/isa-ifunc-macros.h +new file mode 100644 +index 0000000000000000..ba6826d518501396 +--- /dev/null ++++ b/sysdeps/x86/isa-ifunc-macros.h +@@ -0,0 +1,70 @@ ++/* Common ifunc selection utils ++ All versions must be listed in ifunc-impl-list.c. ++ Copyright (C) 2022 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#ifndef _ISA_IFUNC_MACROS_H ++#define _ISA_IFUNC_MACROS_H 1 ++ ++#include ++#include ++#include ++ ++/* Only include at the level of the minimum build ISA or higher. I.e ++ if built with ISA=V1, then include all implementations. On the ++ other hand if built with ISA=V3 only include V3/V4 ++ implementations. If there is no implementation at or above the ++ minimum build ISA level, then include the highest ISA level ++ implementation. */ ++#if MINIMUM_X86_ISA_LEVEL <= 4 ++# define X86_IFUNC_IMPL_ADD_V4(...) IFUNC_IMPL_ADD (__VA_ARGS__) ++#endif ++#if MINIMUM_X86_ISA_LEVEL <= 3 ++# define X86_IFUNC_IMPL_ADD_V3(...) IFUNC_IMPL_ADD (__VA_ARGS__) ++#endif ++#if MINIMUM_X86_ISA_LEVEL <= 2 ++# define X86_IFUNC_IMPL_ADD_V2(...) IFUNC_IMPL_ADD (__VA_ARGS__) ++#endif ++#if MINIMUM_X86_ISA_LEVEL <= 1 ++# define X86_IFUNC_IMPL_ADD_V1(...) IFUNC_IMPL_ADD (__VA_ARGS__) ++#endif ++ ++#ifndef X86_IFUNC_IMPL_ADD_V4 ++# define X86_IFUNC_IMPL_ADD_V4(...) ++#endif ++#ifndef X86_IFUNC_IMPL_ADD_V3 ++# define X86_IFUNC_IMPL_ADD_V3(...) ++#endif ++#ifndef X86_IFUNC_IMPL_ADD_V2 ++# define X86_IFUNC_IMPL_ADD_V2(...) ++#endif ++#ifndef X86_IFUNC_IMPL_ADD_V1 ++# define X86_IFUNC_IMPL_ADD_V1(...) ++#endif ++ ++#define X86_ISA_CPU_FEATURE_CONST_CHECK_ENABLED(name) \ ++ ((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) ++ ++#define X86_ISA_CPU_FEATURE_USABLE_P(ptr, name) \ ++ (X86_ISA_CPU_FEATURE_CONST_CHECK_ENABLED (name) \ ++ || CPU_FEATURE_USABLE_P (ptr, name)) ++ ++#define X86_ISA_CPU_FEATURES_ARCH_P(ptr, name) \ ++ (X86_ISA_CPU_FEATURE_CONST_CHECK_ENABLED (name) \ ++ || CPU_FEATURES_ARCH_P (ptr, name)) ++ ++#endif +diff --git a/sysdeps/x86/isa-level.c b/sysdeps/x86/isa-level.c +index 07815381122c94c3..9bd52eadf8f2382b 100644 +--- a/sysdeps/x86/isa-level.c ++++ b/sysdeps/x86/isa-level.c +@@ -26,38 +26,31 @@ + . */ + + #include +- ++#include + /* ELF program property for x86 ISA level. */ + #ifdef INCLUDE_X86_ISA_LEVEL +-# if defined __SSE__ && defined __SSE2__ ++# if MINIMUM_X86_ISA_LEVEL >= 1 + /* NB: ISAs, excluding MMX, in x86-64 ISA level baseline are used. */ + # define ISA_BASELINE GNU_PROPERTY_X86_ISA_1_BASELINE + # else + # define ISA_BASELINE 0 + # endif + +-# if ISA_BASELINE && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 \ +- && defined HAVE_X86_LAHF_SAHF && defined __POPCNT__ \ +- && defined __SSE3__ && defined __SSSE3__ && defined __SSE4_1__ \ +- && defined __SSE4_2__ ++# if MINIMUM_X86_ISA_LEVEL >= 2 + /* NB: ISAs in x86-64 ISA level v2 are used. */ + # define ISA_V2 GNU_PROPERTY_X86_ISA_1_V2 + # else + # define ISA_V2 0 + # endif + +-# if ISA_V2 && defined __AVX__ && defined __AVX2__ && defined __F16C__ \ +- && defined __FMA__ && defined __LZCNT__ && defined HAVE_X86_MOVBE \ +- && defined __BMI__ && defined __BMI2__ ++# if MINIMUM_X86_ISA_LEVEL >= 3 + /* NB: ISAs in x86-64 ISA level v3 are used. */ + # define ISA_V3 GNU_PROPERTY_X86_ISA_1_V3 + # else + # define ISA_V3 0 + # endif + +-# if ISA_V3 && defined __AVX512F__ && defined __AVX512BW__ \ +- && defined __AVX512CD__ && defined __AVX512DQ__ \ +- && defined __AVX512VL__ ++# if MINIMUM_X86_ISA_LEVEL >= 4 + /* NB: ISAs in x86-64 ISA level v4 are used. */ + # define ISA_V4 GNU_PROPERTY_X86_ISA_1_V4 + # else +diff --git a/sysdeps/x86/isa-level.h b/sysdeps/x86/isa-level.h +new file mode 100644 +index 0000000000000000..7cae11c2289dd54d +--- /dev/null ++++ b/sysdeps/x86/isa-level.h +@@ -0,0 +1,102 @@ ++/* Header defining the minimum x86 ISA level ++ Copyright (C) 2022 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ In addition to the permissions in the GNU Lesser General Public ++ License, the Free Software Foundation gives you unlimited ++ permission to link the compiled version of this file with other ++ programs, and to distribute those programs without any restriction ++ coming from the use of this file. (The Lesser General Public ++ License restrictions do apply in other respects; for example, they ++ cover modification of the file, and distribution when not linked ++ into another program.) ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#ifndef _ISA_LEVEL_H ++#define _ISA_LEVEL_H ++ ++#if defined __SSE__ && defined __SSE2__ ++/* NB: ISAs, excluding MMX, in x86-64 ISA level baseline are used. */ ++# define __X86_ISA_V1 1 ++#else ++# define __X86_ISA_V1 0 ++#endif ++ ++#if __X86_ISA_V1 && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 \ ++ && defined HAVE_X86_LAHF_SAHF && defined __POPCNT__ && defined __SSE3__ \ ++ && defined __SSSE3__ && defined __SSE4_1__ && defined __SSE4_2__ ++/* NB: ISAs in x86-64 ISA level v2 are used. */ ++# define __X86_ISA_V2 1 ++#else ++# define __X86_ISA_V2 0 ++#endif ++ ++#if __X86_ISA_V2 && defined __AVX__ && defined __AVX2__ && defined __F16C__ \ ++ && defined __FMA__ && defined __LZCNT__ && defined HAVE_X86_MOVBE \ ++ && defined __BMI__ && defined __BMI2__ ++/* NB: ISAs in x86-64 ISA level v3 are used. */ ++# define __X86_ISA_V3 1 ++#else ++# define __X86_ISA_V3 0 ++#endif ++ ++#if __X86_ISA_V3 && defined __AVX512F__ && defined __AVX512BW__ \ ++ && defined __AVX512CD__ && defined __AVX512DQ__ && defined __AVX512VL__ ++/* NB: ISAs in x86-64 ISA level v4 are used. */ ++# define __X86_ISA_V4 1 ++#else ++# define __X86_ISA_V4 0 ++#endif ++ ++#define MINIMUM_X86_ISA_LEVEL \ ++ (__X86_ISA_V1 + __X86_ISA_V2 + __X86_ISA_V3 + __X86_ISA_V4) ++ ++ ++/* ++ * CPU Features that are hard coded as enabled depending on ISA build ++ * level. ++ * - Values > 0 features are always ENABLED if: ++ * Value >= MINIMUM_X86_ISA_LEVEL ++ */ ++ ++ ++/* ISA level >= 4 guaranteed includes. */ ++#define AVX512VL_X86_ISA_LEVEL 4 ++#define AVX512BW_X86_ISA_LEVEL 4 ++ ++/* ISA level >= 3 guaranteed includes. */ ++#define AVX2_X86_ISA_LEVEL 3 ++#define BMI2_X86_ISA_LEVEL 3 ++ ++/* ++ * NB: This may not be fully assumable for ISA level >= 3. From ++ * looking over the architectures supported in cpu-features.h the ++ * following CPUs may have an issue with this being default set: ++ * - AMD Excavator ++ */ ++#define AVX_Fast_Unaligned_Load_X86_ISA_LEVEL 3 ++ ++/* ++ * KNL (the only cpu that sets this supported in cpu-features.h) ++ * builds with ISA V1 so this shouldn't harm any architectures. ++ */ ++#define Prefer_No_VZEROUPPER_X86_ISA_LEVEL 3 ++ ++#define ISA_SHOULD_BUILD(isa_build_level) \ ++ (MINIMUM_X86_ISA_LEVEL <= (isa_build_level) && IS_IN (libc)) \ ++ || defined ISA_DEFAULT_IMPL ++ ++#endif +diff --git a/sysdeps/x86_64/isa-default-impl.h b/sysdeps/x86_64/isa-default-impl.h +new file mode 100644 +index 0000000000000000..34634668e56669c9 +--- /dev/null ++++ b/sysdeps/x86_64/isa-default-impl.h +@@ -0,0 +1,49 @@ ++/* Utility for including proper default function based on ISA level ++ Copyright (C) 2022 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++ ++#ifndef DEFAULT_IMPL_V1 ++# error "Must have at least ISA V1 Version" ++#endif ++ ++#ifndef DEFAULT_IMPL_V2 ++# define DEFAULT_IMPL_V2 DEFAULT_IMPL_V1 ++#endif ++ ++#ifndef DEFAULT_IMPL_V3 ++# define DEFAULT_IMPL_V3 DEFAULT_IMPL_V2 ++#endif ++ ++#ifndef DEFAULT_IMPL_V4 ++# define DEFAULT_IMPL_V4 DEFAULT_IMPL_V3 ++#endif ++ ++#if MINIMUM_X86_ISA_LEVEL == 1 ++# define ISA_DEFAULT_IMPL DEFAULT_IMPL_V1 ++#elif MINIMUM_X86_ISA_LEVEL == 2 ++# define ISA_DEFAULT_IMPL DEFAULT_IMPL_V2 ++#elif MINIMUM_X86_ISA_LEVEL == 3 ++# define ISA_DEFAULT_IMPL DEFAULT_IMPL_V3 ++#elif MINIMUM_X86_ISA_LEVEL == 4 ++# define ISA_DEFAULT_IMPL DEFAULT_IMPL_V4 ++#else ++# error "Unsupported ISA Level!" ++#endif ++ ++#include ISA_DEFAULT_IMPL diff --git a/glibc-RHEL-1063-3.patch b/glibc-RHEL-1063-3.patch new file mode 100644 index 0000000..b5fcd46 --- /dev/null +++ b/glibc-RHEL-1063-3.patch @@ -0,0 +1,109 @@ +Partial backport of: + +commit 4fc321dc58b29217e322526b49549930d0807179 +Author: Noah Goldstein +Date: Fri Jun 24 16:15:42 2022 -0700 + + x86: Fix backwards Prefer_No_VZEROUPPER check in ifunc-evex.h + + Add third argument to X86_ISA_CPU_FEATURES_ARCH_P macro so the runtime + CPU_FEATURES_ARCH_P check can be inverted if the + MINIMUM_X86_ISA_LEVEL is not high enough to constantly evaluate + the check. + + Use this new macro to correct the backwards check in ifunc-evex.h + +Conflicts: + sysdeps/x86_64/multiarch/ifunc-evex.h + (skipped; EVEX variant selection not enabled downstream) + +diff --git a/sysdeps/x86/isa-ifunc-macros.h b/sysdeps/x86/isa-ifunc-macros.h +index ba6826d518501396..d69905689b0963ec 100644 +--- a/sysdeps/x86/isa-ifunc-macros.h ++++ b/sysdeps/x86/isa-ifunc-macros.h +@@ -56,15 +56,31 @@ + # define X86_IFUNC_IMPL_ADD_V1(...) + #endif + +-#define X86_ISA_CPU_FEATURE_CONST_CHECK_ENABLED(name) \ +- ((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) ++/* Both X86_ISA_CPU_FEATURE_USABLE_P and X86_ISA_CPU_FEATURES_ARCH_P ++ macros are wrappers for the the respective ++ CPU_FEATURE{S}_{USABLE|ARCH}_P runtime checks. They differ in two ++ ways. ++ ++ 1. The USABLE_P version is evaluated to true when the feature ++ is enabled. ++ ++ 2. The ARCH_P version has a third argument `not`. The `not` ++ argument can either be '!' or empty. If the feature is ++ enabled above an ISA level, the third argument should be empty ++ and the expression is evaluated to true when the feature is ++ enabled. If the feature is disabled above an ISA level, the ++ third argument should be `!` and the expression is evaluated ++ to true when the feature is disabled. ++ */ + + #define X86_ISA_CPU_FEATURE_USABLE_P(ptr, name) \ +- (X86_ISA_CPU_FEATURE_CONST_CHECK_ENABLED (name) \ ++ (((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) \ + || CPU_FEATURE_USABLE_P (ptr, name)) + +-#define X86_ISA_CPU_FEATURES_ARCH_P(ptr, name) \ +- (X86_ISA_CPU_FEATURE_CONST_CHECK_ENABLED (name) \ +- || CPU_FEATURES_ARCH_P (ptr, name)) ++ ++#define X86_ISA_CPU_FEATURES_ARCH_P(ptr, name, not) \ ++ (((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) \ ++ || not CPU_FEATURES_ARCH_P (ptr, name)) ++ + + #endif +diff --git a/sysdeps/x86/isa-level.h b/sysdeps/x86/isa-level.h +index 7cae11c2289dd54d..075e7c6ee17777db 100644 +--- a/sysdeps/x86/isa-level.h ++++ b/sysdeps/x86/isa-level.h +@@ -64,14 +64,8 @@ + #define MINIMUM_X86_ISA_LEVEL \ + (__X86_ISA_V1 + __X86_ISA_V2 + __X86_ISA_V3 + __X86_ISA_V4) + +- +-/* +- * CPU Features that are hard coded as enabled depending on ISA build +- * level. +- * - Values > 0 features are always ENABLED if: +- * Value >= MINIMUM_X86_ISA_LEVEL +- */ +- ++/* Depending on the minimum ISA level, a feature check result can be a ++ compile-time constant.. */ + + /* ISA level >= 4 guaranteed includes. */ + #define AVX512VL_X86_ISA_LEVEL 4 +@@ -81,18 +75,16 @@ + #define AVX2_X86_ISA_LEVEL 3 + #define BMI2_X86_ISA_LEVEL 3 + +-/* +- * NB: This may not be fully assumable for ISA level >= 3. From +- * looking over the architectures supported in cpu-features.h the +- * following CPUs may have an issue with this being default set: +- * - AMD Excavator +- */ ++/* NB: This feature is enabled when ISA level >= 3, which was disabled ++ for the following CPUs: ++ - AMD Excavator ++ when ISA level < 3. */ + #define AVX_Fast_Unaligned_Load_X86_ISA_LEVEL 3 + +-/* +- * KNL (the only cpu that sets this supported in cpu-features.h) +- * builds with ISA V1 so this shouldn't harm any architectures. +- */ ++/* NB: This feature is disabled when ISA level >= 3, which was enabled ++ for the following CPUs: ++ - Intel KNL ++ when ISA level < 3. */ + #define Prefer_No_VZEROUPPER_X86_ISA_LEVEL 3 + + #define ISA_SHOULD_BUILD(isa_build_level) \ diff --git a/glibc-RHEL-1063-4.patch b/glibc-RHEL-1063-4.patch new file mode 100644 index 0000000..ce4f14c --- /dev/null +++ b/glibc-RHEL-1063-4.patch @@ -0,0 +1,80 @@ +commit f56c497d2b640577f0a8a41f04d4f2c25a8800bd +Author: H.J. Lu +Date: Mon Jun 27 12:52:58 2022 -0700 + + x86: Move CPU_FEATURE{S}_{USABLE|ARCH}_P to isa-level.h + + Move X86_ISA_CPU_FEATURE_USABLE_P and X86_ISA_CPU_FEATURES_ARCH_P to + where MINIMUM_X86_ISA_LEVEL and XXX_X86_ISA_LEVEL are defined. + +diff --git a/sysdeps/x86/isa-ifunc-macros.h b/sysdeps/x86/isa-ifunc-macros.h +index d69905689b0963ec..f967a1bec6fd57d2 100644 +--- a/sysdeps/x86/isa-ifunc-macros.h ++++ b/sysdeps/x86/isa-ifunc-macros.h +@@ -56,31 +56,4 @@ + # define X86_IFUNC_IMPL_ADD_V1(...) + #endif + +-/* Both X86_ISA_CPU_FEATURE_USABLE_P and X86_ISA_CPU_FEATURES_ARCH_P +- macros are wrappers for the the respective +- CPU_FEATURE{S}_{USABLE|ARCH}_P runtime checks. They differ in two +- ways. +- +- 1. The USABLE_P version is evaluated to true when the feature +- is enabled. +- +- 2. The ARCH_P version has a third argument `not`. The `not` +- argument can either be '!' or empty. If the feature is +- enabled above an ISA level, the third argument should be empty +- and the expression is evaluated to true when the feature is +- enabled. If the feature is disabled above an ISA level, the +- third argument should be `!` and the expression is evaluated +- to true when the feature is disabled. +- */ +- +-#define X86_ISA_CPU_FEATURE_USABLE_P(ptr, name) \ +- (((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) \ +- || CPU_FEATURE_USABLE_P (ptr, name)) +- +- +-#define X86_ISA_CPU_FEATURES_ARCH_P(ptr, name, not) \ +- (((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) \ +- || not CPU_FEATURES_ARCH_P (ptr, name)) +- +- + #endif +diff --git a/sysdeps/x86/isa-level.h b/sysdeps/x86/isa-level.h +index 075e7c6ee17777db..c6156e7f7ac7ece5 100644 +--- a/sysdeps/x86/isa-level.h ++++ b/sysdeps/x86/isa-level.h +@@ -87,6 +87,30 @@ + when ISA level < 3. */ + #define Prefer_No_VZEROUPPER_X86_ISA_LEVEL 3 + ++/* Both X86_ISA_CPU_FEATURE_USABLE_P and X86_ISA_CPU_FEATURES_ARCH_P ++ macros are wrappers for the respective CPU_FEATURE{S}_{USABLE|ARCH}_P ++ runtime checks. They differ in two ways. ++ ++ 1. The USABLE_P version is evaluated to true when the feature ++ is enabled. ++ ++ 2. The ARCH_P version has a third argument `not`. The `not` ++ argument can either be `!` or empty. If the feature is ++ enabled above an ISA level, the third argument should be empty ++ and the expression is evaluated to true when the feature is ++ enabled. If the feature is disabled above an ISA level, the ++ third argument should be `!` and the expression is evaluated ++ to true when the feature is disabled. ++ */ ++ ++#define X86_ISA_CPU_FEATURE_USABLE_P(ptr, name) \ ++ (((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) \ ++ || CPU_FEATURE_USABLE_P (ptr, name)) ++ ++#define X86_ISA_CPU_FEATURES_ARCH_P(ptr, name, not) \ ++ (((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) \ ++ || not CPU_FEATURES_ARCH_P (ptr, name)) ++ + #define ISA_SHOULD_BUILD(isa_build_level) \ + (MINIMUM_X86_ISA_LEVEL <= (isa_build_level) && IS_IN (libc)) \ + || defined ISA_DEFAULT_IMPL diff --git a/glibc-RHEL-1063-5.patch b/glibc-RHEL-1063-5.patch new file mode 100644 index 0000000..45dd3e3 --- /dev/null +++ b/glibc-RHEL-1063-5.patch @@ -0,0 +1,153 @@ +commit cfdc4df66ce1464611e1b508f7a5a8f38afd5337 +Author: H.J. Lu +Date: Mon Jun 27 11:36:28 2022 -0700 + + x86-64: Only define used SSE/AVX/AVX512 run-time resolvers + + When glibc is built with x86-64 ISA level v3, SSE run-time resolvers + aren't used. For x86-64 ISA level v4 build, both SSE and AVX resolvers + are unused. Check the minimum x86-64 ISA level to exclude the unused + run-time resolvers. + +diff --git a/sysdeps/x86/isa-level.h b/sysdeps/x86/isa-level.h +index c6156e7f7ac7ece5..f293aea9068cc2a9 100644 +--- a/sysdeps/x86/isa-level.h ++++ b/sysdeps/x86/isa-level.h +@@ -68,10 +68,12 @@ + compile-time constant.. */ + + /* ISA level >= 4 guaranteed includes. */ ++#define AVX512F_X86_ISA_LEVEL 4 + #define AVX512VL_X86_ISA_LEVEL 4 + #define AVX512BW_X86_ISA_LEVEL 4 + + /* ISA level >= 3 guaranteed includes. */ ++#define AVX_X86_ISA_LEVEL 3 + #define AVX2_X86_ISA_LEVEL 3 + #define BMI2_X86_ISA_LEVEL 3 + +diff --git a/sysdeps/x86_64/dl-machine.h b/sysdeps/x86_64/dl-machine.h +index 742682517179fab5..5da493ea4097886d 100644 +--- a/sysdeps/x86_64/dl-machine.h ++++ b/sysdeps/x86_64/dl-machine.h +@@ -29,6 +29,7 @@ + #include + #include + #include ++#include + + /* Return nonzero iff ELF header is compatible with the running host. */ + static inline int __attribute__ ((unused)) +@@ -94,6 +95,8 @@ elf_machine_runtime_setup (struct link_map *l, struct r_scope_elem *scope[], + /* Identify this shared object. */ + *(ElfW(Addr) *) (got + 1) = (ElfW(Addr)) l; + ++ const struct cpu_features* cpu_features = __get_cpu_features (); ++ + /* The got[2] entry contains the address of a function which gets + called to get the address of a so far unresolved function and + jump to it. The profiling extension of the dynamic linker allows +@@ -102,9 +105,9 @@ elf_machine_runtime_setup (struct link_map *l, struct r_scope_elem *scope[], + end in this function. */ + if (__glibc_unlikely (profile)) + { +- if (CPU_FEATURE_USABLE (AVX512F)) ++ if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512F)) + *(ElfW(Addr) *) (got + 2) = (ElfW(Addr)) &_dl_runtime_profile_avx512; +- else if (CPU_FEATURE_USABLE (AVX)) ++ else if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX)) + *(ElfW(Addr) *) (got + 2) = (ElfW(Addr)) &_dl_runtime_profile_avx; + else + *(ElfW(Addr) *) (got + 2) = (ElfW(Addr)) &_dl_runtime_profile_sse; +@@ -120,9 +123,10 @@ elf_machine_runtime_setup (struct link_map *l, struct r_scope_elem *scope[], + /* This function will get called to fix up the GOT entry + indicated by the offset on the stack, and then jump to + the resolved address. */ +- if (GLRO(dl_x86_cpu_features).xsave_state_size != 0) ++ if (MINIMUM_X86_ISA_LEVEL >= AVX_X86_ISA_LEVEL ++ || GLRO(dl_x86_cpu_features).xsave_state_size != 0) + *(ElfW(Addr) *) (got + 2) +- = (CPU_FEATURE_USABLE (XSAVEC) ++ = (CPU_FEATURE_USABLE_P (cpu_features, XSAVEC) + ? (ElfW(Addr)) &_dl_runtime_resolve_xsavec + : (ElfW(Addr)) &_dl_runtime_resolve_xsave); + else +diff --git a/sysdeps/x86_64/dl-trampoline.S b/sysdeps/x86_64/dl-trampoline.S +index 90b2a6ce56d1d370..3cf517f84c87cf22 100644 +--- a/sysdeps/x86_64/dl-trampoline.S ++++ b/sysdeps/x86_64/dl-trampoline.S +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + + #ifndef DL_STACK_ALIGNMENT + /* Due to GCC bug: +@@ -71,35 +72,39 @@ + #undef VMOVA + #undef VEC_SIZE + +-#define VEC_SIZE 32 +-#define VMOVA vmovdqa +-#define VEC(i) ymm##i +-#define _dl_runtime_profile _dl_runtime_profile_avx +-#include "dl-trampoline.h" +-#undef _dl_runtime_profile +-#undef VEC +-#undef VMOVA +-#undef VEC_SIZE ++#if MINIMUM_X86_ISA_LEVEL <= AVX_X86_ISA_LEVEL ++# define VEC_SIZE 32 ++# define VMOVA vmovdqa ++# define VEC(i) ymm##i ++# define _dl_runtime_profile _dl_runtime_profile_avx ++# include "dl-trampoline.h" ++# undef _dl_runtime_profile ++# undef VEC ++# undef VMOVA ++# undef VEC_SIZE ++#endif + ++#if MINIMUM_X86_ISA_LEVEL < AVX_X86_ISA_LEVEL + /* movaps/movups is 1-byte shorter. */ +-#define VEC_SIZE 16 +-#define VMOVA movaps +-#define VEC(i) xmm##i +-#define _dl_runtime_profile _dl_runtime_profile_sse +-#undef RESTORE_AVX +-#include "dl-trampoline.h" +-#undef _dl_runtime_profile +-#undef VEC +-#undef VMOVA +-#undef VEC_SIZE +- +-#define USE_FXSAVE +-#define STATE_SAVE_ALIGNMENT 16 +-#define _dl_runtime_resolve _dl_runtime_resolve_fxsave +-#include "dl-trampoline.h" +-#undef _dl_runtime_resolve +-#undef USE_FXSAVE +-#undef STATE_SAVE_ALIGNMENT ++# define VEC_SIZE 16 ++# define VMOVA movaps ++# define VEC(i) xmm##i ++# define _dl_runtime_profile _dl_runtime_profile_sse ++# undef RESTORE_AVX ++# include "dl-trampoline.h" ++# undef _dl_runtime_profile ++# undef VEC ++# undef VMOVA ++# undef VEC_SIZE ++ ++# define USE_FXSAVE ++# define STATE_SAVE_ALIGNMENT 16 ++# define _dl_runtime_resolve _dl_runtime_resolve_fxsave ++# include "dl-trampoline.h" ++# undef _dl_runtime_resolve ++# undef USE_FXSAVE ++# undef STATE_SAVE_ALIGNMENT ++#endif + + #define USE_XSAVE + #define STATE_SAVE_ALIGNMENT 64 diff --git a/glibc-RHEL-1063-6.patch b/glibc-RHEL-1063-6.patch new file mode 100644 index 0000000..5c1e019 --- /dev/null +++ b/glibc-RHEL-1063-6.patch @@ -0,0 +1,51 @@ +commit a3563f3f369878467dd74aeb360448119a7a4b41 +Author: Noah Goldstein +Date: Mon Jun 27 21:07:03 2022 -0700 + + x86: Add more feature definitions to isa-level.h + + This commit doesn't change anything in itself. It is just to add + definitions that will be needed by future patches. + +diff --git a/sysdeps/x86/isa-level.h b/sysdeps/x86/isa-level.h +index f293aea9068cc2a9..77f9e2c0c3ccd41d 100644 +--- a/sysdeps/x86/isa-level.h ++++ b/sysdeps/x86/isa-level.h +@@ -67,15 +67,27 @@ + /* Depending on the minimum ISA level, a feature check result can be a + compile-time constant.. */ + ++ ++/* For CPU_FEATURE_USABLE_P. */ ++ + /* ISA level >= 4 guaranteed includes. */ + #define AVX512F_X86_ISA_LEVEL 4 + #define AVX512VL_X86_ISA_LEVEL 4 + #define AVX512BW_X86_ISA_LEVEL 4 ++#define AVX512DQ_X86_ISA_LEVEL 4 + + /* ISA level >= 3 guaranteed includes. */ + #define AVX_X86_ISA_LEVEL 3 + #define AVX2_X86_ISA_LEVEL 3 + #define BMI2_X86_ISA_LEVEL 3 ++#define MOVBE_X86_ISA_LEVEL 3 ++ ++/* ISA level >= 2 guaranteed includes. */ ++#define SSE4_2_X86_ISA_LEVEL 2 ++#define SSSE3_X86_ISA_LEVEL 2 ++ ++ ++/* For X86_ISA_CPU_FEATURES_ARCH_P. */ + + /* NB: This feature is enabled when ISA level >= 3, which was disabled + for the following CPUs: +@@ -89,6 +101,9 @@ + when ISA level < 3. */ + #define Prefer_No_VZEROUPPER_X86_ISA_LEVEL 3 + ++/* Feature(s) enabled when ISA level >= 2. */ ++#define Fast_Unaligned_Load_X86_ISA_LEVEL 2 ++ + /* Both X86_ISA_CPU_FEATURE_USABLE_P and X86_ISA_CPU_FEATURES_ARCH_P + macros are wrappers for the respective CPU_FEATURE{S}_{USABLE|ARCH}_P + runtime checks. They differ in two ways. diff --git a/glibc-RHEL-1063-7.patch b/glibc-RHEL-1063-7.patch new file mode 100644 index 0000000..8129ef4 --- /dev/null +++ b/glibc-RHEL-1063-7.patch @@ -0,0 +1,100 @@ +Backport the sysdeps/x86/isa-level.h changes from: + +commit ceabdcd130ca7043b0fcf2676183d79431d10493 +Author: Noah Goldstein +Date: Wed Jul 13 16:32:59 2022 -0700 + + x86: Add support to build strcmp/strlen/strchr with explicit ISA level + + 1. Add default ISA level selection in non-multiarch/rtld + implementations. + + 2. Add ISA level build guards to different implementations. + - I.e strcmp-avx2.S which is ISA level 3 will only build if + compiled ISA level <= 3. Otherwise there is no reason to + include it as we will always use one of the ISA level 4 + implementations (strcmp-evex.S). + + 3. Refactor the ifunc selector and ifunc implementation list to use + the ISA level aware wrapper macros that allow functions below the + compiled ISA level (with a guranteed replacement) to be skipped. + + Tested with and without multiarch on x86_64 for ISA levels: + {generic, x86-64-v2, x86-64-v3, x86-64-v4} + + And m32 with and without multiarch. + +Conflicts: + support/xpthread_cond_signal.c + sysdeps/x86_64/memrchr.S + sysdeps/x86_64/multiarch/Makefile + sysdeps/x86_64/multiarch/ifunc-avx2.h + sysdeps/x86_64/multiarch/ifunc-impl-list.c + sysdeps/x86_64/multiarch/ifunc-strcasecmp.h + sysdeps/x86_64/multiarch/ifunc-wcslen.h + sysdeps/x86_64/multiarch/memrchr-sse2.S + sysdeps/x86_64/multiarch/strcasecmp_l-sse2.S + sysdeps/x86_64/multiarch/strchr-sse2.S + sysdeps/x86_64/multiarch/strchrnul-sse2.S + sysdeps/x86_64/multiarch/strcmp-avx2.S + sysdeps/x86_64/multiarch/strcmp-evex.S + sysdeps/x86_64/multiarch/strcmp-sse2.S + sysdeps/x86_64/multiarch/strcmp-sse4_2.S + sysdeps/x86_64/multiarch/strcmp.c + sysdeps/x86_64/multiarch/strlen-sse2.S + sysdeps/x86_64/multiarch/strncmp.c + sysdeps/x86_64/multiarch/strnlen-sse2.S + sysdeps/x86_64/multiarch/strrchr-sse2.S + sysdeps/x86_64/multiarch/wcschr-sse2.S + sysdeps/x86_64/multiarch/wcscmp-sse2.S + sysdeps/x86_64/multiarch/wcslen-sse2.S + sysdeps/x86_64/multiarch/wcslen-sse4_1.S + sysdeps/x86_64/multiarch/wcsncmp-sse2.c + sysdeps/x86_64/multiarch/wcsnlen-sse4_1.S + sysdeps/x86_64/multiarch/wcsrchr-sse2.S + sysdeps/x86_64/strcasecmp_l.S + sysdeps/x86_64/strchr.S + sysdeps/x86_64/strchrnul.S + sysdeps/x86_64/strcmp.S + sysdeps/x86_64/strlen.S + sysdeps/x86_64/strncase_l.S + sysdeps/x86_64/strncmp.S + sysdeps/x86_64/strnlen.S + sysdeps/x86_64/strrchr.S + sysdeps/x86_64/wcschr.S + sysdeps/x86_64/wcscmp.S + sysdeps/x86_64/wcslen.S + sysdeps/x86_64/wcsrchr.S + (no backport of string function changes) + +diff --git a/sysdeps/x86/isa-level.h b/sysdeps/x86/isa-level.h +index 77f9e2c0c3ccd41d..3c4480aba70193a2 100644 +--- a/sysdeps/x86/isa-level.h ++++ b/sysdeps/x86/isa-level.h +@@ -84,6 +84,7 @@ + + /* ISA level >= 2 guaranteed includes. */ + #define SSE4_2_X86_ISA_LEVEL 2 ++#define SSE4_1_X86_ISA_LEVEL 2 + #define SSSE3_X86_ISA_LEVEL 2 + + +@@ -101,9 +102,18 @@ + when ISA level < 3. */ + #define Prefer_No_VZEROUPPER_X86_ISA_LEVEL 3 + ++/* NB: This feature is disable when ISA level >= 3. All CPUs with ++ this feature don't run on glibc built with ISA level >= 3. */ ++#define Slow_SSE42_X86_ISA_LEVEL 3 ++ + /* Feature(s) enabled when ISA level >= 2. */ + #define Fast_Unaligned_Load_X86_ISA_LEVEL 2 + ++/* NB: This feature is disable when ISA level >= 2, which was enabled ++ for the early Atom CPUs. */ ++#define Slow_BSF_X86_ISA_LEVEL 2 ++ ++ + /* Both X86_ISA_CPU_FEATURE_USABLE_P and X86_ISA_CPU_FEATURES_ARCH_P + macros are wrappers for the respective CPU_FEATURE{S}_{USABLE|ARCH}_P + runtime checks. They differ in two ways. diff --git a/glibc-RHEL-1063-8.patch b/glibc-RHEL-1063-8.patch new file mode 100644 index 0000000..f222d26 --- /dev/null +++ b/glibc-RHEL-1063-8.patch @@ -0,0 +1,137 @@ +commit 881546979d0219c18337e1b4f4d00cfacab13c40 +Author: H.J. Lu +Date: Wed Aug 9 11:08:52 2023 -0700 + + x86_64: Sort fpu/multiarch/Makefile + + Sort Makefile variables using scripts/sort-makefile-lines.py. + + No code generation changes observed in libm. No regressions on x86_64. + +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index 4d00a27988073c40..3c49c7b27778d9e8 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -1,17 +1,45 @@ + ifeq ($(subdir),math) +-libm-sysdep_routines += s_floor-c s_ceil-c s_floorf-c s_ceilf-c \ +- s_rint-c s_rintf-c s_nearbyint-c s_nearbyintf-c \ +- s_roundeven-c s_roundevenf-c s_trunc-c s_truncf-c ++libm-sysdep_routines += \ ++ s_ceil-c \ ++ s_ceilf-c \ ++ s_floor-c \ ++ s_floorf-c \ ++ s_rint-c \ ++ s_rintf-c \ ++ s_nearbyint-c \ ++ s_nearbyintf-c \ ++ s_roundeven-c \ ++ s_roundevenf-c \ ++ s_trunc-c \ ++ s_truncf-c \ ++# libm-sysdep_routines + +-libm-sysdep_routines += s_ceil-sse4_1 s_ceilf-sse4_1 s_floor-sse4_1 \ +- s_floorf-sse4_1 s_nearbyint-sse4_1 \ +- s_nearbyintf-sse4_1 s_roundeven-sse4_1 \ +- s_roundevenf-sse4_1 s_rint-sse4_1 s_rintf-sse4_1 \ +- s_trunc-sse4_1 s_truncf-sse4_1 ++libm-sysdep_routines += \ ++ s_ceil-sse4_1 \ ++ s_ceilf-sse4_1 \ ++ s_floor-sse4_1 \ ++ s_floorf-sse4_1 \ ++ s_nearbyint-sse4_1 \ ++ s_nearbyintf-sse4_1 \ ++ s_roundeven-sse4_1 \ ++ s_roundevenf-sse4_1 \ ++ s_rint-sse4_1 \ ++ s_rintf-sse4_1 \ ++ s_trunc-sse4_1 \ ++ s_truncf-sse4_1 \ ++# libm-sysdep_routines + +-libm-sysdep_routines += e_exp-fma e_log-fma e_pow-fma s_atan-fma \ +- e_asin-fma e_atan2-fma s_sin-fma s_tan-fma \ +- s_sincos-fma ++libm-sysdep_routines += \ ++ e_asin-fma \ ++ e_atan2-fma \ ++ e_exp-fma \ ++ e_log-fma \ ++ e_pow-fma \ ++ s_atan-fma \ ++ s_sin-fma \ ++ s_sincos-fma \ ++ s_tan-fma \ ++# libm-sysdep_routines + + CFLAGS-e_asin-fma.c = -mfma -mavx2 + CFLAGS-e_atan2-fma.c = -mfma -mavx2 +@@ -23,10 +51,22 @@ CFLAGS-s_sin-fma.c = -mfma -mavx2 + CFLAGS-s_tan-fma.c = -mfma -mavx2 + CFLAGS-s_sincos-fma.c = -mfma -mavx2 + +-libm-sysdep_routines += s_sinf-sse2 s_cosf-sse2 s_sincosf-sse2 ++libm-sysdep_routines += \ ++ s_cosf-sse2 \ ++ s_sincosf-sse2 \ ++ s_sinf-sse2 \ ++# libm-sysdep_routines + +-libm-sysdep_routines += e_exp2f-fma e_expf-fma e_log2f-fma e_logf-fma \ +- e_powf-fma s_sinf-fma s_cosf-fma s_sincosf-fma ++libm-sysdep_routines += \ ++ e_exp2f-fma \ ++ e_expf-fma \ ++ e_log2f-fma \ ++ e_logf-fma \ ++ e_powf-fma \ ++ s_cosf-fma \ ++ s_sincosf-fma \ ++ s_sinf-fma \ ++# libm-sysdep_routines + + CFLAGS-e_exp2f-fma.c = -mfma -mavx2 + CFLAGS-e_expf-fma.c = -mfma -mavx2 +@@ -37,9 +77,17 @@ CFLAGS-s_sinf-fma.c = -mfma -mavx2 + CFLAGS-s_cosf-fma.c = -mfma -mavx2 + CFLAGS-s_sincosf-fma.c = -mfma -mavx2 + +-libm-sysdep_routines += e_exp-fma4 e_log-fma4 e_pow-fma4 s_atan-fma4 \ +- e_asin-fma4 e_atan2-fma4 s_sin-fma4 s_tan-fma4 \ +- s_sincos-fma4 ++libm-sysdep_routines += \ ++ e_exp-fma4 \ ++ e_log-fma4 \ ++ e_pow-fma4 \ ++ e_asin-fma4 \ ++ s_atan-fma4 \ ++ e_atan2-fma4 \ ++ s_sin-fma4 \ ++ s_sincos-fma4 \ ++ s_tan-fma4 \ ++# libm-sysdep_routines + + CFLAGS-e_asin-fma4.c = -mfma4 + CFLAGS-e_atan2-fma4.c = -mfma4 +@@ -51,9 +99,15 @@ CFLAGS-s_sin-fma4.c = -mfma4 + CFLAGS-s_tan-fma4.c = -mfma4 + CFLAGS-s_sincos-fma4.c = -mfma4 + +-libm-sysdep_routines += e_exp-avx e_log-avx s_atan-avx \ +- e_atan2-avx s_sin-avx s_tan-avx \ +- s_sincos-avx ++libm-sysdep_routines += \ ++ e_exp-avx \ ++ e_log-avx \ ++ s_atan-avx \ ++ e_atan2-avx \ ++ s_sin-avx \ ++ s_sincos-avx \ ++ s_tan-avx \ ++# libm-sysdep_routines + + CFLAGS-e_atan2-avx.c = -msse2avx -DSSE2AVX + CFLAGS-e_exp-avx.c = -msse2avx -DSSE2AVX diff --git a/glibc-RHEL-1063-9.patch b/glibc-RHEL-1063-9.patch new file mode 100644 index 0000000..fb14931 --- /dev/null +++ b/glibc-RHEL-1063-9.patch @@ -0,0 +1,91 @@ +commit f6b10ed8e9a00de49d0951e760cc2b5288862b47 +Author: H.J. Lu +Date: Thu Aug 10 11:24:30 2023 -0700 + + x86_64: Add log2 with FMA + + On Skylake, it improves log2 bench performance by: + + Before After Improvement + max 208.779 63.827 69% + min 9.977 6.55 34% + mean 10.366 6.8191 34% + +diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile +index 3c49c7b27778d9e8..56ef0482a2a8f498 100644 +--- a/sysdeps/x86_64/fpu/multiarch/Makefile ++++ b/sysdeps/x86_64/fpu/multiarch/Makefile +@@ -34,6 +34,7 @@ libm-sysdep_routines += \ + e_atan2-fma \ + e_exp-fma \ + e_log-fma \ ++ e_log2-fma \ + e_pow-fma \ + s_atan-fma \ + s_sin-fma \ +@@ -45,6 +46,7 @@ CFLAGS-e_asin-fma.c = -mfma -mavx2 + CFLAGS-e_atan2-fma.c = -mfma -mavx2 + CFLAGS-e_exp-fma.c = -mfma -mavx2 + CFLAGS-e_log-fma.c = -mfma -mavx2 ++CFLAGS-e_log2-fma.c = -mfma -mavx2 + CFLAGS-e_pow-fma.c = -mfma -mavx2 + CFLAGS-s_atan-fma.c = -mfma -mavx2 + CFLAGS-s_sin-fma.c = -mfma -mavx2 +diff --git a/sysdeps/x86_64/fpu/multiarch/e_log2-fma.c b/sysdeps/x86_64/fpu/multiarch/e_log2-fma.c +new file mode 100644 +index 0000000000000000..9fbebc1b4725c41d +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/e_log2-fma.c +@@ -0,0 +1,3 @@ ++#define __log2 __log2_fma ++ ++#include +diff --git a/sysdeps/x86_64/fpu/multiarch/e_log2.c b/sysdeps/x86_64/fpu/multiarch/e_log2.c +new file mode 100644 +index 0000000000000000..c0320caf368b1bf0 +--- /dev/null ++++ b/sysdeps/x86_64/fpu/multiarch/e_log2.c +@@ -0,0 +1,43 @@ ++/* Multiple versions of log2. ++ Copyright (C) 2023 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ . */ ++ ++#include ++#include ++ ++extern double __redirect_log2 (double); ++ ++#define SYMBOL_NAME log2 ++#include "ifunc-fma.h" ++ ++libc_ifunc_redirected (__redirect_log2, __log2, IFUNC_SELECTOR ()); ++ ++#ifdef SHARED ++__hidden_ver1 (__log2, __GI___log2, __redirect_log2) ++ __attribute__ ((visibility ("hidden"))); ++ ++versioned_symbol (libm, __ieee754_log2, log2, GLIBC_2_29); ++libm_alias_double_other (__log2, log2) ++#else ++libm_alias_double (__log2, log2) ++#endif ++ ++strong_alias (__log2, __ieee754_log2) ++libm_alias_finite (__log2, __log2) ++ ++#define __log2 __log2_sse2 ++#include