67 lines
3.4 KiB
Diff
67 lines
3.4 KiB
Diff
|
commit 89c017de2f52d17862bda9a6f8382e913457bfbe
|
||
|
|
Author: H.J. Lu <hjl.tools@gmail.com>
|
||
|
|
Date: Tue Jan 3 13:06:48 2023 -0800
|
||
|
|
|
||
|
|
x86: Check minimum/maximum of non_temporal_threshold [BZ #29953]
|
||
|
|
|
||
|
|
The minimum non_temporal_threshold is 0x4040. non_temporal_threshold may
|
||
|
|
be set to less than the minimum value when the shared cache size isn't
|
||
|
|
available (e.g., in an emulator) or by the tunable. Add checks for
|
||
|
|
minimum and maximum of non_temporal_threshold.
|
||
|
|
|
||
|
|
This fixes BZ #29953.
|
||
|
|
|
||
|
|
(cherry picked from commit 48b74865c63840b288bd85b4d8743533b73b339b)
|
||
|
|
|
||
|
|
diff --git a/sysdeps/x86/dl-cacheinfo.h b/sysdeps/x86/dl-cacheinfo.h
|
||
|
|
index a7d2cc5fef03884b..f2d2de458db7358c 100644
|
||
|
|
--- a/sysdeps/x86/dl-cacheinfo.h
|
||
|
|
+++ b/sysdeps/x86/dl-cacheinfo.h
|
||
|
|
@@ -747,6 +747,18 @@ dl_init_cacheinfo (struct cpu_features *cpu_features)
|
||
|
|
share of the cache, it has a substantial risk of negatively
|
||
|
|
impacting the performance of other threads running on the chip. */
|
||
|
|
unsigned long int non_temporal_threshold = shared * 3 / 4;
|
||
|
|
+ /* SIZE_MAX >> 4 because memmove-vec-unaligned-erms right-shifts the value of
|
||
|
|
+ 'x86_non_temporal_threshold' by `LOG_4X_MEMCPY_THRESH` (4) and it is best
|
||
|
|
+ if that operation cannot overflow. Minimum of 0x4040 (16448) because the
|
||
|
|
+ L(large_memset_4x) loops need 64-byte to cache align and enough space for
|
||
|
|
+ at least 1 iteration of 4x PAGE_SIZE unrolled loop. Both values are
|
||
|
|
+ reflected in the manual. */
|
||
|
|
+ unsigned long int maximum_non_temporal_threshold = SIZE_MAX >> 4;
|
||
|
|
+ unsigned long int minimum_non_temporal_threshold = 0x4040;
|
||
|
|
+ if (non_temporal_threshold < minimum_non_temporal_threshold)
|
||
|
|
+ non_temporal_threshold = minimum_non_temporal_threshold;
|
||
|
|
+ else if (non_temporal_threshold > maximum_non_temporal_threshold)
|
||
|
|
+ non_temporal_threshold = maximum_non_temporal_threshold;
|
||
|
|
|
||
|
|
#if HAVE_TUNABLES
|
||
|
|
/* NB: The REP MOVSB threshold must be greater than VEC_SIZE * 8. */
|
||
|
|
@@ -801,8 +813,8 @@ dl_init_cacheinfo (struct cpu_features *cpu_features)
|
||
|
|
shared = tunable_size;
|
||
|
|
|
||
|
|
tunable_size = TUNABLE_GET (x86_non_temporal_threshold, long int, NULL);
|
||
|
|
- /* NB: Ignore the default value 0. */
|
||
|
|
- if (tunable_size != 0)
|
||
|
|
+ if (tunable_size > minimum_non_temporal_threshold
|
||
|
|
+ && tunable_size <= maximum_non_temporal_threshold)
|
||
|
|
non_temporal_threshold = tunable_size;
|
||
|
|
|
||
|
|
tunable_size = TUNABLE_GET (x86_rep_movsb_threshold, long int, NULL);
|
||
|
|
@@ -817,14 +829,9 @@ dl_init_cacheinfo (struct cpu_features *cpu_features)
|
||
|
|
|
||
|
|
TUNABLE_SET_WITH_BOUNDS (x86_data_cache_size, data, 0, SIZE_MAX);
|
||
|
|
TUNABLE_SET_WITH_BOUNDS (x86_shared_cache_size, shared, 0, SIZE_MAX);
|
||
|
|
- /* SIZE_MAX >> 4 because memmove-vec-unaligned-erms right-shifts the value of
|
||
|
|
- 'x86_non_temporal_threshold' by `LOG_4X_MEMCPY_THRESH` (4) and it is best
|
||
|
|
- if that operation cannot overflow. Minimum of 0x4040 (16448) because the
|
||
|
|
- L(large_memset_4x) loops need 64-byte to cache align and enough space for
|
||
|
|
- at least 1 iteration of 4x PAGE_SIZE unrolled loop. Both values are
|
||
|
|
- reflected in the manual. */
|
||
|
|
TUNABLE_SET_WITH_BOUNDS (x86_non_temporal_threshold, non_temporal_threshold,
|
||
|
|
- 0x4040, SIZE_MAX >> 4);
|
||
|
|
+ minimum_non_temporal_threshold,
|
||
|
|
+ maximum_non_temporal_threshold);
|
||
|
|
TUNABLE_SET_WITH_BOUNDS (x86_rep_movsb_threshold, rep_movsb_threshold,
|
||
|
|
minimum_rep_movsb_threshold, SIZE_MAX);
|
||
|
|
TUNABLE_SET_WITH_BOUNDS (x86_rep_stosb_threshold, rep_stosb_threshold, 1,
|