159 lines
6.4 KiB
Diff
159 lines
6.4 KiB
Diff
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From ea8e465a6b8d0f26c72bcbe453a854de3abf68ec Mon Sep 17 00:00:00 2001
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From: "H.J. Lu" <hjl.tools@gmail.com>
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Date: Wed, 30 Jun 2021 10:47:06 -0700
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Subject: [PATCH] x86: Check RTM_ALWAYS_ABORT for RTM [BZ #28033]
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Content-type: text/plain; charset=UTF-8
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From
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https://www.intel.com/content/www/us/en/support/articles/000059422/processors.html
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* Intel TSX will be disabled by default.
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* The processor will force abort all Restricted Transactional Memory (RTM)
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transactions by default.
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* A new CPUID bit CPUID.07H.0H.EDX[11](RTM_ALWAYS_ABORT) will be enumerated,
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which is set to indicate to updated software that the loaded microcode is
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forcing RTM abort.
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* On processors that enumerate support for RTM, the CPUID enumeration bits
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for Intel TSX (CPUID.07H.0H.EBX[11] and CPUID.07H.0H.EBX[4]) continue to
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be set by default after microcode update.
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* Workloads that were benefited from Intel TSX might experience a change
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in performance.
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* System software may use a new bit in Model-Specific Register (MSR) 0x10F
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TSX_FORCE_ABORT[TSX_CPUID_CLEAR] functionality to clear the Hardware Lock
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Elision (HLE) and RTM bits to indicate to software that Intel TSX is
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disabled.
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1. Add RTM_ALWAYS_ABORT to CPUID features.
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2. Set RTM usable only if RTM_ALWAYS_ABORT isn't set. This skips the
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string/tst-memchr-rtm etc. testcases on the affected processors, which
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always fail after a microcde update.
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3. Check RTM feature, instead of usability, against /proc/cpuinfo.
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This fixes BZ #28033.
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---
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manual/platform.texi | 3 +++
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sysdeps/x86/cpu-features.c | 5 ++++-
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sysdeps/x86/sys/platform/x86.h | 6 +++---
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sysdeps/x86/tst-cpu-features-supports.c | 2 +-
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sysdeps/x86/tst-get-cpu-features.c | 2 ++
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5 files changed, 13 insertions(+), 5 deletions(-)
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Conflicts:
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sysdeps/x86/bits/platform/x86.h
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(doesn't exist)
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sysdeps/x86/bits/platform/x86.h
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(account for lack of upstream renames)
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diff --git a/manual/platform.texi b/manual/platform.texi
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index 8fec2933..b7e8aef7 100644
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--- a/manual/platform.texi
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+++ b/manual/platform.texi
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@@ -510,6 +510,9 @@ capability.
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@item
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@code{RTM} -- RTM instruction extensions.
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+@item
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+@code{RTM_ALWAYS_ABORT} -- Transactions always abort, making RTM unusable.
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+
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@item
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@code{SDBG} -- IA32_DEBUG_INTERFACE MSR for silicon debug.
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diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
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index 3610ee5c..4889f062 100644
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--- a/sysdeps/x86/cpu-features.c
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+++ b/sysdeps/x86/cpu-features.c
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@@ -74,7 +74,6 @@ update_usable (struct cpu_features *cpu_features)
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CPU_FEATURE_SET_USABLE (cpu_features, HLE);
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CPU_FEATURE_SET_USABLE (cpu_features, BMI2);
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CPU_FEATURE_SET_USABLE (cpu_features, ERMS);
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- CPU_FEATURE_SET_USABLE (cpu_features, RTM);
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CPU_FEATURE_SET_USABLE (cpu_features, RDSEED);
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CPU_FEATURE_SET_USABLE (cpu_features, ADX);
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CPU_FEATURE_SET_USABLE (cpu_features, CLFLUSHOPT);
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@@ -90,6 +89,7 @@ update_usable (struct cpu_features *cpu_features)
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CPU_FEATURE_SET_USABLE (cpu_features, MOVDIRI);
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CPU_FEATURE_SET_USABLE (cpu_features, MOVDIR64B);
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CPU_FEATURE_SET_USABLE (cpu_features, FSRM);
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+ CPU_FEATURE_SET_USABLE (cpu_features, RTM_ALWAYS_ABORT);
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CPU_FEATURE_SET_USABLE (cpu_features, SERIALIZE);
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CPU_FEATURE_SET_USABLE (cpu_features, TSXLDTRK);
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CPU_FEATURE_SET_USABLE (cpu_features, LAHF64_SAHF64);
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@@ -779,6 +779,9 @@ no_cpuid:
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GLRO(dl_platform) = "i586";
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#endif
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+ if (!CPU_FEATURES_CPU_P (cpu_features, RTM_ALWAYS_ABORT))
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+ CPU_FEATURE_SET_USABLE (cpu_features, RTM);
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+
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#if CET_ENABLED
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# if HAVE_TUNABLES
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TUNABLE_GET (x86_ibt, tunable_val_t *,
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diff --git a/sysdeps/x86/sys/platform/x86.h b/sysdeps/x86/sys/platform/x86.h
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index e5cc7c68..7a434926 100644
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--- a/sysdeps/x86/sys/platform/x86.h
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+++ b/sysdeps/x86/sys/platform/x86.h
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@@ -247,7 +247,7 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)
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#define bit_cpu_AVX512_VP2INTERSECT (1u << 8)
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#define bit_cpu_INDEX_7_EDX_9 (1u << 9)
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#define bit_cpu_MD_CLEAR (1u << 10)
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-#define bit_cpu_INDEX_7_EDX_11 (1u << 11)
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+#define bit_cpu_RTM_ALWAYS_ABORT (1u << 11)
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#define bit_cpu_INDEX_7_EDX_12 (1u << 12)
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#define bit_cpu_INDEX_7_EDX_13 (1u << 13)
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#define bit_cpu_SERIALIZE (1u << 14)
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@@ -471,7 +471,7 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)
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#define index_cpu_AVX512_VP2INTERSECT COMMON_CPUID_INDEX_7
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#define index_cpu_INDEX_7_EDX_9 COMMON_CPUID_INDEX_7
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#define index_cpu_MD_CLEAR COMMON_CPUID_INDEX_7
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-#define index_cpu_INDEX_7_EDX_11 COMMON_CPUID_INDEX_7
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+#define index_cpu_RTM_ALWAYS_ABORT COMMON_CPUID_INDEX_7
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#define index_cpu_INDEX_7_EDX_12 COMMON_CPUID_INDEX_7
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#define index_cpu_INDEX_7_EDX_13 COMMON_CPUID_INDEX_7
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#define index_cpu_SERIALIZE COMMON_CPUID_INDEX_7
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@@ -695,7 +695,7 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)
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#define reg_AVX512_VP2INTERSECT edx
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#define reg_INDEX_7_EDX_9 edx
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#define reg_MD_CLEAR edx
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-#define reg_INDEX_7_EDX_11 edx
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+#define reg_RTM_ALWAYS_ABORT edx
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#define reg_INDEX_7_EDX_12 edx
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#define reg_INDEX_7_EDX_13 edx
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#define reg_SERIALIZE edx
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diff --git a/sysdeps/x86/tst-cpu-features-supports.c b/sysdeps/x86/tst-cpu-features-supports.c
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index 287cf01f..8100a319 100644
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--- a/sysdeps/x86/tst-cpu-features-supports.c
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+++ b/sysdeps/x86/tst-cpu-features-supports.c
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@@ -152,7 +152,7 @@ do_test (int argc, char **argv)
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fails += CHECK_SUPPORTS (rdpid, RDPID);
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fails += CHECK_SUPPORTS (rdrnd, RDRAND);
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fails += CHECK_SUPPORTS (rdseed, RDSEED);
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- fails += CHECK_SUPPORTS (rtm, RTM);
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+ fails += CHECK_CPU_SUPPORTS (rtm, RTM);
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fails += CHECK_SUPPORTS (serialize, SERIALIZE);
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fails += CHECK_SUPPORTS (sha, SHA);
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fails += CHECK_CPU_SUPPORTS (shstk, SHSTK);
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diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
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index 2763deb6..0717e5d8 100644
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--- a/sysdeps/x86/tst-get-cpu-features.c
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+++ b/sysdeps/x86/tst-get-cpu-features.c
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@@ -183,6 +183,7 @@ do_test (void)
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CHECK_CPU_FEATURE (UINTR);
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CHECK_CPU_FEATURE (AVX512_VP2INTERSECT);
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CHECK_CPU_FEATURE (MD_CLEAR);
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+ CHECK_CPU_FEATURE (RTM_ALWAYS_ABORT);
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CHECK_CPU_FEATURE (SERIALIZE);
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CHECK_CPU_FEATURE (HYBRID);
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CHECK_CPU_FEATURE (TSXLDTRK);
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@@ -344,6 +345,7 @@ do_test (void)
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CHECK_CPU_FEATURE_USABLE (FSRM);
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CHECK_CPU_FEATURE_USABLE (AVX512_VP2INTERSECT);
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CHECK_CPU_FEATURE_USABLE (MD_CLEAR);
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+ CHECK_CPU_FEATURE_USABLE (RTM_ALWAYS_ABORT);
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CHECK_CPU_FEATURE_USABLE (SERIALIZE);
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CHECK_CPU_FEATURE_USABLE (HYBRID);
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CHECK_CPU_FEATURE_USABLE (TSXLDTRK);
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--
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GitLab
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