ghc/fix-ARM-s-StgCRun-clobbered-register-list-for-both-A.patch
2012-04-14 01:46:47 +09:00

35 lines
1.4 KiB
Diff

From 957f778cb971d63cbbea0c71c727c94474b1b905 Mon Sep 17 00:00:00 2001
From: Karel Gardas <karel.gardas@centrum.cz>
Date: Tue, 14 Feb 2012 08:01:47 +0100
Subject: [PATCH 1/2] fix ARM's StgCRun clobbered register list for both ARM and Thumb modes
---
rts/StgCRun.c | 16 +++++++++++++++-
1 files changed, 15 insertions(+), 1 deletions(-)
--- a/rts/StgCRun.c
+++ b/rts/StgCRun.c
@@ -672,7 +672,21 @@
"ldmfd sp!, {r4-r11, fp, ip, lr}\n\t"
: "=r" (r)
: "r" (f), "r" (basereg), "i" (RESERVED_C_STACK_BYTES)
- : "%r4", "%r5", "%r6", "%r8", "%r9", "%r10", "%r11", "%fp", "%ip", "%lr"
+#if !defined(__thumb__)
+ /* In ARM mode, r11/fp is frame-pointer and so we cannot mark
+ it as clobbered. If we do so, GCC complains with error. */
+ : "%r4", "%r5", "%r6", "%r7", "%r8", "%r9", "%r10", "%ip", "%lr"
+#else
+ /* In Thumb mode r7 is frame-pointer and so we cannot mark it
+ as clobbered. On the other hand we mark as clobbered also
+ those regs not used in Thumb mode. Hard to judge if this is
+ needed, but certainly Haskell code is using them for
+ placing GHC's virtual registers there. See
+ includes/stg/MachRegs.h Please note that Haskell code is
+ compiled by GHC/LLVM into ARM code (not Thumb!), at least
+ as of February 2012 */
+ : "%r4", "%r5", "%r6", "%r8", "%r9", "%r10", "%fp", "%ip", "%lr"
+#endif
);
return r;
}