8c4c91efd9
- archer-jankratochvil-fedora13 commit:
81810a20b2d2c3bf18e151de3cddfc96445b3c46
- [expr-cumulative] Archer branch is missing in this release.
- Update rpm.org#76 workaround for rpm-4.8 using librpm.so.1.
- Dissect archer-jankratochvil-misc into Patch403...Patch408.
- Some regressions exist in this release.
78 lines
2.6 KiB
Diff
78 lines
2.6 KiB
Diff
[ Forward-ported context. ]
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http://sourceware.org/ml/gdb-patches/2009-11/msg00170.html
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Subject: [patch 03/15] PIE: breakpoint_address_match gdbarch_addr_bit workaround
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Hi,
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there are already multiple cases of CORE_ADDR being masked by the width of
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gdbarch_addr_bit. This specific new case was required the PIE support.
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Please read the C comment in attached patch.
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Checked that CORE_ADDR math operations are present on 6000+ lines of code of
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GDB sources which makes it impossible to do some general fix by replacing all
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a->addr < b->addr
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by
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addr_less_than (a->addr, b->addr)
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etc.
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Even with this patch I think there are still many bugs left in the operation
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of x86_64 gdb debugging i386 targets. Do you find the C++ way as a viable
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one?
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Thanks,
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Jan
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gdb/
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* breakpoint.c (breakpoint_address_match): New variables addr_bit and
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addr_mask, initialize it. Mask addresses by ADDR_MASK.
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* defs.h (CORE_ADDR): Extend the comment.
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--- a/gdb/breakpoint.c
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+++ b/gdb/breakpoint.c
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@@ -4559,9 +4559,15 @@ static int
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breakpoint_address_match (struct address_space *aspace1, CORE_ADDR addr1,
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struct address_space *aspace2, CORE_ADDR addr2)
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{
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+ int addr_bit = gdbarch_addr_bit (target_gdbarch);
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+ CORE_ADDR addr_mask = CORE_ADDR_MAX;
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+
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+ if (addr_bit < (sizeof (CORE_ADDR) * HOST_CHAR_BIT))
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+ addr_mask = ((CORE_ADDR) 1 << addr_bit) - 1;
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+
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return ((gdbarch_has_global_breakpoints (target_gdbarch)
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|| aspace1 == aspace2)
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- && addr1 == addr2);
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+ && (addr1 & addr_mask) == (addr2 & addr_mask));
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}
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/* Assuming LOC1 and LOC2's types' have meaningful target addresses
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--- a/gdb/defs.h
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+++ b/gdb/defs.h
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@@ -98,7 +98,20 @@
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/* A byte from the program being debugged. */
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typedef bfd_byte gdb_byte;
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-/* An address in the program being debugged. Host byte order. */
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+/* An address in the program being debugged. Host byte order.
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+
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+ Its width is the maximum width of all the supported targets. That means
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+ 32-bit target will run on such GDB using 64-bit CORE_ADDR cluttering the
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+ bits 32...63 with random data from internal GDB calculations. GDB currently
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+ in general truncates the address width only when it is being presented/used
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+ externally (such as by the paddress function).
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+
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+ FIXME: This is still not right as any GDB internal comparisons (such as >=)
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+ of CORE_ADDR do not use the properly truncated width. As converting all the
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+ CORE_ADDR operations to width-aware functions is not feasible the way out
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+ could be a width-aware C++ class CORE_ADDR referencing gdbarch as its
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+ constructor parameter. */
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+
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typedef bfd_vma CORE_ADDR;
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/* The largest CORE_ADDR value. */
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