From 3f9696a6a070fab67855156c031bad9a0d33ed6e Mon Sep 17 00:00:00 2001 From: Marek Polacek Date: Mon, 22 Jul 2024 11:15:44 -0400 Subject: [PATCH] 11.5.0-2 Fix TARGET_CPU_DEFAULT (PR target/105157) Resolves: RHEL-50037 --- gcc.spec | 7 ++- gcc11-pr105157.patch | 105 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 111 insertions(+), 1 deletion(-) create mode 100644 gcc11-pr105157.patch diff --git a/gcc.spec b/gcc.spec index 6d9482c..2ec7ade 100644 --- a/gcc.spec +++ b/gcc.spec @@ -4,7 +4,7 @@ %global gcc_major 11 # Note, gcc_release must be integer, if you want to add suffixes to # %%{release}, append them after %%{gcc_release} on Release: line. -%global gcc_release 1 +%global gcc_release 2 %global nvptx_tools_gitrev 5f6f343a302d620b0868edab376c00b15741e39e %global newlib_cygwin_gitrev 50e2a63b04bdd018484605fbb954fd1bd5147fa0 %global _unpackaged_files_terminate_build 0 @@ -295,6 +295,7 @@ Patch32: gcc11-testsuite-fixes-2.patch Patch35: gcc11-testsuite-aarch64-add-fno-stack-protector.patch Patch36: gcc11-libgfortran-flush.patch Patch37: gcc11-pr113960.patch +Patch38: gcc11-pr105157.patch Patch100: gcc11-fortran-fdec-duplicates.patch Patch101: gcc11-fortran-flogical-as-integer.patch @@ -895,6 +896,7 @@ mark them as cross compiled. %patch35 -p1 -b .testsuite3~ %patch36 -p1 -b .libgfortran-flush~ %patch37 -p1 -b .pr113960~ +%patch38 -p1 -b .pr105157~ %if 0%{?rhel} >= 9 %patch100 -p1 -b .fortran-fdec-duplicates~ @@ -3588,6 +3590,9 @@ end %endif %changelog +* Mon Jul 22 2024 Marek Polacek 11.5.0-2 +- fix TARGET_CPU_DEFAULT (PR target/105157, RHEL-50037) + * Fri Jul 19 2024 Marek Polacek 11.5.0-1 - update from releases/gcc-11 branch (RHEL-35635) - GCC 11.5 release diff --git a/gcc11-pr105157.patch b/gcc11-pr105157.patch new file mode 100644 index 0000000..79cac28 --- /dev/null +++ b/gcc11-pr105157.patch @@ -0,0 +1,105 @@ +The original patch had +#define TARGET_CPU_NBITS 8 +but I've changed it to +#define TARGET_CPU_NBITS 7 + +commit 5522dec054cb940fe83661b96249aa12c54c1d77 +Author: Andre Vieira +Date: Fri Apr 8 15:12:23 2022 +0100 + + aarch64: PR target/105157 Increase number of cores TARGET_CPU_DEFAULT can encode + + This addresses the compile-time increase seen in the PR target/105157. This was + being caused by selecting the wrong core tuning, as when we added the latest + AArch64 the TARGET_CPU_generic tuning was pushed beyond the 0x3f mask we used + to encode both target cpu and attributes into TARGET_CPU_DEFAULT. + + gcc/ChangeLog: + + PR target/105157 + * config.gcc: Shift ext_mask by TARGET_CPU_NBITS. + * config/aarch64/aarch64.h (TARGET_CPU_NBITS): New macro. + (TARGET_CPU_MASK): Likewise. + (TARGET_CPU_DEFAULT): Use TARGET_CPU_NBITS. + * config/aarch64/aarch64.cc (aarch64_get_tune_cpu): Use TARGET_CPU_MASK. + (aarch64_get_arch): Likewise. + (aarch64_override_options): Use TARGET_CPU_NBITS. + +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -4261,7 +4261,7 @@ case "${target}" in + ext_val=`echo $ext_val | sed -e 's/[a-z0-9]\+//'` + done + +- ext_mask="(("$ext_mask") << 6)" ++ ext_mask="(("$ext_mask") << TARGET_CPU_NBITS)" + if [ x"$base_id" != x ]; then + target_cpu_cname="TARGET_CPU_$base_id | $ext_mask" + fi +--- a/gcc/config/aarch64/aarch64.c ++++ b/gcc/config/aarch64/aarch64.c +@@ -18053,6 +18053,9 @@ aarch64_validate_mtune (const char *str, const struct processor **res) + return false; + } + ++static_assert (TARGET_CPU_generic < TARGET_CPU_MASK, ++ "TARGET_CPU_NBITS is big enough"); ++ + /* Return the CPU corresponding to the enum CPU. + If it doesn't specify a cpu, return the default. */ + +@@ -18062,12 +18065,12 @@ aarch64_get_tune_cpu (enum aarch64_processor cpu) + if (cpu != aarch64_none) + return &all_cores[cpu]; + +- /* The & 0x3f is to extract the bottom 6 bits that encode the +- default cpu as selected by the --with-cpu GCC configure option ++ /* The & TARGET_CPU_MASK is to extract the bottom TARGET_CPU_NBITS bits that ++ encode the default cpu as selected by the --with-cpu GCC configure option + in config.gcc. + ???: The whole TARGET_CPU_DEFAULT and AARCH64_CPU_DEFAULT_FLAGS + flags mechanism should be reworked to make it more sane. */ +- return &all_cores[TARGET_CPU_DEFAULT & 0x3f]; ++ return &all_cores[TARGET_CPU_DEFAULT & TARGET_CPU_MASK]; + } + + /* Return the architecture corresponding to the enum ARCH. +@@ -18079,7 +18082,8 @@ aarch64_get_arch (enum aarch64_arch arch) + if (arch != aarch64_no_arch) + return &all_architectures[arch]; + +- const struct processor *cpu = &all_cores[TARGET_CPU_DEFAULT & 0x3f]; ++ const struct processor *cpu ++ = &all_cores[TARGET_CPU_DEFAULT & TARGET_CPU_MASK]; + + return &all_architectures[cpu->arch]; + } +@@ -18166,7 +18170,7 @@ aarch64_override_options (void) + { + /* Get default configure-time CPU. */ + selected_cpu = aarch64_get_tune_cpu (aarch64_none); +- aarch64_isa_flags = TARGET_CPU_DEFAULT >> 6; ++ aarch64_isa_flags = TARGET_CPU_DEFAULT >> TARGET_CPU_NBITS; + } + + if (selected_tune) +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -813,10 +813,16 @@ enum target_cpus + TARGET_CPU_generic + }; + ++/* Define how many bits are used to represent the CPU in TARGET_CPU_DEFAULT. ++ This needs to be big enough to fit the value of TARGET_CPU_generic. ++ All bits after this are used to represent the AARCH64_CPU_DEFAULT_FLAGS. */ ++#define TARGET_CPU_NBITS 7 ++#define TARGET_CPU_MASK ((1 << TARGET_CPU_NBITS) - 1) ++ + /* If there is no CPU defined at configure, use generic as default. */ + #ifndef TARGET_CPU_DEFAULT + #define TARGET_CPU_DEFAULT \ +- (TARGET_CPU_generic | (AARCH64_CPU_DEFAULT_FLAGS << 6)) ++ (TARGET_CPU_generic | (AARCH64_CPU_DEFAULT_FLAGS << TARGET_CPU_NBITS)) + #endif + + /* If inserting NOP before a mult-accumulate insn remember to adjust the