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import gcc-toolset-9-binutils-2.32-17.el8

This commit is contained in:
CentOS Sources 2020-01-21 15:49:57 -05:00 committed by Stepan Oksanichenko
parent d1e2b8535a
commit 69e98be637
15 changed files with 5394 additions and 14 deletions
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17
SOURCES/binutils-CVE-2019-14250.patch Normal file
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@ -0,0 +1,17 @@
--- binutils.orig/libiberty/simple-object-elf.c 2019-08-09 14:13:51.677330065 +0100
+++ binutils-2.32/libiberty/simple-object-elf.c 2019-08-09 14:14:31.177076298 +0100
@@ -549,6 +549,14 @@ simple_object_elf_match (unsigned char h
return NULL;
}
+ if (eor->shstrndx == 0)
+ {
+ *errmsg = "invalid ELF shstrndx == 0";
+ *err = 0;
+ XDELETE (eor);
+ return NULL;
+ }
+
return (void *) eor;
}

11
SOURCES/binutils-CVE-2019-14444.patch Normal file
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@ -0,0 +1,11 @@
--- binutils.orig/binutils/readelf.c 2019-08-13 10:03:33.518792590 +0100
+++ binutils-2.32/binutils/readelf.c 2019-08-13 10:04:22.885418269 +0100
@@ -13234,7 +13234,7 @@ apply_relocations (Filedata *
}
rloc = start + rp->r_offset;
- if ((rloc + reloc_size) > end || (rloc < start))
+ if (rloc >= end || (rloc + reloc_size) > end || (rloc < start))
{
warn (_("skipping invalid relocation offset 0x%lx in section %s\n"),
(unsigned long) rp->r_offset,

62
SOURCES/binutils-CVE-2019-17450.patch Normal file
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@ -0,0 +1,62 @@
--- binutils.orig/bfd/dwarf2.c 2019-11-13 11:49:52.211121564 +0000
+++ binutils-2.33.1/bfd/dwarf2.c 2019-11-13 11:53:26.991423055 +0000
@@ -2813,8 +2813,8 @@ static bfd_boolean comp_unit_maybe_decod
static bfd_boolean
find_abstract_instance (struct comp_unit * unit,
- bfd_byte * orig_info_ptr,
struct attribute * attr_ptr,
+ unsigned int recur_count,
const char ** pname,
bfd_boolean * is_linkage,
char ** filename_ptr,
@@ -2829,6 +2829,14 @@ find_abstract_instance (struct comp_unit
struct attribute attr;
const char *name = NULL;
+ if (recur_count == 100)
+ {
+ _bfd_error_handler
+ (_("DWARF error: abstract instance recursion detected"));
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+
/* DW_FORM_ref_addr can reference an entry in a different CU. It
is an offset from the .debug_info section, not the current CU. */
if (attr_ptr->form == DW_FORM_ref_addr)
@@ -2962,15 +2970,7 @@ find_abstract_instance (struct comp_unit
info_ptr, info_ptr_end);
if (info_ptr == NULL)
break;
- /* It doesn't ever make sense for DW_AT_specification to
- refer to the same DIE. Stop simple recursion. */
- if (info_ptr == orig_info_ptr)
- {
- _bfd_error_handler
- (_("DWARF error: abstract instance recursion detected"));
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
+
switch (attr.name)
{
case DW_AT_name:
@@ -2984,7 +2984,7 @@ find_abstract_instance (struct comp_unit
}
break;
case DW_AT_specification:
- if (!find_abstract_instance (unit, info_ptr, &attr,
+ if (!find_abstract_instance (unit, &attr, recur_count + 1,
&name, is_linkage,
filename_ptr, linenumber_ptr))
return FALSE;
@@ -3200,7 +3200,7 @@ scan_unit_for_symbols (struct comp_unit
case DW_AT_abstract_origin:
case DW_AT_specification:
- if (!find_abstract_instance (unit, info_ptr, &attr,
+ if (!find_abstract_instance (unit, &attr, 0,
&func->name,
&func->is_linkage,
&func->file,

20
SOURCES/binutils-CVE-2019-17451.patch Normal file
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@ -0,0 +1,20 @@
--- binutils.orig/bfd/dwarf2.c 2019-11-13 11:32:09.395430104 +0000
+++ binutils-2.33.1/bfd/dwarf2.c 2019-11-13 11:33:17.272899503 +0000
@@ -4440,7 +4440,16 @@ _bfd_dwarf2_slurp_debug_info (bfd *abfd,
for (total_size = 0;
msec;
msec = find_debug_info (debug_bfd, debug_sections, msec))
- total_size += msec->size;
+ {
+ /* Catch PR25070 testcase overflowing size calculation here. */
+ if (total_size + msec->size < total_size
+ || total_size + msec->size < msec->size)
+ {
+ bfd_set_error (bfd_error_no_memory);
+ return FALSE;
+ }
+ total_size += msec->size;
+ }
stash->info_ptr_memory = (bfd_byte *) bfd_malloc (total_size);
if (stash->info_ptr_memory == NULL)

11
SOURCES/binutils-PELC-licence-corrections.patch Normal file
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@ -0,0 +1,11 @@
--- binutils.orig/gold/ftruncate.c 2019-06-25 11:36:51.074941484 +0100
+++ binutils-2.32/gold/ftruncate.c 2019-06-25 11:37:28.108690037 +0100
@@ -1,7 +1,6 @@
/* ftruncate emulations that work on some System V's.
- This file is in the public domain. */
-/* Copyright (C) 2012-2019 Free Software Foundation, Inc.
+ Copyright (C) 2012-2019 Free Software Foundation, Inc.
This file is part of gold.

866
SOURCES/binutils-aarch64-STO_AARCH64_VARIANT_PCS.patch Normal file
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@ -0,0 +1,866 @@
diff -rup binutils.orig/bfd/elfnn-aarch64.c binutils-2.32/bfd/elfnn-aarch64.c
--- binutils.orig/bfd/elfnn-aarch64.c 2019-07-02 17:30:19.407892712 +0100
+++ binutils-2.32/bfd/elfnn-aarch64.c 2019-07-02 17:35:21.874749884 +0100
@@ -2579,6 +2579,9 @@ struct elf_aarch64_link_hash_table
unsigned int top_index;
asection **input_list;
+ /* JUMP_SLOT relocs for variant PCS symbols may be present. */
+ int variant_pcs;
+
/* The offset into splt of the PLT entry for the TLS descriptor
resolver. Special values are 0, if not necessary (or not found
to be necessary yet), and -1 if needed but not determined
@@ -2790,6 +2793,31 @@ elfNN_aarch64_copy_indirect_symbol (stru
_bfd_elf_link_hash_copy_indirect (info, dir, ind);
}
+/* Merge non-visibility st_other attributes. */
+
+static void
+elfNN_aarch64_merge_symbol_attribute (struct elf_link_hash_entry *h,
+ const Elf_Internal_Sym *isym,
+ bfd_boolean definition ATTRIBUTE_UNUSED,
+ bfd_boolean dynamic ATTRIBUTE_UNUSED)
+{
+ unsigned int isym_sto = isym->st_other & ~ELF_ST_VISIBILITY (-1);
+ unsigned int h_sto = h->other & ~ELF_ST_VISIBILITY (-1);
+
+ if (isym_sto == h_sto)
+ return;
+
+ if (isym_sto & ~STO_AARCH64_VARIANT_PCS)
+ /* Not fatal, this callback cannot fail. */
+ _bfd_error_handler (_("unknown attribute for symbol `%s': 0x%02x"),
+ h->root.root.string, isym_sto);
+
+ /* Note: Ideally we would warn about any attribute mismatch, but
+ this api does not allow that without substantial changes. */
+ if (isym_sto & STO_AARCH64_VARIANT_PCS)
+ h->other |= STO_AARCH64_VARIANT_PCS;
+}
+
/* Destroy an AArch64 elf linker hash table. */
static void
@@ -8370,6 +8398,12 @@ elfNN_aarch64_allocate_dynrelocs (struct
updated. */
htab->root.srelplt->reloc_count++;
+
+ /* Mark the DSO in case R_<CLS>_JUMP_SLOT relocs against
+ variant PCS symbols are present. */
+ if (h->other & STO_AARCH64_VARIANT_PCS)
+ htab->variant_pcs = 1;
+
}
else
{
@@ -8958,6 +8992,10 @@ elfNN_aarch64_size_dynamic_sections (bfd
|| !add_dynamic_entry (DT_JMPREL, 0))
return FALSE;
+ if (htab->variant_pcs
+ && !add_dynamic_entry (DT_AARCH64_VARIANT_PCS, 0))
+ return FALSE;
+
if (htab->tlsdesc_plt
&& (!add_dynamic_entry (DT_TLSDESC_PLT, 0)
|| !add_dynamic_entry (DT_TLSDESC_GOT, 0)))
@@ -9708,6 +9746,9 @@ const struct elf_size_info elfNN_aarch64
#define elf_backend_copy_indirect_symbol \
elfNN_aarch64_copy_indirect_symbol
+#define elf_backend_merge_symbol_attribute \
+ elfNN_aarch64_merge_symbol_attribute
+
/* Create .dynbss, and .rela.bss sections in DYNOBJ, and set up shortcuts
to them in our hash. */
#define elf_backend_create_dynamic_sections \
diff -rup binutils.orig/binutils/readelf.c binutils-2.32/binutils/readelf.c
--- binutils.orig/binutils/readelf.c 2019-07-02 17:30:18.890896375 +0100
+++ binutils-2.32/binutils/readelf.c 2019-07-02 17:32:25.008002901 +0100
@@ -1797,6 +1797,19 @@ dump_relocations (Filedata * fi
}
static const char *
+get_aarch64_dynamic_type (unsigned long type)
+{
+ switch (type)
+ {
+ case DT_AARCH64_BTI_PLT: return "AARCH64_BTI_PLT";
+ case DT_AARCH64_PAC_PLT: return "AARCH64_PAC_PLT";
+ case DT_AARCH64_VARIANT_PCS: return "AARCH64_VARIANT_PCS";
+ default:
+ return NULL;
+ }
+}
+
+static const char *
get_mips_dynamic_type (unsigned long type)
{
switch (type)
@@ -2169,6 +2182,9 @@ get_dynamic_type (Filedata * filedata, u
switch (filedata->file_header.e_machine)
{
+ case EM_AARCH64:
+ result = get_aarch64_dynamic_type (type);
+ break;
case EM_MIPS:
case EM_MIPS_RS3_LE:
result = get_mips_dynamic_type (type);
@@ -11054,6 +11070,22 @@ get_solaris_symbol_visibility (unsigned
}
static const char *
+get_aarch64_symbol_other (unsigned int other)
+{
+ static char buf[32];
+
+ if (other & STO_AARCH64_VARIANT_PCS)
+ {
+ other &= ~STO_AARCH64_VARIANT_PCS;
+ if (other == 0)
+ return "VARIANT_PCS";
+ snprintf (buf, sizeof buf, "VARIANT_PCS | %x", other);
+ return buf;
+ }
+ return NULL;
+}
+
+static const char *
get_mips_symbol_other (unsigned int other)
{
switch (other)
@@ -11164,6 +11196,9 @@ get_symbol_other (Filedata * filedata, u
switch (filedata->file_header.e_machine)
{
+ case EM_AARCH64:
+ result = get_aarch64_symbol_other (other);
+ break;
case EM_MIPS:
result = get_mips_symbol_other (other);
break;
diff -rup binutils.orig/gas/config/tc-aarch64.c binutils-2.32/gas/config/tc-aarch64.c
--- binutils.orig/gas/config/tc-aarch64.c 2019-07-02 17:30:19.131894667 +0100
+++ binutils-2.32/gas/config/tc-aarch64.c 2019-07-02 17:35:45.202584620 +0100
@@ -1938,6 +1938,28 @@ s_aarch64_elf_cons (int nbytes)
demand_empty_rest_of_line ();
}
+/* Mark symbol that it follows a variant PCS convention. */
+
+static void
+s_variant_pcs (int ignored ATTRIBUTE_UNUSED)
+{
+ char *name;
+ char c;
+ symbolS *sym;
+ asymbol *bfdsym;
+ elf_symbol_type *elfsym;
+
+ c = get_symbol_name (&name);
+ if (!*name)
+ as_bad (_("Missing symbol name in directive"));
+ sym = symbol_find_or_make (name);
+ restore_line_pointer (c);
+ demand_empty_rest_of_line ();
+ bfdsym = symbol_get_bfdsym (sym);
+ elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
+ gas_assert (elfsym);
+ elfsym->internal_elf_sym.st_other |= STO_AARCH64_VARIANT_PCS;
+}
#endif /* OBJ_ELF */
/* Output a 32-bit word, but mark as an instruction. */
@@ -2084,6 +2106,7 @@ const pseudo_typeS md_pseudo_table[] = {
{"long", s_aarch64_elf_cons, 4},
{"xword", s_aarch64_elf_cons, 8},
{"dword", s_aarch64_elf_cons, 8},
+ {"variant_pcs", s_variant_pcs, 0},
#endif
{0, 0, 0}
};
@@ -9320,3 +9343,35 @@ aarch64_copy_symbol_attributes (symbolS
{
AARCH64_GET_FLAG (dest) = AARCH64_GET_FLAG (src);
}
+
+#ifdef OBJ_ELF
+/* Same as elf_copy_symbol_attributes, but without copying st_other.
+ This is needed so AArch64 specific st_other values can be independently
+ specified for an IFUNC resolver (that is called by the dynamic linker)
+ and the symbol it resolves (aliased to the resolver). In particular,
+ if a function symbol has special st_other value set via directives,
+ then attaching an IFUNC resolver to that symbol should not override
+ the st_other setting. Requiring the directive on the IFUNC resolver
+ symbol would be unexpected and problematic in C code, where the two
+ symbols appear as two independent function declarations. */
+
+void
+aarch64_elf_copy_symbol_attributes (symbolS *dest, symbolS *src)
+{
+ struct elf_obj_sy *srcelf = symbol_get_obj (src);
+ struct elf_obj_sy *destelf = symbol_get_obj (dest);
+ if (srcelf->size)
+ {
+ if (destelf->size == NULL)
+ destelf->size = XNEW (expressionS);
+ *destelf->size = *srcelf->size;
+ }
+ else
+ {
+ if (destelf->size != NULL)
+ free (destelf->size);
+ destelf->size = NULL;
+ }
+ S_SET_SIZE (dest, S_GET_SIZE (src));
+}
+#endif
diff -rup binutils.orig/gas/config/tc-aarch64.h binutils-2.32/gas/config/tc-aarch64.h
--- binutils.orig/gas/config/tc-aarch64.h 2019-07-02 17:30:19.136894632 +0100
+++ binutils-2.32/gas/config/tc-aarch64.h 2019-07-02 17:35:45.202584620 +0100
@@ -130,6 +130,12 @@ void aarch64_copy_symbol_attributes (sym
(aarch64_copy_symbol_attributes (DEST, SRC))
#endif
+#ifdef OBJ_ELF
+void aarch64_elf_copy_symbol_attributes (symbolS *, symbolS *);
+#define OBJ_COPY_SYMBOL_ATTRIBUTES(DEST, SRC) \
+ aarch64_elf_copy_symbol_attributes (DEST, SRC)
+#endif
+
#define TC_START_LABEL(STR, NUL_CHAR, NEXT_CHAR) \
(NEXT_CHAR == ':' || (NEXT_CHAR == '/' && aarch64_data_in_code ()))
#define tc_canonicalize_symbol_name(str) aarch64_canonicalize_symbol_name (str);
diff -rup binutils.orig/gas/doc/c-aarch64.texi binutils-2.32/gas/doc/c-aarch64.texi
--- binutils.orig/gas/doc/c-aarch64.texi 2019-07-02 17:30:19.125894710 +0100
+++ binutils-2.32/gas/doc/c-aarch64.texi 2019-07-02 17:35:11.362824354 +0100
@@ -425,6 +425,12 @@ should only be done if it is really nece
@c VVVVVVVVVVVVVVVVVVVVVVVVVV
+@cindex @code{.variant_pcs} directive, AArch64
+@item .variant_pcs @var{symbol}
+This directive marks @var{symbol} referencing a function that may
+follow a variant procedure call standard with different register
+usage convention from the base procedure call standard.
+
@c WWWWWWWWWWWWWWWWWWWWWWWWWW
@c XXXXXXXXXXXXXXXXXXXXXXXXXX
diff -rup binutils.orig/include/elf/aarch64.h binutils-2.32/include/elf/aarch64.h
--- binutils.orig/include/elf/aarch64.h 2019-07-02 17:30:18.850896658 +0100
+++ binutils-2.32/include/elf/aarch64.h 2019-07-02 17:32:55.678785616 +0100
@@ -36,6 +36,15 @@
#define SHF_COMDEF 0x80000000 /* Section may be multiply defined
in the input to a link step. */
+/* Processor specific dynamic array tags. */
+#define DT_AARCH64_BTI_PLT (DT_LOPROC + 1)
+#define DT_AARCH64_PAC_PLT (DT_LOPROC + 3)
+#define DT_AARCH64_VARIANT_PCS (DT_LOPROC + 5)
+
+/* AArch64-specific values for st_other. */
+#define STO_AARCH64_VARIANT_PCS 0x80 /* Symbol may follow different call
+ convention from the base PCS. */
+
/* Relocation types. */
START_RELOC_NUMBERS (elf_aarch64_reloc_type)
diff -rup binutils.orig/ld/testsuite/ld-aarch64/aarch64-elf.exp binutils-2.32/ld/testsuite/ld-aarch64/aarch64-elf.exp
--- binutils.orig/ld/testsuite/ld-aarch64/aarch64-elf.exp 2019-07-02 17:30:18.922896148 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/aarch64-elf.exp 2019-07-02 17:35:21.875749878 +0100
@@ -371,6 +371,10 @@ run_dump_test_lp64 "rela-abs-relative-op
run_dump_test_lp64 "pie-bind-locally"
+run_dump_test_lp64 "variant_pcs-r"
+run_dump_test_lp64 "variant_pcs-shared"
+run_dump_test_lp64 "variant_pcs-now"
+
set aarch64elflinktests {
{"ld-aarch64/so with global symbol" "-shared" "" "" {copy-reloc-so.s}
{} "copy-reloc-so.so"}
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d 2019-07-02 17:35:11.362824354 +0100
@@ -0,0 +1,10 @@
+#objdump: -t
+
+.*: file format .*
+
+SYMBOL TABLE:
+0+ l d \.text 0+ \.text
+0+ l d \.data 0+ \.data
+0+ l d \.bss 0+ \.bss
+0+ l \.text 0+ func
+0+ \*UND\* 0+ 0x80 foobar
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.s 2019-07-02 17:35:11.362824354 +0100
@@ -0,0 +1,8 @@
+.text
+.variant_pcs foobar
+func:
+ bl foobar
+ b foobar
+
+.data
+.xword foobar
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d 2019-07-02 17:35:11.362824354 +0100
@@ -0,0 +1,9 @@
+#objdump: -t
+
+.*: file format .*
+
+SYMBOL TABLE:
+0+ l d \.text 0+ \.text
+0+ l d \.data 0+ \.data
+0+ l d \.bss 0+ \.bss
+0+ l \.text 0+ 0x80 foo
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.s 2019-07-02 17:35:11.362824354 +0100
@@ -0,0 +1,4 @@
+.text
+.variant_pcs foo
+foo:
+ ret
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.s 2019-07-02 17:35:45.202584620 +0100
@@ -0,0 +1,20 @@
+.text
+.global foo_vpcs
+.global foo_base
+.global alias_vpcs
+.global alias_base
+
+.variant_pcs foo_vpcs
+.variant_pcs alias_vpcs
+
+foo_vpcs:
+foo_base:
+ bl foo_vpcs
+ bl foo_base
+ bl alias_vpcs
+ bl alias_base
+
+/* Check that the STO_AARCH64_VARIANT_PCS is not affected by .set. */
+
+.set alias_base, foo_vpcs
+.set alias_vpcs, foo_base
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d 2019-07-02 17:35:45.202584620 +0100
@@ -0,0 +1,12 @@
+#objdump: -t
+
+.*: file format .*
+
+SYMBOL TABLE:
+0+ l d \.text 0+ \.text
+0+ l d \.data 0+ \.data
+0+ l d \.bss 0+ \.bss
+0+ g \.text 0+ 0x80 foo_vpcs
+0+ g \.text 0+ foo_base
+0+ g \.text 0+ 0x80 alias_vpcs
+0+ g \.text 0+ alias_base
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-1.s 2019-07-02 17:35:21.875749878 +0100
@@ -0,0 +1,59 @@
+.text
+
+.variant_pcs f_spec_global_default_def
+.variant_pcs f_spec_global_default_undef
+.variant_pcs f_spec_global_hidden_def
+.variant_pcs f_spec_local
+.variant_pcs f_spec_global_default_ifunc
+.variant_pcs f_spec_global_hidden_ifunc
+.variant_pcs f_spec_local_ifunc
+
+.global f_spec_global_default_def
+.global f_spec_global_default_undef
+.global f_spec_global_hidden_def
+.global f_spec_global_default_ifunc
+.global f_spec_global_hidden_ifunc
+.global f_base_global_default_def
+.global f_base_global_default_undef
+.global f_base_global_hidden_def
+.global f_base_global_default_ifunc
+.global f_base_global_hidden_ifunc
+
+.hidden f_spec_global_hidden_def
+.hidden f_spec_global_hidden_ifunc
+.hidden f_base_global_hidden_def
+.hidden f_base_global_hidden_ifunc
+
+.type f_spec_global_default_ifunc, %gnu_indirect_function
+.type f_spec_global_hidden_ifunc, %gnu_indirect_function
+.type f_spec_local_ifunc, %gnu_indirect_function
+.type f_base_global_default_ifunc, %gnu_indirect_function
+.type f_base_global_hidden_ifunc, %gnu_indirect_function
+.type f_base_local_ifunc, %gnu_indirect_function
+
+f_spec_global_default_def:
+f_spec_global_hidden_def:
+f_spec_local:
+f_base_global_default_def:
+f_base_global_hidden_def:
+f_base_local:
+f_spec_global_default_ifunc:
+f_spec_global_hidden_ifunc:
+f_spec_local_ifunc:
+f_base_global_default_ifunc:
+f_base_global_hidden_ifunc:
+f_base_local_ifunc:
+ bl f_spec_global_default_def
+ bl f_spec_global_default_undef
+ bl f_spec_global_hidden_def
+ bl f_spec_local
+ bl f_base_global_default_def
+ bl f_base_global_default_undef
+ bl f_base_global_hidden_def
+ bl f_base_local
+ bl f_spec_global_default_ifunc
+ bl f_spec_global_hidden_ifunc
+ bl f_spec_local_ifunc
+ bl f_base_global_default_ifunc
+ bl f_base_global_hidden_ifunc
+ bl f_base_local_ifunc
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-2.s 2019-07-02 17:35:21.875749878 +0100
@@ -0,0 +1,47 @@
+.text
+
+.variant_pcs f_spec_global_default_def
+.variant_pcs f_spec_global_default_undef
+.variant_pcs f_spec_global_hidden_def
+.variant_pcs f_spec_local2
+.variant_pcs f_spec_global_default_ifunc
+.variant_pcs f_spec_global_hidden_ifunc
+.variant_pcs f_spec_local2_ifunc
+
+.global f_spec_global_default_def
+.global f_spec_global_default_undef
+.global f_spec_global_hidden_def
+.global f_spec_global_default_ifunc
+.global f_spec_global_hidden_ifunc
+.global f_base_global_default_def
+.global f_base_global_default_undef
+.global f_base_global_hidden_def
+.global f_base_global_default_ifunc
+.global f_base_global_hidden_ifunc
+
+.hidden f_spec_global_hidden_def
+.hidden f_spec_global_hidden_ifunc
+.hidden f_base_global_hidden_def
+.hidden f_base_global_hidden_ifunc
+
+.type f_spec_local2_ifunc, %gnu_indirect_function
+.type f_base_local2_ifunc, %gnu_indirect_function
+
+f_spec_local2:
+f_base_local2:
+f_spec_local2_ifunc:
+f_base_local2_ifunc:
+ bl f_spec_global_default_def
+ bl f_spec_global_default_undef
+ bl f_spec_global_hidden_def
+ bl f_spec_local2
+ bl f_base_global_default_def
+ bl f_base_global_default_undef
+ bl f_base_global_hidden_def
+ bl f_base_local2
+ bl f_spec_global_default_ifunc
+ bl f_spec_global_hidden_ifunc
+ bl f_spec_local2_ifunc
+ bl f_base_global_default_ifunc
+ bl f_base_global_hidden_ifunc
+ bl f_base_local2_ifunc
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs.ld 2019-07-02 17:35:37.100642017 +0100
@@ -0,0 +1,23 @@
+/* Script for .variant_pcs symbol tests. */
+OUTPUT_ARCH(aarch64)
+ENTRY(_start)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x8000); . = 0x8000;
+ .text :
+ {
+ *(.before)
+ *(.text)
+ *(.after)
+ } =0
+ . = 0x9000;
+ .got : { *(.got) *(.got.plt)}
+ . = 0x10000;
+ .rela.dyn : { *(.rela.ifunc) }
+ . = 0x11000;
+ .rela.plt : { *(.rela.plt) *(.rela.iplt) }
+ . = 0x12340000;
+ .far : { *(.far) }
+ .ARM.attributes 0 : { *(.ARM.atttributes) }
+}
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-now.d 2019-07-02 17:34:37.557063849 +0100
@@ -0,0 +1,67 @@
+#source: variant_pcs-1.s
+#source: variant_pcs-2.s
+#ld: -shared --hash-style=sysv -T variant_pcs.ld -z now
+#readelf: -rsW
+
+Relocation section '\.rela\.plt' at offset 0x11000 contains 12 entries:
+ Offset Info Type Symbol's Value Symbol's Name \+ Addend
+0000000000009020 0000000100000402 R_AARCH64_JUMP_SLOT 0000000000000000 f_base_global_default_undef \+ 0
+0000000000009028 0000000200000402 R_AARCH64_JUMP_SLOT 0000000000000000 f_spec_global_default_undef \+ 0
+0000000000009030 0000000400000402 R_AARCH64_JUMP_SLOT 0000000000008000 f_base_global_default_def \+ 0
+0000000000009038 0000000500000402 R_AARCH64_JUMP_SLOT 0000000000008000 f_spec_global_default_def \+ 0
+0000000000009040 0000000000000408 R_AARCH64_IRELATIVE 8000
+0000000000009048 0000000300000402 R_AARCH64_JUMP_SLOT f_spec_global_default_ifunc\(\) f_spec_global_default_ifunc \+ 0
+0000000000009050 0000000000000408 R_AARCH64_IRELATIVE 8000
+0000000000009058 0000000600000402 R_AARCH64_JUMP_SLOT f_base_global_default_ifunc\(\) f_base_global_default_ifunc \+ 0
+0000000000009060 0000000000000408 R_AARCH64_IRELATIVE 8038
+0000000000009068 0000000000000408 R_AARCH64_IRELATIVE 8000
+0000000000009070 0000000000000408 R_AARCH64_IRELATIVE 8000
+0000000000009078 0000000000000408 R_AARCH64_IRELATIVE 8038
+
+Symbol table '\.dynsym' contains 7 entries:
+ Num: Value Size Type Bind Vis Ndx Name
+ 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
+ 1: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
+ 2: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
+ 3: 0000000000008000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 4: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
+ 5: 0000000000008000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 6: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc
+
+Symbol table '\.symtab' contains 35 entries:
+ Num: Value Size Type Bind Vis Ndx Name
+ 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
+ 1: 0000000000008000 0 SECTION LOCAL DEFAULT 1
+ 2: 0000000000008070 0 SECTION LOCAL DEFAULT 2
+ 3: 0000000000009000 0 SECTION LOCAL DEFAULT 3
+ 4: 0000000000009080 0 SECTION LOCAL DEFAULT 4
+ 5: 0000000000011000 0 SECTION LOCAL DEFAULT 5
+ 6: 0000000000011120 0 SECTION LOCAL DEFAULT 6
+ 7: 00000000000111c8 0 SECTION LOCAL DEFAULT 7
+ 8: 0000000000011270 0 SECTION LOCAL DEFAULT 8
+ 9: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-1\.o
+ 10: 0000000000008000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local
+ 11: 0000000000008000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local_ifunc
+ 12: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_base_local_ifunc
+ 13: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_base_local
+ 14: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 \$x
+ 15: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-2\.o
+ 16: 0000000000008038 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2
+ 17: 0000000000008038 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2_ifunc
+ 18: 0000000000008038 0 IFUNC LOCAL DEFAULT 1 f_base_local2_ifunc
+ 19: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 f_base_local2
+ 20: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 \$x
+ 21: 0000000000000000 0 FILE LOCAL DEFAULT ABS
+ 22: 0000000000009080 0 OBJECT LOCAL DEFAULT ABS _DYNAMIC
+ 23: 0000000000008000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_hidden_def
+ 24: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_base_global_hidden_ifunc
+ 25: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_base_global_hidden_def
+ 26: 0000000000009000 0 OBJECT LOCAL DEFAULT ABS _GLOBAL_OFFSET_TABLE_
+ 27: 0000000000008000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_hidden_ifunc
+ 28: 0000000000008070 0 NOTYPE LOCAL DEFAULT 2 \$x
+ 29: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
+ 30: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
+ 31: 0000000000008000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 32: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
+ 33: 0000000000008000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 34: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-r.d 2019-07-02 17:35:35.244655166 +0100
@@ -0,0 +1,60 @@
+#source: variant_pcs-1.s
+#source: variant_pcs-2.s
+#ld: -r
+#readelf: -rsW
+
+Relocation section '\.rela\.text' at offset .* contains 24 entries:
+ Offset Info Type Symbol's Value Symbol's Name \+ Addend
+0000000000000000 000000180000011b R_AARCH64_CALL26 0000000000000000 f_spec_global_default_def \+ 0
+0000000000000004 000000110000011b R_AARCH64_CALL26 0000000000000000 f_spec_global_default_undef \+ 0
+0000000000000008 000000120000011b R_AARCH64_CALL26 0000000000000000 f_spec_global_hidden_def \+ 0
+0000000000000010 000000170000011b R_AARCH64_CALL26 0000000000000000 f_base_global_default_def \+ 0
+0000000000000014 000000100000011b R_AARCH64_CALL26 0000000000000000 f_base_global_default_undef \+ 0
+0000000000000018 000000150000011b R_AARCH64_CALL26 0000000000000000 f_base_global_hidden_def \+ 0
+0000000000000020 000000140000011b R_AARCH64_CALL26 f_spec_global_default_ifunc\(\) f_spec_global_default_ifunc \+ 0
+0000000000000024 000000160000011b R_AARCH64_CALL26 f_spec_global_hidden_ifunc\(\) f_spec_global_hidden_ifunc \+ 0
+0000000000000028 000000060000011b R_AARCH64_CALL26 f_spec_local_ifunc\(\) f_spec_local_ifunc \+ 0
+000000000000002c 000000190000011b R_AARCH64_CALL26 f_base_global_default_ifunc\(\) f_base_global_default_ifunc \+ 0
+0000000000000030 000000130000011b R_AARCH64_CALL26 f_base_global_hidden_ifunc\(\) f_base_global_hidden_ifunc \+ 0
+0000000000000034 000000070000011b R_AARCH64_CALL26 f_base_local_ifunc\(\) f_base_local_ifunc \+ 0
+0000000000000038 000000180000011b R_AARCH64_CALL26 0000000000000000 f_spec_global_default_def \+ 0
+000000000000003c 000000110000011b R_AARCH64_CALL26 0000000000000000 f_spec_global_default_undef \+ 0
+0000000000000040 000000120000011b R_AARCH64_CALL26 0000000000000000 f_spec_global_hidden_def \+ 0
+0000000000000048 000000170000011b R_AARCH64_CALL26 0000000000000000 f_base_global_default_def \+ 0
+000000000000004c 000000100000011b R_AARCH64_CALL26 0000000000000000 f_base_global_default_undef \+ 0
+0000000000000050 000000150000011b R_AARCH64_CALL26 0000000000000000 f_base_global_hidden_def \+ 0
+0000000000000058 000000140000011b R_AARCH64_CALL26 f_spec_global_default_ifunc\(\) f_spec_global_default_ifunc \+ 0
+000000000000005c 000000160000011b R_AARCH64_CALL26 f_spec_global_hidden_ifunc\(\) f_spec_global_hidden_ifunc \+ 0
+0000000000000060 0000000c0000011b R_AARCH64_CALL26 f_spec_local2_ifunc\(\) f_spec_local2_ifunc \+ 0
+0000000000000064 000000190000011b R_AARCH64_CALL26 f_base_global_default_ifunc\(\) f_base_global_default_ifunc \+ 0
+0000000000000068 000000130000011b R_AARCH64_CALL26 f_base_global_hidden_ifunc\(\) f_base_global_hidden_ifunc \+ 0
+000000000000006c 0000000d0000011b R_AARCH64_CALL26 f_base_local2_ifunc\(\) f_base_local2_ifunc \+ 0
+
+Symbol table '\.symtab' contains 26 entries:
+ Num: Value Size Type Bind Vis Ndx Name
+ 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
+ 1: 0000000000000000 0 SECTION LOCAL DEFAULT 1
+ 2: 0000000000000000 0 SECTION LOCAL DEFAULT 3
+ 3: 0000000000000000 0 SECTION LOCAL DEFAULT 4
+ 4: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-1\.o
+ 5: 0000000000000000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local
+ 6: 0000000000000000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local_ifunc
+ 7: 0000000000000000 0 IFUNC LOCAL DEFAULT 1 f_base_local_ifunc
+ 8: 0000000000000000 0 NOTYPE LOCAL DEFAULT 1 f_base_local
+ 9: 0000000000000000 0 NOTYPE LOCAL DEFAULT 1 \$x
+ 10: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-2\.o
+ 11: 0000000000000038 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2
+ 12: 0000000000000038 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2_ifunc
+ 13: 0000000000000038 0 IFUNC LOCAL DEFAULT 1 f_base_local2_ifunc
+ 14: 0000000000000038 0 NOTYPE LOCAL DEFAULT 1 f_base_local2
+ 15: 0000000000000038 0 NOTYPE LOCAL DEFAULT 1 \$x
+ 16: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
+ 17: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
+ 18: 0000000000000000 0 NOTYPE GLOBAL HIDDEN \[VARIANT_PCS\] 1 f_spec_global_hidden_def
+ 19: 0000000000000000 0 IFUNC GLOBAL HIDDEN 1 f_base_global_hidden_ifunc
+ 20: 0000000000000000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 21: 0000000000000000 0 NOTYPE GLOBAL HIDDEN 1 f_base_global_hidden_def
+ 22: 0000000000000000 0 IFUNC GLOBAL HIDDEN \[VARIANT_PCS\] 1 f_spec_global_hidden_ifunc
+ 23: 0000000000000000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
+ 24: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 25: 0000000000000000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc
--- /dev/null 2019-07-02 08:01:33.386842704 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-shared.d 2019-07-02 17:34:45.635006622 +0100
@@ -0,0 +1,67 @@
+#source: variant_pcs-1.s
+#source: variant_pcs-2.s
+#ld: -shared --hash-style=sysv -T variant_pcs.ld
+#readelf: -rsW
+
+Relocation section '\.rela\.plt' at offset 0x11000 contains 12 entries:
+ Offset Info Type Symbol's Value Symbol's Name \+ Addend
+0000000000009020 0000000100000402 R_AARCH64_JUMP_SLOT 0000000000000000 f_base_global_default_undef \+ 0
+0000000000009028 0000000200000402 R_AARCH64_JUMP_SLOT 0000000000000000 f_spec_global_default_undef \+ 0
+0000000000009030 0000000400000402 R_AARCH64_JUMP_SLOT 0000000000008000 f_base_global_default_def \+ 0
+0000000000009038 0000000500000402 R_AARCH64_JUMP_SLOT 0000000000008000 f_spec_global_default_def \+ 0
+0000000000009040 0000000000000408 R_AARCH64_IRELATIVE 8000
+0000000000009048 0000000300000402 R_AARCH64_JUMP_SLOT f_spec_global_default_ifunc\(\) f_spec_global_default_ifunc \+ 0
+0000000000009050 0000000000000408 R_AARCH64_IRELATIVE 8000
+0000000000009058 0000000600000402 R_AARCH64_JUMP_SLOT f_base_global_default_ifunc\(\) f_base_global_default_ifunc \+ 0
+0000000000009060 0000000000000408 R_AARCH64_IRELATIVE 8038
+0000000000009068 0000000000000408 R_AARCH64_IRELATIVE 8000
+0000000000009070 0000000000000408 R_AARCH64_IRELATIVE 8000
+0000000000009078 0000000000000408 R_AARCH64_IRELATIVE 8038
+
+Symbol table '\.dynsym' contains 7 entries:
+ Num: Value Size Type Bind Vis Ndx Name
+ 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
+ 1: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
+ 2: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
+ 3: 0000000000008000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 4: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
+ 5: 0000000000008000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 6: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc
+
+Symbol table '\.symtab' contains 35 entries:
+ Num: Value Size Type Bind Vis Ndx Name
+ 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
+ 1: 0000000000008000 0 SECTION LOCAL DEFAULT 1
+ 2: 0000000000008070 0 SECTION LOCAL DEFAULT 2
+ 3: 0000000000009000 0 SECTION LOCAL DEFAULT 3
+ 4: 0000000000009080 0 SECTION LOCAL DEFAULT 4
+ 5: 0000000000011000 0 SECTION LOCAL DEFAULT 5
+ 6: 0000000000011120 0 SECTION LOCAL DEFAULT 6
+ 7: 00000000000111c8 0 SECTION LOCAL DEFAULT 7
+ 8: 0000000000011270 0 SECTION LOCAL DEFAULT 8
+ 9: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-1\.o
+ 10: 0000000000008000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local
+ 11: 0000000000008000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local_ifunc
+ 12: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_base_local_ifunc
+ 13: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_base_local
+ 14: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 \$x
+ 15: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-2\.o
+ 16: 0000000000008038 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2
+ 17: 0000000000008038 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2_ifunc
+ 18: 0000000000008038 0 IFUNC LOCAL DEFAULT 1 f_base_local2_ifunc
+ 19: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 f_base_local2
+ 20: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 \$x
+ 21: 0000000000000000 0 FILE LOCAL DEFAULT ABS
+ 22: 0000000000009080 0 OBJECT LOCAL DEFAULT ABS _DYNAMIC
+ 23: 0000000000008000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_hidden_def
+ 24: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_base_global_hidden_ifunc
+ 25: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_base_global_hidden_def
+ 26: 0000000000009000 0 OBJECT LOCAL DEFAULT ABS _GLOBAL_OFFSET_TABLE_
+ 27: 0000000000008000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_hidden_ifunc
+ 28: 0000000000008070 0 NOTYPE LOCAL DEFAULT 2 \$x
+ 29: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
+ 30: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
+ 31: 0000000000008000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 32: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
+ 33: 0000000000008000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 34: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc
--- binutils.orig/bfd/archive.c 2019-07-03 10:06:20.527408416 +0100
+++ binutils-2.32/bfd/archive.c 2019-07-03 10:06:57.887142988 +0100
@@ -1076,8 +1076,6 @@ do_slurp_coff_armap (bfd *abfd)
*stringend = 0;
for (i = 0; i < nsymz; i++)
{
- bfd_size_type len;
-
rawptr = raw_armap + i;
carsyms->file_offset = swap ((bfd_byte *) rawptr);
carsyms->name = stringbase;
diff -rup binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-now.d binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-now.d
--- binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-now.d 2019-07-03 10:06:20.012412075 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-now.d 2019-07-03 10:20:51.959203582 +0100
@@ -22,10 +22,10 @@ Symbol table '\.dynsym' contains 7 entri
Num: Value Size Type Bind Vis Ndx Name
0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
1: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
- 2: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
- 3: 0000000000008000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 2: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_spec_global_default_undef \[VARIANT_PCS\]
+ 3: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_spec_global_default_ifunc \[VARIANT_PCS\]
4: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
- 5: 0000000000008000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 5: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_spec_global_default_def \[VARIANT_PCS\]
6: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc
Symbol table '\.symtab' contains 35 entries:
@@ -40,28 +40,28 @@ Symbol table '\.symtab' contains 35 entr
7: 00000000000111c8 0 SECTION LOCAL DEFAULT 7
8: 0000000000011270 0 SECTION LOCAL DEFAULT 8
9: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-1\.o
- 10: 0000000000008000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local
- 11: 0000000000008000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local_ifunc
+ 10: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_spec_local \[VARIANT_PCS\]
+ 11: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_spec_local_ifunc \[VARIANT_PCS\]
12: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_base_local_ifunc
13: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_base_local
14: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 \$x
15: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-2\.o
- 16: 0000000000008038 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2
- 17: 0000000000008038 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2_ifunc
+ 16: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 f_spec_local2 \[VARIANT_PCS\]
+ 17: 0000000000008038 0 IFUNC LOCAL DEFAULT 1 f_spec_local2_ifunc \[VARIANT_PCS\]
18: 0000000000008038 0 IFUNC LOCAL DEFAULT 1 f_base_local2_ifunc
19: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 f_base_local2
20: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 \$x
21: 0000000000000000 0 FILE LOCAL DEFAULT ABS
22: 0000000000009080 0 OBJECT LOCAL DEFAULT ABS _DYNAMIC
- 23: 0000000000008000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_hidden_def
+ 23: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_spec_global_hidden_def \[VARIANT_PCS\]
24: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_base_global_hidden_ifunc
25: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_base_global_hidden_def
26: 0000000000009000 0 OBJECT LOCAL DEFAULT ABS _GLOBAL_OFFSET_TABLE_
- 27: 0000000000008000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_hidden_ifunc
+ 27: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_spec_global_hidden_ifunc \[VARIANT_PCS\]
28: 0000000000008070 0 NOTYPE LOCAL DEFAULT 2 \$x
29: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
- 30: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
- 31: 0000000000008000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 30: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_spec_global_default_undef \[VARIANT_PCS\]
+ 31: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_spec_global_default_ifunc \[VARIANT_PCS\]
32: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
- 33: 0000000000008000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 33: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_spec_global_default_def \[VARIANT_PCS\]
34: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc
diff -rup binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-r.d binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-r.d
--- binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-r.d 2019-07-03 10:06:20.012412075 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-r.d 2019-07-03 10:14:28.152933189 +0100
@@ -37,24 +37,24 @@ Symbol table '\.symtab' contains 26 entr
2: 0000000000000000 0 SECTION LOCAL DEFAULT 3
3: 0000000000000000 0 SECTION LOCAL DEFAULT 4
4: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-1\.o
- 5: 0000000000000000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local
- 6: 0000000000000000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local_ifunc
+ 5: 0000000000000000 0 NOTYPE LOCAL DEFAULT 1 f_spec_local \[VARIANT_PCS\]
+ 6: 0000000000000000 0 IFUNC LOCAL DEFAULT 1 f_spec_local_ifunc \[VARIANT_PCS\]
7: 0000000000000000 0 IFUNC LOCAL DEFAULT 1 f_base_local_ifunc
8: 0000000000000000 0 NOTYPE LOCAL DEFAULT 1 f_base_local
9: 0000000000000000 0 NOTYPE LOCAL DEFAULT 1 \$x
10: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-2\.o
- 11: 0000000000000038 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2
- 12: 0000000000000038 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2_ifunc
+ 11: 0000000000000038 0 NOTYPE LOCAL DEFAULT 1 f_spec_local2 \[VARIANT_PCS\]
+ 12: 0000000000000038 0 IFUNC LOCAL DEFAULT 1 f_spec_local2_ifunc \[VARIANT_PCS\]
13: 0000000000000038 0 IFUNC LOCAL DEFAULT 1 f_base_local2_ifunc
14: 0000000000000038 0 NOTYPE LOCAL DEFAULT 1 f_base_local2
15: 0000000000000038 0 NOTYPE LOCAL DEFAULT 1 \$x
16: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
- 17: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
- 18: 0000000000000000 0 NOTYPE GLOBAL HIDDEN \[VARIANT_PCS\] 1 f_spec_global_hidden_def
+ 17: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_spec_global_default_undef \[VARIANT_PCS\]
+ 18: 0000000000000000 0 NOTYPE GLOBAL HIDDEN 1 f_spec_global_hidden_def \[VARIANT_PCS\]
19: 0000000000000000 0 IFUNC GLOBAL HIDDEN 1 f_base_global_hidden_ifunc
- 20: 0000000000000000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 20: 0000000000000000 0 IFUNC GLOBAL DEFAULT 1 f_spec_global_default_ifunc \[VARIANT_PCS\]
21: 0000000000000000 0 NOTYPE GLOBAL HIDDEN 1 f_base_global_hidden_def
- 22: 0000000000000000 0 IFUNC GLOBAL HIDDEN \[VARIANT_PCS\] 1 f_spec_global_hidden_ifunc
+ 22: 0000000000000000 0 IFUNC GLOBAL HIDDEN 1 f_spec_global_hidden_ifunc \[VARIANT_PCS\]
23: 0000000000000000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
- 24: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 24: 0000000000000000 0 NOTYPE GLOBAL DEFAULT 1 f_spec_global_default_def \[VARIANT_PCS\]
25: 0000000000000000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc
diff -rup binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-shared.d binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-shared.d
--- binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-shared.d 2019-07-03 10:06:20.012412075 +0100
+++ binutils-2.32/ld/testsuite/ld-aarch64/variant_pcs-shared.d 2019-07-03 10:19:00.760994532 +0100
@@ -22,10 +22,10 @@ Symbol table '\.dynsym' contains 7 entri
Num: Value Size Type Bind Vis Ndx Name
0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
1: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
- 2: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
- 3: 0000000000008000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 2: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_spec_global_default_undef \[VARIANT_PCS\]
+ 3: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_spec_global_default_ifunc \[VARIANT_PCS\]
4: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
- 5: 0000000000008000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 5: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_spec_global_default_def \[VARIANT_PCS\]
6: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc
Symbol table '\.symtab' contains 35 entries:
@@ -40,28 +40,28 @@ Symbol table '\.symtab' contains 35 entr
7: 00000000000111c8 0 SECTION LOCAL DEFAULT 7
8: 0000000000011270 0 SECTION LOCAL DEFAULT 8
9: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-1\.o
- 10: 0000000000008000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local
- 11: 0000000000008000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local_ifunc
+ 10: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_spec_local \[VARIANT_PCS\]
+ 11: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_spec_local_ifunc \[VARIANT_PCS\]
12: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_base_local_ifunc
13: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_base_local
14: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 \$x
15: 0000000000000000 0 FILE LOCAL DEFAULT ABS .*variant_pcs-2\.o
- 16: 0000000000008038 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2
- 17: 0000000000008038 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_local2_ifunc
+ 16: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 f_spec_local2 \[VARIANT_PCS\]
+ 17: 0000000000008038 0 IFUNC LOCAL DEFAULT 1 f_spec_local2_ifunc \[VARIANT_PCS\]
18: 0000000000008038 0 IFUNC LOCAL DEFAULT 1 f_base_local2_ifunc
19: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 f_base_local2
20: 0000000000008038 0 NOTYPE LOCAL DEFAULT 1 \$x
21: 0000000000000000 0 FILE LOCAL DEFAULT ABS
22: 0000000000009080 0 OBJECT LOCAL DEFAULT ABS _DYNAMIC
- 23: 0000000000008000 0 NOTYPE LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_hidden_def
+ 23: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_spec_global_hidden_def \[VARIANT_PCS\]
24: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_base_global_hidden_ifunc
25: 0000000000008000 0 NOTYPE LOCAL DEFAULT 1 f_base_global_hidden_def
26: 0000000000009000 0 OBJECT LOCAL DEFAULT ABS _GLOBAL_OFFSET_TABLE_
- 27: 0000000000008000 0 IFUNC LOCAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_hidden_ifunc
+ 27: 0000000000008000 0 IFUNC LOCAL DEFAULT 1 f_spec_global_hidden_ifunc \[VARIANT_PCS\]
28: 0000000000008070 0 NOTYPE LOCAL DEFAULT 2 \$x
29: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_base_global_default_undef
- 30: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] UND f_spec_global_default_undef
- 31: 0000000000008000 0 IFUNC GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_ifunc
+ 30: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND f_spec_global_default_undef \[VARIANT_PCS\]
+ 31: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_spec_global_default_ifunc \[VARIANT_PCS\]
32: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_base_global_default_def
- 33: 0000000000008000 0 NOTYPE GLOBAL DEFAULT \[VARIANT_PCS\] 1 f_spec_global_default_def
+ 33: 0000000000008000 0 NOTYPE GLOBAL DEFAULT 1 f_spec_global_default_def \[VARIANT_PCS\]
34: 0000000000008000 0 IFUNC GLOBAL DEFAULT 1 f_base_global_default_ifunc

55
SOURCES/binutils-gas-build-note-relocs.patch Normal file
View File

@ -0,0 +1,55 @@
--- binutils.orig/gas/write.c 2019-07-01 16:23:28.133707500 +0100
+++ binutils-2.32/gas/write.c 2019-07-01 16:24:50.699130611 +0100
@@ -1891,7 +1891,8 @@ create_obj_attrs_section (void)
static void
create_note_reloc (segT sec,
symbolS * sym,
- bfd_size_type offset,
+ bfd_size_type note_offset,
+ bfd_size_type desc2_offset,
int reloc_type,
bfd_vma addend,
char * note)
@@ -1901,10 +1902,10 @@ create_note_reloc (segT sec,
reloc = XNEW (struct reloc_list);
/* We create a .b type reloc as resolve_reloc_expr_symbols() has already been called. */
- reloc->u.b.sec = sec;
- reloc->u.b.s = symbol_get_bfdsym (sym);
+ reloc->u.b.sec = sec;
+ reloc->u.b.s = symbol_get_bfdsym (sym);
reloc->u.b.r.sym_ptr_ptr = & reloc->u.b.s;
- reloc->u.b.r.address = offset;
+ reloc->u.b.r.address = note_offset + desc2_offset;
reloc->u.b.r.addend = addend;
reloc->u.b.r.howto = bfd_reloc_type_lookup (stdoutput, reloc_type);
@@ -1929,12 +1930,12 @@ create_note_reloc (segT sec,
if (target_big_endian)
{
if (bfd_arch_bits_per_address (stdoutput) <= 32)
- note[offset + 3] = addend;
+ note[desc2_offset + 3] = addend;
else
- note[offset + 7] = addend;
+ note[desc2_offset + 7] = addend;
}
else
- note[offset] = addend;
+ note[desc2_offset] = addend;
}
}
@@ -2037,10 +2038,10 @@ maybe_generate_build_notes (void)
memcpy (note + 12, "GA$3a1", 8);
/* Create a relocation to install the start address of the note... */
- create_note_reloc (sec, sym, total_size + 20, desc_reloc, 0, note);
+ create_note_reloc (sec, sym, total_size, 20, desc_reloc, 0, note);
/* ...and another one to install the end address. */
- create_note_reloc (sec, sym, total_size + desc2_offset, desc_reloc,
+ create_note_reloc (sec, sym, total_size, desc2_offset, desc_reloc,
bfd_get_section_size (bsym->section),
note);

36
SOURCES/binutils-gold-mismatched-section-flags.patch Normal file
View File

@ -0,0 +1,36 @@
diff -rup binutils.orig/gold/layout.cc binutils-2.32/gold/layout.cc
--- binutils.orig/gold/layout.cc 2019-06-24 14:37:36.013086899 +0100
+++ binutils-2.32/gold/layout.cc 2019-06-24 14:41:40.054517479 +0100
@@ -868,6 +868,7 @@ Layout::get_output_section(const char* n
&& (same_name->flags() & elfcpp::SHF_TLS) == 0)
os = same_name;
}
+#if 0 /* BZ 1722715, PR 17556. */
else if ((flags & elfcpp::SHF_TLS) == 0)
{
elfcpp::Elf_Xword zero_flags = 0;
@@ -878,6 +879,7 @@ Layout::get_output_section(const char* n
if (p != this->section_name_map_.end())
os = p->second;
}
+#endif
}
if (os == NULL)
diff -rup binutils.orig/gold/object.cc binutils-2.32/gold/object.cc
--- binutils.orig/gold/object.cc 2019-06-24 14:37:36.012086906 +0100
+++ binutils-2.32/gold/object.cc 2019-06-24 14:39:59.287165501 +0100
@@ -1644,6 +1644,13 @@ Sized_relobj_file<size, big_endian>::do_
omit[i] = true;
}
+ // Skip empty sections without flags.
+ if (!(shdr.get_sh_flags() & ~elfcpp::SHF_GROUP)
+ && !shdr.get_sh_size())
+ {
+ omit[i] = true;
+ }
+
bool discard = omit[i];
if (!discard)
{

24
SOURCES/binutils-ignore-duplicate-FDE-entries.patch Normal file
View File

@ -0,0 +1,24 @@
--- binutils-2.32.orig/bfd/elf-eh-frame.c 2019-06-26 07:05:43.839194746 -0400
+++ binutils-2.32/bfd/elf-eh-frame.c 2019-06-26 07:32:37.124219479 -0400
@@ -2478,11 +2478,16 @@ write_dwarf_eh_frame_hdr (bfd *abfd, str
!= sec->output_section->vma + val))
overflow = TRUE;
bfd_put_32 (abfd, val, contents + EH_FRAME_HDR_SIZE + i * 8 + 8);
- if (i != 0
- && (hdr_info->u.dwarf.array[i].initial_loc
- < (hdr_info->u.dwarf.array[i - 1].initial_loc
- + hdr_info->u.dwarf.array[i - 1].range)))
- overlap = TRUE;
+ if (i != 0)
+ {
+ struct eh_frame_array_ent * this_entry = hdr_info->u.dwarf.array + i;
+ struct eh_frame_array_ent * prev_entry = hdr_info->u.dwarf.array + (i - 1);
+
+ if (this_entry->initial_loc < prev_entry->initial_loc + prev_entry->range
+ && (this_entry->initial_loc != prev_entry->initial_loc
+ || this_entry->range != prev_entry->range))
+ overlap = TRUE;
+ }
}
if (overflow)
_bfd_error_handler (_(".eh_frame_hdr entry overflow"));

19
SOURCES/binutils-no-builder-comment-in-bfd-stdint.patch Normal file
View File

@ -0,0 +1,19 @@
--- binutils.orig/bfd/configure 2019-06-24 14:37:35.984087086 +0100
+++ binutils-2.32/bfd/configure 2019-06-24 17:32:52.515541752 +0100
@@ -18865,11 +18865,11 @@ _LT_EOF
esac
done ;;
"bfd_stdint.h":C)
-if test "$GCC" = yes; then
- echo "/* generated for " `$CC --version | sed 1q` "*/" > tmp-stdint.h
-else
- echo "/* generated for $CC */" > tmp-stdint.h
-fi
+
+
+
+
+
sed 's/^ *//' >> tmp-stdint.h <<EOF

28
SOURCES/binutils-objcopy-version-note.patch Normal file
View File

@ -0,0 +1,28 @@
--- binutils.orig/binutils/objcopy.c 2019-08-06 09:42:51.065854915 +0100
+++ binutils-2.30/binutils/objcopy.c 2019-08-06 09:47:36.293974283 +0100
@@ -2161,12 +2161,10 @@ merge_gnu_build_notes (bfd * abfd, asect
attribute_type_byte = version_1_seen ? 1 : 3;
val_start = attribute_type_byte + 1;
- /* The first note should be the first version note. */
- if (pnotes[0].note.namedata[attribute_type_byte] != GNU_BUILD_ATTRIBUTE_VERSION)
- {
- err = _("bad GNU build attribute notes: first note not version note");
- goto done;
- }
+ /* We used to require that the first note be a version note,
+ but this is no longer enforced. Due to the problems with
+ linking sections with the same name (eg .gnu.build.note.hot)
+ we cannot guarantee that the first note will be a version note. */
/* Now merge the notes. The rules are:
1. Preserve the ordering of the notes.
@@ -2184,7 +2182,7 @@ merge_gnu_build_notes (bfd * abfd, asect
description field of the note must be changed to contain the starting
address to which it refers.
6. Notes with the same start and end address can be deleted. */
- for (pnote = pnotes + 1; pnote < pnotes_end; pnote ++)
+ for (pnote = pnotes; pnote < pnotes_end; pnote ++)
{
int note_type;
objcopy_internal_note * back;

10
SOURCES/binutils-remove-DUP-FUNXC-debug-fprintf.patch Normal file
View File

@ -0,0 +1,10 @@
--- binutils.orig/binutils/objcopy.c 2019-08-05 13:14:52.037496277 +0100
+++ binutils-2.32/binutils/objcopy.c 2019-08-05 13:14:58.491455624 +0100
@@ -2225,7 +2225,6 @@ merge_gnu_build_notes (bfd * abfd, asect
&& back->note.namesz == pnote->note.namesz
&& memcmp (back->note.namedata, pnote->note.namedata, pnote->note.namesz) == 0)
{
- fprintf (stderr, "DUP FUNXC\n");
duplicate_found = TRUE;
pnote->note.type = 0;
break;

355
SOURCES/binutils-s390x-arch13-descriptions.patch Normal file
View File

@ -0,0 +1,355 @@
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-arch13.d binutils-2.30/gas/testsuite/gas/s390/zarch-arch13.d
--- binutils.orig/gas/testsuite/gas/s390/zarch-arch13.d 2019-06-18 13:41:27.796052644 +0100
+++ binutils-2.30/gas/testsuite/gas/s390/zarch-arch13.d 2019-06-18 13:48:01.504295109 +0100
@@ -61,27 +61,27 @@ Disassembly of section .text:
.*: b9 e3 bd 69 [ ]*selgrnh %r6,%r9,%r11
.*: b9 e3 bd 69 [ ]*selgrnh %r6,%r9,%r11
.*: b9 e3 be 69 [ ]*selgrno %r6,%r9,%r11
-.*: b9 c0 bd 69 [ ]*selhhhrnh %r6,%r9,%r11
-.*: b9 c0 b1 69 [ ]*selhhhro %r6,%r9,%r11
-.*: b9 c0 b2 69 [ ]*selhhhrh %r6,%r9,%r11
-.*: b9 c0 b2 69 [ ]*selhhhrh %r6,%r9,%r11
-.*: b9 c0 b3 69 [ ]*selhhhrnle %r6,%r9,%r11
-.*: b9 c0 b4 69 [ ]*selhhhrl %r6,%r9,%r11
-.*: b9 c0 b4 69 [ ]*selhhhrl %r6,%r9,%r11
-.*: b9 c0 b5 69 [ ]*selhhhrnhe %r6,%r9,%r11
-.*: b9 c0 b6 69 [ ]*selhhhrlh %r6,%r9,%r11
-.*: b9 c0 b7 69 [ ]*selhhhrne %r6,%r9,%r11
-.*: b9 c0 b7 69 [ ]*selhhhrne %r6,%r9,%r11
-.*: b9 c0 b8 69 [ ]*selhhhre %r6,%r9,%r11
-.*: b9 c0 b8 69 [ ]*selhhhre %r6,%r9,%r11
-.*: b9 c0 b9 69 [ ]*selhhhrnlh %r6,%r9,%r11
-.*: b9 c0 ba 69 [ ]*selhhhrhe %r6,%r9,%r11
-.*: b9 c0 bb 69 [ ]*selhhhrnl %r6,%r9,%r11
-.*: b9 c0 bb 69 [ ]*selhhhrnl %r6,%r9,%r11
-.*: b9 c0 bc 69 [ ]*selhhhrle %r6,%r9,%r11
-.*: b9 c0 bd 69 [ ]*selhhhrnh %r6,%r9,%r11
-.*: b9 c0 bd 69 [ ]*selhhhrnh %r6,%r9,%r11
-.*: b9 c0 be 69 [ ]*selhhhrno %r6,%r9,%r11
+.*: b9 c0 bd 69 [ ]*selfhrnh %r6,%r9,%r11
+.*: b9 c0 b1 69 [ ]*selfhro %r6,%r9,%r11
+.*: b9 c0 b2 69 [ ]*selfhrh %r6,%r9,%r11
+.*: b9 c0 b2 69 [ ]*selfhrh %r6,%r9,%r11
+.*: b9 c0 b3 69 [ ]*selfhrnle %r6,%r9,%r11
+.*: b9 c0 b4 69 [ ]*selfhrl %r6,%r9,%r11
+.*: b9 c0 b4 69 [ ]*selfhrl %r6,%r9,%r11
+.*: b9 c0 b5 69 [ ]*selfhrnhe %r6,%r9,%r11
+.*: b9 c0 b6 69 [ ]*selfhrlh %r6,%r9,%r11
+.*: b9 c0 b7 69 [ ]*selfhrne %r6,%r9,%r11
+.*: b9 c0 b7 69 [ ]*selfhrne %r6,%r9,%r11
+.*: b9 c0 b8 69 [ ]*selfhre %r6,%r9,%r11
+.*: b9 c0 b8 69 [ ]*selfhre %r6,%r9,%r11
+.*: b9 c0 b9 69 [ ]*selfhrnlh %r6,%r9,%r11
+.*: b9 c0 ba 69 [ ]*selfhrhe %r6,%r9,%r11
+.*: b9 c0 bb 69 [ ]*selfhrnl %r6,%r9,%r11
+.*: b9 c0 bb 69 [ ]*selfhrnl %r6,%r9,%r11
+.*: b9 c0 bc 69 [ ]*selfhrle %r6,%r9,%r11
+.*: b9 c0 bd 69 [ ]*selfhrnh %r6,%r9,%r11
+.*: b9 c0 bd 69 [ ]*selfhrnh %r6,%r9,%r11
+.*: b9 c0 be 69 [ ]*selfhrno %r6,%r9,%r11
.*: e6 f6 9f a0 d0 06 [ ]*vlbr %v15,4000\(%r6,%r9\),13
.*: e6 f6 9f a0 10 06 [ ]*vlbrh %v15,4000\(%r6,%r9\)
.*: e6 f6 9f a0 20 06 [ ]*vlbrf %v15,4000\(%r6,%r9\)
@@ -130,11 +130,8 @@ Disassembly of section .text:
.*: e7 f1 42 00 87 8b [ ]*vstrsf %v15,%v17,%v20,%v24
.*: e7 f1 42 d0 87 8b [ ]*vstrsf %v15,%v17,%v20,%v24,13
.*: e7 f1 40 20 87 8b [ ]*vstrszb %v15,%v17,%v20,%v24
-.*: e7 f1 40 f0 87 8b [ ]*vstrszb %v15,%v17,%v20,%v24,13
.*: e7 f1 41 20 87 8b [ ]*vstrszh %v15,%v17,%v20,%v24
-.*: e7 f1 41 f0 87 8b [ ]*vstrszh %v15,%v17,%v20,%v24,13
.*: e7 f1 42 20 87 8b [ ]*vstrszf %v15,%v17,%v20,%v24
-.*: e7 f1 42 f0 87 8b [ ]*vstrszf %v15,%v17,%v20,%v24,13
.*: e7 f1 00 bc d4 c3 [ ]*vcfps %v15,%v17,13,12,11
.*: e7 f1 00 cd 24 c3 [ ]*wcefb %v15,%v17,5,12
.*: e7 f1 00 cd 24 c3 [ ]*wcefb %v15,%v17,5,12
@@ -154,3 +151,4 @@ Disassembly of section .text:
.*: e6 6f 00 d0 00 52 [ ]*vcvbg %r6,%v15,13
.*: e6 6f 00 dc 00 52 [ ]*vcvbg %r6,%v15,13,12
.*: b9 3a 00 69 [ ]*kdsa %r6,%r9
+.*: 07 07 [ ]*nopr %r7
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-arch13.s binutils-2.30/gas/testsuite/gas/s390/zarch-arch13.s
--- binutils.orig/gas/testsuite/gas/s390/zarch-arch13.s 2019-06-18 13:41:27.794052658 +0100
+++ binutils-2.30/gas/testsuite/gas/s390/zarch-arch13.s 2019-06-18 13:48:01.504295109 +0100
@@ -55,27 +55,27 @@ foo:
selgrnh %r6,%r9,%r11
selgrnp %r6,%r9,%r11
selgrno %r6,%r9,%r11
- selhhhr %r6,%r9,%r11,13
- selhhhro %r6,%r9,%r11
- selhhhrh %r6,%r9,%r11
- selhhhrp %r6,%r9,%r11
- selhhhrnle %r6,%r9,%r11
- selhhhrl %r6,%r9,%r11
- selhhhrm %r6,%r9,%r11
- selhhhrnhe %r6,%r9,%r11
- selhhhrlh %r6,%r9,%r11
- selhhhrne %r6,%r9,%r11
- selhhhrnz %r6,%r9,%r11
- selhhhre %r6,%r9,%r11
- selhhhrz %r6,%r9,%r11
- selhhhrnlh %r6,%r9,%r11
- selhhhrhe %r6,%r9,%r11
- selhhhrnl %r6,%r9,%r11
- selhhhrnm %r6,%r9,%r11
- selhhhrle %r6,%r9,%r11
- selhhhrnh %r6,%r9,%r11
- selhhhrnp %r6,%r9,%r11
- selhhhrno %r6,%r9,%r11
+ selfhr %r6,%r9,%r11,13
+ selfhro %r6,%r9,%r11
+ selfhrh %r6,%r9,%r11
+ selfhrp %r6,%r9,%r11
+ selfhrnle %r6,%r9,%r11
+ selfhrl %r6,%r9,%r11
+ selfhrm %r6,%r9,%r11
+ selfhrnhe %r6,%r9,%r11
+ selfhrlh %r6,%r9,%r11
+ selfhrne %r6,%r9,%r11
+ selfhrnz %r6,%r9,%r11
+ selfhre %r6,%r9,%r11
+ selfhrz %r6,%r9,%r11
+ selfhrnlh %r6,%r9,%r11
+ selfhrhe %r6,%r9,%r11
+ selfhrnl %r6,%r9,%r11
+ selfhrnm %r6,%r9,%r11
+ selfhrle %r6,%r9,%r11
+ selfhrnh %r6,%r9,%r11
+ selfhrnp %r6,%r9,%r11
+ selfhrno %r6,%r9,%r11
vlbr %v15,4000(%r6,%r9),13
vlbrh %v15,4000(%r6,%r9)
vlbrf %v15,4000(%r6,%r9)
@@ -124,11 +124,8 @@ foo:
vstrsf %v15,%v17,%v20,%v24
vstrsf %v15,%v17,%v20,%v24,13
vstrszb %v15,%v17,%v20,%v24
- vstrszb %v15,%v17,%v20,%v24,13
vstrszh %v15,%v17,%v20,%v24
- vstrszh %v15,%v17,%v20,%v24,13
vstrszf %v15,%v17,%v20,%v24
- vstrszf %v15,%v17,%v20,%v24,13
vcfps %v15,%v17,13,12,11
vcefb %v15,%v17,13,12
wcefb %v15,%v17,13,12
diff -rup binutils.orig/opcodes/s390-opc.txt binutils-2.30/opcodes/s390-opc.txt
--- binutils.orig/opcodes/s390-opc.txt 2019-06-18 13:41:27.578054171 +0100
+++ binutils-2.30/opcodes/s390-opc.txt 2019-06-18 13:48:01.505295102 +0100
@@ -1889,106 +1889,120 @@ e70000000036 vlm VRS_VVRDU "vector load
e7000000000e vst VRX_VRRDU "vector store" arch12 zarch optparm
e7000000003e vstm VRS_VVRDU "vector store multiple" arch12 zarch optparm
+
# arch13 instructions
-b9f5 ncrk RRF_R0RR2 " " arch13 zarch
-b9e5 ncgrk RRF_R0RR2 " " arch13 zarch
-e50a mvcrl SSE_RDRD " " arch13 zarch
-b974 nnrk RRF_R0RR2 " " arch13 zarch
-b964 nngrk RRF_R0RR2 " " arch13 zarch
-b976 nork RRF_R0RR2 " " arch13 zarch
-b966 nogrk RRF_R0RR2 " " arch13 zarch
-b977 nxrk RRF_R0RR2 " " arch13 zarch
-b967 nxgrk RRF_R0RR2 " " arch13 zarch
-b975 ocrk RRF_R0RR2 " " arch13 zarch
-b965 ocgrk RRF_R0RR2 " " arch13 zarch
-b9e1 popcnt RRF_U0RR " " arch13 zarch optparm
-b9f0 selr RRF_RURR " " arch13 zarch
-b9f00000 selr*20 RRF_R0RR3 " " arch13 zarch
-b9e3 selgr RRF_RURR " " arch13 zarch
-b9e30000 selgr*20 RRF_R0RR3 " " arch13 zarch
-b9c0 selhhhr RRF_RURR " " arch13 zarch
-b9c00000 selhhhr*20 RRF_R0RR3 " " arch13 zarch
-
-e60000000006 vlbr VRX_VRRDU " " arch13 zarch
-e60000001006 vlbrh VRX_VRRD " " arch13 zarch
-e60000002006 vlbrf VRX_VRRD " " arch13 zarch
-e60000003006 vlbrg VRX_VRRD " " arch13 zarch
-e60000004006 vlbrq VRX_VRRD " " arch13 zarch
-
-e60000000007 vler VRX_VRRDU " " arch13 zarch
-e60000001007 vlerh VRX_VRRD " " arch13 zarch
-e60000002007 vlerf VRX_VRRD " " arch13 zarch
-e60000003007 vlerg VRX_VRRD " " arch13 zarch
-
-e60000000004 vllebrz VRX_VRRDU " " arch13 zarch
-e60000001004 vllebrzh VRX_VRRD " " arch13 zarch
-e60000002004 vllebrzf VRX_VRRD " " arch13 zarch
-e60000003004 ldrv VRX_VRRD " " arch13 zarch
-e60000003004 vllebrzg VRX_VRRD " " arch13 zarch
-e60000006004 lerv VRX_VRRD " " arch13 zarch
-e60000006004 vllebrze VRX_VRRD " " arch13 zarch
-
-e60000000001 vlebrh VRX_VRRDU " " arch13 zarch
-e60000000003 vlebrf VRX_VRRDU " " arch13 zarch
-e60000000002 vlebrg VRX_VRRDU " " arch13 zarch
-
-e60000000005 vlbrrep VRX_VRRDU " " arch13 zarch
-e60000001005 vlbrreph VRX_VRRD " " arch13 zarch
-e60000002005 vlbrrepf VRX_VRRD " " arch13 zarch
-e60000003005 vlbrrepg VRX_VRRD " " arch13 zarch
-
-e6000000000e vstbr VRX_VRRDU " " arch13 zarch
-e6000000100e vstbrh VRX_VRRD " " arch13 zarch
-e6000000200e vstbrf VRX_VRRD " " arch13 zarch
-e6000000300e vstbrg VRX_VRRD " " arch13 zarch
-e6000000400e vstbrq VRX_VRRD " " arch13 zarch
-
-e6000000000f vster VRX_VRRDU " " arch13 zarch
-e6000000100f vsterh VRX_VRRD " " arch13 zarch
-e6000000200f vsterf VRX_VRRD " " arch13 zarch
-e6000000300f vsterg VRX_VRRD " " arch13 zarch
-
-e60000000009 vstebrh VRX_VRRDU " " arch13 zarch
-e6000000000b vstebrf VRX_VRRDU " " arch13 zarch
-e6000000000b sterv VRX_VRRD " " arch13 zarch
-e6000000000a vstebrg VRX_VRRDU " " arch13 zarch
-e6000000000a stdrv VRX_VRRD " " arch13 zarch
-
-e70000000086 vsld VRI_VVV0U " " arch13 zarch
-e70000000087 vsrd VRI_VVV0U " " arch13 zarch
-
-e7000000008b vstrs VRR_VVVUU0V " " arch13 zarch optparm
-
-e7000000008b vstrsb VRR_VVVU0VB " " arch13 zarch optparm
-e7000100008b vstrsh VRR_VVVU0VB " " arch13 zarch optparm
-e7000200008b vstrsf VRR_VVVU0VB " " arch13 zarch optparm
-
-e7000020008b vstrszb VRR_VVVU0VB2 " " arch13 zarch optparm
-e7000120008b vstrszh VRR_VVVU0VB2 " " arch13 zarch optparm
-e7000220008b vstrszf VRR_VVVU0VB2 " " arch13 zarch optparm
-
-e700000000c3 vcfps VRR_VV0UUU " " arch13 zarch
-e700000020c3 vcefb VRR_VV0UU " " arch13 zarch
-e700000820c3 wcefb VRR_VV0UU8 " " arch13 zarch
-
-e700000000c1 vcfpl VRR_VV0UUU " " arch13 zarch
-e700000020c1 vcelfb VRR_VV0UU " " arch13 zarch
-e700000820c1 wcelfb VRR_VV0UU8 " " arch13 zarch
-
-e700000000c2 vcsfp VRR_VV0UUU " " arch13 zarch
-e700000020c2 vcfeb VRR_VV0UU " " arch13 zarch
-e700000820c2 wcfeb VRR_VV0UU8 " " arch13 zarch
-
-e700000000c0 vclfp VRR_VV0UUU " " arch13 zarch
-e700000020c0 vclfeb VRR_VV0UU " " arch13 zarch
-e700000820c0 wclfeb VRR_VV0UU8 " " arch13 zarch
-b939 dfltcc RRF_R0RR2 " " arch13 zarch
+# Miscellaneous Instruction Extensions Facility 2
+
+b9f5 ncrk RRF_R0RR2 "and with complement 32 bit" arch13 zarch
+b9e5 ncgrk RRF_R0RR2 "and with complement 64 bit" arch13 zarch
+e50a mvcrl SSE_RDRD "move right to left" arch13 zarch
+b974 nnrk RRF_R0RR2 "nand 32 bit" arch13 zarch
+b964 nngrk RRF_R0RR2 "nand 64 bit" arch13 zarch
+b976 nork RRF_R0RR2 "nor 32 bit" arch13 zarch
+b966 nogrk RRF_R0RR2 "nor 64 bit" arch13 zarch
+b977 nxrk RRF_R0RR2 "not exclusive or 32 bit" arch13 zarch
+b967 nxgrk RRF_R0RR2 "not exclusive or 64 bit" arch13 zarch
+b975 ocrk RRF_R0RR2 "or with complement 32 bit" arch13 zarch
+b965 ocgrk RRF_R0RR2 "or with complement 64 bit" arch13 zarch
+b9e1 popcnt RRF_U0RR "population count arch13" arch13 zarch optparm
+b9f0 selr RRF_RURR "select 32 bit" arch13 zarch
+b9f00000 selr*20 RRF_R0RR3 "select 32 bit" arch13 zarch
+b9e3 selgr RRF_RURR "select 64 bit" arch13 zarch
+b9e30000 selgr*20 RRF_R0RR3 "select 64 bit" arch13 zarch
+b9c0 selfhr RRF_RURR "select high" arch13 zarch
+b9c00000 selfhr*20 RRF_R0RR3 "select high" arch13 zarch
+
+# Vector Enhancements Facility 2
+
+e60000000006 vlbr VRX_VRRDU "vector load byte reversed elements" arch13 zarch
+e60000001006 vlbrh VRX_VRRD "vector load byte reversed halfword elements" arch13 zarch
+e60000002006 vlbrf VRX_VRRD "vector load byte reversed word elements" arch13 zarch
+e60000003006 vlbrg VRX_VRRD "vector load byte reversed doubleword elements" arch13 zarch
+e60000004006 vlbrq VRX_VRRD "vector load byte reversed quadword elements" arch13 zarch
+
+e60000000007 vler VRX_VRRDU "vector load elements reversed" arch13 zarch
+e60000001007 vlerh VRX_VRRD "vector load halfword elements reversed" arch13 zarch
+e60000002007 vlerf VRX_VRRD "vector load word elements reversed" arch13 zarch
+e60000003007 vlerg VRX_VRRD "vector load doubleword elements reversed" arch13 zarch
+
+e60000000004 vllebrz VRX_VRRDU "vector load byte reversed element and zero" arch13 zarch
+e60000001004 vllebrzh VRX_VRRD "vector load byte reversed halfword element and zero" arch13 zarch
+e60000002004 vllebrzf VRX_VRRD "vector load byte reversed word element and zero" arch13 zarch
+e60000003004 ldrv VRX_VRRD "load byte reversed doubleword" arch13 zarch
+e60000003004 vllebrzg VRX_VRRD "vector load byte reversed doubleword element and zero" arch13 zarch
+e60000006004 lerv VRX_VRRD "load byte reversed word" arch13 zarch
+e60000006004 vllebrze VRX_VRRD "vector load byte reversed word element left-aligned and zero" arch13 zarch
+
+e60000000001 vlebrh VRX_VRRDU "vector load byte reversed halfword element" arch13 zarch
+e60000000003 vlebrf VRX_VRRDU "vector load byte reversed word element" arch13 zarch
+e60000000002 vlebrg VRX_VRRDU "vector load byte reversed doubleword element" arch13 zarch
+
+e60000000005 vlbrrep VRX_VRRDU "vector load byte reversed element and replicate" arch13 zarch
+e60000001005 vlbrreph VRX_VRRD "vector load byte reversed halfword element and replicate" arch13 zarch
+e60000002005 vlbrrepf VRX_VRRD "vector load byte reversed word element and replicate" arch13 zarch
+e60000003005 vlbrrepg VRX_VRRD "vector load byte reversed doubleword element and replicate" arch13 zarch
+
+e6000000000e vstbr VRX_VRRDU "vector store byte reversed elements" arch13 zarch
+e6000000100e vstbrh VRX_VRRD "vector store byte reversed halfword elements" arch13 zarch
+e6000000200e vstbrf VRX_VRRD "vector store byte reversed word elements" arch13 zarch
+e6000000300e vstbrg VRX_VRRD "vector store byte reversed doubleword elements" arch13 zarch
+e6000000400e vstbrq VRX_VRRD "vector store byte reversed quadword elements" arch13 zarch
+
+e6000000000f vster VRX_VRRDU "vector store elements reversed" arch13 zarch
+e6000000100f vsterh VRX_VRRD "vector store halfword elements reversed" arch13 zarch
+e6000000200f vsterf VRX_VRRD "vector store word elements reversed" arch13 zarch
+e6000000300f vsterg VRX_VRRD "vector store doubleword elements reversed" arch13 zarch
+
+e60000000009 vstebrh VRX_VRRDU "vector store byte reversed halfword element" arch13 zarch
+e6000000000b vstebrf VRX_VRRDU "vector store byte reversed word element" arch13 zarch
+e6000000000b sterv VRX_VRRD "store byte reversed word" arch13 zarch
+e6000000000a vstebrg VRX_VRRDU "vector store byte reversed doubleword element" arch13 zarch
+e6000000000a stdrv VRX_VRRD "store byte reversed doubleword" arch13 zarch
+
+e70000000086 vsld VRI_VVV0U "vector shift left double by bit" arch13 zarch
+e70000000087 vsrd VRI_VVV0U "vector shift right double by bit" arch13 zarch
+
+e7000000008b vstrs VRR_VVVUU0V "vector string search" arch13 zarch optparm
+
+e7000000008b vstrsb VRR_VVVU0VB "vector string search byte" arch13 zarch optparm
+e7000100008b vstrsh VRR_VVVU0VB "vector string search halfword" arch13 zarch optparm
+e7000200008b vstrsf VRR_VVVU0VB "vector string search word" arch13 zarch optparm
+
+e7000020008b vstrszb VRR_VVV0V "vector string search byte zero" arch13 zarch
+e7000120008b vstrszh VRR_VVV0V "vector string search halfword zero" arch13 zarch
+e7000220008b vstrszf VRR_VVV0V "vector string search word zero" arch13 zarch
+
+e700000000c3 vcfps VRR_VV0UUU "vector fp convert from fixed" arch13 zarch
+e700000020c3 vcefb VRR_VV0UU "vector fp convert from fixed 32 bit" arch13 zarch
+e700000820c3 wcefb VRR_VV0UU8 "vector fp convert from fixed 32 bit" arch13 zarch
+
+e700000000c1 vcfpl VRR_VV0UUU "vector fp convert from logical" arch13 zarch
+e700000020c1 vcelfb VRR_VV0UU "vector fp convert from logical 32 bit" arch13 zarch
+e700000820c1 wcelfb VRR_VV0UU8 "vector fp convert from logical 32 bit" arch13 zarch
+
+e700000000c2 vcsfp VRR_VV0UUU "vector fp convert to fixed" arch13 zarch
+e700000020c2 vcfeb VRR_VV0UU "vector fp convert to fixed 32 bit" arch13 zarch
+e700000820c2 wcfeb VRR_VV0UU8 "vector fp convert to fixed 32 bit" arch13 zarch
+
+e700000000c0 vclfp VRR_VV0UUU "vector fp convert to logical" arch13 zarch
+e700000020c0 vclfeb VRR_VV0UU "vector fp convert to logical 32 bit" arch13 zarch
+e700000820c0 wclfeb VRR_VV0UU8 "vector fp convert to logical 32 bit" arch13 zarch
+
+# Deflate conversion facility
+
+b939 dfltcc RRF_R0RR2 "deflate conversion call" arch13 zarch
+
+# Enhanced-Sort Facility
+
+b938 sortl RRE_RR "sort lists" arch13 zarch
+
+# Vector packed decimal enhancement facility
-b938 sortl RRE_RR " " arch13 zarch
+e60000000050 vcvb VRR_RV0UU "vector convert to binary 32 bit" arch13 zarch optparm
+e60000000052 vcvbg VRR_RV0UU "vector convert to binary 64 bit" arch13 zarch optparm
-e60000000050 vcvb VRR_RV0UU " " arch13 zarch optparm
-e60000000052 vcvbg VRR_RV0UU " " arch13 zarch optparm
+# Message Security Assist Extension 9
-b93a kdsa RRE_RR " " arch13 zarch
+b93a kdsa RRE_RR "compute digital signature authentication" arch13 zarch
Only in binutils-2.30/opcodes: s390-opc.txt.orig

3747
SOURCES/binutils-x86-JCC-Errata.patch Normal file
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File diff suppressed because it is too large Load Diff

147
SPECS/binutils.spec
View File

@ -1,3 +1,14 @@
%define __python /opt/rh/gcc-toolset-9/root/usr/bin/python3
%{?scl:%{?scl_package:%scl_package binutils}}
Summary: A GNU collection of binary utilities
Name: %{?scl_prefix}%{?cross}binutils%{?_with_debug:-debug}
Version: 2.32
Release: 17%{?dist}
License: GPLv3+
URL: https://sourceware.org/binutils
# Binutils SPEC file. Can be invoked with the following parameters:
# --define "binutils_target arm-linux-gnu" to create arm-linux-gnu-binutils.
@ -36,9 +47,6 @@
#----End of Configure Options------------------------------------------------
%define __python /opt/rh/gcc-toolset-9/root/usr/bin/python3
%{?scl:%{?scl_package:%scl_package binutils}}
# Default: Not bootstrapping.
%bcond_with bootstrap
# Default: Not debug
@ -69,13 +77,6 @@
#----------------------------------------------------------------------------
Summary: A GNU collection of binary utilities
Name: %{?scl_prefix}%{?cross}binutils%{?_with_debug:-debug}
Version: 2.32
Release: 5%{?dist}
License: GPLv3+
URL: https://sourceware.org/binutils
# Note - the Linux Kernel binutils releases are too unstable and contain
# too many controversial patches so we stick with the official FSF version
# instead.
@ -234,6 +235,71 @@ Patch23: binutils-ld-testsuite-fixes.patch
# Lifetime: Maybe fixed in 2.33.
Patch24: binutils-gold-8-byte-note-segments.patch
# Purpose: Add descriptions to the new s390x arch13 instructions
# Lifetime: 2.33
Patch25: binutils-s390x-arch13-descriptions.patch
# Purpose: Stop gold from aborting when input sections with the same name
# have different flags.
# Lifetime: 2.33 (probably)
Patch26: binutils-gold-mismatched-section-flags.patch
# Purpose: Remove the builder id comment from bfd-stdint.h. It causes
# conflicts when both the i686 and x86_64 binutils devel rpms
# are installed, as the comments makes the file compare as
# being different.
# Lifetime: Permanent.
Patch27: binutils-no-builder-comment-in-bfd-stdint.patch
# Purpose: Correct licence strings rejected by PELC review.
# Lifetime: Permanent.
Patch28: binutils-PELC-licence-corrections.patch
# Purpose: Ignore duplicate FDE entries found in some AArch64 libraries.
# Lifetime: Permanent.
Patch29: binutils-ignore-duplicate-FDE-entries.patch
# Purpose: Corrcect a memory corruption when generating relocs for build
# notes in the assembler.
# Lifetime: Fixed in 2.33
Patch30: binutils-gas-build-note-relocs.patch
# Purpose: Support the generation of variant ABI functions in AArch64 binaries.
# Lifetime: Fixed in 2.33
Patch31: binutils-aarch64-STO_AARCH64_VARIANT_PCS.patch
# Purpose: Remove a debugging print statement left in the objcopy code.
# Lifetime: Fixed in 2.33
Patch32: binutils-remove-DUP-FUNXC-debug-fprintf.patch
# Purpose: Stop strip from complaining about build notes that do not start
# with a version note.
# Lifetime: Fixed in 2.33
Patch33: binutils-objcopy-version-note.patch
# Purpose: Add check to libiberty library in order to prevent an integer overflow in the gold linker.
# Lifetime: Fixed in 2.33
Patch34: binutils-CVE-2019-14250.patch
# Purpose: Add check to readelf in order to prevent an integer overflow.
# Lifetime: Fixed in 2.33
Patch35: binutils-CVE-2019-14444.patch
# Purpose: Fix a potential seg-fault in the BFD library when parsing
# pathalogical debug_info sections.
# Lifetime: Fixed in 2.34
Patch36: binutils-CVE-2019-17451.patch
# Purpose: Fix a memory exhaustion bug in the BFD library when parsing
# corrupt DWARF debug information.
# Lifetime: Fixed in 2.34
Patch37: binutils-CVE-2019-17450.patch
# Purpose: Add a feature to the x86/64 assembler to create
# workarounds for the Intel Jcc Erratum.
# Lifetime: Fixed in 2.34
Patch38: binutils-x86-JCC-Errata.patch
#----------------------------------------------------------------------------
Provides: bundled(libiberty)
@ -290,9 +356,11 @@ BuildRequires: findutils
%if %{with testsuite}
# relro_test.sh uses dc which is part of the bc rpm, hence its inclusion here.
BuildRequires: dejagnu, zlib-static, glibc-static, sharutils, bc
%if "%{build_gold}" == "both"
# The GOLD testsuite needs a static libc++
BuildRequires: libstdc++-static
%endif
%endif
Conflicts: gcc-c++ < 4.0.0
@ -381,6 +449,20 @@ using libelf instead of BFD.
%patch22 -p1
%patch23 -p1
%patch24 -p1
%patch25 -p1
%patch26 -p1
%patch27 -p1
%patch28 -p1
%patch29 -p1
%patch30 -p1
%patch31 -p1
%patch32 -p1
%patch33 -p1
%patch34 -p1
%patch35 -p1
%patch36 -p1
%patch37 -p1
%patch38 -p1
# We cannot run autotools as there is an exact requirement of autoconf-2.59.
# FIXME - this is no longer true. Maybe try reinstating autotool use ?
@ -721,7 +803,7 @@ fi
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/ld.info.gz
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/standards.info.gz
%endif # with docs
%endif
%endif # isnative
exit 0
@ -763,7 +845,7 @@ exit 0
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/ld.info.gz
/sbin/install-info --quiet --delete --info-dir=%{_infodir} %{_infodir}/standards.info.gz
fi
%endif
%endif # isnative
#----------------------------------------------------------------------------
@ -787,13 +869,13 @@ exit 0
%{_infodir}/ld.info.*
%{_infodir}/bfd.info.*
%{_infodir}/standards.info.*
%endif
%endif # with docs
%if %{enable_shared}
%{_libdir}/lib*.so
%exclude %{_libdir}/libbfd.so
%exclude %{_libdir}/libopcodes.so
%endif
%endif # enable_shared
%if %{isnative}
@ -816,6 +898,43 @@ exit 0
#----------------------------------------------------------------------------
%changelog
* Sun Dec 08 2019 Nick Clifton <nickc@redhat.com> - 2.32-17
- Fix a potential seg-fault in the BFD library when parsing pathalogical debug_info sections. (#1779255)
- Fix a potential memory exhaustion in the BFD library when parsing corrupt DWARF debug information.
- Backport H.J.Lu's patch to add a workaround for the JCC Errata to the assembler. (#1779417)
- Fix potential integer overflow in readelf. (#1740470)
- Fix potential integer overflow in GOLD. (#1739491)
* Tue Aug 06 2019 Nick Clifton <nickc@redhat.com> - 2.32-15
- Stop strip from complaining if the first build note is not a version note. (#1736114)
* Mon Aug 05 2019 Nick Clifton <nickc@redhat.com> - 2.32-14
- Remove debugging print statement in objcopy sources. (#1733868)
* Fri Jul 05 2019 Nick Clifton <nickc@redhat.com> - 2.32-13
- Define scl before Name.
* Tue Jul 02 2019 Nick Clifton <nickc@redhat.com> - 2.32-12
- Add support for AArch64 function calls that use a variant PCS.
* Mon Jul 01 2019 Nick Clifton <nickc@redhat.com> - 2.32-11
- Stop gas from triggering a seg-fault when creating relocs for build notes. (PR 24748)
* Tue Jun 25 2019 Nick Clifton <nickc@redhat.com> - 2.32-10
- Ignore duplicate FDE entries in AArch64 libraries. (#1709827)
* Tue Jun 25 2019 Nick Clifton <nickc@redhat.com> - 2.32-9
- Correct licences rejected by PELC review.
* Mon Jun 24 2019 Nick Clifton <nickc@redhat.com> - 2.32-8
- Remove the builder command from bfd-stdint.h.
* Mon Jun 24 2019 Nick Clifton <nickc@redhat.com> - 2.32-7
- Stop gold from aborting when it encounters input sections with the same name and different flags. (#1722715)
* Tue Jun 18 2019 Nick Clifton <nickc@redhat.com> - 2.32-6
- Add descriptions to the new s390x arch13 instructions. (#1690457)
* Wed Jun 12 2019 Nick Clifton <nickc@redhat.com> - 2.32-5
- Import patch to fix alignment of note segments created by GOLD. (#1614908)