872 lines
51 KiB
Diff
872 lines
51 KiB
Diff
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diff -rupN binutils.orig/opcodes/i386-dis.c binutils-2.41/opcodes/i386-dis.c
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--- binutils.orig/opcodes/i386-dis.c 2024-02-12 15:55:21.578572835 +0000
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+++ binutils-2.41/opcodes/i386-dis.c 2024-02-12 15:56:38.828623964 +0000
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@@ -8824,6 +8824,8 @@ get_valid_dis386 (const struct dis386 *d
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break;
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case USE_3BYTE_TABLE:
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+ if (ins->last_rex2_prefix >= 0)
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+ return &err_opcode;
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if (!fetch_code (ins->info, ins->codep + 2))
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return &err_opcode;
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vindex = *ins->codep++;
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@@ -9540,8 +9542,6 @@ print_insn (bfd_vma pc, disassemble_info
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/* REX2.M in rex2 prefix represents map0 or map1. */
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if (ins.last_rex2_prefix < 0 ? *ins.codep == 0x0f : (ins.rex2 & REX2_M))
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{
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- unsigned char threebyte;
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-
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if (!ins.rex2)
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{
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ins.codep++;
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@@ -9549,17 +9549,15 @@ print_insn (bfd_vma pc, disassemble_info
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goto fetch_error_out;
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}
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- threebyte = *ins.codep;
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- dp = &dis386_twobyte[threebyte];
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- ins.need_modrm = twobyte_has_modrm[threebyte];
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- ins.codep++;
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+ dp = &dis386_twobyte[*ins.codep];
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+ ins.need_modrm = twobyte_has_modrm[*ins.codep];
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}
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else
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{
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dp = &dis386[*ins.codep];
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ins.need_modrm = onebyte_has_modrm[*ins.codep];
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- ins.codep++;
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}
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+ ins.codep++;
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/* Save sizeflag for printing the extra ins.prefixes later before updating
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it for mnemonic and operand processing. The prefix names depend
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diff -rupN binutils.orig/opcodes/i386-opc.tbl binutils-2.41/opcodes/i386-opc.tbl
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--- binutils.orig/opcodes/i386-opc.tbl 2024-02-12 15:55:21.578572835 +0000
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+++ binutils-2.41/opcodes/i386-opc.tbl 2024-02-12 15:56:28.955616704 +0000
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@@ -1586,7 +1586,9 @@ vandnp<sd>, 0x<sd:ppfx>55, AVX, Modrm|Ve
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vandp<sd>, 0x<sd:ppfx>54, AVX, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
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vblendp<sd>, 0x660c | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
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vblendvp<sd>, 0x664a | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
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-vbroadcastf128, 0x661a, AVX, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
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+vbroadcastf128, 0x661a, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
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+// vbroadcastf32x4 in disguise (see vround{p,s}{s,d} comment)
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+vbroadcastf128, 0x661a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
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vbroadcastsd, 0x6619, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
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vbroadcastss, 0x6618, AVX, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM|RegYMM }
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vcmp<frel>p<sd>, 0x<sd:ppfx>c2/0x<frel:imm>, AVX, Modrm|<frel:comm>|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
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@@ -1614,7 +1616,9 @@ vdivp<sd>, 0x<sd:ppfx>5e, AVX, Modrm|Vex
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vdivs<sd>, 0x<sd:spfx>5e, AVX, Modrm|VexLIG|Space0F|VexVVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
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vdppd, 0x6641, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
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vdpps, 0x6640, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
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-vextractf128, 0x6619, AVX, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
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+vextractf128, 0x6619, AVX, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
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+// vextractf32x4 in disguise (see vround{p,s}{s,d} comment)
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+vextractf128, 0x6619, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
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vextractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexWIG|Disp8MemShift=2|NoSuf, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
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vextractps, 0x6617, x64&(AVX|AVX512F), RegMem|Vex128|EVex128|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, Reg64 }
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vhaddpd, 0x667c, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
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@@ -1622,6 +1626,8 @@ vhaddps, 0xf27c, AVX, Modrm|Vex|Space0F|
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vhsubpd, 0x667d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
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vhsubps, 0xf27d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
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vinsertf128, 0x6618, AVX, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
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+// vinsertf32x4 in disguise (see vround{p,s}{s,d} comment)
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+vinsertf128, 0x6618, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
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vinsertps, 0x6621, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
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vlddqu, 0xf2f0, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
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vldmxcsr, 0xae/2, AVX, Modrm|Vex128|Space0F|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex }
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@@ -1792,8 +1798,8 @@ vroundp<sd>, 0x6608 | <sd:opc>, AVX, Mod
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vrounds<sd>, 0x660a | <sd:opc>, AVX, Modrm|VexLIG|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
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// These are really clones of VRNDSCALE{P,S}{S,D}, with broadcast, masking, SAE,
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// 512-bit operand size, and register sources dropped.
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-vroundp<sd>, 0x6608 | <sd:opc>, APX_F, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
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-vrounds<sd>, 0x660a | <sd:opc>, APX_F, Modrm|EVexLIG|Space0F3A|VexVVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
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+vroundp<sd>, 0x6608 | <sd:opc>, APX_F&AVX512VL, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
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+vrounds<sd>, 0x660a | <sd:opc>, APX_F&AVX512F, Modrm|EVexLIG|Space0F3A|VexVVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
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vrsqrtps, 0x52, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
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vrsqrtss, 0xf352, AVX, Modrm|Vex=3|Space0F|VexVVVV|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
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vshufp<sd>, 0x<sd:ppfx>c6, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
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@@ -1828,7 +1834,9 @@ vpmovzxwq, 0x6634, AVX2|AVX512VL, Modrm|
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// New AVX2 instructions.
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-vbroadcasti128, 0x665A, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
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+vbroadcasti128, 0x665A, AVX2, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
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+// vbroadcasti32x4 in disguise (see vround{p,s}{s,d} comment)
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+vbroadcasti128, 0x665a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
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vbroadcastsd, 0x6619, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { RegXMM, RegYMM }
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vbroadcastss, 0x6618, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
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vpblendd, 0x6602, AVX2, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
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@@ -1840,8 +1848,12 @@ vpermd, 0x6636, AVX2|AVX512F, Modrm|Vex2
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vpermpd, 0x6601, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
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vpermps, 0x6616, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F38|VexVVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
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vpermq, 0x6600, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
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-vextracti128, 0x6639, AVX2, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
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+vextracti128, 0x6639, AVX2, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
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+// vextracti32x4 in disguise (see vround{p,s}{s,d} comment)
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+vextracti128, 0x6639, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
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vinserti128, 0x6638, AVX2, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
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+// vinserti32x4 in disguise (see vround{p,s}{s,d} comment)
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+vinserti128, 0x6638, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
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vpmaskmov<dq>, 0x668e, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { RegXMM|RegYMM, RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
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vpmaskmov<dq>, 0x668c, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
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vpsllv<dq>, 0x6647, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
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@@ -2115,12 +2127,12 @@ xcryptofb, 0xf30fa7e8, PadLock, NoSuf|Re
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xstore, 0xfa7c0, PadLock, NoSuf|RepPrefixOk, {}
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// Multy-precision Add Carry, rdseed instructions.
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-adcx, 0x6666, ADX&APX_F, C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
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+adcx, 0x6666, ADX&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
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adcx, 0x660f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
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-adcx, 0x6666, ADX&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
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-adox, 0xf366, ADX&APX_F, C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
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+adcx, 0x6666, ADX&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
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+adox, 0xf366, ADX&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
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adox, 0xf30f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
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-adox, 0xf366, ADX&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
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+adox, 0xf366, ADX&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
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rdseed, 0xfc7/7, RdSeed, Modrm|NoSuf, { Reg16|Reg32|Reg64 }
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// SMAP instructions.
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@@ -3098,11 +3110,11 @@ rdsspq, 0xf30f1e/1, SHSTK&x64, Modrm|NoS
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saveprevssp, 0xf30f01ea, SHSTK, NoSuf, {}
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rstorssp, 0xf30f01/5, SHSTK, Modrm|NoSuf, { Qword|Unspecified|BaseIndex }
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wrssd, 0x0f38f6, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
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-wrssd, 0x66, SHSTK&APX_F, Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
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+wrssd, 0x66, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
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wrssq, 0x0f38f6, SHSTK&x64, Modrm|NoSuf|Size64, { Reg64, Qword|Unspecified|BaseIndex }
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wrssq, 0x66, SHSTK&APX_F, Modrm|NoSuf|Size64|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
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wrussd, 0x660f38f5, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
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-wrussd, 0x6665, SHSTK&APX_F, Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
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+wrussd, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
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wrussq, 0x660f38f5, SHSTK&x64, Modrm|NoSuf, { Reg64, Qword|Unspecified|BaseIndex }
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wrussq, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
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setssbsy, 0xf30f01e8, SHSTK, NoSuf, {}
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@@ -3152,7 +3164,7 @@ cldemote, 0x0f1c/0, CLDEMOTE, Modrm|Anys
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// MOVDIR[I,64B] instructions.
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movdiri, 0xf38f9, MOVDIRI, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
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-movdiri, 0xf9, MOVDIRI&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
+movdiri, 0xf9, MOVDIRI&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
movdir64b, 0x660f38f8, MOVDIR64B, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
|
||
|
|
movdir64b, 0x66f8, MOVDIR64B&APX_F, Modrm|AddrPrefixOpReg|NoSuf|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 }
|
||
|
|
|
||
|
|
@@ -3459,13 +3471,13 @@ wrmsrlist, 0xf30f01c6, MSRLIST, NoSuf, {
|
||
|
|
// RAO-INT instructions.
|
||
|
|
|
||
|
|
aadd, 0xf38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
-aadd, 0xfc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
+aadd, 0xfc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
aand, 0x660f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
-aand, 0x66fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
+aand, 0x66fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
aor, 0xf20f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
-aor, 0xf2fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
+aor, 0xf2fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
axor, 0xf30f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
-axor, 0xf3fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
+axor, 0xf3fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||
|
|
|
||
|
|
// RAO-INT instructions end.
|
||
|
|
|
||
|
|
diff -rupN binutils.orig/opcodes/i386-tbl.h binutils-2.41/opcodes/i386-tbl.h
|
||
|
|
--- binutils.orig/opcodes/i386-tbl.h 2024-02-12 15:55:21.578572835 +0000
|
||
|
|
+++ binutils-2.41/opcodes/i386-tbl.h 2024-02-12 16:42:52.494835094 +0000
|
||
|
|
@@ -15372,6 +15372,16 @@ static const insn_template i386_optab[]
|
||
|
|
1, 0, 0, 0, 1, 0 } },
|
||
|
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 1, 0, 0, 0, 0 } } } },
|
||
|
|
+ { MN_vbroadcastf128, 0x1a, 2, SPACE_0F38, None,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||
|
|
+ 0 },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 1, 0, 0, 0, 1, 0 } },
|
||
|
|
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 1, 0, 0, 0, 0 } } } },
|
||
|
|
{ MN_vbroadcastsd, 0x19, 2, SPACE_0F38, None,
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||
|
|
@@ -20804,6 +20814,18 @@ static const insn_template i386_optab[]
|
||
|
|
0, 1, 0, 0, 0, 0 } },
|
||
|
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
1, 0, 0, 0, 1, 0 } } } },
|
||
|
|
+ { MN_vextractf128, 0x19, 3, SPACE_0F3A, None,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||
|
|
+ 0 },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 1, 0, 0, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 1, 0, 0, 0, 1, 0 } } } },
|
||
|
|
{ MN_vextractps, 0x17, 3, SPACE_0F3A, None,
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
|
||
|
|
@@ -20890,6 +20912,20 @@ static const insn_template i386_optab[]
|
||
|
|
0, 1, 0, 0, 0, 0 } },
|
||
|
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 1, 0, 0, 0, 0 } } } },
|
||
|
|
+ { MN_vinsertf128, 0x18, 4, SPACE_0F3A, None,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||
|
|
+ 0 },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 1, 0, 0, 0, 1, 0 } },
|
||
|
|
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 1, 0, 0, 0, 0 } },
|
||
|
|
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 1, 0, 0, 0, 0 } } } },
|
||
|
|
{ MN_vinsertps, 0x21, 4, SPACE_0F3A, None,
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||
|
|
@@ -25296,7 +25332,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0 } },
|
||
|
|
@@ -25320,7 +25356,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0 } },
|
||
|
|
@@ -25346,7 +25382,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0 } },
|
||
|
|
@@ -25374,7 +25410,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 1, 2, 1, 0, 0, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0 } },
|
||
|
|
@@ -25884,6 +25920,16 @@ static const insn_template i386_optab[]
|
||
|
|
1, 0, 0, 0, 1, 0 } },
|
||
|
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 1, 0, 0, 0, 0 } } } },
|
||
|
|
+ { MN_vbroadcasti128, 0x5a, 2, SPACE_0F38, None,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||
|
|
+ 0 },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 1, 0, 0, 0, 1, 0 } },
|
||
|
|
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 1, 0, 0, 0, 0 } } } },
|
||
|
|
{ MN_vpblendd, 0x02, 4, SPACE_0F3A, None,
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||
|
|
@@ -26106,6 +26152,18 @@ static const insn_template i386_optab[]
|
||
|
|
0, 1, 0, 0, 0, 0 } },
|
||
|
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
1, 0, 0, 0, 1, 0 } } } },
|
||
|
|
+ { MN_vextracti128, 0x39, 3, SPACE_0F3A, None,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||
|
|
+ 0 },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 1, 0, 0, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 1, 0, 0, 0, 1, 0 } } } },
|
||
|
|
{ MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||
|
|
@@ -26120,6 +26178,20 @@ static const insn_template i386_optab[]
|
||
|
|
0, 1, 0, 0, 0, 0 } },
|
||
|
|
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 1, 0, 0, 0, 0 } } } },
|
||
|
|
+ { MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||
|
|
+ 0 },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 0, 0, 0, 0, 0 } },
|
||
|
|
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 1, 0, 0, 0, 1, 0 } },
|
||
|
|
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 1, 0, 0, 0, 0 } },
|
||
|
|
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ 0, 1, 0, 0, 0, 0 } } } },
|
||
|
|
{ MN_vpmaskmovd, 0x8e, 3, SPACE_0F38, None,
|
||
|
|
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||
|
|
@@ -30933,7 +31005,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0 } } } },
|
||
|
|
{ MN_adcx, 0x66, 3, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 2, 0, 1, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -30955,7 +31027,7 @@ static const insn_template i386_optab[]
|
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{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||
|
|
0, 0, 0, 0, 0, 0 } } } },
|
||
|
|
{ MN_adcx, 0x66, 2, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -30965,7 +31037,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||
|
|
0, 0, 0, 0, 0, 0 } } } },
|
||
|
|
{ MN_adox, 0x66, 3, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 2, 0, 2, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -30987,7 +31059,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||
|
|
0, 0, 0, 0, 0, 0 } } } },
|
||
|
|
{ MN_adox, 0x66, 2, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -37497,7 +37569,7 @@ static const insn_template i386_optab[]
|
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|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 1, 0 } } } },
|
||
|
|
{ MN_wrssd, 0x66, 2, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -37537,7 +37609,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 1, 0 } } } },
|
||
|
|
{ MN_wrussd, 0x65, 2, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -37697,7 +37769,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||
|
|
0, 0, 0, 0, 1, 0 } } } },
|
||
|
|
{ MN_movdiri, 0xf9, 2, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 120, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -41093,7 +41165,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||
|
|
0, 0, 0, 0, 1, 0 } } } },
|
||
|
|
{ MN_aadd, 0xfc, 2, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -41113,7 +41185,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||
|
|
0, 0, 0, 0, 1, 0 } } } },
|
||
|
|
{ MN_aand, 0xfc, 2, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -41133,7 +41205,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||
|
|
0, 0, 0, 0, 1, 0 } } } },
|
||
|
|
{ MN_aor, 0xfc, 2, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0, 3, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -41153,7 +41225,7 @@ static const insn_template i386_optab[]
|
||
|
|
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||
|
|
0, 0, 0, 0, 1, 0 } } } },
|
||
|
|
{ MN_axor, 0xfc, 2, SPACE_EVEXMAP4, None,
|
||
|
|
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||
|
|
0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||
|
|
0 },
|
||
|
|
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||
|
|
@@ -41398,203 +41470,203 @@ static const i386_op_off_t i386_op_sets[
|
||
|
|
1540, 1541, 1542, 1544, 1546, 1548, 1550, 1552,
|
||
|
|
1554, 1556, 1558, 1560, 1562, 1564, 1566, 1568,
|
||
|
|
1570, 1572, 1574, 1576, 1578, 1579, 1580, 1582,
|
||
|
|
- 1584, 1586, 1588, 1589, 1590, 1591, 1592, 1593,
|
||
|
|
- 1596, 1598, 1600, 1602, 1604, 1606, 1608, 1610,
|
||
|
|
- 1612, 1614, 1616, 1618, 1620, 1622, 1624, 1626,
|
||
|
|
- 1628, 1630, 1632, 1634, 1636, 1638, 1640, 1642,
|
||
|
|
- 1644, 1646, 1648, 1650, 1652, 1654, 1656, 1658,
|
||
|
|
- 1660, 1662, 1664, 1666, 1668, 1670, 1672, 1674,
|
||
|
|
- 1676, 1678, 1680, 1682, 1684, 1686, 1688, 1690,
|
||
|
|
- 1692, 1694, 1696, 1698, 1700, 1702, 1704, 1706,
|
||
|
|
- 1708, 1710, 1712, 1714, 1716, 1718, 1720, 1722,
|
||
|
|
- 1724, 1726, 1728, 1730, 1732, 1734, 1736, 1738,
|
||
|
|
- 1740, 1742, 1744, 1746, 1748, 1750, 1752, 1754,
|
||
|
|
- 1756, 1758, 1760, 1762, 1764, 1766, 1768, 1770,
|
||
|
|
- 1772, 1774, 1776, 1778, 1780, 1782, 1784, 1786,
|
||
|
|
- 1788, 1790, 1792, 1794, 1796, 1798, 1800, 1802,
|
||
|
|
- 1804, 1806, 1808, 1810, 1812, 1814, 1816, 1818,
|
||
|
|
- 1820, 1822, 1824, 1826, 1828, 1830, 1832, 1834,
|
||
|
|
- 1836, 1838, 1840, 1842, 1844, 1846, 1848, 1850,
|
||
|
|
- 1852, 1854, 1856, 1858, 1860, 1862, 1864, 1866,
|
||
|
|
- 1868, 1870, 1872, 1874, 1876, 1878, 1880, 1882,
|
||
|
|
- 1884, 1886, 1888, 1890, 1892, 1894, 1896, 1898,
|
||
|
|
- 1900, 1902, 1904, 1906, 1908, 1910, 1912, 1914,
|
||
|
|
- 1916, 1918, 1920, 1922, 1924, 1926, 1928, 1930,
|
||
|
|
- 1932, 1934, 1936, 1938, 1940, 1942, 1944, 1946,
|
||
|
|
- 1948, 1950, 1952, 1954, 1956, 1958, 1960, 1962,
|
||
|
|
- 1964, 1966, 1968, 1970, 1972, 1974, 1976, 1978,
|
||
|
|
- 1983, 1985, 1990, 1992, 1994, 1999, 2001, 2003,
|
||
|
|
- 2005, 2010, 2012, 2014, 2016, 2020, 2026, 2028,
|
||
|
|
- 2033, 2035, 2037, 2039, 2041, 2043, 2045, 2047,
|
||
|
|
- 2049, 2051, 2052, 2053, 2054, 2056, 2057, 2058,
|
||
|
|
- 2059, 2060, 2061, 2063, 2064, 2065, 2066, 2068,
|
||
|
|
- 2070, 2072, 2074, 2076, 2078, 2080, 2082, 2084,
|
||
|
|
- 2086, 2088, 2090, 2092, 2096, 2097, 2098, 2100,
|
||
|
|
- 2104, 2108, 2110, 2114, 2118, 2119, 2120, 2122,
|
||
|
|
- 2124, 2126, 2128, 2133, 2137, 2141, 2143, 2145,
|
||
|
|
- 2147, 2149, 2150, 2152, 2154, 2156, 2158, 2160,
|
||
|
|
- 2162, 2164, 2166, 2168, 2170, 2172, 2174, 2176,
|
||
|
|
- 2178, 2180, 2182, 2184, 2186, 2188, 2190, 2192,
|
||
|
|
- 2194, 2195, 2196, 2198, 2200, 2201, 2202, 2205,
|
||
|
|
- 2208, 2211, 2214, 2216, 2218, 2220, 2222, 2224,
|
||
|
|
- 2226, 2227, 2228, 2229, 2231, 2235, 2237, 2239,
|
||
|
|
- 2245, 2249, 2250, 2251, 2252, 2253, 2254, 2255,
|
||
|
|
- 2256, 2260, 2262, 2264, 2268, 2270, 2272, 2274,
|
||
|
|
- 2276, 2278, 2280, 2282, 2284, 2286, 2288, 2290,
|
||
|
|
- 2292, 2294, 2296, 2297, 2300, 2303, 2308, 2313,
|
||
|
|
- 2316, 2319, 2322, 2325, 2330, 2335, 2338, 2341,
|
||
|
|
- 2343, 2345, 2347, 2349, 2351, 2353, 2355, 2356,
|
||
|
|
- 2358, 2360, 2362, 2364, 2366, 2367, 2368, 2369,
|
||
|
|
- 2373, 2377, 2379, 2383, 2387, 2391, 2395, 2399,
|
||
|
|
- 2401, 2405, 2407, 2409, 2411, 2413, 2415, 2417,
|
||
|
|
- 2419, 2421, 2422, 2424, 2426, 2428, 2430, 2432,
|
||
|
|
- 2434, 2436, 2438, 2439, 2440, 2441, 2443, 2445,
|
||
|
|
- 2447, 2449, 2450, 2451, 2453, 2455, 2457, 2459,
|
||
|
|
- 2461, 2463, 2464, 2466, 2468, 2470, 2472, 2473,
|
||
|
|
- 2474, 2476, 2478, 2480, 2482, 2484, 2486, 2488,
|
||
|
|
- 2490, 2491, 2492, 2493, 2494, 2497, 2500, 2502,
|
||
|
|
- 2505, 2506, 2507, 2509, 2510, 2512, 2513, 2514,
|
||
|
|
- 2516, 2518, 2519, 2520, 2521, 2522, 2523, 2526,
|
||
|
|
- 2531, 2536, 2541, 2546, 2549, 2554, 2559, 2561,
|
||
|
|
- 2563, 2565, 2567, 2568, 2569, 2571, 2573, 2575,
|
||
|
|
- 2577, 2579, 2581, 2583, 2584, 2585, 2586, 2587,
|
||
|
|
- 2588, 2589, 2594, 2599, 2600, 2601, 2602, 2603,
|
||
|
|
- 2604, 2605, 2606, 2607, 2608, 2609, 2610, 2611,
|
||
|
|
- 2612, 2613, 2614, 2615, 2616, 2617, 2618, 2619,
|
||
|
|
- 2620, 2621, 2622, 2623, 2624, 2625, 2626, 2627,
|
||
|
|
- 2628, 2629, 2630, 2631, 2632, 2633, 2634, 2635,
|
||
|
|
- 2636, 2637, 2638, 2639, 2640, 2641, 2642, 2643,
|
||
|
|
- 2644, 2645, 2646, 2647, 2648, 2649, 2650, 2651,
|
||
|
|
- 2652, 2653, 2654, 2655, 2656, 2657, 2658, 2659,
|
||
|
|
- 2660, 2661, 2662, 2663, 2664, 2665, 2666, 2667,
|
||
|
|
- 2668, 2669, 2670, 2671, 2672, 2673, 2674, 2675,
|
||
|
|
- 2676, 2677, 2678, 2679, 2680, 2681, 2682, 2683,
|
||
|
|
- 2684, 2685, 2686, 2687, 2688, 2689, 2690, 2691,
|
||
|
|
- 2692, 2693, 2694, 2695, 2696, 2697, 2698, 2699,
|
||
|
|
- 2700, 2701, 2702, 2703, 2704, 2705, 2706, 2707,
|
||
|
|
- 2708, 2709, 2710, 2711, 2712, 2713, 2714, 2715,
|
||
|
|
- 2716, 2717, 2718, 2719, 2720, 2721, 2722, 2723,
|
||
|
|
- 2724, 2725, 2726, 2727, 2728, 2729, 2730, 2731,
|
||
|
|
- 2732, 2733, 2734, 2735, 2736, 2737, 2738, 2739,
|
||
|
|
- 2740, 2741, 2742, 2743, 2744, 2745, 2746, 2747,
|
||
|
|
- 2748, 2749, 2750, 2751, 2752, 2753, 2754, 2755,
|
||
|
|
- 2756, 2757, 2758, 2759, 2760, 2761, 2762, 2763,
|
||
|
|
- 2764, 2765, 2766, 2767, 2768, 2769, 2770, 2771,
|
||
|
|
- 2772, 2773, 2774, 2775, 2776, 2777, 2778, 2779,
|
||
|
|
- 2780, 2781, 2782, 2783, 2784, 2785, 2786, 2787,
|
||
|
|
- 2788, 2789, 2790, 2791, 2792, 2793, 2794, 2795,
|
||
|
|
- 2796, 2797, 2798, 2799, 2800, 2802, 2804, 2805,
|
||
|
|
- 2806, 2807, 2808, 2809, 2810, 2811, 2812, 2813,
|
||
|
|
- 2814, 2815, 2816, 2817, 2818, 2819, 2820, 2821,
|
||
|
|
- 2822, 2823, 2824, 2825, 2826, 2827, 2828, 2829,
|
||
|
|
- 2830, 2831, 2832, 2834, 2836, 2838, 2840, 2841,
|
||
|
|
- 2842, 2843, 2844, 2845, 2846, 2847, 2848, 2849,
|
||
|
|
- 2850, 2851, 2852, 2853, 2855, 2856, 2857, 2858,
|
||
|
|
- 2859, 2860, 2861, 2862, 2863, 2864, 2865, 2866,
|
||
|
|
- 2867, 2868, 2869, 2870, 2871, 2872, 2873, 2874,
|
||
|
|
- 2875, 2876, 2877, 2878, 2879, 2880, 2881, 2882,
|
||
|
|
- 2883, 2884, 2885, 2886, 2887, 2888, 2889, 2890,
|
||
|
|
- 2891, 2892, 2893, 2894, 2895, 2896, 2897, 2898,
|
||
|
|
- 2899, 2900, 2902, 2904, 2905, 2906, 2908, 2909,
|
||
|
|
- 2911, 2913, 2914, 2915, 2917, 2919, 2920, 2921,
|
||
|
|
- 2922, 2923, 2924, 2925, 2926, 2927, 2928, 2929,
|
||
|
|
- 2930, 2931, 2932, 2933, 2934, 2935, 2936, 2937,
|
||
|
|
- 2940, 2943, 2944, 2945, 2946, 2947, 2948, 2949,
|
||
|
|
- 2951, 2953, 2955, 2956, 2957, 2959, 2961, 2963,
|
||
|
|
- 2965, 2969, 2971, 2973, 2974, 2975, 2976, 2977,
|
||
|
|
- 2978, 2979, 2980, 2981, 2982, 2983, 2984, 2985,
|
||
|
|
- 2986, 2987, 2988, 2989, 2990, 2991, 2994, 2997,
|
||
|
|
- 2998, 2999, 3000, 3001, 3002, 3003, 3004, 3005,
|
||
|
|
- 3006, 3007, 3008, 3009, 3010, 3011, 3012, 3013,
|
||
|
|
- 3014, 3015, 3016, 3017, 3018, 3019, 3020, 3021,
|
||
|
|
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|
||
|
|
+ 3173, 3174, 3175, 3176, 3177, 3178, 3179, 3180,
|
||
|
|
+ 3181, 3182, 3183, 3184, 3185, 3186, 3187, 3188,
|
||
|
|
+ 3189, 3190, 3191, 3192, 3193, 3194, 3195, 3196,
|
||
|
|
+ 3199, 3202, 3205, 3208, 3211, 3214, 3217, 3220,
|
||
|
|
+ 3223, 3226, 3229, 3232, 3235, 3238, 3241, 3242,
|
||
|
|
+ 3243, 3244, 3245, 3247, 3248, 3249, 3250, 3251,
|
||
|
|
+ 3252, 3253, 3254, 3255, 3256, 3257, 3258, 3259,
|
||
|
|
+ 3260, 3261, 3262, 3263, 3264, 3265, 3266, 3267,
|
||
|
|
+ 3268, 3269, 3270, 3271, 3272, 3273, 3274, 3275,
|
||
|
|
+ 3276, 3277, 3278, 3279, 3280, 3281, 3282, 3283,
|
||
|
|
+ 3284, 3285, 3286, 3287, 3288, 3289, 3290, 3291,
|
||
|
|
+ 3292, 3293, 3294, 3295, 3296, 3297, 3298, 3299,
|
||
|
|
+ 3300, 3301, 3302, 3303, 3304, 3305, 3306, 3307,
|
||
|
|
+ 3308, 3311, 3314, 3315, 3316, 3317, 3318, 3319,
|
||
|
|
+ 3320, 3321, 3322, 3323, 3324, 3325, 3326, 3327,
|
||
|
|
+ 3328, 3329, 3330, 3331, 3332, 3333, 3334, 3335,
|
||
|
|
+ 3336, 3337, 3338, 3339, 3340, 3341, 3342, 3343,
|
||
|
|
+ 3344, 3345, 3346, 3347, 3348, 3349, 3350, 3351,
|
||
|
|
+ 3352, 3353, 3354, 3355, 3356, 3357, 3358, 3359,
|
||
|
|
+ 3360, 3361, 3362, 3363, 3364, 3365, 3366, 3367,
|
||
|
|
+ 3368, 3369, 3370, 3371, 3372, 3373, 3374, 3375,
|
||
|
|
+ 3376, 3379, 3382, 3385, 3386, 3387, 3388, 3389,
|
||
|
|
+ 3390, 3391, 3392, 3393, 3394, 3395, 3396, 3397,
|
||
|
|
+ 3398, 3399, 3400, 3401, 3404, 3407, 3408, 3409,
|
||
|
|
+ 3412, 3413, 3414, 3415, 3416, 3419, 3422, 3425,
|
||
|
|
+ 3426, 3427, 3428, 3429, 3430, 3431, 3432, 3433,
|
||
|
|
+ 3434, 3435, 3437, 3439, 3440, 3441, 3442, 3443,
|
||
|
|
+ 3444, 3445, 3446, 3447, 3448, 3449, 3450, 3451,
|
||
|
|
+ 3452, 3453, 3454, 3455, 3456, 3457, 3458, 3459,
|
||
|
|
+ 3460, 3461, 3462, 3463, 3464, 3466, 3468, 3469,
|
||
|
|
+ 3470, 3471, 3472, 3473, 3474, 3475, 3476, 3477,
|
||
|
|
+ 3478, 3479, 3480, 3481, 3482, 3483, 3484, 3485,
|
||
|
|
+ 3486, 3487, 3488, 3489, 3490, 3491, 3492, 3493,
|
||
|
|
+ 3495, 3497, 3499, 3501, 3502, 3503, 3504, 3505,
|
||
|
|
+ 3506, 3507, 3508, 3509, 3510, 3511, 3512, 3513,
|
||
|
|
+ 3514, 3515, 3516, 3518, 3519, 3521, 3524, 3526,
|
||
|
|
+ 3527, 3528, 3530, 3532, 3533, 3534, 3535, 3536,
|
||
|
|
+ 3537, 3538, 3540, 3542, 3544, 3546, 3547, 3548,
|
||
|
|
+ 3549, 3550, 3551, 3552, 3553, 3554, 3555, 3557,
|
||
|
|
+ 3559, 3560, 3562, 3564, 3565, 3570, 3572, 3574,
|
||
|
|
+ 3575, 3576, 3577, 3578, 3579, 3580, 3581, 3583,
|
||
|
|
+ 3585, 3586, 3587, 3588, 3590, 3593, 3596, 3599,
|
||
|
|
+ 3601, 3602, 3603, 3604, 3605, 3606, 3607, 3608,
|
||
|
|
+ 3609, 3610, 3611, 3612, 3613, 3614, 3615, 3616,
|
||
|
|
+ 3617, 3618, 3619, 3620, 3621, 3623, 3625, 3627,
|
||
|
|
+ 3629, 3631, 3633, 3635, 3637, 3639, 3641, 3642,
|
||
|
|
+ 3643, 3644, 3645, 3646, 3647, 3648, 3649, 3650,
|
||
|
|
+ 3651, 3652, 3653, 3654, 3655, 3656, 3657, 3658,
|
||
|
|
+ 3659, 3660, 3661, 3662, 3663, 3664, 3665, 3666,
|
||
|
|
+ 3667, 3668, 3669, 3670, 3671, 3672, 3673, 3674,
|
||
|
|
+ 3675, 3676, 3677, 3678, 3679, 3680, 3681, 3682,
|
||
|
|
+ 3683, 3684, 3685, 3686, 3687, 3688, 3689, 3690,
|
||
|
|
+ 3691, 3692, 3693, 3694, 3695, 3696, 3697, 3698,
|
||
|
|
+ 3699, 3700, 3701, 3702, 3703, 3704, 3705, 3706,
|
||
|
|
+ 3707, 3708, 3709, 3710, 3711, 3712, 3713, 3714,
|
||
|
|
+ 3715, 3716, 3717, 3718, 3719, 3720, 3721, 3722,
|
||
|
|
+ 3723, 3724, 3725, 3726, 3727, 3728, 3729, 3730,
|
||
|
|
+ 3731, 3732, 3733, 3734, 3735, 3736, 3737, 3738,
|
||
|
|
+ 3739, 3740, 3741, 3742, 3743, 3744, 3745, 3746,
|
||
|
|
+ 3747, 3748, 3749, 3750, 3751, 3752, 3753, 3756,
|
||
|
|
+ 3757, 3758, 3761, 3762, 3763, 3765, 3766, 3767,
|
||
|
|
+ 3768, 3770, 3771, 3772, 3773, 3775, 3776, 3777,
|
||
|
|
+ 3778, 3781, 3782, 3783, 3784, 3785, 3788, 3791,
|
||
|
|
+ 3794, 3797, 3800, 3801, 3802, 3803, 3804, 3806,
|
||
|
|
+ 3808, 3809, 3810, 3811, 3814, 3817, 3820, 3823,
|
||
|
|
+ 3826, 3827, 3828, 3829, 3831, 3832, 3833, 3834,
|
||
|
|
+ 3836, 3837, 3838, 3839, 3840, 3841, 3842, 3843,
|
||
|
|
+ 3844, 3845, 3846, 3847, 3848, 3849, 3850, 3851,
|
||
|
|
+ 3852, 3853, 3854, 3855, 3856, 3857, 3858, 3859,
|
||
|
|
+ 3860, 3861, 3862, 3863, 3864, 3865, 3866, 3867,
|
||
|
|
+ 3868, 3869, 3870, 3871, 3872, 3873, 3874, 3875,
|
||
|
|
+ 3877, 3879, 3881, 3883, 3885, 3886, 3887, 3890,
|
||
|
|
+ 3893, 3894, 3895, 3896, 3897
|
||
|
|
};
|
||
|
|
|
||
|
|
/* i386 mnemonics table. */
|
||
|
|
diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
|
||
|
|
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d 2024-02-12 15:55:20.792572349 +0000
|
||
|
|
+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d 2024-02-12 15:56:07.355601128 +0000
|
||
|
|
@@ -158,6 +158,12 @@ Disassembly of section \.text:
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\]
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1 tmm6,\[r31\+rax\*4\+0x123\]
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+\[r31\+rax\*4\+0x123\],tmm6
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 1a 18[ ]+vbroadcastf32x4 ymm3,XMMWORD PTR \[r16\]
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 5a 18[ ]+vbroadcasti32x4 ymm3,XMMWORD PTR \[r16\]
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 19 18 01[ ]+vextractf32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 39 18 01[ ]+vextracti32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 18 00 01[ ]+vinsertf32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 38 00 01[ ]+vinserti32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 db fd 08 09 30 01[ ]+vrndscalepd xmm6,XMMWORD PTR \[r24\],(0x)?1
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 db 7d 08 08 30 02[ ]+vrndscaleps xmm6,XMMWORD PTR \[r24\],(0x)?2
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 db cd 08 0b 18 03[ ]+vrndscalesd xmm3,xmm6,QWORD PTR \[r24\],(0x)?3
|
||
|
|
diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
|
||
|
|
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d 2024-02-12 15:55:20.792572349 +0000
|
||
|
|
+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d 2024-02-12 15:56:07.355601128 +0000
|
||
|
|
@@ -158,6 +158,12 @@ Disassembly of section \.text:
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd[ ]+0x123\(%r31,%rax,4\),%tmm6
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1[ ]+0x123\(%r31,%rax,4\),%tmm6
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+%tmm6,0x123\(%r31,%rax,4\)
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 1a 18[ ]+vbroadcastf32x4 \(%r16\),%ymm3
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 5a 18[ ]+vbroadcasti32x4 \(%r16\),%ymm3
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 19 18 01[ ]+vextractf32x4 \$(0x)?1,%ymm3,\(%r16\)
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 39 18 01[ ]+vextracti32x4 \$(0x)?1,%ymm3,\(%r16\)
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 18 00 01[ ]+vinsertf32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
|
||
|
|
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 38 00 01[ ]+vinserti32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 db fd 08 09 30 01[ ]+vrndscalepd \$0x1,\(%r24\),%xmm6
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 db 7d 08 08 30 02[ ]+vrndscaleps \$0x2,\(%r24\),%xmm6
|
||
|
|
[ ]*[a-f0-9]+:[ ]*62 db cd 08 0b 18 03[ ]+vrndscalesd \$0x3,\(%r24\),%xmm6,%xmm3
|
||
|
|
diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
|
||
|
|
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s 2024-02-12 15:55:20.792572349 +0000
|
||
|
|
+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s 2024-02-12 15:56:07.356601129 +0000
|
||
|
|
@@ -152,6 +152,12 @@ _start:
|
||
|
|
tileloadd 0x123(%r31,%rax,4),%tmm6
|
||
|
|
tileloaddt1 0x123(%r31,%rax,4),%tmm6
|
||
|
|
tilestored %tmm6,0x123(%r31,%rax,4)
|
||
|
|
+ vbroadcastf128 (%r16),%ymm3
|
||
|
|
+ vbroadcasti128 (%r16),%ymm3
|
||
|
|
+ vextractf128 $1,%ymm3,(%r16)
|
||
|
|
+ vextracti128 $1,%ymm3,(%r16)
|
||
|
|
+ vinsertf128 $1,(%r16),%ymm3,%ymm8
|
||
|
|
+ vinserti128 $1,(%r16),%ymm3,%ymm8
|
||
|
|
vroundpd $1,(%r24),%xmm6
|
||
|
|
vroundps $2,(%r24),%xmm6
|
||
|
|
vroundsd $3,(%r24),%xmm6,%xmm3
|