gcc-toolset-10-valgrind/SOURCES/valgrind-3.16.0-ppc-L-field.patch
2021-09-09 16:57:53 +00:00

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1.2 KiB
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commit fb6f7abcbc92506d302fb18a2c5fc853d2929248
Author: Carl Love <cel@us.ibm.com>
Date: Tue Jun 9 10:42:03 2020 -0500
Power PC Fix extraction of the L field for sync instruction
The L field is currently a two bit[22:21] field in ISA 3.0. The size of the
L field has changed over time.
Currently the ISA 3.0 Valgrind sync instruction support code sets the
flag_L for the instruction L field to a five bit value that includes bits
that are marked reserved the sync instruction. This patch fixes the issue for ISA 3.0
to only setting flag_L the specified two bits.
Valgrind bugzilla: https://bugs.kde.org/show_bug.cgi?id=422677
diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
index 582c59ec0..c4965a19e 100644
--- a/VEX/priv/guest_ppc_toIR.c
+++ b/VEX/priv/guest_ppc_toIR.c
@@ -8777,7 +8777,7 @@ static Bool dis_memsync ( UInt theInstr )
/* X-Form, XL-Form */
UChar opc1 = ifieldOPC(theInstr);
UInt b11to25 = IFIELD(theInstr, 11, 15);
- UChar flag_L = ifieldRegDS(theInstr);
+ UChar flag_L = IFIELD(theInstr, 21, 2); //ISA 3.0
UInt b11to20 = IFIELD(theInstr, 11, 10);
UInt M0 = IFIELD(theInstr, 11, 5);
UChar rD_addr = ifieldRegDS(theInstr);