edk2/edk2-build.rhel-10
Miroslav Rezanina bb41216a44 * Mon Apr 07 2025 Miroslav Rezanina <mrezanin@redhat.com> - 20250221-2
- edk2-.distro-drop-setup-macro-in-specfile-comment.patch [RHEL-85759]
- edk2-.distro-switch-to-rhel-10-build-config.patch [RHEL-85759]
- edk2-.distro-add-riscv64-sub-rpm.patch [RHEL-85759]
- Resolves: RHEL-85759
  (RFE: Add riscv64 build and sub-package)
2025-04-07 02:49:07 -04:00

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[opts.ovmf.common]
NETWORK_HTTP_BOOT_ENABLE = TRUE
NETWORK_IP6_ENABLE = TRUE
NETWORK_TLS_ENABLE = TRUE
NETWORK_ISCSI_ENABLE = TRUE
NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE
TPM2_ENABLE = TRUE
TPM2_CONFIG_ENABLE = TRUE
TPM1_ENABLE = FALSE
CAVIUM_ERRATUM_27456 = TRUE
[opts.ovmf.4m]
FD_SIZE_4MB = TRUE
[opts.ovmf.sb.smm]
SECURE_BOOT_ENABLE = TRUE
SMM_REQUIRE = TRUE
BUILD_SHELL = FALSE
[opts.ovmf.sb.stateless]
SECURE_BOOT_ENABLE = TRUE
SMM_REQUIRE = FALSE
BUILD_SHELL = FALSE
[opts.armvirt.verbose]
DEBUG_PRINT_ERROR_LEVEL = 0x8040004F
[opts.armvirt.silent]
DEBUG_PRINT_ERROR_LEVEL = 0x80000000
[pcds.la57]
PcdUse5LevelPageTable = TRUE
[pcds.nx.strict]
PcdDxeNxMemoryProtectionPolicy = 0xC000000000007FD5
PcdImageProtectionPolicy = 0x03
PcdSetNxForStack = TRUE
PcdNullPointerDetectionPropertyMask = 0x03
PcdUninstallMemAttrProtocol = TRUE
[pcds.nx.compat.aa64]
# workaround for bugs in shim.efi and grub.efi
PcdDxeNxMemoryProtectionPolicy = 0xC000000000007FD1
PcdUninstallMemAttrProtocol = TRUE
[pcds.nx.compat.x64]
# workaround for bugs in shim.efi and grub.efi
PcdDxeNxMemoryProtectionPolicy = 0
PcdUninstallMemAttrProtocol = TRUE
#####################################################################
# stateful ovmf builds (with vars in flash)
[build.ovmf.4m.default]
desc = ovmf build (64-bit, 4MB)
conf = OvmfPkg/OvmfPkgX64.dsc
arch = X64
opts = ovmf.common
ovmf.4m
pcds = nx.compat.x64
la57
plat = OvmfX64
dest = RHEL-10/ovmf
cpy1 = FV/OVMF_CODE.fd OVMF_CODE.fd
cpy2 = FV/OVMF_VARS.fd
cpy3 = X64/Shell.efi
[build.ovmf.4m.sb.smm]
desc = ovmf build (64-bit, 4MB, q35 only, needs smm, secure boot)
conf = OvmfPkg/OvmfPkgX64.dsc
arch = X64
opts = ovmf.common
ovmf.4m
ovmf.sb.smm
pcds = nx.compat.x64
la57
plat = OvmfX64
dest = RHEL-10/ovmf
cpy1 = FV/OVMF_CODE.fd OVMF_CODE.secboot.fd
cpy2 = X64/EnrollDefaultKeys.efi
#####################################################################
# stateless ovmf builds (firmware in rom or r/o flash)
[build.ovmf.amdsev]
desc = ovmf build for AmdSev (4MB)
conf = OvmfPkg/AmdSev/AmdSevX64.dsc
arch = X64
opts = ovmf.common
ovmf.4m
pcds = nx.compat.x64
plat = AmdSev
dest = RHEL-10/ovmf
cpy1 = FV/OVMF.fd OVMF.amdsev.fd
[build.ovmf.inteltdx]
desc = ovmf build for IntelTdx (4MB)
conf = OvmfPkg/IntelTdx/IntelTdxX64.dsc
arch = X64
opts = ovmf.common
ovmf.4m
ovmf.sb.stateless
pcds = nx.compat.x64
la57
plat = IntelTdx
dest = RHEL-10/ovmf
cpy1 = FV/OVMF.fd OVMF.inteltdx.fd
#####################################################################
# armvirt builds
[build.armvirt.aa64.verbose]
desc = ArmVirt build for qemu, 64-bit (arm v8), verbose
conf = ArmVirtPkg/ArmVirtQemu.dsc
arch = AARCH64
opts = ovmf.common
armvirt.verbose
pcds = nx.compat.aa64
plat = ArmVirtQemu-AARCH64
dest = RHEL-10/aarch64
cpy1 = FV/QEMU_EFI.fd
cpy2 = FV/QEMU_VARS.fd
cpy3 = FV/QEMU_EFI.fd QEMU_EFI-pflash.raw
cpy4 = FV/QEMU_VARS.fd vars-template-pflash.raw
pad3 = QEMU_EFI-pflash.raw 64m
pad4 = vars-template-pflash.raw 64m
[build.armvirt.aa64.silent]
desc = ArmVirt build for qemu, 64-bit (arm v8), silent
conf = ArmVirtPkg/ArmVirtQemu.dsc
arch = AARCH64
opts = ovmf.common
armvirt.silent
pcds = nx.compat.aa64
plat = ArmVirtQemu-AARCH64
dest = RHEL-10/aarch64
cpy1 = FV/QEMU_EFI.fd QEMU_EFI.silent.fd
cpy2 = FV/QEMU_EFI.fd QEMU_EFI-silent-pflash.raw
pad2 = QEMU_EFI-silent-pflash.raw 64m
#####################################################################
# riscv build
[build.riscv.qemu]
conf = OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
arch = RISCV64
plat = RiscVVirtQemu
dest = RHEL-10/riscv
cpy1 = FV/RISCV_VIRT_CODE.fd
cpy2 = FV/RISCV_VIRT_CODE.fd RISCV_VIRT_CODE.raw
cpy3 = FV/RISCV_VIRT_VARS.fd
cpy4 = FV/RISCV_VIRT_VARS.fd RISCV_VIRT_VARS.raw
pad1 = RISCV_VIRT_CODE.raw 32m
pad2 = RISCV_VIRT_VARS.raw 32m