From 25c2ee86021a5080c6b4c156a89469ab21e4f7e3 Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Tue, 10 Oct 2023 12:54:58 +0200
Subject: [PATCH 22/23] [debug] add logging for cpuid topology

https://bugzilla.redhat.com/show_bug.cgi?id=2241388
---
 .../BaseXApicX2ApicLib/BaseXApicX2ApicLib.c       | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index aa4eb11181f6..b27fbd71b620 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -1264,6 +1264,7 @@ GetProcessorLocationByApicId (
       *Package = 0;
     }
 
+    DEBUG ((DEBUG_INFO, "%a: no hyperthreading\n", __func__));
     return;
   }
 
@@ -1300,6 +1301,7 @@ GetProcessorLocationByApicId (
     //
     if (ExtendedTopologyEbx.Uint32 != 0) {
       TopologyLeafSupported = TRUE;
+      DEBUG ((DEBUG_INFO, "%a: ExtendedTopology, v1\n", __func__));
 
       //
       // Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract
@@ -1393,6 +1395,11 @@ GetProcessorLocationByApicId (
   if (Package != NULL) {
     *Package = (InitialApicId >> (ThreadBits + CoreBits));
   }
+
+  if (*Thread && *Core && *Package) {
+    DEBUG ((DEBUG_INFO, "%a: apic id %d -> package %d / core %d / thread %d\n",
+            __func__, InitialApicId, *Package, *Core, *Thread));
+  }
 }
 
 /**
@@ -1460,6 +1467,7 @@ GetProcessorLocation2ByApicId (
   // If the V2 extended topology enumeration leaf is available, it
   // is the preferred mechanism for enumerating topology.
   //
+  DEBUG ((DEBUG_INFO, "%a: ExtendedTopology, v2\n", __func__));
   for (Index = 0; ; Index++) {
     AsmCpuidEx (
       CPUID_V2_EXTENDED_TOPOLOGY,
@@ -1471,6 +1479,9 @@ GetProcessorLocation2ByApicId (
       );
 
     LevelType = ExtendedTopologyEcx.Bits.LevelType;
+    DEBUG ((DEBUG_INFO, "%a:   %d: type %x, shift %x\n", __func__, Index,
+            ExtendedTopologyEcx.Bits.LevelType,
+            ExtendedTopologyEax.Bits.ApicIdShift));
 
     //
     // first level reported should be SMT.
@@ -1521,4 +1532,8 @@ GetProcessorLocation2ByApicId (
       *Location[LevelType] &= (1 << (Bits[LevelType] - Bits[LevelType - 1])) - 1;
     }
   }
+  if (*Thread && *Core && *Module && *Tile && *Die && *Package) {
+    DEBUG ((DEBUG_INFO, "%a: apic id %d -> package %d / die %d / tile %d / module &d / core %d / thread %d\n",
+            __func__, InitialApicId, *Package, *Die, *Tile, *Module, *Core, *Thread));
+  }
 }
-- 
2.41.0