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This commit is contained in:
Gerd Hoffmann 2023-11-17 12:19:49 +01:00
parent e038ec9e8d
commit 78febee518
9 changed files with 16 additions and 580 deletions
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235
0017-OvmfPkg-IoMmuDxe-don-t-rely-on-TPLs-to-manage-concur.patch
View File

@ -1,235 +0,0 @@
From bf2f6173802c709a84c36d43f414c815ad6aa2f6 Mon Sep 17 00:00:00 2001
From: Ard Biesheuvel <ardb@kernel.org>
Date: Thu, 20 Jul 2023 15:45:57 +0200
Subject: [PATCH 17/20] OvmfPkg/IoMmuDxe: don't rely on TPLs to manage
concurrency
Instead of relying on raising the TPL to protect the critical sections
that manipulate the global bitmask that keeps track of bounce buffer
allocations, use compare-and-exchange to manage the global variable, and
tweak the logic to line up with that.
Given that IoMmuDxe implements a singleton protocol that is shared
between multiple drivers, and considering the elaborate and confusing
requirements in the UEFP spec regarding TPL levels at which protocol
methods may be invoked, not relying on TPL levels at all is a more
robust approach in this case.
Link: https://bugzilla.redhat.com/show_bug.cgi?id=2211060
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Pedro Falcato <pedro.falcato@gmail.com>
(cherry picked from commit dfb941d32a2f38c9177729e39c6a6515abbbad48)
---
OvmfPkg/IoMmuDxe/IoMmuDxe.inf | 1 +
OvmfPkg/IoMmuDxe/IoMmuBuffer.c | 100 +++++++++++++++++++--------------
2 files changed, 60 insertions(+), 41 deletions(-)
diff --git a/OvmfPkg/IoMmuDxe/IoMmuDxe.inf b/OvmfPkg/IoMmuDxe/IoMmuDxe.inf
index 17fca5285692..d08f7e59e2b6 100644
--- a/OvmfPkg/IoMmuDxe/IoMmuDxe.inf
+++ b/OvmfPkg/IoMmuDxe/IoMmuDxe.inf
@@ -35,6 +35,7 @@ [LibraryClasses]
MemEncryptSevLib
MemEncryptTdxLib
MemoryAllocationLib
+ SynchronizationLib
UefiBootServicesTableLib
UefiDriverEntryPoint
diff --git a/OvmfPkg/IoMmuDxe/IoMmuBuffer.c b/OvmfPkg/IoMmuDxe/IoMmuBuffer.c
index 103003cae376..f8dcd5b7ec92 100644
--- a/OvmfPkg/IoMmuDxe/IoMmuBuffer.c
+++ b/OvmfPkg/IoMmuDxe/IoMmuBuffer.c
@@ -12,6 +12,7 @@
#include <Library/MemEncryptSevLib.h>
#include <Library/MemEncryptTdxLib.h>
#include <Library/PcdLib.h>
+#include <Library/SynchronizationLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include "IoMmuInternal.h"
@@ -268,16 +269,17 @@ InternalAllocateBuffer (
IN EFI_ALLOCATE_TYPE Type,
IN EFI_MEMORY_TYPE MemoryType,
IN UINTN Pages,
- IN OUT UINT32 *ReservedMemBitmap,
+ OUT UINT32 *ReservedMemBit,
IN OUT EFI_PHYSICAL_ADDRESS *PhysicalAddress
)
{
UINT32 MemBitmap;
+ UINT32 ReservedMemBitmap;
UINT8 Index;
IOMMU_RESERVED_MEM_RANGE *MemRange;
UINTN PagesOfLastMemRange;
- *ReservedMemBitmap = 0;
+ *ReservedMemBit = 0;
if (Pages == 0) {
ASSERT (FALSE);
@@ -309,23 +311,31 @@ InternalAllocateBuffer (
MemRange = &mReservedMemRanges[Index];
- if ((mReservedMemBitmap & MemRange->BitmapMask) == MemRange->BitmapMask) {
- // The reserved memory is exausted. Turn to legacy allocate.
- goto LegacyAllocateBuffer;
- }
+ do {
+ ReservedMemBitmap = mReservedMemBitmap;
- MemBitmap = (mReservedMemBitmap & MemRange->BitmapMask) >> MemRange->Shift;
+ if ((ReservedMemBitmap & MemRange->BitmapMask) == MemRange->BitmapMask) {
+ // The reserved memory is exhausted. Turn to legacy allocate.
+ goto LegacyAllocateBuffer;
+ }
+
+ MemBitmap = (ReservedMemBitmap & MemRange->BitmapMask) >> MemRange->Shift;
- for (Index = 0; Index < MemRange->Slots; Index++) {
- if ((MemBitmap & (UINT8)(1<<Index)) == 0) {
- break;
+ for (Index = 0; Index < MemRange->Slots; Index++) {
+ if ((MemBitmap & (UINT8)(1<<Index)) == 0) {
+ break;
+ }
}
- }
- ASSERT (Index != MemRange->Slots);
+ ASSERT (Index != MemRange->Slots);
- *PhysicalAddress = MemRange->StartAddressOfMemRange + Index * SIZE_OF_MEM_RANGE (MemRange) + MemRange->HeaderSize;
- *ReservedMemBitmap = (UINT32)(1 << (Index + MemRange->Shift));
+ *PhysicalAddress = MemRange->StartAddressOfMemRange + Index * SIZE_OF_MEM_RANGE (MemRange) + MemRange->HeaderSize;
+ *ReservedMemBit = (UINT32)(1 << (Index + MemRange->Shift));
+ } while (ReservedMemBitmap != InterlockedCompareExchange32 (
+ &mReservedMemBitmap,
+ ReservedMemBitmap,
+ ReservedMemBitmap | *ReservedMemBit
+ ));
DEBUG ((
DEBUG_VERBOSE,
@@ -334,16 +344,16 @@ InternalAllocateBuffer (
MemRange->DataSize,
*PhysicalAddress,
Pages,
- *ReservedMemBitmap,
- mReservedMemBitmap,
- mReservedMemBitmap | *ReservedMemBitmap
+ *ReservedMemBit,
+ ReservedMemBitmap,
+ ReservedMemBitmap | *ReservedMemBit
));
return EFI_SUCCESS;
LegacyAllocateBuffer:
- *ReservedMemBitmap = 0;
+ *ReservedMemBit = 0;
return gBS->AllocatePages (Type, MemoryType, Pages, PhysicalAddress);
}
@@ -366,27 +376,41 @@ IoMmuAllocateBounceBuffer (
)
{
EFI_STATUS Status;
- UINT32 ReservedMemBitmap;
- EFI_TPL OldTpl;
-
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
- ReservedMemBitmap = 0;
- Status = InternalAllocateBuffer (
- Type,
- MemoryType,
- MapInfo->NumberOfPages,
- &ReservedMemBitmap,
- &MapInfo->PlainTextAddress
- );
- MapInfo->ReservedMemBitmap = ReservedMemBitmap;
- mReservedMemBitmap |= ReservedMemBitmap;
- gBS->RestoreTPL (OldTpl);
+ Status = InternalAllocateBuffer (
+ Type,
+ MemoryType,
+ MapInfo->NumberOfPages,
+ &MapInfo->ReservedMemBitmap,
+ &MapInfo->PlainTextAddress
+ );
ASSERT (Status == EFI_SUCCESS);
return Status;
}
+/**
+ * Clear a bit in the reserved memory bitmap in a thread safe manner
+ *
+ * @param ReservedMemBit The bit to clear
+ */
+STATIC
+VOID
+ClearReservedMemBit (
+ IN UINT32 ReservedMemBit
+ )
+{
+ UINT32 ReservedMemBitmap;
+
+ do {
+ ReservedMemBitmap = mReservedMemBitmap;
+ } while (ReservedMemBitmap != InterlockedCompareExchange32 (
+ &mReservedMemBitmap,
+ ReservedMemBitmap,
+ ReservedMemBitmap & ~ReservedMemBit
+ ));
+}
+
/**
* Free the bounce buffer allocated in IoMmuAllocateBounceBuffer.
*
@@ -398,8 +422,6 @@ IoMmuFreeBounceBuffer (
IN OUT MAP_INFO *MapInfo
)
{
- EFI_TPL OldTpl;
-
if (MapInfo->ReservedMemBitmap == 0) {
gBS->FreePages (MapInfo->PlainTextAddress, MapInfo->NumberOfPages);
} else {
@@ -412,11 +434,9 @@ IoMmuFreeBounceBuffer (
mReservedMemBitmap,
mReservedMemBitmap & ((UINT32)(~MapInfo->ReservedMemBitmap))
));
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ ClearReservedMemBit (MapInfo->ReservedMemBitmap);
MapInfo->PlainTextAddress = 0;
- mReservedMemBitmap &= (UINT32)(~MapInfo->ReservedMemBitmap);
MapInfo->ReservedMemBitmap = 0;
- gBS->RestoreTPL (OldTpl);
}
return EFI_SUCCESS;
@@ -452,8 +472,6 @@ IoMmuAllocateCommonBuffer (
);
ASSERT (Status == EFI_SUCCESS);
- mReservedMemBitmap |= *ReservedMemBitmap;
-
if (*ReservedMemBitmap != 0) {
*PhysicalAddress -= SIZE_4KB;
}
@@ -494,7 +512,7 @@ IoMmuFreeCommonBuffer (
mReservedMemBitmap & ((UINT32)(~CommonBufferHeader->ReservedMemBitmap))
));
- mReservedMemBitmap &= (UINT32)(~CommonBufferHeader->ReservedMemBitmap);
+ ClearReservedMemBit (CommonBufferHeader->ReservedMemBitmap);
return EFI_SUCCESS;
LegacyFreeCommonBuffer:
--
2.41.0

12
0021-OvmfPkg-set-PcdVariableStoreSize-PcdMaxVolatileVaria.patch → 0017-OvmfPkg-set-PcdVariableStoreSize-PcdMaxVolatileVaria.patch
View File

@ -1,7 +1,7 @@
From 5aa243d95f64d6febe7724d7281471b3528e0961 Mon Sep 17 00:00:00 2001
From d33fa1e334e7dc75a3cd43728e1c825acd52f5c3 Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Mon, 25 Sep 2023 09:48:46 +0200
Subject: [PATCH 21/21] OvmfPkg: set PcdVariableStoreSize +
Subject: [PATCH 17/17] OvmfPkg: set PcdVariableStoreSize +
PcdMaxVolatileVariableSize unconditionally
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
@ -12,7 +12,7 @@ Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 files changed, 30 deletions(-)
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 9cd981ae7be8..1f610b00eb0b 100644
index d20afa771c36..1c3437e7437c 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -493,23 +493,13 @@ [PcdsFixedAtBuild]
@ -40,7 +40,7 @@ index 9cd981ae7be8..1f610b00eb0b 100644
gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 9186ab2ba83b..d68acc88d702 100644
index 52a8ac2a5592..87067f468285 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -500,23 +500,13 @@ [PcdsFixedAtBuild]
@ -68,7 +68,7 @@ index 9186ab2ba83b..d68acc88d702 100644
gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index a059f143f5be..1e6363e0de2e 100644
index 4e2459d34e2e..a625399d8246 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -519,23 +519,13 @@ [PcdsFixedAtBuild]
@ -96,5 +96,5 @@ index a059f143f5be..1e6363e0de2e 100644
gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
--
2.41.0
2.42.0

84
0018-OvmfPkg-Disable-PcdFirstTimeWakeUpAPsBySipi.patch
View File

@ -1,84 +0,0 @@
From 2dd5afb5f43f645041b91c8fa6f797121a384061 Mon Sep 17 00:00:00 2001
From: YuanhaoXie <yuanhao.xie@intel.com>
Date: Tue, 22 Aug 2023 09:52:14 +0800
Subject: [PATCH 18/20] OvmfPkg: Disable PcdFirstTimeWakeUpAPsBySipi
Disable PcdFirstTimeWakeUpAPsBySipi for IntelTdx, Microvm, and Xen to
preserve the original execution of INIT-SIPI-SIPI.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
(cherry picked from commit 020cc9e2e7053bb62247b0babbbe80cb855592e5)
---
OvmfPkg/IntelTdx/IntelTdxX64.dsc | 8 ++++++++
OvmfPkg/Microvm/MicrovmX64.dsc | 8 ++++++++
OvmfPkg/OvmfXen.dsc | 8 ++++++++
3 files changed, 24 insertions(+)
diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
index bfcd486976cf..cfd5e8516ea4 100644
--- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc
+++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
@@ -463,6 +463,14 @@ [PcdsFixedAtBuild]
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
+ #
+ # PcdFirstTimeWakeUpAPsBySipi determines whether to employ
+ # SIPI instead of the INIT-SIPI-SIPI sequence during APs
+ # initialization. Deactivate this parameter to preserve
+ # the original execution of INIT-SIPI-SIPI.
+ #
+ gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi|FALSE
+
################################################################################
#
# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform
diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index 023b7b0fe959..3cb2b6ddc490 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -566,6 +566,14 @@ [PcdsFixedAtBuild]
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF}
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x3f8
+ #
+ # PcdFirstTimeWakeUpAPsBySipi determines whether to employ
+ # SIPI instead of the INIT-SIPI-SIPI sequence during APs
+ # initialization. Deactivate this parameter to preserve
+ # the original execution of INIT-SIPI-SIPI.
+ #
+ gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi|FALSE
+
################################################################################
#
# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform
diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc
index 210578c1d74d..dcb99d1f0bce 100644
--- a/OvmfPkg/OvmfXen.dsc
+++ b/OvmfPkg/OvmfXen.dsc
@@ -458,6 +458,14 @@ [PcdsFixedAtBuild]
# We populate DXE IPL tables with 1G pages preferably on Xen
gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|TRUE
+ #
+ # PcdFirstTimeWakeUpAPsBySipi determines whether to employ
+ # SIPI instead of the INIT-SIPI-SIPI sequence during APs
+ # initialization. Deactivate this parameter to preserve
+ # the original execution of INIT-SIPI-SIPI.
+ #
+ gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi|FALSE
+
################################################################################
#
# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform
--
2.41.0

46
0019-OvmfPkg-AmdSev-Disable-PcdFirstTimeWakeUpAPsBySipi.patch
View File

@ -1,46 +0,0 @@
From cb435f3097b28e7470a7653def7d5ab06855f6ee Mon Sep 17 00:00:00 2001
From: Michael Roth <michael.roth@amd.com>
Date: Wed, 16 Aug 2023 15:11:46 -0500
Subject: [PATCH 19/20] OvmfPkg/AmdSev: Disable PcdFirstTimeWakeUpAPsBySipi
PcdFirstTimeWakeUpAPsBySipi was recently introduced to indicate when the
full INIT-SIPI-SIPI sequence can be skipped for AP bringup. It is true
by default, but needs to be disabled for QEMU/OVMF where early INIT is
not simulated. Commit 1d76560146 ("OvmfPkg: Disable
PcdFirstTimeWakeUpAPsBySipi.") added changes to disable it by default
for OvmfPkg, but a similar change was not made for the AmdSev package.
This breaks booting of SEV and SNP guests.
Fix this defaulting PcdFirstTimeWakeUpAPsBySipi to false for AmdSev
package, as was previously done for OvmfPkg variants.
Fixes: eaffa1d7ff ("UefiCpuPkg:Wake up APs after power-up or RESET through SIPI.")
Signed-off-by: Michael Roth <michael.roth@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
(cherry picked from commit 8b66f9df1bb0fd5ebb743944d41cb33178cf2fdd)
---
OvmfPkg/AmdSev/AmdSevX64.dsc | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index 865d150a2871..7f808126675f 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -468,6 +468,14 @@ [PcdsFixedAtBuild]
gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|TRUE
gUefiOvmfPkgTokenSpaceGuid.PcdBootRestrictToFirmware|TRUE
+ #
+ # INIT is now triggered before BIOS by ucode/hardware. In the OVMF
+ # environment, QEMU lacks a simulation for the INIT process.
+ # To address this, PcdFirstTimeWakeUpAPsBySipi set to FALSE to
+ # broadcast INIT-SIPI-SIPI for the first time.
+ #
+ gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi|FALSE
+
################################################################################
#
# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform
--
2.41.0

72
0020-OvmfPkg-AmdSev-fix-BdsPlatform.c-assertion-failure-d.patch
View File

@ -1,72 +0,0 @@
From 6580637b33ef9b55b6dcfa8517e5933fb87b02d1 Mon Sep 17 00:00:00 2001
From: "Roth, Michael via groups.io" <Michael.Roth=amd.com@groups.io>
Date: Wed, 16 Aug 2023 15:11:45 -0500
Subject: [PATCH 20/20] OvmfPkg/AmdSev: fix BdsPlatform.c assertion failure
during boot
Booting an SEV guest with AmdSev OVMF package currently triggers the
following assertion with QEMU:
InstallQemuFwCfgTables: installed 7 tables
PcRtc: Write 0x20 to CMOS location 0x32
[Variable]END_OF_DXE is signaled
Initialize variable error flag (FF)
ASSERT_EFI_ERROR (Status = Not Found)
ASSERT [BdsDxe] /home/VT_BUILD/ovmf/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c(1711): !(((INTN)(RETURN_STATUS)(Status)) < 0)
This seems to be due to commit 81dc0d8b4c, which switched to using
PlatformBootManagerLib instead of PlatformBootManagerLibGrub. That pulls
in a dependency on gEfiS3SaveStateProtocolGuid provider being available
(which is asserted for in
BdsPlatform.c:PlatformBootManagerBeforeConsole()/SaveS3BootScript()),
but the libraries that provide it aren't currently included in the
build. Add them similarly to what's done for OvmfPkg.
Fixes: 81dc0d8b4c ("OvmfPkg/AmdSev: stop using PlatformBootManagerLibGrub")
Signed-off-by: Michael Roth <michael.roth@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
(cherry picked from commit f008890ae55929f7f17e7d2f8aff929255007d33)
---
OvmfPkg/AmdSev/AmdSevX64.dsc | 3 +++
OvmfPkg/AmdSev/AmdSevX64.fdf | 2 ++
2 files changed, 5 insertions(+)
diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index 7f808126675f..49f6be3a079c 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -200,6 +200,7 @@ [LibraryClasses]
SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf
OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
+ S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf
!include OvmfPkg/Include/Dsc/OvmfTpmLibs.dsc.inc
@@ -727,6 +728,8 @@ [Components]
#
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
+ MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
+ MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
#
diff --git a/OvmfPkg/AmdSev/AmdSevX64.fdf b/OvmfPkg/AmdSev/AmdSevX64.fdf
index 463bd3e9ef15..b2ab0c777320 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.fdf
+++ b/OvmfPkg/AmdSev/AmdSevX64.fdf
@@ -270,6 +270,8 @@ [FV.DXEFV]
INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
INF OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
+INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
+INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
INF FatPkg/EnhancedFatDxe/Fat.inf
--
2.41.0

72
0022-debug-add-logging-for-cpuid-topology.patch
View File

@ -1,72 +0,0 @@
From 25c2ee86021a5080c6b4c156a89469ab21e4f7e3 Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Tue, 10 Oct 2023 12:54:58 +0200
Subject: [PATCH 22/23] [debug] add logging for cpuid topology
https://bugzilla.redhat.com/show_bug.cgi?id=2241388
---
.../BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index aa4eb11181f6..b27fbd71b620 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -1264,6 +1264,7 @@ GetProcessorLocationByApicId (
*Package = 0;
}
+ DEBUG ((DEBUG_INFO, "%a: no hyperthreading\n", __func__));
return;
}
@@ -1300,6 +1301,7 @@ GetProcessorLocationByApicId (
//
if (ExtendedTopologyEbx.Uint32 != 0) {
TopologyLeafSupported = TRUE;
+ DEBUG ((DEBUG_INFO, "%a: ExtendedTopology, v1\n", __func__));
//
// Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract
@@ -1393,6 +1395,11 @@ GetProcessorLocationByApicId (
if (Package != NULL) {
*Package = (InitialApicId >> (ThreadBits + CoreBits));
}
+
+ if (*Thread && *Core && *Package) {
+ DEBUG ((DEBUG_INFO, "%a: apic id %d -> package %d / core %d / thread %d\n",
+ __func__, InitialApicId, *Package, *Core, *Thread));
+ }
}
/**
@@ -1460,6 +1467,7 @@ GetProcessorLocation2ByApicId (
// If the V2 extended topology enumeration leaf is available, it
// is the preferred mechanism for enumerating topology.
//
+ DEBUG ((DEBUG_INFO, "%a: ExtendedTopology, v2\n", __func__));
for (Index = 0; ; Index++) {
AsmCpuidEx (
CPUID_V2_EXTENDED_TOPOLOGY,
@@ -1471,6 +1479,9 @@ GetProcessorLocation2ByApicId (
);
LevelType = ExtendedTopologyEcx.Bits.LevelType;
+ DEBUG ((DEBUG_INFO, "%a: %d: type %x, shift %x\n", __func__, Index,
+ ExtendedTopologyEcx.Bits.LevelType,
+ ExtendedTopologyEax.Bits.ApicIdShift));
//
// first level reported should be SMT.
@@ -1521,4 +1532,8 @@ GetProcessorLocation2ByApicId (
*Location[LevelType] &= (1 << (Bits[LevelType] - Bits[LevelType - 1])) - 1;
}
}
+ if (*Thread && *Core && *Module && *Tile && *Die && *Package) {
+ DEBUG ((DEBUG_INFO, "%a: apic id %d -> package %d / die %d / tile %d / module &d / core %d / thread %d\n",
+ __func__, InitialApicId, *Package, *Die, *Tile, *Module, *Core, *Thread));
+ }
}
--
2.41.0

52
0023-UefiCpuPkg-BaseXApicX2ApicLib-fix-CPUID_V2_EXTENDED_.patch
View File

@ -1,52 +0,0 @@
From 35c6cfd69232e8eb271a48c9c0b2ad4ffe05978e Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Wed, 11 Oct 2023 10:20:41 +0200
Subject: [PATCH 23/23] UefiCpuPkg/BaseXApicX2ApicLib: fix
CPUID_V2_EXTENDED_TOPOLOGY detection
Checking the max cpuid leaf is not enough to figure whenever
CPUID_V2_EXTENDED_TOPOLOGY is supported. Quoting a comment for
CPUID_EXTENDED_TOPOLOGY in GetProcessorLocationByApicId():
// If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for
// basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not
// supported on that processor.
Add a similar check for CPUID_V2_EXTENDED_TOPOLOGY to
GetProcessorLocation2ByApicId(). Without this fix OVMF triggers
an ASSERT when running in a kvm guest on latest (12th gen) intel
processors.
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2241388
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index b27fbd71b620..716e60352645 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -1431,6 +1431,7 @@ GetProcessorLocation2ByApicId (
)
{
CPUID_EXTENDED_TOPOLOGY_EAX ExtendedTopologyEax;
+ CPUID_EXTENDED_TOPOLOGY_EBX ExtendedTopologyEbx;
CPUID_EXTENDED_TOPOLOGY_ECX ExtendedTopologyEcx;
UINT32 MaxStandardCpuIdIndex;
UINT32 Index;
@@ -1447,6 +1448,11 @@ GetProcessorLocation2ByApicId (
//
AsmCpuid (CPUID_SIGNATURE, &MaxStandardCpuIdIndex, NULL, NULL, NULL);
if (MaxStandardCpuIdIndex < CPUID_V2_EXTENDED_TOPOLOGY) {
+ ExtendedTopologyEbx.Uint32 = 0;
+ } else {
+ AsmCpuidEx (CPUID_V2_EXTENDED_TOPOLOGY, 0, NULL, &ExtendedTopologyEbx.Uint32, NULL, NULL);
+ }
+ if (ExtendedTopologyEbx.Uint32 == 0) {
if (Die != NULL) {
*Die = 0;
}
--
2.41.0

19
edk2.spec
View File

@ -9,15 +9,15 @@
ExclusiveArch: x86_64 aarch64 riscv64
# edk2-stable202308
%define GITDATE 20230825
%define GITCOMMIT 819cfc6b42a6
%define GITDATE 20231122
%define GITCOMMIT 8736b8fdca85
%define TOOLCHAIN GCC
%define PLATFORMS_COMMIT 10e2eb030de3
%define OPENSSL_VER 3.0.7
%define OPENSSL_COMMIT 3adb22b68e9fe61fc4863c2d2dc6cc6fc094b005
%define PLATFORMS_COMMIT e509ac5a729e
%define DBXDATE 20230509
# Undefine this to get *HUGE* (50MB+) verbose build logs
@ -112,13 +112,7 @@ Patch0013: 0013-UefiCpuPkg-MpInitLib-fix-apic-mode-for-cpu-hotplug.patch
Patch0014: 0014-ArmPkg-Add-Pcd-to-disable-EFI_MEMORY_ATTRIBUTE_PROTO.patch
Patch0015: 0015-CryptoPkg-CrtLib-add-stat.h.patch
Patch0016: 0016-CryptoPkg-CrtLib-add-access-open-read-write-close-sy.patch
Patch0017: 0017-OvmfPkg-IoMmuDxe-don-t-rely-on-TPLs-to-manage-concur.patch
Patch0018: 0018-OvmfPkg-Disable-PcdFirstTimeWakeUpAPsBySipi.patch
Patch0019: 0019-OvmfPkg-AmdSev-Disable-PcdFirstTimeWakeUpAPsBySipi.patch
Patch0020: 0020-OvmfPkg-AmdSev-fix-BdsPlatform.c-assertion-failure-d.patch
Patch0021: 0021-OvmfPkg-set-PcdVariableStoreSize-PcdMaxVolatileVaria.patch
Patch0022: 0022-debug-add-logging-for-cpuid-topology.patch
Patch0023: 0023-UefiCpuPkg-BaseXApicX2ApicLib-fix-CPUID_V2_EXTENDED_.patch
Patch0017: 0017-OvmfPkg-set-PcdVariableStoreSize-PcdMaxVolatileVaria.patch
# python3-devel and libuuid-devel are required for building tools.
@ -321,6 +315,9 @@ tar -xf %{SOURCE4} --strip-components=1 "*/Drivers" "*/Features" "*/Platform" "*
tar -xf %{SOURCE5} --strip-components=1 --directory RedfishPkg/Library/JsonLib/jansson
# include paths pointing to unused submodules
mkdir -p MdePkg/Library/MipiSysTLib/mipisyst/library/include
mkdir -p CryptoPkg/Library/MbedTlsLib/mbedtls/include
mkdir -p CryptoPkg/Library/MbedTlsLib/mbedtls/include/mbedtls
mkdir -p CryptoPkg/Library/MbedTlsLib/mbedtls/library
# Done by %setup, but we do not use it for the auxiliary tarballs
chmod -Rf a+rX,u+w,g-w,o-w .

4
sources
View File

@ -1,5 +1,5 @@
SHA512 (softfloat-20180726-gitb64af41.tar.xz) = f079debd1bfcc0fe64329a8947b0689ef49246793edcdd28a2879f6550c652b0cf0f53ac4f6f5ab61ac4f7933972e0019d0ab63eb9931b6884c2909f3a5ead30
SHA512 (jansson-2.13.1.tar.bz2) = 057f0eda43e4162569888d739f4d78d1d02fce8359400d8f66fdc6e440b0405cb457e1126820dc8ce51e9c4a7f4b7effc640caf1d54307c78c0c47c3fc093011
SHA512 (edk2-819cfc6b42a6.tar.xz) = c15af78de67b8eeb6a1070dbdfe535c0f6686ff5a602e6b2592c2736fe669f047e948206f6c80acbdb6d3ae372f5bad71caa3c7c8f7bad2056358b2c6eda1e37
SHA512 (edk2-platforms-e509ac5a729e.tar.xz) = 3722fe9916cba417807ebfb16d6b930e02a4645bd41d759e56799225bce6c71fb44245fa5879463761e1df45180bb715825d7ccbd96e0e1f95a90cf3bd3a05c5
SHA512 (openssl-rhel-3adb22b68e9fe61fc4863c2d2dc6cc6fc094b005.tar.xz) = 93ccefcf79b90d6661dbce51307511fd2427480d06ec0da9ec786030638f6a59a4bf15129288baac56b26eb64152f65101d5c64bc29859d5face0dbaa0400275
SHA512 (edk2-8736b8fdca85.tar.xz) = 217df116863f247b0316f8af643002abc0716a35c1b0260007127d443a7bd5dfced49c373c9ef483c3490f772d7f04f35817ce8a51592902e489e1ea9a005111
SHA512 (edk2-platforms-10e2eb030de3.tar.xz) = 8b0c3ff4fbfc6ed7622e0f34e379da3251c8d67d821d5f1d0c27a1d8294da848193105f2f94b7636233f91cfc726fbd6fae875e06db2dfd986393deb2e084c7d