541 lines
19 KiB
Plaintext
541 lines
19 KiB
Plaintext
# -*- cfg-sha: 9fc8b53ccd53cc8b64391f6252e1dba558ae660a73a72f10dcadff2ca5462243
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# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2015 Cavium, Inc
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# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2017 Cavium, Inc
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# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2010-2016 Intel Corporation
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# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2010-2017 Intel Corporation
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# RTE_EXEC_ENV values are the directories in mk/exec-env/
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CONFIG_RTE_EXEC_ENV="linuxapp"
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# RTE_ARCH values are architecture we compile for. directories in mk/arch/
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CONFIG_RTE_ARCH="arm64"
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# machine can define specific variables or action for a specific board
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# RTE_MACHINE values are architecture we compile for. directories in mk/machine/
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CONFIG_RTE_MACHINE="armv8a"
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# The compiler we use.
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# RTE_TOOLCHAIN values are architecture we compile for. directories in mk/toolchain/
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CONFIG_RTE_TOOLCHAIN="gcc"
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# Use intrinsics or assembly code for key routines
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CONFIG_RTE_FORCE_INTRINSICS=y
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# Machine forces strict alignment constraints.
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CONFIG_RTE_ARCH_STRICT_ALIGN=n
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# Compile to share library
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CONFIG_RTE_BUILD_SHARED_LIB=y
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# Use newest code breaking previous ABI
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CONFIG_RTE_NEXT_ABI=n
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# Major ABI to overwrite library specific LIBABIVER
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CONFIG_RTE_MAJOR_ABI=
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# Machine's cache line size
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CONFIG_RTE_CACHE_LINE_SIZE=128
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# Memory model
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CONFIG_RTE_USE_C11_MEM_MODEL=y
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# Compile Environment Abstraction Layer
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CONFIG_RTE_LIBRTE_EAL=y
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CONFIG_RTE_MAX_LCORE=256
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CONFIG_RTE_MAX_NUMA_NODES=8
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CONFIG_RTE_MAX_HEAPS=32
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CONFIG_RTE_MAX_MEMSEG_LISTS=64
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# each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages
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# or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller
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CONFIG_RTE_MAX_MEMSEG_PER_LIST=8192
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CONFIG_RTE_MAX_MEM_MB_PER_LIST=32768
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# a "type" is a combination of page size and NUMA node. total number of memseg
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# lists per type will be limited to either RTE_MAX_MEMSEG_PER_TYPE pages (split
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# over multiple lists of RTE_MAX_MEMSEG_PER_LIST pages), or
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# RTE_MAX_MEM_MB_PER_TYPE megabytes of memory (split over multiple lists of
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# RTE_MAX_MEM_MB_PER_LIST), whichever is smaller
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CONFIG_RTE_MAX_MEMSEG_PER_TYPE=32768
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CONFIG_RTE_MAX_MEM_MB_PER_TYPE=131072
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# global maximum usable amount of VA, in megabytes
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CONFIG_RTE_MAX_MEM_MB=524288
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CONFIG_RTE_MAX_MEMZONE=2560
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CONFIG_RTE_MAX_TAILQ=32
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CONFIG_RTE_ENABLE_ASSERT=n
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CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO
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CONFIG_RTE_LOG_HISTORY=256
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CONFIG_RTE_BACKTRACE=y
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CONFIG_RTE_LIBEAL_USE_HPET=n
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CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n
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CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
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CONFIG_RTE_EAL_IGB_UIO=n
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CONFIG_RTE_EAL_VFIO=y
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CONFIG_RTE_MAX_VFIO_GROUPS=64
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CONFIG_RTE_MAX_VFIO_CONTAINERS=64
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CONFIG_RTE_MALLOC_DEBUG=n
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CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=y
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CONFIG_RTE_USE_LIBBSD=n
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# Recognize/ignore architecture we compile for. AVX/AVX512 CPU flags for performance/power testing.
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# AVX512 is marked as experimental for now, will enable it after enough
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# field test and possible optimization.
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CONFIG_RTE_ENABLE_AVX=y
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CONFIG_RTE_ENABLE_AVX512=n
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# Default driver path (or "" to disable)
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CONFIG_RTE_EAL_PMD_PATH="/usr/lib64/dpdk-pmds"
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# Compile Environment Abstraction Layer to support Vmware TSC map
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CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y
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# Compile architecture we compile for. PCI library
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CONFIG_RTE_LIBRTE_PCI=y
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# Compile architecture we compile for. argument parser library
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CONFIG_RTE_LIBRTE_KVARGS=y
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# Compile generic ethernet library
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CONFIG_RTE_LIBRTE_ETHER=y
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CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n
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CONFIG_RTE_MAX_ETHPORTS=32
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CONFIG_RTE_MAX_QUEUES_PER_PORT=1024
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CONFIG_RTE_LIBRTE_IEEE1588=n
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CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
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CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
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CONFIG_RTE_ETHDEV_PROFILE_WITH_VTUNE=n
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# Turn off Tx preparation stage
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# Warning: rte_eth_tx_prepare() can be safely disabled only if using a
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# driver which do not implement any Tx preparation.
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CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
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# Common libraries, before Bus/PMDs
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CONFIG_RTE_LIBRTE_COMMON_DPAAX=n
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# Compile architecture we compile for. Intel FPGA bus
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CONFIG_RTE_LIBRTE_IFPGA_BUS=n
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# Compile PCI bus driver
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CONFIG_RTE_LIBRTE_PCI_BUS=y
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# Compile architecture we compile for. vdev bus
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CONFIG_RTE_LIBRTE_VDEV_BUS=y
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# Compile ARK PMD
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CONFIG_RTE_LIBRTE_ARK_PMD=n
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CONFIG_RTE_LIBRTE_ARK_PAD_TX=y
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CONFIG_RTE_LIBRTE_ARK_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
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CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
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# Compile Aquantia Atlantic PMD driver
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CONFIG_RTE_LIBRTE_ATLANTIC_PMD=n
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# Compile AMD PMD
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CONFIG_RTE_LIBRTE_AXGBE_PMD=n
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CONFIG_RTE_LIBRTE_AXGBE_PMD_DEBUG=n
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# Compile burst-oriented Broadcom PMD driver
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CONFIG_RTE_LIBRTE_BNX2X_PMD=n
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CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
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CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
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# Compile burst-oriented Broadcom BNXT PMD driver
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CONFIG_RTE_LIBRTE_BNXT_PMD=n
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# Compile burst-oriented Chelsio Terminator (CXGBE) PMD
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CONFIG_RTE_LIBRTE_CXGBE_PMD=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_CXGBE_TPUT=y
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# NXP DPAA Bus
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CONFIG_RTE_LIBRTE_DPAA_BUS=n
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CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n
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CONFIG_RTE_LIBRTE_DPAA_PMD=n
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CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n
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# Compile NXP DPAA2 FSL-MC Bus
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CONFIG_RTE_LIBRTE_FSLMC_BUS=n
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# Compile Support Libraries for NXP DPAA2
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CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n
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CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
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# Compile burst-oriented NXP DPAA2 PMD driver
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CONFIG_RTE_LIBRTE_DPAA2_PMD=n
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CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
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# Compile NXP ENETC PMD Driver
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CONFIG_RTE_LIBRTE_ENETC_PMD=n
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# Compile burst-oriented Amazon ENA PMD driver
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CONFIG_RTE_LIBRTE_ENA_PMD=n
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CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
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# Compile burst-oriented Cisco ENIC PMD driver
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CONFIG_RTE_LIBRTE_ENIC_PMD=n
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# Compile burst-oriented IGB & EM PMD drivers
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CONFIG_RTE_LIBRTE_EM_PMD=n
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CONFIG_RTE_LIBRTE_IGB_PMD=y
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CONFIG_RTE_LIBRTE_E1000_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
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# Compile burst-oriented IXGBE PMD driver
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CONFIG_RTE_LIBRTE_IXGBE_PMD=y
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CONFIG_RTE_LIBRTE_IXGBE_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n
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CONFIG_RTE_IXGBE_INC_VECTOR=y
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CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n
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# Compile burst-oriented I40E PMD driver
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CONFIG_RTE_LIBRTE_I40E_PMD=y
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CONFIG_RTE_LIBRTE_I40E_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_I40E_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_I40E_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y
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CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y
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CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
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CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64
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CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4
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# Compile burst-oriented FM10K PMD
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CONFIG_RTE_LIBRTE_FM10K_PMD=n
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CONFIG_RTE_LIBRTE_FM10K_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE=y
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CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y
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# Compile burst-oriented AVF PMD driver
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CONFIG_RTE_LIBRTE_AVF_PMD=n
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CONFIG_RTE_LIBRTE_AVF_INC_VECTOR=y
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CONFIG_RTE_LIBRTE_AVF_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_AVF_DEBUG_TX_FREE=n
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CONFIG_RTE_LIBRTE_AVF_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_AVF_16BYTE_RX_DESC=n
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# Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
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CONFIG_RTE_LIBRTE_MLX4_PMD=n
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CONFIG_RTE_LIBRTE_MLX4_DEBUG=n
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CONFIG_RTE_LIBRTE_MLX4_DLOPEN_DEPS=n
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# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5 & Bluefield
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# (MLX5) PMD
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CONFIG_RTE_LIBRTE_MLX5_PMD=n
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CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
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CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS=n
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# Compile burst-oriented Netronome NFP PMD driver
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CONFIG_RTE_LIBRTE_NFP_PMD=n
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CONFIG_RTE_LIBRTE_NFP_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_NFP_DEBUG_RX=n
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# QLogic 10G/25G/40G/50G/100G PMD
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CONFIG_RTE_LIBRTE_QEDE_PMD=n
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CONFIG_RTE_LIBRTE_QEDE_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_QEDE_DEBUG_RX=n
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#Provides abs path/name of architecture we compile for. firmware file.
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#Empty string denotes driver will use default firmware
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CONFIG_RTE_LIBRTE_QEDE_FW=""
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# Compile burst-oriented Solarflare libefx-based PMD
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CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
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CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n
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# Compile software PMD backed by SZEDATA2 device
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CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
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# Compile burst-oriented Cavium Thunderx NICVF PMD driver
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CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=n
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CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n
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# Compile burst-oriented Cavium LiquidIO PMD driver
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CONFIG_RTE_LIBRTE_LIO_PMD=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_MBOX=n
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CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
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# Compile burst-oriented Cavium OCTEONTX network PMD driver
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CONFIG_RTE_LIBRTE_OCTEONTX_PMD=n
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# Compile WRS accelerated virtual port (AVP) guest PMD driver
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CONFIG_RTE_LIBRTE_AVP_PMD=n
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CONFIG_RTE_LIBRTE_AVP_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_AVP_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_AVP_DEBUG_BUFFERS=n
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# Compile burst-oriented VIRTIO PMD driver
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CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
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CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DUMP=n
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# Compile virtio device emulation inside virtio PMD driver
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CONFIG_RTE_VIRTIO_USER=n
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# Compile burst-oriented VMXNET3 PMD driver
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CONFIG_RTE_LIBRTE_VMXNET3_PMD=n
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CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX_FREE=n
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# Compile software PMD backed by AF_PACKET sockets (Linux only)
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CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n
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# Compile link bonding PMD library
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CONFIG_RTE_LIBRTE_PMD_BOND=n
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CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
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CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n
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# Compile fail-safe PMD
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CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y
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# Compile Marvell PMD driver
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CONFIG_RTE_LIBRTE_MVPP2_PMD=n
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# Compile Marvell MVNETA PMD driver
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CONFIG_RTE_LIBRTE_MVNETA_PMD=n
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# Compile support for VMBus library
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CONFIG_RTE_LIBRTE_VMBUS=n
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# Compile native PMD for Hyper-V/Azure
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CONFIG_RTE_LIBRTE_NETVSC_PMD=n
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CONFIG_RTE_LIBRTE_NETVSC_DEBUG_RX=n
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CONFIG_RTE_LIBRTE_NETVSC_DEBUG_TX=n
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CONFIG_RTE_LIBRTE_NETVSC_DEBUG_DUMP=n
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# Compile virtual device driver for NetVSC on Hyper-V/Azure
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CONFIG_RTE_LIBRTE_VDEV_NETVSC_PMD=n
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# Compile null PMD
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CONFIG_RTE_LIBRTE_PMD_NULL=n
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# Compile software PMD backed by PCAP files
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CONFIG_RTE_LIBRTE_PMD_PCAP=n
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# Compile example software rings based PMD
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CONFIG_RTE_LIBRTE_PMD_RING=y
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CONFIG_RTE_PMD_RING_MAX_RX_RINGS=16
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CONFIG_RTE_PMD_RING_MAX_TX_RINGS=16
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# Compile SOFTNIC PMD
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CONFIG_RTE_LIBRTE_PMD_SOFTNIC=n
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# Compile architecture we compile for. TAP PMD
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# It is enabled by default for Linux only.
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CONFIG_RTE_LIBRTE_PMD_TAP=y
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# Do prefetch of packet data within PMD driver receive function
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CONFIG_RTE_PMD_PACKET_PREFETCH=y
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# Compile generic wireless base band device library
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# EXPERIMENTAL: API may change without prior notice
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CONFIG_RTE_LIBRTE_BBDEV=n
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CONFIG_RTE_BBDEV_MAX_DEVS=128
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CONFIG_RTE_BBDEV_OFFLOAD_COST=n
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# Compile PMD for NULL bbdev device
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CONFIG_RTE_LIBRTE_PMD_BBDEV_NULL=y
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# Compile PMD for turbo software bbdev device
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CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=n
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# Compile generic crypto device library
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CONFIG_RTE_LIBRTE_CRYPTODEV=n
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CONFIG_RTE_CRYPTO_MAX_DEVS=64
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# Compile PMD for ARMv8 Crypto device
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CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
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CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
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# Compile NXP CAAM JR crypto Driver
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CONFIG_RTE_LIBRTE_PMD_CAAM_JR=n
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CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=n
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# Compile NXP DPAA2 crypto sec driver for CAAM HW
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CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n
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# NXP DPAA caam - crypto driver
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CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n
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CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
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# Compile PMD for Cavium OCTEON TX crypto device
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CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y
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# Compile PMD for QuickAssist based devices - see docs for details
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CONFIG_RTE_LIBRTE_PMD_QAT=n
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CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
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# Max. number of QuickAssist devices, which can be detected and attached
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CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
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CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16
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CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
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# Compile PMD for virtio crypto devices
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CONFIG_RTE_LIBRTE_PMD_VIRTIO_CRYPTO=n
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# Number of maximum virtio crypto devices
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CONFIG_RTE_MAX_VIRTIO_CRYPTO=32
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# Compile PMD for AESNI backed device
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CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n
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# Compile PMD for Software backed device
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CONFIG_RTE_LIBRTE_PMD_OPENSSL=n
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# Compile PMD for AESNI GCM device
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CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=n
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# Compile PMD for SNOW 3G device
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CONFIG_RTE_LIBRTE_PMD_SNOW3G=n
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CONFIG_RTE_LIBRTE_PMD_SNOW3G_DEBUG=n
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# Compile PMD for KASUMI device
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CONFIG_RTE_LIBRTE_PMD_KASUMI=n
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# Compile PMD for ZUC device
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CONFIG_RTE_LIBRTE_PMD_ZUC=n
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# Compile PMD for Crypto Scheduler device
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CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=n
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# Compile PMD for NULL Crypto device
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CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=n
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# Compile PMD for AMD CCP crypto device
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CONFIG_RTE_LIBRTE_PMD_CCP=n
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# Compile PMD for Marvell Crypto device
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CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n
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# Compile generic security library
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CONFIG_RTE_LIBRTE_SECURITY=n
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# Compile generic compression device library
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CONFIG_RTE_LIBRTE_COMPRESSDEV=n
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CONFIG_RTE_COMPRESS_MAX_DEVS=64
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# Compile compressdev unit test
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CONFIG_RTE_COMPRESSDEV_TEST=n
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# Compile PMD for Octeontx ZIPVF compression device
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CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF=n
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# Compile PMD for ISA-L compression device
|
|
CONFIG_RTE_LIBRTE_PMD_ISAL=n
|
|
# Compile PMD for ZLIB compression device
|
|
CONFIG_RTE_LIBRTE_PMD_ZLIB=n
|
|
# Compile generic event device library
|
|
CONFIG_RTE_LIBRTE_EVENTDEV=n
|
|
CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n
|
|
CONFIG_RTE_EVENT_MAX_DEVS=16
|
|
CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
|
|
CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32
|
|
CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024
|
|
CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32
|
|
CONFIG_RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE=32
|
|
# Compile PMD for skeleton event device
|
|
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=n
|
|
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
|
|
# Compile PMD for software event device
|
|
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=n
|
|
# Compile PMD for distributed software event device
|
|
CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV=n
|
|
# Compile PMD for octeontx sso event device
|
|
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=n
|
|
# Compile PMD for OPDL event device
|
|
CONFIG_RTE_LIBRTE_PMD_OPDL_EVENTDEV=n
|
|
# Compile PMD for NXP DPAA event device
|
|
CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=n
|
|
# Compile PMD for NXP DPAA2 event device
|
|
CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n
|
|
# Compile raw device support
|
|
# EXPERIMENTAL: API may change without prior notice
|
|
CONFIG_RTE_LIBRTE_RAWDEV=n
|
|
CONFIG_RTE_RAWDEV_MAX_DEVS=10
|
|
CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV=n
|
|
# Compile PMD for NXP DPAA2 CMDIF raw device
|
|
CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV=n
|
|
# Compile PMD for NXP DPAA2 QDMA raw device
|
|
CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=n
|
|
# Compile PMD for Intel FPGA raw device
|
|
CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=n
|
|
# Compile librte_ring
|
|
CONFIG_RTE_LIBRTE_RING=y
|
|
# Compile librte_mempool
|
|
CONFIG_RTE_LIBRTE_MEMPOOL=y
|
|
CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE=512
|
|
CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n
|
|
# Compile Mempool drivers
|
|
CONFIG_RTE_DRIVER_MEMPOOL_BUCKET=y
|
|
CONFIG_RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB=64
|
|
CONFIG_RTE_DRIVER_MEMPOOL_RING=y
|
|
CONFIG_RTE_DRIVER_MEMPOOL_STACK=y
|
|
# Compile PMD for octeontx fpa mempool device
|
|
CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=n
|
|
# Compile librte_mbuf
|
|
CONFIG_RTE_LIBRTE_MBUF=y
|
|
CONFIG_RTE_LIBRTE_MBUF_DEBUG=n
|
|
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="ring_mp_mc"
|
|
CONFIG_RTE_MBUF_REFCNT_ATOMIC=y
|
|
CONFIG_RTE_PKTMBUF_HEADROOM=128
|
|
# Compile librte_timer
|
|
CONFIG_RTE_LIBRTE_TIMER=n
|
|
CONFIG_RTE_LIBRTE_TIMER_DEBUG=n
|
|
# Compile librte_cfgfile
|
|
CONFIG_RTE_LIBRTE_CFGFILE=n
|
|
# Compile librte_cmdline
|
|
CONFIG_RTE_LIBRTE_CMDLINE=y
|
|
CONFIG_RTE_LIBRTE_CMDLINE_DEBUG=n
|
|
# Compile librte_hash
|
|
CONFIG_RTE_LIBRTE_HASH=y
|
|
CONFIG_RTE_LIBRTE_HASH_DEBUG=n
|
|
# Compile librte_efd
|
|
CONFIG_RTE_LIBRTE_EFD=n
|
|
# Compile librte_member
|
|
CONFIG_RTE_LIBRTE_MEMBER=y
|
|
# Compile librte_jobstats
|
|
CONFIG_RTE_LIBRTE_JOBSTATS=n
|
|
# Compile architecture we compile for. device metrics library
|
|
CONFIG_RTE_LIBRTE_METRICS=y
|
|
# Compile architecture we compile for. bitrate statistics library
|
|
CONFIG_RTE_LIBRTE_BITRATE=y
|
|
# Compile architecture we compile for. latency statistics library
|
|
CONFIG_RTE_LIBRTE_LATENCY_STATS=y
|
|
# Compile librte_telemetry
|
|
CONFIG_RTE_LIBRTE_TELEMETRY=n
|
|
# Compile librte_lpm
|
|
CONFIG_RTE_LIBRTE_LPM=n
|
|
CONFIG_RTE_LIBRTE_LPM_DEBUG=n
|
|
# Compile librte_acl
|
|
CONFIG_RTE_LIBRTE_ACL=n
|
|
CONFIG_RTE_LIBRTE_ACL_DEBUG=n
|
|
# Compile librte_power
|
|
CONFIG_RTE_LIBRTE_POWER=n
|
|
CONFIG_RTE_LIBRTE_POWER_DEBUG=n
|
|
CONFIG_RTE_MAX_LCORE_FREQS=64
|
|
# Compile librte_net
|
|
CONFIG_RTE_LIBRTE_NET=y
|
|
# Compile librte_ip_frag
|
|
CONFIG_RTE_LIBRTE_IP_FRAG=y
|
|
CONFIG_RTE_LIBRTE_IP_FRAG_DEBUG=n
|
|
CONFIG_RTE_LIBRTE_IP_FRAG_MAX_FRAG=4
|
|
CONFIG_RTE_LIBRTE_IP_FRAG_TBL_STAT=n
|
|
# Compile GRO library
|
|
CONFIG_RTE_LIBRTE_GRO=y
|
|
# Compile GSO library
|
|
CONFIG_RTE_LIBRTE_GSO=y
|
|
# Compile librte_meter
|
|
CONFIG_RTE_LIBRTE_METER=y
|
|
# Compile librte_classify
|
|
CONFIG_RTE_LIBRTE_FLOW_CLASSIFY=n
|
|
# Compile librte_sched
|
|
CONFIG_RTE_LIBRTE_SCHED=n
|
|
CONFIG_RTE_SCHED_DEBUG=n
|
|
CONFIG_RTE_SCHED_RED=n
|
|
CONFIG_RTE_SCHED_COLLECT_STATS=n
|
|
CONFIG_RTE_SCHED_SUBPORT_TC_OV=n
|
|
CONFIG_RTE_SCHED_PORT_N_GRINDERS=8
|
|
CONFIG_RTE_SCHED_VECTOR=n
|
|
# Compile architecture we compile for. distributor library
|
|
CONFIG_RTE_LIBRTE_DISTRIBUTOR=n
|
|
# Compile architecture we compile for. reorder library
|
|
CONFIG_RTE_LIBRTE_REORDER=n
|
|
# Compile librte_port
|
|
CONFIG_RTE_LIBRTE_PORT=n
|
|
CONFIG_RTE_PORT_STATS_COLLECT=n
|
|
CONFIG_RTE_PORT_PCAP=n
|
|
# Compile librte_table
|
|
CONFIG_RTE_LIBRTE_TABLE=n
|
|
CONFIG_RTE_TABLE_STATS_COLLECT=n
|
|
# Compile librte_pipeline
|
|
CONFIG_RTE_LIBRTE_PIPELINE=n
|
|
CONFIG_RTE_PIPELINE_STATS_COLLECT=n
|
|
# Compile librte_kni
|
|
CONFIG_RTE_LIBRTE_KNI=n
|
|
CONFIG_RTE_LIBRTE_PMD_KNI=n
|
|
CONFIG_RTE_KNI_KMOD=n
|
|
CONFIG_RTE_KNI_KMOD_ETHTOOL=n
|
|
CONFIG_RTE_KNI_PREEMPT_DEFAULT=y
|
|
# Compile architecture we compile for. pdump library
|
|
CONFIG_RTE_LIBRTE_PDUMP=y
|
|
# Compile vhost user library
|
|
CONFIG_RTE_LIBRTE_VHOST=y
|
|
CONFIG_RTE_LIBRTE_VHOST_NUMA=y
|
|
CONFIG_RTE_LIBRTE_VHOST_DEBUG=n
|
|
# Compile vhost PMD
|
|
# To compile, CONFIG_RTE_LIBRTE_VHOST should be enabled.
|
|
CONFIG_RTE_LIBRTE_PMD_VHOST=y
|
|
# Compile IFC driver
|
|
# To compile, CONFIG_RTE_LIBRTE_VHOST and CONFIG_RTE_EAL_VFIO
|
|
# should be enabled.
|
|
CONFIG_RTE_LIBRTE_IFC_PMD=n
|
|
# Compile librte_bpf
|
|
CONFIG_RTE_LIBRTE_BPF=n
|
|
# allow load BPF from ELF files (requires libelf)
|
|
CONFIG_RTE_LIBRTE_BPF_ELF=n
|
|
# Compile architecture we compile for. test application
|
|
CONFIG_RTE_APP_TEST=y
|
|
CONFIG_RTE_APP_TEST_RESOURCE_TAR=n
|
|
# Compile architecture we compile for. procinfo application
|
|
CONFIG_RTE_PROC_INFO=y
|
|
# Compile architecture we compile for. PMD test application
|
|
CONFIG_RTE_TEST_PMD=y
|
|
CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n
|
|
CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n
|
|
# Compile architecture we compile for. bbdev test application
|
|
CONFIG_RTE_TEST_BBDEV=n
|
|
# Compile architecture we compile for. crypto performance application
|
|
CONFIG_RTE_APP_CRYPTO_PERF=n
|
|
# Compile architecture we compile for. eventdev application
|
|
CONFIG_RTE_APP_EVENTDEV=n
|
|
CONFIG_RTE_EXEC_ENV_LINUXAPP=y
|
|
CONFIG_RTE_LIBRTE_VHOST_POSTCOPY=n
|
|
# Common libraries, before Bus/PMDs
|
|
# NXP DPAA BUS and drivers
|
|
# NXP FSLMC BUS and DPAA2 drivers
|
|
# NXP ENETC PMD Driver
|
|
CONFIG_RTE_ARCH_ARM64=y
|
|
CONFIG_RTE_ARCH_64=y
|
|
# Maximum available cache line size in arm64 implementations.
|
|
# Setting to maximum available cache line size in generic config
|
|
# to address minimum DMA alignment across all arm64 implementations.
|
|
# Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
|
|
# to determine architecture we compile for. best threshold in code. Refer to notes in source file
|
|
# (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info.
|
|
CONFIG_RTE_ARCH_ARM64_MEMCPY=n
|
|
#CONFIG_RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD=2048
|
|
#CONFIG_RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD=512
|
|
# Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're
|
|
# strong reasons.
|
|
#CONFIG_RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK=n
|
|
#CONFIG_RTE_ARM64_MEMCPY_ALIGN_MASK=0xF
|
|
#CONFIG_RTE_ARM64_MEMCPY_STRICT_ALIGN=n
|
|
CONFIG_RTE_TOOLCHAIN_GCC=y
|
|
CONFIG_RTE_LIBRTE_PMD_XENVIRT=n
|