From 8c5ca6aac700c1336bb559ffaf0e6d5a831246bf Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Tue, 23 Sep 2025 13:42:28 +0200 Subject: [PATCH 43/45] dmidecode: Rework the decoding of the arm64 SoC ID Version 3.8.0 of the SMBIOS specification clarified the text related to Arm SoC_ID. Rework the code to match the new explanations more closely. The result if the same, just it's more obviously correct. Signed-off-by: Jean Delvare --- dmidecode.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/dmidecode.c b/dmidecode.c index 03ba201..a9685a1 100644 --- a/dmidecode.c +++ b/dmidecode.c @@ -1170,8 +1170,9 @@ static enum cpuid_type dmi_get_cpuid_type(const struct dmi_header *h) void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...), const char *label, enum cpuid_type sig, const u8 *p) { - u32 eax, midr, jep106, soc_revision; - u16 dx; + u32 eax, midr, soc_revision; + u16 dx, soc_id; + u8 jep106_code, jep106_bank; switch (sig) { @@ -1211,12 +1212,12 @@ void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...) case cpuid_arm_soc_id: /* ARM with SOC ID */ /* - * If Soc ID is supported, the first DWORD is the JEP-106 code; - * the second DWORD is the SoC revision value. - */ - jep106 = DWORD(p); - soc_revision = DWORD(p + 4); - /* + * If SoC ID is supported, the first WORD is a SiP + * defined SoC ID; the next BYTE is the JEP-106 + * identification code of the SiP; the next BYTE is + * its bank index; lastly, the next DWORD is the SoC + * revision value. + * * According to SMC Calling Convention (SMCCC) v1.3 specification * (https://developer.arm.com/documentation/den0028/d/), the format * of the values returned by the SMCCC_ARCH_SOC_ID call is as follows: @@ -1231,9 +1232,14 @@ void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...) * Bit[31] must be zero * Bits[30:0] SoC revision */ + soc_id = WORD(p); + jep106_code = p[2] & 0x7F; + jep106_bank = p[3] & 0x7F; + soc_revision = DWORD(p + 4); + pr_attr("Signature", "JEP-106 Bank 0x%02x Manufacturer 0x%02x, SoC ID 0x%04x, SoC Revision 0x%08x", - (jep106 >> 24) & 0x7F, (jep106 >> 16) & 0x7F, jep106 & 0xFFFF, soc_revision); + jep106_bank, jep106_code, soc_id, soc_revision); return; case cpuid_x86_intel: /* Intel */ -- 2.47.0