From 03b0d1462a13142b02e9330f5da8f54d1d920624 Mon Sep 17 00:00:00 2001 From: Lichen Liu Date: Tue, 14 Oct 2025 13:47:34 +0800 Subject: [PATCH] update to upstream fa268715 Resolves: RHEL-99252 Signed-off-by: Lichen Liu --- 0001-dmioem-Update-HPE-OEM-Type-238.patch | 43 ++ ...em-Decode-Dell-specific-DMI-type-218.patch | 103 +++++ ...em-Decode-Dell-specific-DMI-type-177.patch | 54 +++ 0004-dmioem-Update-HPE-OEM-Type-203.patch | 30 ++ 0005-dmioem-Update-HPE-OEM-Type-224.patch | 28 ++ ...e-out_of_spec-into-the-common-header.patch | 47 +++ ...em-Decode-Dell-specific-DMI-type-212.patch | 84 ++++ 0008-dmioem-Update-HPE-OEM-Type-216.patch | 37 ++ ...em-Decode-Dell-specific-DMI-type-178.patch | 59 +++ ...-the-sockets-in-Processor-Update-sec.patch | 51 +++ ...pdate-info-in-Processor-Family-field.patch | 45 ++ 0012-dmidecode.8-Fix-groff-error.patch | 26 ++ ...declaration-of-dmi_print_memory_size.patch | 26 ++ ...ode-portability-variable-declaration.patch | 70 ++++ ...m-Correct-HPE-OEM-Type-216-format-14.patch | 30 ++ ...m-Correct-HPE-OEM-Type-216-format-18.patch | 30 ++ 0017-dmioem-Update-HPE-OEM-Type-216.patch | 56 +++ 0018-dmioem-Update-HPE-OEM-Type-245.patch | 84 ++++ 0019-dmidecode-Use-binary-unit-prefixes.patch | 100 +++++ ...ecode-Mark-SMBIOS-3.7.1-as-supported.patch | 29 ++ ...decode-Update-copyright-year-to-2025.patch | 56 +++ ...nit-of-starting-and-ending-addresses.patch | 48 +++ 0023-Stop-open-coding-the-u64-type.patch | 383 ++++++++++++++++++ 0024-Get-rid-of-u64_range.patch | 54 +++ ...decode-Update-copyright-year-to-2025.patch | 26 ++ ...Support-42-byte-HPE-type-242-records.patch | 38 ++ ...-drive-capacity-in-power-of-10-units.patch | 86 ++++ 0028-dmioem-Spell-ProLiant-consistently.patch | 47 +++ ...de-Fix-missing-end-of-list-in-type-0.patch | 41 ++ 0030-dmioem-Add-type-HPE-Gen-12.patch | 34 ++ 0031-dmioem-Decode-HPE-OEM-Type-193.patch | 58 +++ 0032-Rename-variable-div.patch | 48 +++ ...code-Expose-memory-utility-functions.patch | 53 +++ 0034-dmioem-Decode-HPE-OEM-Type-202.patch | 119 ++++++ ...ype-199-on-theoretical-big-endian-sy.patch | 50 +++ ...ype-203-PCI-device-class-and-sub-cla.patch | 38 ++ ...oem-Drop-function-dmi_hp_203_pciinfo.patch | 51 +++ 0038-dmioem-Decode-HPE-OEM-Type-232.patch | 119 ++++++ 0039-dmidecode-Rename-BIOS-to-Firmware.patch | 178 ++++++++ ...ify-what-bios-and-firmware-keywords-.patch | 40 ++ ...midecode-Add-processor-family-Xeon-D.patch | 28 ++ ...eprecate-the-processor-voltage-field.patch | 34 ++ ...ork-the-decoding-of-the-arm64-SoC-ID.patch | 68 ++++ ...ecode-Mark-SMBIOS-3.8.0-as-supported.patch | 29 ++ 0045-dmioem-Decode-HPE-OEM-Type-244.patch | 120 ++++++ dmidecode.spec | 53 ++- 46 files changed, 2929 insertions(+), 2 deletions(-) create mode 100644 0001-dmioem-Update-HPE-OEM-Type-238.patch create mode 100644 0002-dmioem-Decode-Dell-specific-DMI-type-218.patch create mode 100644 0003-dmioem-Decode-Dell-specific-DMI-type-177.patch create mode 100644 0004-dmioem-Update-HPE-OEM-Type-203.patch create mode 100644 0005-dmioem-Update-HPE-OEM-Type-224.patch create mode 100644 0006-dmidecode-Move-out_of_spec-into-the-common-header.patch create mode 100644 0007-dmioem-Decode-Dell-specific-DMI-type-212.patch create mode 100644 0008-dmioem-Update-HPE-OEM-Type-216.patch create mode 100644 0009-dmioem-Decode-Dell-specific-DMI-type-178.patch create mode 100644 0010-dmidecode-Update-the-sockets-in-Processor-Update-sec.patch create mode 100644 0011-dmidecode-Update-info-in-Processor-Family-field.patch create mode 100644 0012-dmidecode.8-Fix-groff-error.patch create mode 100644 0013-Fix-the-forward-declaration-of-dmi_print_memory_size.patch create mode 100644 0014-dmioem-Improve-code-portability-variable-declaration.patch create mode 100644 0015-dmioem-Correct-HPE-OEM-Type-216-format-14.patch create mode 100644 0016-dmioem-Correct-HPE-OEM-Type-216-format-18.patch create mode 100644 0017-dmioem-Update-HPE-OEM-Type-216.patch create mode 100644 0018-dmioem-Update-HPE-OEM-Type-245.patch create mode 100644 0019-dmidecode-Use-binary-unit-prefixes.patch create mode 100644 0020-dmidecode-Mark-SMBIOS-3.7.1-as-supported.patch create mode 100644 0021-dmidecode-Update-copyright-year-to-2025.patch create mode 100644 0022-Fix-unit-of-starting-and-ending-addresses.patch create mode 100644 0023-Stop-open-coding-the-u64-type.patch create mode 100644 0024-Get-rid-of-u64_range.patch create mode 100644 0025-biosdecode-Update-copyright-year-to-2025.patch create mode 100644 0026-dmioem-Support-42-byte-HPE-type-242-records.patch create mode 100644 0027-dmioem-Display-drive-capacity-in-power-of-10-units.patch create mode 100644 0028-dmioem-Spell-ProLiant-consistently.patch create mode 100644 0029-dmidecode-Fix-missing-end-of-list-in-type-0.patch create mode 100644 0030-dmioem-Add-type-HPE-Gen-12.patch create mode 100644 0031-dmioem-Decode-HPE-OEM-Type-193.patch create mode 100644 0032-Rename-variable-div.patch create mode 100644 0033-dmidecode-Expose-memory-utility-functions.patch create mode 100644 0034-dmioem-Decode-HPE-OEM-Type-202.patch create mode 100644 0035-dmioem-Fix-HPE-type-199-on-theoretical-big-endian-sy.patch create mode 100644 0036-dmioem-Fix-HPE-type-203-PCI-device-class-and-sub-cla.patch create mode 100644 0037-dmioem-Drop-function-dmi_hp_203_pciinfo.patch create mode 100644 0038-dmioem-Decode-HPE-OEM-Type-232.patch create mode 100644 0039-dmidecode-Rename-BIOS-to-Firmware.patch create mode 100644 0040-dmidecode.8-Clarify-what-bios-and-firmware-keywords-.patch create mode 100644 0041-dmidecode-Add-processor-family-Xeon-D.patch create mode 100644 0042-dmidecode-Deprecate-the-processor-voltage-field.patch create mode 100644 0043-dmidecode-Rework-the-decoding-of-the-arm64-SoC-ID.patch create mode 100644 0044-dmidecode-Mark-SMBIOS-3.8.0-as-supported.patch create mode 100644 0045-dmioem-Decode-HPE-OEM-Type-244.patch diff --git a/0001-dmioem-Update-HPE-OEM-Type-238.patch b/0001-dmioem-Update-HPE-OEM-Type-238.patch new file mode 100644 index 0000000..43aa2ff --- /dev/null +++ b/0001-dmioem-Update-HPE-OEM-Type-238.patch @@ -0,0 +1,43 @@ +From 190a23ecfd6d743cb6efbc04bb4d95f0584fd68d Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Thu, 16 May 2024 13:12:43 +0200 +Subject: [PATCH 01/45] dmioem: Update HPE OEM Type 238 + +New field: PCI Segment Number. + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/dmioem.c b/dmioem.c +index 2f1f9f6..144bf3f 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -1346,14 +1346,20 @@ static int dmi_decode_hp(const struct dmi_header *h) + * 0x0C | Parent Hub | BYTE | Instance number of internal Hub + * 0x0D | Port Speed | BYTE | Enumerated value of speed configured by BIOS + * 0x0E | Device Path| STRING| UEFI Device Path of USB endpoint ++ * 0x0F | PCI Seg | WORD | PCI Segment number of the USB controller + */ + if (gen < G9) return 0; + pr_handle_name("%s Proliant USB Port Connector Correlation Record", company); + if (h->length < 0x0F) break; + if (!(opt.flags & FLAG_QUIET)) + pr_attr("Associated Handle", "0x%04X", WORD(data + 0x4)); +- pr_attr("PCI Device", "%02x:%02x.%x", data[0x6], +- data[0x7] >> 3, data[0x7] & 0x7); ++ if (h->length < 0x11) ++ pr_attr("PCI Device", "%02x:%02x.%x", data[0x6], ++ data[0x7] >> 3, data[0x7] & 0x7); ++ else ++ pr_attr("PCI Device", "%04x:%02x:%02x.%x", ++ WORD(data + 0xF), data[0x6], ++ data[0x7] >> 3, data[0x7] & 0x7); + dmi_hp_238_loc("Location", data[0x8]); + dmi_hp_238_flags("Management Port", WORD(data + 0x9)); + pr_attr("Port Instance", "%d", data[0xB]); +-- +2.47.0 + diff --git a/0002-dmioem-Decode-Dell-specific-DMI-type-218.patch b/0002-dmioem-Decode-Dell-specific-DMI-type-218.patch new file mode 100644 index 0000000..dd67639 --- /dev/null +++ b/0002-dmioem-Decode-Dell-specific-DMI-type-218.patch @@ -0,0 +1,103 @@ +From cb1100560615c2d015f3917fe48ea5b244e8fe31 Mon Sep 17 00:00:00 2001 +From: Armin Wolf +Date: Fri, 5 Jul 2024 14:30:05 +0200 +Subject: [PATCH 02/45] dmioem: Decode Dell-specific DMI type 218 + +OEM DMI type 218 is used by the dell-smbios-base driver to retrieve +information about the Dell Token Interface. Include the available +information in the output of dmidecode. + +Signed-off-by: Armin Wolf +Signed-off-by: Jean Delvare +--- + dmioem.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 53 insertions(+) + +diff --git a/dmioem.c b/dmioem.c +index 144bf3f..b6b0f49 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -38,6 +38,7 @@ enum DMI_VENDORS + { + VENDOR_UNKNOWN, + VENDOR_ACER, ++ VENDOR_DELL, + VENDOR_HP, + VENDOR_HPE, + VENDOR_IBM, +@@ -56,6 +57,8 @@ void dmi_set_vendor(const char *v, const char *p) + { + const struct { const char *str; enum DMI_VENDORS id; } vendor[] = { + { "Acer", VENDOR_ACER }, ++ { "Dell Computer Corporation", VENDOR_DELL }, ++ { "Dell Inc.", VENDOR_DELL }, + { "HP", VENDOR_HP }, + { "Hewlett-Packard", VENDOR_HP }, + { "HPE", VENDOR_HPE }, +@@ -129,6 +132,54 @@ static int dmi_decode_acer(const struct dmi_header *h) + return 1; + } + ++/* ++ * Dell-specific data structures are decoded here. ++ */ ++ ++static void dmi_dell_token_interface(const struct dmi_header *h) ++{ ++ int tokens = (h->length - 0x0B) / 0x06; ++ u8 *data = h->data; ++ u8 *token; ++ ++ pr_attr("Command I/O Address", "0x%04x", WORD(data + 0x04)); ++ pr_attr("Command I/O Code", "0x%02x", data[0x06]); ++ pr_attr("Supported Command Classes Bitmap", "0x%08x", DWORD(data + 0x07)); ++ ++ /* ++ * Final token is a terminator, so we ignore it. ++ */ ++ if (tokens <= 1) ++ return; ++ ++ pr_list_start("Tokens", NULL); ++ for (int i = 0; i < tokens - 1; i++) ++ { ++ token = data + 0x0B + 0x06 * i; ++ pr_list_item("0x%04hx (location 0x%04hx, value 0x%04hx)", ++ WORD(token + 0x00), WORD(token + 0x02), ++ WORD(token + 0x04)); ++ } ++ pr_list_end(); ++} ++ ++static int dmi_decode_dell(const struct dmi_header *h) ++{ ++ switch (h->type) ++ { ++ case 218: ++ pr_handle_name("Dell Token Interface"); ++ if (h->length < 0x0B) break; ++ dmi_dell_token_interface(h); ++ break; ++ ++ default: ++ return 0; ++ } ++ ++ return 1; ++} ++ + /* + * HPE-specific data structures are decoded here. + * +@@ -1708,6 +1759,8 @@ int dmi_decode_oem(const struct dmi_header *h) + return dmi_decode_hp(h); + case VENDOR_ACER: + return dmi_decode_acer(h); ++ case VENDOR_DELL: ++ return dmi_decode_dell(h); + case VENDOR_IBM: + case VENDOR_LENOVO: + return dmi_decode_ibm_lenovo(h); +-- +2.47.0 + diff --git a/0003-dmioem-Decode-Dell-specific-DMI-type-177.patch b/0003-dmioem-Decode-Dell-specific-DMI-type-177.patch new file mode 100644 index 0000000..8544330 --- /dev/null +++ b/0003-dmioem-Decode-Dell-specific-DMI-type-177.patch @@ -0,0 +1,54 @@ +From c86cb489d3b5cb1ea371546f4ca9a485f4c2bee6 Mon Sep 17 00:00:00 2001 +From: Armin Wolf +Date: Fri, 5 Jul 2024 14:30:11 +0200 +Subject: [PATCH 03/45] dmioem: Decode Dell-specific DMI type 177 + +OEM DMI type 177 contains various BIOS flags used by the +dell-wmi-descriptor driver. Include the available information in the +output of dmidecode. + +Signed-off-by: Armin Wolf +Signed-off-by: Jean Delvare +--- + dmioem.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/dmioem.c b/dmioem.c +index b6b0f49..62fe10e 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -136,6 +136,14 @@ static int dmi_decode_acer(const struct dmi_header *h) + * Dell-specific data structures are decoded here. + */ + ++static void dmi_dell_bios_flags(u64 flags) ++{ ++ /* ++ * TODO: The meaning of the other bits is unknown. ++ */ ++ pr_attr("ACPI WMI Supported", "%s", (flags.l & (1 << 1)) ? "Yes" : "No"); ++} ++ + static void dmi_dell_token_interface(const struct dmi_header *h) + { + int tokens = (h->length - 0x0B) / 0x06; +@@ -165,8 +173,16 @@ static void dmi_dell_token_interface(const struct dmi_header *h) + + static int dmi_decode_dell(const struct dmi_header *h) + { ++ u8 *data = h->data; ++ + switch (h->type) + { ++ case 177: ++ pr_handle_name("Dell BIOS Flags"); ++ if (h->length < 0x0C) break; ++ dmi_dell_bios_flags(QWORD(data + 0x04)); ++ break; ++ + case 218: + pr_handle_name("Dell Token Interface"); + if (h->length < 0x0B) break; +-- +2.47.0 + diff --git a/0004-dmioem-Update-HPE-OEM-Type-203.patch b/0004-dmioem-Update-HPE-OEM-Type-203.patch new file mode 100644 index 0000000..b01f005 --- /dev/null +++ b/0004-dmioem-Update-HPE-OEM-Type-203.patch @@ -0,0 +1,30 @@ +From 6ef4bf27fcf0904ab1e5cebbe427e0afa50f6a90 Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Fri, 5 Jul 2024 14:39:49 +0200 +Subject: [PATCH 04/45] dmioem: Update HPE OEM Type 203 + +Update device type. + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/dmioem.c b/dmioem.c +index 62fe10e..c8f4a50 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -328,7 +328,8 @@ static void dmi_hp_203_devtyp(const char *fname, unsigned int code) + "Dynamic Smart Array Controller", + "File", + "NVME Hard Drive", +- "NVDIMM" /* 0x11 */ ++ "NVDIMM", /* 0x11 */ ++ "Embedded GPU" + }; + + if (code < ARRAY_SIZE(type)) +-- +2.47.0 + diff --git a/0005-dmioem-Update-HPE-OEM-Type-224.patch b/0005-dmioem-Update-HPE-OEM-Type-224.patch new file mode 100644 index 0000000..c764379 --- /dev/null +++ b/0005-dmioem-Update-HPE-OEM-Type-224.patch @@ -0,0 +1,28 @@ +From 2afb0fcb568a7078b35b2d115af1277300959521 Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Fri, 5 Jul 2024 14:39:54 +0200 +Subject: [PATCH 05/45] dmioem: Update HPE OEM Type 224 + +Update chip identifier. + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/dmioem.c b/dmioem.c +index c8f4a50..d35ccb6 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -613,6 +613,7 @@ static void dmi_hp_224_chipid(u16 code) + "Nationz TPM", + "STMicroGen10 Plus TPM", + "STMicroGen11 TPM", /* 0x05 */ ++ "STMicroGen12 TPM", + }; + if ((code & 0xff) < ARRAY_SIZE(chipid)) + str = chipid[code & 0xff]; +-- +2.47.0 + diff --git a/0006-dmidecode-Move-out_of_spec-into-the-common-header.patch b/0006-dmidecode-Move-out_of_spec-into-the-common-header.patch new file mode 100644 index 0000000..2840a2f --- /dev/null +++ b/0006-dmidecode-Move-out_of_spec-into-the-common-header.patch @@ -0,0 +1,47 @@ +From d5af407ae937b0ab26b72e8c250112d5a8543a63 Mon Sep 17 00:00:00 2001 +From: Armin Wolf +Date: Fri, 26 Jul 2024 10:56:00 +0200 +Subject: [PATCH 06/45] dmidecode: Move out_of_spec into the common header + +Other components like dmioem might also encounter situations where +they encounter invalid values. In such cases, using a standard string +for displaying invalid values is needed. + +Move out_of_spec into the common header file so other components like +dmioem can use it. + +Signed-off-by: Armin Wolf +Signed-off-by: Jean Delvare +--- + dmidecode.c | 1 - + dmidecode.h | 2 ++ + 2 files changed, 2 insertions(+), 1 deletion(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 45a6c06..547cb48 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -85,7 +85,6 @@ + #include "dmioem.h" + #include "dmioutput.h" + +-#define out_of_spec "" + static const char *bad_index = ""; + + enum cpuid_type cpuid_type = cpuid_none; +diff --git a/dmidecode.h b/dmidecode.h +index e03c957..b634b55 100644 +--- a/dmidecode.h ++++ b/dmidecode.h +@@ -23,6 +23,8 @@ + + #include "types.h" + ++#define out_of_spec "" ++ + struct dmi_header + { + u8 type; +-- +2.47.0 + diff --git a/0007-dmioem-Decode-Dell-specific-DMI-type-212.patch b/0007-dmioem-Decode-Dell-specific-DMI-type-212.patch new file mode 100644 index 0000000..e33444c --- /dev/null +++ b/0007-dmioem-Decode-Dell-specific-DMI-type-212.patch @@ -0,0 +1,84 @@ +From 3278541d8917be26b1ce8433b0c65171c3997fda Mon Sep 17 00:00:00 2001 +From: Armin Wolf +Date: Fri, 26 Jul 2024 10:56:05 +0200 +Subject: [PATCH 07/45] dmioem: Decode Dell-specific DMI type 212 + +OEM DMI type 212 is used by libsmbios to access the CMOS memory +on Dell machines. Include the available information in the +output of dmidecode. + +Signed-off-by: Armin Wolf +Signed-off-by: Jean Delvare +--- + dmioem.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/dmioem.c b/dmioem.c +index d35ccb6..fb80506 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -144,6 +144,48 @@ static void dmi_dell_bios_flags(u64 flags) + pr_attr("ACPI WMI Supported", "%s", (flags.l & (1 << 1)) ? "Yes" : "No"); + } + ++static void dmi_dell_indexed_io_access(const struct dmi_header *h) ++{ ++ static const char *checksum_types[] = { ++ "Word Checksum", ++ "Byte Checksum", ++ "CRC Checksum", ++ "Negative Word Checksum", /* 0x03 */ ++ }; ++ int tokens = (h->length - 0x0C) / 0x05; ++ const char *str = out_of_spec; ++ u8 *data = h->data; ++ u8 *token; ++ u8 type; ++ ++ pr_attr("Index Port", "0x%04hx", WORD(data + 0x04)); ++ pr_attr("Data Port", "0x%04hx", WORD(data + 0x06)); ++ ++ type = data[0x08]; ++ if (type < ARRAY_SIZE(checksum_types)) ++ str = checksum_types[type]; ++ ++ pr_attr("Type", "%s", str); ++ pr_attr("Checked Range Start Index", "0x%02hhx", data[0x09]); ++ pr_attr("Checked Range End Index", "0x%02hhx", data[0x0a]); ++ pr_attr("Check Value Index", "0x%02hhx", data[0x0b]); ++ ++ /* ++ * Final token seems to be a terminator, so we ignore it. ++ */ ++ if (tokens <= 1) ++ return; ++ ++ pr_list_start("Tokens", NULL); ++ for (int i = 0; i < tokens - 1; i++) ++ { ++ token = data + 0x0C + 0x05 * i; ++ pr_list_item("0x%04hx (location 0x%02hhx, AND mask 0x%02hhx, OR mask 0x%02hhx)", ++ WORD(token + 0x00), token[0x02], token[0x03], token[0x04]); ++ } ++ pr_list_end(); ++} ++ + static void dmi_dell_token_interface(const struct dmi_header *h) + { + int tokens = (h->length - 0x0B) / 0x06; +@@ -183,6 +225,12 @@ static int dmi_decode_dell(const struct dmi_header *h) + dmi_dell_bios_flags(QWORD(data + 0x04)); + break; + ++ case 212: ++ pr_handle_name("Dell Indexed I/O Access"); ++ if (h->length < 0x0C) break; ++ dmi_dell_indexed_io_access(h); ++ break; ++ + case 218: + pr_handle_name("Dell Token Interface"); + if (h->length < 0x0B) break; +-- +2.47.0 + diff --git a/0008-dmioem-Update-HPE-OEM-Type-216.patch b/0008-dmioem-Update-HPE-OEM-Type-216.patch new file mode 100644 index 0000000..0b5f3f9 --- /dev/null +++ b/0008-dmioem-Update-HPE-OEM-Type-216.patch @@ -0,0 +1,37 @@ +From b70f6ee0f2e879deebc630da20d27d350407889e Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Tue, 3 Sep 2024 17:04:37 +0200 +Subject: [PATCH 08/45] dmioem: Update HPE OEM Type 216 + +Update enumerated firmware types. + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/dmioem.c b/dmioem.c +index fb80506..964f287 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -479,12 +479,15 @@ static void dmi_hp_216_fw_type(u16 code) + "Intel SATA VROC", + "Intel SPS Firmware", + "Secondary System Programmable Logic Device", +- "CPU MEZZ Programmable Logic Device", /* 0x37 */ ++ "CPU Mezzanine Board CPLD", /* 0x37 */ + "Intel Artic Sound -M Accelerator Models Firmware", + "Ampere System Control Processor (SCP - PMPro+SMPro)", + "Intel CFR information", /* 0x3A */ + "OCP cards", + "DC-SCM CPLD", ++ "Power Distribution Board CPLD", ++ "PCIe Switch Board CPLD", ++ "Sideband Board CPLD", + }; + + if (code < ARRAY_SIZE(type)) +-- +2.47.0 + diff --git a/0009-dmioem-Decode-Dell-specific-DMI-type-178.patch b/0009-dmioem-Decode-Dell-specific-DMI-type-178.patch new file mode 100644 index 0000000..6b1c8de --- /dev/null +++ b/0009-dmioem-Decode-Dell-specific-DMI-type-178.patch @@ -0,0 +1,59 @@ +From c72b8f187e740d5142d53bbb4f654156ce1a3d17 Mon Sep 17 00:00:00 2001 +From: Armin Wolf +Date: Wed, 16 Oct 2024 10:51:57 +0200 +Subject: [PATCH 09/45] dmioem: Decode Dell-specific DMI type 178 + +OEM DMI type 178 is used by the dell-wmi-base driver to translate +WMI event scancodes into hotkey events. Include the available +information in the output of dmidecode. + +Signed-off-by: Armin Wolf +Signed-off-by: Jean Delvare +--- + dmioem.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +diff --git a/dmioem.c b/dmioem.c +index 964f287..1df77ec 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -144,6 +144,24 @@ static void dmi_dell_bios_flags(u64 flags) + pr_attr("ACPI WMI Supported", "%s", (flags.l & (1 << 1)) ? "Yes" : "No"); + } + ++static void dmi_dell_hotkeys(const struct dmi_header *h) ++{ ++ int count = (h->length - 0x04) / 0x04; ++ u8 *hotkey = h->data + 0x04; ++ ++ if (!count) ++ return; ++ ++ pr_list_start("Hotkey Mappings", NULL); ++ for (int i = 0; i < count; i++) ++ { ++ pr_list_item("Scancode 0x%04hx -> Keycode 0x%04hx", ++ WORD(hotkey + 0x00), WORD(hotkey + 0x02)); ++ hotkey += 0x04; ++ } ++ pr_list_end(); ++} ++ + static void dmi_dell_indexed_io_access(const struct dmi_header *h) + { + static const char *checksum_types[] = { +@@ -225,6 +243,11 @@ static int dmi_decode_dell(const struct dmi_header *h) + dmi_dell_bios_flags(QWORD(data + 0x04)); + break; + ++ case 178: ++ pr_handle_name("Dell Hotkeys"); ++ dmi_dell_hotkeys(h); ++ break; ++ + case 212: + pr_handle_name("Dell Indexed I/O Access"); + if (h->length < 0x0C) break; +-- +2.47.0 + diff --git a/0010-dmidecode-Update-the-sockets-in-Processor-Update-sec.patch b/0010-dmidecode-Update-the-sockets-in-Processor-Update-sec.patch new file mode 100644 index 0000000..7271e45 --- /dev/null +++ b/0010-dmidecode-Update-the-sockets-in-Processor-Update-sec.patch @@ -0,0 +1,51 @@ +From c8daa70208e0ef89a0478f3abda2b55d4d0c8d3d Mon Sep 17 00:00:00 2001 +From: Jessie Chen +Date: Tue, 4 Feb 2025 14:11:43 +0100 +Subject: [PATCH 10/45] dmidecode: Update the sockets in Processor Update + section +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +When running the dmidecode command to check SMBIOS Processor Information +(type 4), the "Upgrade" for CPU in the result shows "", +because the latest version of the dmidecode source code doesn't cover +the sockets beyond 50h in the Processor Information — Processor Upgrade +section of SMBIOS version 3.8. So, add the parts of the SMBIOS 3.8 +Processor Information — Processor Upgrade section beyond socket 50h to +the end of "dmi_processor_upgrade" in the source code, and update the +conditional statements to include the current last value, 57h. + +Signed-off-by: Jessie Chen +Signed-off-by: Jean Delvare +--- + dmidecode.c | 11 +++++++++-- + 1 file changed, 9 insertions(+), 2 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 547cb48..7a3a30f 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -1462,10 +1462,17 @@ static const char *dmi_processor_upgrade(u8 code) + "Socket BGA1190", + "Socket BGA4129", + "Socket LGA4710", +- "Socket LGA7529" /* 0x50 */ ++ "Socket LGA7529", ++ "Socket BGA1964", ++ "Socket BGA1792", ++ "Socket BGA2049", ++ "Socket BGA2551", ++ "Socket LGA1851", ++ "Socket BGA2114", ++ "Socket BGA2833" /* 0x57 */ + }; + +- if (code >= 0x01 && code <= 0x50) ++ if (code >= 0x01 && code <= 0x57) + return upgrade[code - 0x01]; + return out_of_spec; + } +-- +2.47.0 + diff --git a/0011-dmidecode-Update-info-in-Processor-Family-field.patch b/0011-dmidecode-Update-info-in-Processor-Family-field.patch new file mode 100644 index 0000000..6592b49 --- /dev/null +++ b/0011-dmidecode-Update-info-in-Processor-Family-field.patch @@ -0,0 +1,45 @@ +From e637a26990fae8d365768a5592fe6dc581d22ec9 Mon Sep 17 00:00:00 2001 +From: Jessie Chen +Date: Thu, 13 Feb 2025 17:05:19 +0100 +Subject: [PATCH 11/45] dmidecode: Update info in Processor Family field +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +When running the dmidecode command to check SMBIOS Processor Information +(type 4), the "Family" for CPU in the result shows "", +because the latest version of the dmidecode source code doesn't cover +the values for the Processor Information beyond 300h in the +Processor Information — Processor Family section of SMBIOS version 3.8. +So, add the parts of the SMBIOS 3.8 Processor Information — Processor Family +section beyond value 300h to the end of "0x271" in the source code. + +Signed-off-by: Jessie Chen +Signed-off-by: Jean Delvare +--- + dmidecode.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/dmidecode.c b/dmidecode.c +index 7a3a30f..1194a9c 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -1010,6 +1010,15 @@ static const char *dmi_processor_family(const struct dmi_header *h, u16 ver) + { 0x26F, "Multi-Core Loongson 3B 5xxx" }, + { 0x270, "Multi-Core Loongson 3C 5xxx" }, + { 0x271, "Multi-Core Loongson 3D 5xxx" }, ++ ++ { 0x300, "Core 3" }, ++ { 0x301, "Core 5" }, ++ { 0x302, "Core 7" }, ++ { 0x303, "Core 9" }, ++ { 0x304, "Core Ultra 3" }, ++ { 0x305, "Core Ultra 5" }, ++ { 0x306, "Core Ultra 7" }, ++ { 0x307, "Core Ultra 9" }, + }; + /* + * Note to developers: when adding entries to this list, check if +-- +2.47.0 + diff --git a/0012-dmidecode.8-Fix-groff-error.patch b/0012-dmidecode.8-Fix-groff-error.patch new file mode 100644 index 0000000..dce0c93 --- /dev/null +++ b/0012-dmidecode.8-Fix-groff-error.patch @@ -0,0 +1,26 @@ +From 525113bc79ad48bd7b20d9b983efbd226d1aac11 Mon Sep 17 00:00:00 2001 +From: Soren Stoutner +Date: Thu, 13 Feb 2025 17:05:23 +0100 +Subject: [PATCH 12/45] dmidecode.8: Fix groff error +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Thanks to Jörg Frings-Fürst for forwarding this fix. +--- + man/dmidecode.8 | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/man/dmidecode.8 b/man/dmidecode.8 +index 77c89a5..6636b72 100644 +--- a/man/dmidecode.8 ++++ b/man/dmidecode.8 +@@ -1,3 +1,5 @@ ++'\" t ++.\" ** The above line should force tbl to be a preprocessor ** + .TH DMIDECODE 8 "February 2023" "dmidecode" + .\" + .SH NAME +-- +2.47.0 + diff --git a/0013-Fix-the-forward-declaration-of-dmi_print_memory_size.patch b/0013-Fix-the-forward-declaration-of-dmi_print_memory_size.patch new file mode 100644 index 0000000..d414b1e --- /dev/null +++ b/0013-Fix-the-forward-declaration-of-dmi_print_memory_size.patch @@ -0,0 +1,26 @@ +From 3d064ec6fe09b9febd01d044d05e30350361edff Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Sun, 13 Apr 2025 16:52:17 +0200 +Subject: [PATCH 13/45] Fix the forward declaration of dmi_print_memory_size() + +Use the same parameter names as the function itself. +--- + dmidecode.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/dmidecode.h b/dmidecode.h +index b634b55..3b895f9 100644 +--- a/dmidecode.h ++++ b/dmidecode.h +@@ -49,7 +49,7 @@ extern enum cpuid_type cpuid_type; + + int is_printable(const u8 *data, int len); + const char *dmi_string(const struct dmi_header *dm, u8 s); +-void dmi_print_memory_size(const char *addr, u64 code, int shift); ++void dmi_print_memory_size(const char *attr, u64 code, int shift); + void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...), + const char *label, enum cpuid_type sig, const u8 *p); + +-- +2.47.0 + diff --git a/0014-dmioem-Improve-code-portability-variable-declaration.patch b/0014-dmioem-Improve-code-portability-variable-declaration.patch new file mode 100644 index 0000000..0c7fc2c --- /dev/null +++ b/0014-dmioem-Improve-code-portability-variable-declaration.patch @@ -0,0 +1,70 @@ +From f4cad05d70e8dff2cf1fc6306431ea066b509ac7 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Mon, 14 Apr 2025 09:01:32 +0200 +Subject: [PATCH 14/45] dmioem: Improve code portability (variable + declarations) + +For better code portability, declare variables at the beginning of +their block scope. + +Signed-off-by: Jean Delvare +--- + dmioem.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/dmioem.c b/dmioem.c +index 1df77ec..453e0ad 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -148,12 +148,13 @@ static void dmi_dell_hotkeys(const struct dmi_header *h) + { + int count = (h->length - 0x04) / 0x04; + u8 *hotkey = h->data + 0x04; ++ int i; + + if (!count) + return; + + pr_list_start("Hotkey Mappings", NULL); +- for (int i = 0; i < count; i++) ++ for (i = 0; i < count; i++) + { + pr_list_item("Scancode 0x%04hx -> Keycode 0x%04hx", + WORD(hotkey + 0x00), WORD(hotkey + 0x02)); +@@ -175,6 +176,7 @@ static void dmi_dell_indexed_io_access(const struct dmi_header *h) + u8 *data = h->data; + u8 *token; + u8 type; ++ int i; + + pr_attr("Index Port", "0x%04hx", WORD(data + 0x04)); + pr_attr("Data Port", "0x%04hx", WORD(data + 0x06)); +@@ -195,7 +197,7 @@ static void dmi_dell_indexed_io_access(const struct dmi_header *h) + return; + + pr_list_start("Tokens", NULL); +- for (int i = 0; i < tokens - 1; i++) ++ for (i = 0; i < tokens - 1; i++) + { + token = data + 0x0C + 0x05 * i; + pr_list_item("0x%04hx (location 0x%02hhx, AND mask 0x%02hhx, OR mask 0x%02hhx)", +@@ -209,6 +211,7 @@ static void dmi_dell_token_interface(const struct dmi_header *h) + int tokens = (h->length - 0x0B) / 0x06; + u8 *data = h->data; + u8 *token; ++ int i; + + pr_attr("Command I/O Address", "0x%04x", WORD(data + 0x04)); + pr_attr("Command I/O Code", "0x%02x", data[0x06]); +@@ -221,7 +224,7 @@ static void dmi_dell_token_interface(const struct dmi_header *h) + return; + + pr_list_start("Tokens", NULL); +- for (int i = 0; i < tokens - 1; i++) ++ for (i = 0; i < tokens - 1; i++) + { + token = data + 0x0B + 0x06 * i; + pr_list_item("0x%04hx (location 0x%04hx, value 0x%04hx)", +-- +2.47.0 + diff --git a/0015-dmioem-Correct-HPE-OEM-Type-216-format-14.patch b/0015-dmioem-Correct-HPE-OEM-Type-216-format-14.patch new file mode 100644 index 0000000..1468ed2 --- /dev/null +++ b/0015-dmioem-Correct-HPE-OEM-Type-216-format-14.patch @@ -0,0 +1,30 @@ +From 588bdd6bfc6809088f5e2bc25f3962c4878a3f88 Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Tue, 15 Apr 2025 11:02:52 +0200 +Subject: [PATCH 15/45] dmioem: Correct HPE OEM Type 216 format 14 + +Decode of Version Data Format 0E is five bytes, not four. + +Fixes: 9d2bbd5db427b063da ("dmioem: Decode HPE OEM Record 216") +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/dmioem.c b/dmioem.c +index 453e0ad..036e285 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -583,7 +583,7 @@ static void dmi_hp_216_version(u8 format, u8 *data) + pr_attr(name, "%d", data[0]); + break; + case 14: +- pr_attr(name, "%d.%d.%d.%d", data[0], data[1], data[2], data[3]); ++ pr_attr(name, "%d.%d.%d.%d", data[0], data[1], data[2], WORD(data+3)); + break; + case 15: + pr_attr(name, "%d.%d.%d.%d (%.2d/%.2d/%d)", +-- +2.47.0 + diff --git a/0016-dmioem-Correct-HPE-OEM-Type-216-format-18.patch b/0016-dmioem-Correct-HPE-OEM-Type-216-format-18.patch new file mode 100644 index 0000000..98bdd66 --- /dev/null +++ b/0016-dmioem-Correct-HPE-OEM-Type-216-format-18.patch @@ -0,0 +1,30 @@ +From 0741131774c597515958c39168c3bc0a8395e4d9 Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Tue, 15 Apr 2025 11:02:56 +0200 +Subject: [PATCH 16/45] dmioem: Correct HPE OEM Type 216 format 18 + +Format 18 should be in dollar/cents dotation. + +Fixes: 9d2bbd5db427b063da ("dmioem: Decode HPE OEM Record 216") +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/dmioem.c b/dmioem.c +index 036e285..d73c2ec 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -598,7 +598,7 @@ static void dmi_hp_216_version(u8 format, u8 *data) + pr_attr(name, "%08X", DWORD(data)); + break; + case 18: +- pr_attr(name, "%d.%2d", data[0], data[1]); ++ pr_attr(name, "%d.%02d", data[0], data[1]); + break; + case 3: /* fall through */ + default: +-- +2.47.0 + diff --git a/0017-dmioem-Update-HPE-OEM-Type-216.patch b/0017-dmioem-Update-HPE-OEM-Type-216.patch new file mode 100644 index 0000000..196fb5c --- /dev/null +++ b/0017-dmioem-Update-HPE-OEM-Type-216.patch @@ -0,0 +1,56 @@ +From fcc75f94405a965090bb1882178c1930750b7c3d Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Tue, 15 Apr 2025 11:03:33 +0200 +Subject: [PATCH 17/45] dmioem: Update HPE OEM Type 216 + +Update Enumerated Firmware Types. +Update Enumerated Version Data Format. + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/dmioem.c b/dmioem.c +index d73c2ec..d4a49ae 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -470,8 +470,8 @@ static void dmi_hp_216_fw_type(u16 code) + "SPI Descriptor Version", + "Innovation Engine Firmware (IE Firmware)", + "UMB Backplane Firmware", +- "Reserved", /* 0x14 */ +- "Reserved", ++ "Embedded Diagnostics", ++ "Reserved", /* 0x15 */ + "Reserved", + "Reserved", + "Reserved", +@@ -514,6 +514,10 @@ static void dmi_hp_216_fw_type(u16 code) + "Power Distribution Board CPLD", + "PCIe Switch Board CPLD", + "Sideband Board CPLD", ++ "PCIe Riser MCU Firmware", /* 0x40 */ ++ "PCIe Switch Board Firmware", ++ "Power Supply Firmware", ++ "BMC Firmware", + }; + + if (code < ARRAY_SIZE(type)) +@@ -600,6 +604,12 @@ static void dmi_hp_216_version(u8 format, u8 *data) + case 18: + pr_attr(name, "%d.%02d", data[0], data[1]); + break; ++ case 19: ++ pr_attr(name, "0x%02x.0x%02x.0x%02x", data[0], data[1], data[2]); ++ break; ++ case 20: ++ pr_attr(name, "%d.%d.%d.%d", data[0], data[1], data[2], data[3]); ++ break; + case 3: /* fall through */ + default: + pr_attr(name, "%s", reserved); +-- +2.47.0 + diff --git a/0018-dmioem-Update-HPE-OEM-Type-245.patch b/0018-dmioem-Update-HPE-OEM-Type-245.patch new file mode 100644 index 0000000..e7c37dd --- /dev/null +++ b/0018-dmioem-Update-HPE-OEM-Type-245.patch @@ -0,0 +1,84 @@ +From 14954b0854e0ec048ace7a9145d48de4e86cbeaa Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Tue, 15 Apr 2025 11:03:39 +0200 +Subject: [PATCH 18/45] dmioem: Update HPE OEM Type 245 + +Add PCIe Riser (MHS Platform). + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 40 ++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 38 insertions(+), 2 deletions(-) + +diff --git a/dmioem.c b/dmioem.c +index d4a49ae..4e02d29 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -965,6 +965,27 @@ static void dmi_hp_245_pcie_riser(const struct dmi_header *h) + pr_attr("Riser Name", dmi_string(h, data[0x08])); + } + ++static void dmi_hp_245_pcie_mhs_riser(const struct dmi_header *h) ++{ ++ u8 *data = h->data; ++ u8 i, count; ++ int len = h->length; ++ ++ pr_attr("Board Type", "PCIe Riser (MHS Platform)"); ++ if (h->length < 0x0B) return; ++ pr_attr("Riser ID", "%d", data[0x05]); ++ if (data[0x06]) ++ pr_attr("Firmware Version", "%x.%x", data[0x06], data[0x07]); ++ pr_attr("Downgradable", "%s", data[0x08] & 0x01 ? "Yes" : "No"); ++ pr_attr("Riser Name", dmi_string(h, data[0x09])); ++ count = data[0x0A]; ++ pr_attr("Slot Count", "%d", count); ++ pr_list_start("Slot IDs", NULL); ++ for (i = 0; (i < count) && ((0x0B + i) < len); i++) ++ pr_list_item("0x%x", data[0x0B + i]); ++ pr_list_end(); ++} ++ + static int dmi_decode_hp(const struct dmi_header *h) + { + u8 *data = h->data; +@@ -1713,18 +1734,33 @@ static int dmi_decode_hp(const struct dmi_header *h) + * 0x00 | Type | BYTE | 0xF5, Extension Board Inventory Record + * 0x01 | Length | BYTE | Length of structure + * 0x02 | Handle | WORD | Unique handle +- * 0x04 | Board Type | WORD | 0: PCIe Riser, Other Reserved ++ * 0x04 | Board Type | WORD | See below + * + * If Board Type == 0 + * 0x05 | Riser Pos | WORD | + * 0x06 | Riser ID | BYTE | + * 0x07 | CPLD Vers | BTYE | 0-> No CPLD. Bits [7][6:0] Release:Vers + * 0x08 | Riser Name | STRING| ++ * ++ * If Board Type == 1 ++ * 0x05 | Riser ID | BYTE | ++ * 0x06 | Riser FW Major | BYTE | ++ * 0x07 | Riser FW Minor | BYTE | ++ * 0x08 | Misc Attr | BYTE | ++ * 0x09 | Riser Name | STRING| ++ * 0x0A | Slot Count | BYTE | ++ * 0x0B | Slot ID | Varies| One per slot + */ + pr_handle_name("%s ProLiant Extension Board Inventory Record", company); + if (h->length < 0x05) break; +- if (data[0x04] == 0) ++ switch (data[0x04]) { ++ case 0: + dmi_hp_245_pcie_riser(h); ++ break; ++ case 1: ++ dmi_hp_245_pcie_mhs_riser(h); ++ break; ++ } + break; + + default: +-- +2.47.0 + diff --git a/0019-dmidecode-Use-binary-unit-prefixes.patch b/0019-dmidecode-Use-binary-unit-prefixes.patch new file mode 100644 index 0000000..e832372 --- /dev/null +++ b/0019-dmidecode-Use-binary-unit-prefixes.patch @@ -0,0 +1,100 @@ +From c3baa372f5a4e4be81a767862dd17f3c60f50836 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Thu, 24 Apr 2025 10:23:42 +0200 +Subject: [PATCH 19/45] dmidecode: Use binary unit prefixes + +The SMBIOS 3.7.1 specification updated all unit size references to +comply with IEC 60027, that is, use binary prefixes (KiB, MiB...) to +express memory size instead of the inaccurate SI prefixes (kB, +MB...). Update the code to embrace this clarification. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 24 ++++++++++++------------ + 1 file changed, 12 insertions(+), 12 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 1194a9c..782de65 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -273,19 +273,19 @@ static void dmi_dump(const struct dmi_header *h) + } + } + +-/* shift is 0 if the value is in bytes, 1 if it is in kilobytes */ ++/* shift is 0 if the value is in bytes, 1 if it is in kibibytes */ + void dmi_print_memory_size(const char *attr, u64 code, int shift) + { + unsigned long capacity; + u16 split[7]; + static const char *unit[8] = { +- "bytes", "kB", "MB", "GB", "TB", "PB", "EB", "ZB" ++ "bytes", "KiB", "MiB", "GiB", "TiB", "PiB", "EiB", "ZiB" + }; + int i; + + /* +- * We split the overall size in powers of thousand: EB, PB, TB, GB, +- * MB, kB and B. In practice, it is expected that only one or two ++ * We split the overall size in powers of 1024: EiB, PiB, TiB, GiB, ++ * MiB, KiB and B. In practice, it is expected that only one or two + * (consecutive) of these will be non-zero. + */ + split[0] = code.l & 0x3FFUL; +@@ -331,7 +331,7 @@ static void dmi_bios_runtime_size(u32 code) + } + else + { +- format = "%u kB"; ++ format = "%u KiB"; + code >>= 10; + } + +@@ -341,7 +341,7 @@ static void dmi_bios_runtime_size(u32 code) + static void dmi_bios_rom_size(u8 code1, u16 code2) + { + static const char *unit[4] = { +- "MB", "GB", out_of_spec, out_of_spec ++ "MiB", "GiB", out_of_spec, out_of_spec + }; + + if (code1 != 0xFF) +@@ -1725,7 +1725,7 @@ static void dmi_memory_module_size(const char *attr, u8 code) + pr_attr(attr, "Not Installed"); + return; + default: +- pr_attr(attr, "%u MB%s", 1 << (code & 0x7F), ++ pr_attr(attr, "%u MiB%s", 1 << (code & 0x7F), + connection); + } + } +@@ -2783,11 +2783,11 @@ static void dmi_memory_device_extended_size(u32 code) + * as an integer without rounding + */ + if (code & 0x3FFUL) +- pr_attr("Size", "%lu MB", (unsigned long)code); ++ pr_attr("Size", "%lu MiB", (unsigned long)code); + else if (code & 0xFFC00UL) +- pr_attr("Size", "%lu GB", (unsigned long)code >> 10); ++ pr_attr("Size", "%lu GiB", (unsigned long)code >> 10); + else +- pr_attr("Size", "%lu TB", (unsigned long)code >> 20); ++ pr_attr("Size", "%lu TiB", (unsigned long)code >> 20); + } + + static void dmi_memory_voltage_value(const char *attr, u16 code) +@@ -4660,9 +4660,9 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + dmi_memory_controller_interleave(data[0x06])); + pr_attr("Current Interleave", "%s", + dmi_memory_controller_interleave(data[0x07])); +- pr_attr("Maximum Memory Module Size", "%u MB", ++ pr_attr("Maximum Memory Module Size", "%u MiB", + 1 << data[0x08]); +- pr_attr("Maximum Total Memory Size", "%u MB", ++ pr_attr("Maximum Total Memory Size", "%u MiB", + data[0x0E] * (1 << data[0x08])); + dmi_memory_controller_speeds("Supported Speeds", + WORD(data + 0x09)); +-- +2.47.0 + diff --git a/0020-dmidecode-Mark-SMBIOS-3.7.1-as-supported.patch b/0020-dmidecode-Mark-SMBIOS-3.7.1-as-supported.patch new file mode 100644 index 0000000..bd1fd25 --- /dev/null +++ b/0020-dmidecode-Mark-SMBIOS-3.7.1-as-supported.patch @@ -0,0 +1,29 @@ +From 6e66edb7c671e70519497cdf0fad6fca2d70199b Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Thu, 24 Apr 2025 10:23:47 +0200 +Subject: [PATCH 20/45] dmidecode: Mark SMBIOS 3.7.1 as supported + +All changes mentioned in the SMBIOS 3.7.1 specification update are +implemented now, so mark this version as supported. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 782de65..fd20208 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -89,7 +89,7 @@ static const char *bad_index = ""; + + enum cpuid_type cpuid_type = cpuid_none; + +-#define SUPPORTED_SMBIOS_VER 0x030700 ++#define SUPPORTED_SMBIOS_VER 0x030701 + + #define FLAG_NO_FILE_OFFSET (1 << 0) + #define FLAG_STOP_AT_EOT (1 << 1) +-- +2.47.0 + diff --git a/0021-dmidecode-Update-copyright-year-to-2025.patch b/0021-dmidecode-Update-copyright-year-to-2025.patch new file mode 100644 index 0000000..82b6110 --- /dev/null +++ b/0021-dmidecode-Update-copyright-year-to-2025.patch @@ -0,0 +1,56 @@ +From 6524a59ab8d519f1496e913dadf56669756bff33 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Thu, 24 Apr 2025 10:23:54 +0200 +Subject: [PATCH 21/45] dmidecode: Update copyright year to 2025 + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 2 +- + dmidecode.h | 2 +- + dmioem.c | 4 ++-- + 3 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index fd20208..11f69a6 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -2,7 +2,7 @@ + * DMI Decode + * + * Copyright (C) 2000-2002 Alan Cox +- * Copyright (C) 2002-2024 Jean Delvare ++ * Copyright (C) 2002-2025 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +diff --git a/dmidecode.h b/dmidecode.h +index 3b895f9..96ffe1a 100644 +--- a/dmidecode.h ++++ b/dmidecode.h +@@ -1,7 +1,7 @@ + /* + * This file is part of the dmidecode project. + * +- * Copyright (C) 2005-2023 Jean Delvare ++ * Copyright (C) 2005-2025 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +diff --git a/dmioem.c b/dmioem.c +index 4e02d29..a276e3f 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -2,8 +2,8 @@ + * Decoding of OEM-specific entries + * This file is part of the dmidecode project. + * +- * Copyright (C) 2007-2024 Jean Delvare +- * Copyright (C) 2017-2024 Jerry Hoemann ++ * Copyright (C) 2007-2025 Jean Delvare ++ * Copyright (C) 2017-2025 Jerry Hoemann + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +-- +2.47.0 + diff --git a/0022-Fix-unit-of-starting-and-ending-addresses.patch b/0022-Fix-unit-of-starting-and-ending-addresses.patch new file mode 100644 index 0000000..7a85e8b --- /dev/null +++ b/0022-Fix-unit-of-starting-and-ending-addresses.patch @@ -0,0 +1,48 @@ +From f88fa53600db3e2555d1aa289f343ba47d790c88 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Thu, 24 Apr 2025 11:41:47 +0200 +Subject: [PATCH 22/45] Fix unit of starting and ending addresses + +The Extended Starting Address and Extended Ending Address fields of +DMI types 19 (Memory Array Mapped Address) and 20 (Memory Device +Mapped Address) are stored in byte unit, unlike their non-extended +counterparts which were expressed in kibibytes. The trailing "k" +after these addresses therefore makes no sense and should be removed. + +Fixes: 7f899da5e459 ("Add support for memory arrays of 2 TB and more") +Signed-off-by: Jean Delvare +--- + dmidecode.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 11f69a6..882e480 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -4989,9 +4989,9 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + start = QWORD(data + 0x0F); + end = QWORD(data + 0x17); + +- pr_attr("Starting Address", "0x%08X%08Xk", ++ pr_attr("Starting Address", "0x%08X%08X", + start.h, start.l); +- pr_attr("Ending Address", "0x%08X%08Xk", ++ pr_attr("Ending Address", "0x%08X%08X", + end.h, end.l); + dmi_mapped_address_extended_size(start, end); + } +@@ -5022,9 +5022,9 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + start = QWORD(data + 0x13); + end = QWORD(data + 0x1B); + +- pr_attr("Starting Address", "0x%08X%08Xk", ++ pr_attr("Starting Address", "0x%08X%08X", + start.h, start.l); +- pr_attr("Ending Address", "0x%08X%08Xk", ++ pr_attr("Ending Address", "0x%08X%08X", + end.h, end.l); + dmi_mapped_address_extended_size(start, end); + } +-- +2.47.0 + diff --git a/0023-Stop-open-coding-the-u64-type.patch b/0023-Stop-open-coding-the-u64-type.patch new file mode 100644 index 0000000..a9d9dfd --- /dev/null +++ b/0023-Stop-open-coding-the-u64-type.patch @@ -0,0 +1,383 @@ +From 2fa4ab1a1d37303b81e701d7ed08ae70965ab96c Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Thu, 24 Apr 2025 11:41:52 +0200 +Subject: [PATCH 23/45] Stop open-coding the u64 type + +Any C99-compliant C compiler should offer the long long int variable +type to store 64-bit values. Stop implementing this as a struct. + +This allows simplifying the code a little, while making the binary +slightly smaller and faster. + +Signed-off-by: Jean Delvare +--- + biosdecode.c | 8 ++--- + dmidecode.c | 84 +++++++++++++++++++++------------------------------- + dmioem.c | 13 ++++---- + types.h | 29 ++---------------- + util.c | 12 +------- + 5 files changed, 47 insertions(+), 99 deletions(-) + +diff --git a/biosdecode.c b/biosdecode.c +index 99a27fe..fb393da 100644 +--- a/biosdecode.c ++++ b/biosdecode.c +@@ -111,8 +111,8 @@ static int smbios3_decode(const u8 *p, size_t len) + p[0x07], p[0x08], p[0x09]); + printf("\tStructure Table Maximum Length: %u bytes\n", + DWORD(p + 0x0C)); +- printf("\tStructure Table 64-bit Address: 0x%08X%08X\n", +- QWORD(p + 0x10).h, QWORD(p + 0x10).l); ++ printf("\tStructure Table 64-bit Address: 0x%016llX\n", ++ QWORD(p + 0x10)); + + return 1; + } +@@ -284,8 +284,8 @@ static int acpi_decode(const u8 *p, size_t len) + + if (DWORD(p + 20) < 32) return 1; + +- printf("\tXSD Table 64-bit Address: 0x%08X%08X\n", +- QWORD(p + 24).h, QWORD(p + 24).l); ++ printf("\tXSD Table 64-bit Address: 0x%016llX\n", ++ QWORD(p + 24)); + + return 1; + } +diff --git a/dmidecode.c b/dmidecode.c +index 882e480..1acbefa 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -288,13 +288,13 @@ void dmi_print_memory_size(const char *attr, u64 code, int shift) + * MiB, KiB and B. In practice, it is expected that only one or two + * (consecutive) of these will be non-zero. + */ +- split[0] = code.l & 0x3FFUL; +- split[1] = (code.l >> 10) & 0x3FFUL; +- split[2] = (code.l >> 20) & 0x3FFUL; +- split[3] = ((code.h << 2) & 0x3FCUL) | (code.l >> 30); +- split[4] = (code.h >> 8) & 0x3FFUL; +- split[5] = (code.h >> 18) & 0x3FFUL; +- split[6] = code.h >> 28; ++ split[0] = code & 0x3FFULL; ++ split[1] = (code >> 10) & 0x3FFULL; ++ split[2] = (code >> 20) & 0x3FFULL; ++ split[3] = (code >> 30) & 0x3FFULL; ++ split[4] = (code >> 40) & 0x3FFULL; ++ split[5] = (code >> 50) & 0x3FFULL; ++ split[6] = (code >> 60) & 0x3FFULL; + + /* + * Now we find the highest unit with a non-zero value. If the following +@@ -346,8 +346,7 @@ static void dmi_bios_rom_size(u8 code1, u16 code2) + + if (code1 != 0xFF) + { +- u64 s = { .l = (code1 + 1) << 6 }; +- dmi_print_memory_size("ROM Size", s, 1); ++ dmi_print_memory_size("ROM Size", (u64)(code1 + 1) << 6, 1); + } + else + pr_attr("ROM Size", "%u %s", code2 & 0x3FFF, unit[code2 >> 14]); +@@ -392,14 +391,14 @@ static void dmi_bios_characteristics(u64 code) + /* + * This isn't very clear what this bit is supposed to mean + */ +- if (code.l & (1 << 3)) ++ if (code & (1ULL << 3)) + { + pr_list_item("%s", characteristics[0]); + return; + } + + for (i = 4; i <= 31; i++) +- if (code.l & (1 << i)) ++ if (code & (1ULL << i)) + pr_list_item("%s", characteristics[i - 3]); + } + +@@ -1780,14 +1779,12 @@ static void dmi_cache_size_2(const char *attr, u32 code) + + if (code & 0x80000000) + { +- code &= 0x7FFFFFFFLU; +- size.l = code << 6; +- size.h = code >> 26; ++ code &= 0x7FFFFFFFULL; ++ size = (u64)code << 6; + } + else + { +- size.l = code; +- size.h = 0; ++ size = code; + } + + /* Use a more convenient unit for large cache size */ +@@ -2767,9 +2764,9 @@ static void dmi_memory_device_size(u16 code) + pr_attr("Size", "Unknown"); + else + { +- u64 s = { .l = code & 0x7FFF }; ++ u64 s = (u64)code & 0x7FFFULL; + if (!(code & 0x8000)) +- s.l <<= 10; ++ s <<= 10; + dmi_print_memory_size("Size", s, 1); + } + } +@@ -3010,9 +3007,9 @@ static void dmi_memory_size(const char *attr, u64 code) + { + /* 7.18.12 */ + /* 7.18.13 */ +- if (code.h == 0xFFFFFFFF && code.l == 0xFFFFFFFF) ++ if (code == ~0ULL) + pr_attr(attr, "Unknown"); +- else if (code.h == 0x0 && code.l == 0x0) ++ else if (code == 0ULL) + pr_attr(attr, "None"); + else + dmi_print_memory_size(attr, code, 0); +@@ -3142,18 +3139,12 @@ static void dmi_mapped_address_size(u32 code) + if (code == 0) + pr_attr("Range Size", "Invalid"); + else +- { +- u64 size; +- +- size.h = 0; +- size.l = code; +- dmi_print_memory_size("Range Size", size, 1); +- } ++ dmi_print_memory_size("Range Size", (u64)code, 1); + } + + static void dmi_mapped_address_extended_size(u64 start, u64 end) + { +- if (start.h == end.h && start.l == end.l) ++ if (start == end) + pr_attr("Range Size", "Invalid"); + else + dmi_print_memory_size("Range Size", u64_range(start, end), 0); +@@ -3581,10 +3572,10 @@ static const char *dmi_system_boot_status(u8 code) + + static void dmi_64bit_memory_error_address(const char *attr, u64 code) + { +- if (code.h == 0x80000000 && code.l == 0x00000000) ++ if (code == 0x8000000000000000ULL) + pr_attr(attr, "Unknown"); + else +- pr_attr(attr, "0x%08X%08X", code.h, code.l); ++ pr_attr(attr, "0x%016llX", code); + } + + /* +@@ -3718,9 +3709,9 @@ static void dmi_ipmi_base_address(u8 type, const u8 *p, u8 lsb) + else + { + u64 address = QWORD(p); +- pr_attr("Base Address", "0x%08X%08X (%s)", +- address.h, (address.l & ~1) | lsb, +- address.l & 1 ? "I/O" : "Memory-mapped"); ++ pr_attr("Base Address", "0x%016llX (%s)", ++ (address & ~1ULL) | lsb, ++ (address & 1ULL) ? "I/O" : "Memory-mapped"); + } + } + +@@ -4389,14 +4380,14 @@ static void dmi_tpm_characteristics(u64 code) + /* + * This isn't very clear what this bit is supposed to mean + */ +- if (code.l & (1 << 2)) ++ if (code & (1ULL << 2)) + { + pr_list_item("%s", characteristics[0]); + return; + } + + for (i = 3; i <= 5; i++) +- if (code.l & (1 << i)) ++ if (code & (1ULL << i)) + pr_list_item("%s", characteristics[i - 2]); + } + +@@ -4858,12 +4849,8 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + } + else + { +- u64 capacity; +- +- capacity.h = 0; +- capacity.l = DWORD(data + 0x07); + dmi_print_memory_size("Maximum Capacity", +- capacity, 1); ++ DWORD(data + 0x07), 1); + } + if (!(opt.flags & FLAG_QUIET)) + dmi_memory_array_error_handle(WORD(data + 0x0B)); +@@ -4989,10 +4976,8 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + start = QWORD(data + 0x0F); + end = QWORD(data + 0x17); + +- pr_attr("Starting Address", "0x%08X%08X", +- start.h, start.l); +- pr_attr("Ending Address", "0x%08X%08X", +- end.h, end.l); ++ pr_attr("Starting Address", "0x%016llX", start); ++ pr_attr("Ending Address", "0x%016llX", end); + dmi_mapped_address_extended_size(start, end); + } + else +@@ -5022,10 +5007,8 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + start = QWORD(data + 0x13); + end = QWORD(data + 0x1B); + +- pr_attr("Starting Address", "0x%08X%08X", +- start.h, start.l); +- pr_attr("Ending Address", "0x%08X%08X", +- end.h, end.l); ++ pr_attr("Starting Address", "0x%016llX", start); ++ pr_attr("Ending Address", "0x%016llX", end); + dmi_mapped_address_extended_size(start, end); + } + else +@@ -5947,7 +5930,8 @@ static int smbios3_decode(u8 *buf, size_t buf_len, const char *devmem, u32 flags + buf[0x07], buf[0x08], buf[0x09]); + + offset = QWORD(buf + 0x10); +- if (!(flags & FLAG_NO_FILE_OFFSET) && offset.h && sizeof(off_t) < 8) ++ if (!(flags & FLAG_NO_FILE_OFFSET) && (offset & 0xFFFFFFFF00000000ULL) ++ && sizeof(off_t) < 8) + { + fprintf(stderr, "64-bit addresses not supported, sorry.\n"); + return 0; +@@ -5955,7 +5939,7 @@ static int smbios3_decode(u8 *buf, size_t buf_len, const char *devmem, u32 flags + + /* Maximum length, may get trimmed */ + len = DWORD(buf + 0x0C); +- table = dmi_table_get(((off_t)offset.h << 32) | offset.l, &len, 0, ver, ++ table = dmi_table_get(offset, &len, 0, ver, + devmem, flags | FLAG_STOP_AT_EOT); + if (table == NULL) + return 1; +diff --git a/dmioem.c b/dmioem.c +index a276e3f..f218aa4 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -141,7 +141,7 @@ static void dmi_dell_bios_flags(u64 flags) + /* + * TODO: The meaning of the other bits is unknown. + */ +- pr_attr("ACPI WMI Supported", "%s", (flags.l & (1 << 1)) ? "Yes" : "No"); ++ pr_attr("ACPI WMI Supported", "%s", (flags & (1ULL << 1)) ? "Yes" : "No"); + } + + static void dmi_dell_hotkeys(const struct dmi_header *h) +@@ -878,9 +878,9 @@ static void dmi_hp_240_attr(u64 defined, u64 set) + pr_list_start("Attributes Defined/Set", NULL); + for (i = 0; i < ARRAY_SIZE(attributes); i++) + { +- if (!(defined.l & (1UL << i))) ++ if (!(defined & (1ULL << i))) + continue; +- pr_list_item("%s: %s", attributes[i], set.l & (1UL << i) ? "Yes" : "No"); ++ pr_list_item("%s: %s", attributes[i], set & (1ULL << i) ? "Yes" : "No"); + } + pr_list_end(); + } +@@ -1277,11 +1277,8 @@ static int dmi_decode_hp(const struct dmi_header *h) + if (DWORD(data + 0x04) == 0x55524324) + { + u64 paddr = QWORD(data + 0x08); +- paddr.l += DWORD(data + 0x14); +- if (paddr.l < DWORD(data + 0x14)) +- paddr.h++; +- pr_attr("Physical Address", "0x%08x%08x", +- paddr.h, paddr.l); ++ paddr += DWORD(data + 0x14); ++ pr_attr("Physical Address", "0x%016llx", paddr); + pr_attr("Length", "0x%08x", DWORD(data + 0x10)); + } + break; +diff --git a/types.h b/types.h +index 51c32d7..62d30c9 100644 +--- a/types.h ++++ b/types.h +@@ -7,6 +7,7 @@ typedef unsigned char u8; + typedef unsigned short u16; + typedef signed short i16; + typedef unsigned int u32; ++typedef unsigned long long int u64; + + /* + * You may use the following defines to adjust the type definitions +@@ -18,30 +19,6 @@ typedef unsigned int u32; + * for architectures which need it. + */ + +-#ifdef BIGENDIAN +-typedef struct { +- u32 h; +- u32 l; +-} u64; +-#else +-typedef struct { +- u32 l; +- u32 h; +-} u64; +-#endif +- +-#if defined(ALIGNMENT_WORKAROUND) || defined(BIGENDIAN) +-static inline u64 U64(u32 low, u32 high) +-{ +- u64 self; +- +- self.l = low; +- self.h = high; +- +- return self; +-} +-#endif +- + /* + * Per SMBIOS v2.8.0 and later, all structures assume a little-endian + * ordering convention. +@@ -49,11 +26,11 @@ static inline u64 U64(u32 low, u32 high) + #if defined(ALIGNMENT_WORKAROUND) || defined(BIGENDIAN) + #define WORD(x) (u16)((x)[0] + ((x)[1] << 8)) + #define DWORD(x) (u32)((x)[0] + ((x)[1] << 8) + ((x)[2] << 16) + ((x)[3] << 24)) +-#define QWORD(x) (U64(DWORD(x), DWORD(x + 4))) ++#define QWORD(x) (((u64)DWORD((x) + 4) << 32) + DWORD(x)) + #else /* ALIGNMENT_WORKAROUND || BIGENDIAN */ + #define WORD(x) (u16)(*(const u16 *)(x)) + #define DWORD(x) (u32)(*(const u32 *)(x)) +-#define QWORD(x) (*(const u64 *)(x)) ++#define QWORD(x) (u64)(*(const u64 *)(x)) + #endif /* ALIGNMENT_WORKAROUND || BIGENDIAN */ + + #endif +diff --git a/util.c b/util.c +index dce84ff..3f09ec5 100644 +--- a/util.c ++++ b/util.c +@@ -265,15 +265,5 @@ void *mem_chunk(off_t base, size_t len, const char *devmem) + /* Returns end - start + 1, assuming start < end */ + u64 u64_range(u64 start, u64 end) + { +- u64 res; +- +- res.h = end.h - start.h; +- res.l = end.l - start.l; +- +- if (end.l < start.l) +- res.h--; +- if (++res.l == 0) +- res.h++; +- +- return res; ++ return end - start + 1; + } +-- +2.47.0 + diff --git a/0024-Get-rid-of-u64_range.patch b/0024-Get-rid-of-u64_range.patch new file mode 100644 index 0000000..03e2aa4 --- /dev/null +++ b/0024-Get-rid-of-u64_range.patch @@ -0,0 +1,54 @@ +From 2d5cda0eddc670949949ba1bc07f430715504a04 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Thu, 24 Apr 2025 11:41:57 +0200 +Subject: [PATCH 24/45] Get rid of u64_range + +Function u64_range is pretty useless now, better open-code the +operation. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 2 +- + util.c | 6 ------ + util.h | 1 - + 3 files changed, 1 insertion(+), 8 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 1acbefa..c52f975 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -3147,7 +3147,7 @@ static void dmi_mapped_address_extended_size(u64 start, u64 end) + if (start == end) + pr_attr("Range Size", "Invalid"); + else +- dmi_print_memory_size("Range Size", u64_range(start, end), 0); ++ dmi_print_memory_size("Range Size", end - start + 1, 0); + } + + /* +diff --git a/util.c b/util.c +index 3f09ec5..7903c3e 100644 +--- a/util.c ++++ b/util.c +@@ -261,9 +261,3 @@ void *mem_chunk(off_t base, size_t len, const char *devmem) + + return p; + } +- +-/* Returns end - start + 1, assuming start < end */ +-u64 u64_range(u64 start, u64 end) +-{ +- return end - start + 1; +-} +diff --git a/util.h b/util.h +index 0d37f35..e6c5e49 100644 +--- a/util.h ++++ b/util.h +@@ -27,4 +27,3 @@ + int checksum(const u8 *buf, size_t len); + void *read_file(off_t base, size_t *len, const char *filename); + void *mem_chunk(off_t base, size_t len, const char *devmem); +-u64 u64_range(u64 start, u64 end); +-- +2.47.0 + diff --git a/0025-biosdecode-Update-copyright-year-to-2025.patch b/0025-biosdecode-Update-copyright-year-to-2025.patch new file mode 100644 index 0000000..6dad3c6 --- /dev/null +++ b/0025-biosdecode-Update-copyright-year-to-2025.patch @@ -0,0 +1,26 @@ +From d3b45cc04f4a771bb11799ba83b29307575d2176 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Thu, 24 Apr 2025 11:48:41 +0200 +Subject: [PATCH 25/45] biosdecode: Update copyright year to 2025 + +Signed-off-by: Jean Delvare +--- + biosdecode.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/biosdecode.c b/biosdecode.c +index fb393da..c387276 100644 +--- a/biosdecode.c ++++ b/biosdecode.c +@@ -2,7 +2,7 @@ + * BIOS Decode + * + * Copyright (C) 2000-2002 Alan Cox +- * Copyright (C) 2002-2017 Jean Delvare ++ * Copyright (C) 2002-2025 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +-- +2.47.0 + diff --git a/0026-dmioem-Support-42-byte-HPE-type-242-records.patch b/0026-dmioem-Support-42-byte-HPE-type-242-records.patch new file mode 100644 index 0000000..9016e68 --- /dev/null +++ b/0026-dmioem-Support-42-byte-HPE-type-242-records.patch @@ -0,0 +1,38 @@ +From b2870c5da3528d88e27f7669acb1fcf9469c4a37 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Mon, 12 May 2025 17:50:28 +0200 +Subject: [PATCH 26/45] dmioem: Support 42-byte HPE type 242 records + +While most Gen10 and later HPE systems have type 242 records of size +44 bytes or 62 bytes, a few have shorter type 242 records of 42 +bytes. Don't skip them and decode everything we can. + +Signed-off-by: Jean Delvare +--- + dmioem.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/dmioem.c b/dmioem.c +index f218aa4..d08ae69 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -1673,7 +1673,7 @@ static int dmi_decode_hp(const struct dmi_header *h) + */ + if (gen < G10) return 0; + pr_handle_name("%s ProLiant Hard Drive Inventory Record", company); +- if (h->length < 0x2C) break; ++ if (h->length < 0x2A) break; + if (!(opt.flags & FLAG_QUIET)) + pr_attr("Associated Handle", "0x%04X", WORD(data + 0x4)); + dmi_hp_242_hdd_type(data[0x06]); +@@ -1697,6 +1697,7 @@ static int dmi_decode_hp(const struct dmi_header *h) + pr_attr("Serial Number", dmi_string(h, data[0x27])); + pr_attr("Model Number", dmi_string(h, data[0x28])); + pr_attr("Firmware Revision", dmi_string(h, data[0x29])); ++ if (h->length < 0x2C) break; + pr_attr("Location", dmi_string(h, data[0x2A])); + feat = data[0x2B]; + pr_attr("Encryption Status", "%s", (feat == 0) ? "Not Encrypted" : +-- +2.47.0 + diff --git a/0027-dmioem-Display-drive-capacity-in-power-of-10-units.patch b/0027-dmioem-Display-drive-capacity-in-power-of-10-units.patch new file mode 100644 index 0000000..4e2aa8e --- /dev/null +++ b/0027-dmioem-Display-drive-capacity-in-power-of-10-units.patch @@ -0,0 +1,86 @@ +From 16decc37976f283460f4174dfdb6c6adb7cb3f04 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Mon, 12 May 2025 17:50:32 +0200 +Subject: [PATCH 27/45] dmioem: Display drive capacity in power-of-10 units + +HPE OEM type 242 displays the drive capacity using a function +initially designed to display memory sizes. While memory sizes are +traditionally expressed using power-of-2 units (KiB, MiB, GiB...), +the computer storage industry still uses power-of-10 units (kB, MB, +GB...) to express a drive's capacity. + +Implement a new function displaying capacities using power-of-10 +units and use it to display the drive capacity. That way, the number +displayed will match the expectations and hardware documentation. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 22 ++++++++++++++++++++++ + dmidecode.h | 1 + + dmioem.c | 4 ++-- + 3 files changed, 25 insertions(+), 2 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index c52f975..6a14f99 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -317,6 +317,28 @@ void dmi_print_memory_size(const char *attr, u64 code, int shift) + pr_attr(attr, "%lu %s", capacity, unit[i + shift]); + } + ++/* shift is 0 if the value is in bytes, 1 if it is in kB, 2 if it is in MB */ ++void dmi_print_storage_size(const char *attr, u64 code, unsigned int shift) ++{ ++ u64 div; ++ static const char *unit[8] = { ++ "bytes", "kB", "MB", "GB", "TB", "PB", "EB", "ZB" ++ }; ++ ++ /* ++ * We want to choose the unit which will let us display a number ++ * between 1.0 and 999.9. ++ */ ++ div = 1; ++ while (code / div >= 1000 && shift + 1 < ARRAY_SIZE(unit)) ++ { ++ shift++; ++ div *= 1000; ++ } ++ ++ pr_attr(attr, "%.1f %s", (float)code / div, unit[shift]); ++} ++ + /* + * 7.1 BIOS Information (Type 0) + */ +diff --git a/dmidecode.h b/dmidecode.h +index 96ffe1a..f7ac319 100644 +--- a/dmidecode.h ++++ b/dmidecode.h +@@ -50,6 +50,7 @@ extern enum cpuid_type cpuid_type; + int is_printable(const u8 *data, int len); + const char *dmi_string(const struct dmi_header *dm, u8 s); + void dmi_print_memory_size(const char *attr, u64 code, int shift); ++void dmi_print_storage_size(const char *attr, u64 code, unsigned int shift); + void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...), + const char *label, enum cpuid_type sig, const u8 *p); + +diff --git a/dmioem.c b/dmioem.c +index d08ae69..c67b694 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -1679,9 +1679,9 @@ static int dmi_decode_hp(const struct dmi_header *h) + dmi_hp_242_hdd_type(data[0x06]); + pr_attr("ID", "%llx", QWORD(data + 0x07)); + if (h->length < 0x3E) +- pr_attr("Capacity", "%u MB", DWORD(data + 0x0F)); ++ dmi_print_storage_size("Capacity", DWORD(data + 0x0F), 2); + else +- dmi_print_memory_size("Capacity", QWORD(data + 0x2C), 0); ++ dmi_print_storage_size("Capacity", QWORD(data + 0x2C), 0); + /* NB: Poweron low QWORD good for 2,104,351,365,926,255 years */ + pr_attr("Poweron", "%ld hours", QWORD(data + 0x13)); + if (data[0x24]) +-- +2.47.0 + diff --git a/0028-dmioem-Spell-ProLiant-consistently.patch b/0028-dmioem-Spell-ProLiant-consistently.patch new file mode 100644 index 0000000..4f6e234 --- /dev/null +++ b/0028-dmioem-Spell-ProLiant-consistently.patch @@ -0,0 +1,47 @@ +From c29502256766151644f6c25d64a6109b519e011e Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Mon, 12 May 2025 17:50:35 +0200 +Subject: [PATCH 28/45] dmioem: Spell "ProLiant" consistently + +Consistently spell "ProLiant" with an uppercase "L". + +Signed-off-by: Jean Delvare +Reviewed-by: Jerry Hoemann +--- + dmioem.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/dmioem.c b/dmioem.c +index c67b694..4a1f3f7 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -1523,7 +1523,7 @@ static int dmi_decode_hp(const struct dmi_header *h) + * 0x0F | PCI Seg | WORD | PCI Segment number of the USB controller + */ + if (gen < G9) return 0; +- pr_handle_name("%s Proliant USB Port Connector Correlation Record", company); ++ pr_handle_name("%s ProLiant USB Port Connector Correlation Record", company); + if (h->length < 0x0F) break; + if (!(opt.flags & FLAG_QUIET)) + pr_attr("Associated Handle", "0x%04X", WORD(data + 0x4)); +@@ -1595,7 +1595,7 @@ static int dmi_decode_hp(const struct dmi_header *h) + + case 240: + /* +- * Vendor Specific: HPE Proliant Inventory Record ++ * Vendor Specific: HPE ProLiant Inventory Record + * + * Reports firmware version information for devices that report their + * firmware using their UEFI drivers. Additionally provides association +@@ -1615,7 +1615,7 @@ static int dmi_decode_hp(const struct dmi_header *h) + * 0x1B | Attr Set | QWORD | BitField: If defined, is attribute set? + * 0x23 | Version | DWORD | Lowest supported version. + */ +- pr_handle_name("%s Proliant Inventory Record", company); ++ pr_handle_name("%s ProLiant Inventory Record", company); + if (h->length < 0x27) break; + if (!(opt.flags & FLAG_QUIET)) + pr_attr("Associated Handle", "0x%04X", WORD(data + 0x4)); +-- +2.47.0 + diff --git a/0029-dmidecode-Fix-missing-end-of-list-in-type-0.patch b/0029-dmidecode-Fix-missing-end-of-list-in-type-0.patch new file mode 100644 index 0000000..bd99336 --- /dev/null +++ b/0029-dmidecode-Fix-missing-end-of-list-in-type-0.patch @@ -0,0 +1,41 @@ +From ea4c9f24f6dfc2ab3620475f28ef2b11c428b6ee Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Mon, 12 May 2025 17:50:39 +0200 +Subject: [PATCH 29/45] dmidecode: Fix missing end of list in type 0 + +If pr_list_start() was called, pr_list_end() must be called too. The +bug would cause pr_list_end() not to be called for type 0 records of +length 18 or 19. This doesn't really matter for now because this is +a no-op for plain text output, but it would break the upcoming JSON +output. + +Bug found while reviewing Jiri Hnidek's work. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 6a14f99..00d7343 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -4496,11 +4496,11 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + dmi_bios_rom_size(data[0x09], h->length < 0x1A ? 16 : WORD(data + 0x18)); + pr_list_start("Characteristics", NULL); + dmi_bios_characteristics(QWORD(data + 0x0A)); ++ if (h->length >= 0x13) ++ dmi_bios_characteristics_x1(data[0x12]); ++ if (h->length >= 0x14) ++ dmi_bios_characteristics_x2(data[0x13]); + pr_list_end(); +- if (h->length < 0x13) break; +- dmi_bios_characteristics_x1(data[0x12]); +- if (h->length < 0x14) break; +- dmi_bios_characteristics_x2(data[0x13]); + if (h->length < 0x18) break; + if (data[0x14] != 0xFF && data[0x15] != 0xFF) + pr_attr("BIOS Revision", "%u.%u", +-- +2.47.0 + diff --git a/0030-dmioem-Add-type-HPE-Gen-12.patch b/0030-dmioem-Add-type-HPE-Gen-12.patch new file mode 100644 index 0000000..9b3fb4c --- /dev/null +++ b/0030-dmioem-Add-type-HPE-Gen-12.patch @@ -0,0 +1,34 @@ +From 591bb047cbb0cb29841fde39964cbd78fb2bff6c Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Tue, 20 May 2025 09:38:57 +0200 +Subject: [PATCH 30/45] dmioem: Add type HPE Gen 12 + +Recognize Gen 12 ProLiant systems. + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/dmioem.c b/dmioem.c +index 4a1f3f7..ffbcd95 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -303,11 +303,12 @@ static void dmi_print_hp_net_iface_rec(u8 id, u8 bus, u8 dev, const u8 *mac) + } + } + +-typedef enum { G6 = 6, G7, G8, G9, G10, G10P, G11 } dmi_hpegen_t; ++typedef enum { G6 = 6, G7, G8, G9, G10, G10P, G11, G12 } dmi_hpegen_t; + + static int dmi_hpegen(const char *s) + { + struct { const char *name; dmi_hpegen_t gen; } table[] = { ++ { "Gen12", G12 }, + { "Gen11", G11 }, + { "Gen10 Plus", G10P }, + { "Gen10", G10 }, +-- +2.47.0 + diff --git a/0031-dmioem-Decode-HPE-OEM-Type-193.patch b/0031-dmioem-Decode-HPE-OEM-Type-193.patch new file mode 100644 index 0000000..d6cdb55 --- /dev/null +++ b/0031-dmioem-Decode-HPE-OEM-Type-193.patch @@ -0,0 +1,58 @@ +From 31e12811f6168ee9265b14ed107701fe71cf3f5f Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Tue, 20 May 2025 09:39:01 +0200 +Subject: [PATCH 31/45] dmioem: Decode HPE OEM Type 193 + +HPE OEM Type 193: Other ROM Info. + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 31 +++++++++++++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +diff --git a/dmioem.c b/dmioem.c +index ffbcd95..d4d83e2 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -1001,6 +1001,37 @@ static int dmi_decode_hp(const struct dmi_header *h) + + switch (h->type) + { ++ case 193: ++ /* ++ * Vendor Specific: Other ROM Info ++ * ++ * Offset | Name | Width | Description ++ * ------------------------------------- ++ * 0x00 | Type | BYTE | 0xC1, ROM Structure Indicator ++ * 0x01 | Length | BYTE | Length of structure ++ * 0x02 | Handle | WORD | Unique handle ++ * 0x04 | ROM | BYTE | 01: Redundant ROM installed ++ * 0x05 | ROM vers | STRING| Version of the Redundant ROM ++ * 0x06 | Reserved | BYTE | Reserved in Gen9 forward ++ * 0x07 | OEM ROM | STRING| If not blank, OEM ROM binary file name ++ * 0x08 | OEM Date | STRING| If not blank, OEM ROM binary build date ++ */ ++ if (gen < G9) return 0; ++ pr_handle_name("%s ProLiant Other ROM Info", company); ++ if (h->length < 0x09) break; ++ if ((gen < G12) && (data[0x04] & 0x01)) ++ pr_attr("Redundant ROM Version", "%s", dmi_string(h, data[0x05])); ++ if (data[0x07]) ++ { ++ const char *str = dmi_string(h, data[0x07]); ++ if (strncmp(str, " ", 2)) ++ { ++ pr_attr("OEM ROM Binary Filename", "%s", str); ++ pr_attr("OEM ROM Binary Build Date", "%s", dmi_string(h, data[0x08])); ++ } ++ } ++ break; ++ + case 194: + /* + * Vendor Specific: Super IO Enable/Disable Features +-- +2.47.0 + diff --git a/0032-Rename-variable-div.patch b/0032-Rename-variable-div.patch new file mode 100644 index 0000000..f41f9b0 --- /dev/null +++ b/0032-Rename-variable-div.patch @@ -0,0 +1,48 @@ +From 29e3530402779142f9692142c61f2c596c0d54f9 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Fri, 6 Jun 2025 16:03:49 +0200 +Subject: [PATCH 32/45] Rename variable "div" + +On some systems, "div" is a global symbol, so for portability it's +better to avoid using that name for a local variable. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 00d7343..92ee078 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -320,7 +320,7 @@ void dmi_print_memory_size(const char *attr, u64 code, int shift) + /* shift is 0 if the value is in bytes, 1 if it is in kB, 2 if it is in MB */ + void dmi_print_storage_size(const char *attr, u64 code, unsigned int shift) + { +- u64 div; ++ u64 divisor; + static const char *unit[8] = { + "bytes", "kB", "MB", "GB", "TB", "PB", "EB", "ZB" + }; +@@ -329,14 +329,14 @@ void dmi_print_storage_size(const char *attr, u64 code, unsigned int shift) + * We want to choose the unit which will let us display a number + * between 1.0 and 999.9. + */ +- div = 1; +- while (code / div >= 1000 && shift + 1 < ARRAY_SIZE(unit)) ++ divisor = 1; ++ while (code / divisor >= 1000 && shift + 1 < ARRAY_SIZE(unit)) + { + shift++; +- div *= 1000; ++ divisor *= 1000; + } + +- pr_attr(attr, "%.1f %s", (float)code / div, unit[shift]); ++ pr_attr(attr, "%.1f %s", (float)code / divisor, unit[shift]); + } + + /* +-- +2.47.0 + diff --git a/0033-dmidecode-Expose-memory-utility-functions.patch b/0033-dmidecode-Expose-memory-utility-functions.patch new file mode 100644 index 0000000..1523612 --- /dev/null +++ b/0033-dmidecode-Expose-memory-utility-functions.patch @@ -0,0 +1,53 @@ +From 79069e674eb454db759bc51e096f3b8054e23220 Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Thu, 12 Jun 2025 11:15:54 +0200 +Subject: [PATCH 33/45] dmidecode: Expose memory utility functions + +Expose utility functions for use in dmioem: + dmi_memory_manufacturer_id() + dmi_memory_product_id() + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmidecode.c | 4 ++-- + dmidecode.h | 2 ++ + 2 files changed, 4 insertions(+), 2 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 92ee078..5709e8a 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -3001,7 +3001,7 @@ static void dmi_memory_operating_mode_capability(u16 code) + } + } + +-static void dmi_memory_manufacturer_id(const char *attr, u16 code) ++void dmi_memory_manufacturer_id(const char *attr, u16 code) + { + /* 7.18.8 */ + /* 7.18.10 */ +@@ -3015,7 +3015,7 @@ static void dmi_memory_manufacturer_id(const char *attr, u16 code) + (code & 0x7F) + 1, code >> 8); + } + +-static void dmi_memory_product_id(const char *attr, u16 code) ++void dmi_memory_product_id(const char *attr, u16 code) + { + /* 7.18.9 */ + /* 7.18.11 */ +diff --git a/dmidecode.h b/dmidecode.h +index f7ac319..db120dd 100644 +--- a/dmidecode.h ++++ b/dmidecode.h +@@ -53,5 +53,7 @@ void dmi_print_memory_size(const char *attr, u64 code, int shift); + void dmi_print_storage_size(const char *attr, u64 code, unsigned int shift); + void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...), + const char *label, enum cpuid_type sig, const u8 *p); ++void dmi_memory_manufacturer_id(const char *attr, u16 code); ++void dmi_memory_product_id(const char *attr, u16 code); + + #endif +-- +2.47.0 + diff --git a/0034-dmioem-Decode-HPE-OEM-Type-202.patch b/0034-dmioem-Decode-HPE-OEM-Type-202.patch new file mode 100644 index 0000000..be97732 --- /dev/null +++ b/0034-dmioem-Decode-HPE-OEM-Type-202.patch @@ -0,0 +1,119 @@ +From f395f601f16f8b3fddf1b533c07a608c46c1db74 Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Thu, 12 Jun 2025 11:15:59 +0200 +Subject: [PATCH 34/45] dmioem: Decode HPE OEM Type 202 + +Record type 202: DIMM Location Record + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 92 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 92 insertions(+) + +diff --git a/dmioem.c b/dmioem.c +index d4d83e2..0a01919 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -1147,6 +1147,98 @@ static int dmi_decode_hp(const struct dmi_header *h) + } + break; + ++ case 202: ++ /* ++ * Vendor Specific: HPE DIMM Location Record ++ * ++ * This record allows software to correlate a Type 17 Memory Device Record ++ * with a specific DIMM (DIMM, Board, and/or Processor number if appropriate). ++ * ++ * There will be one Record Type 202 for each DIMM socket possible in the system. ++ * A system will include a record for each DIMM socket even if that DIMM socket ++ * is on a memory board which is not currently installed. ++ * ++ * Offset | Name | Width | Description ++ * ------------------------------------- ++ * 0x00 | Type | BYTE | 0xCA, DIMM Location Record ++ * 0x01 | Length | BYTE | Length of structure ++ * 0x02 | Handle | WORD | Unique handle ++ * 0x04 | Assoc Record | WORD | Handle of Associated Type 17 Memory Record ++ * 0x06 | Board Number | BYTE | 1-based Memory Board number. 0FFh: DIMM on system board ++ * 0x07 | DIMM Number | BYTE | 1-based DIMM number ++ * 0x08 | Proc Number | BYTE | 1-based procssor number. 0FFh don't display ++ * 0x09 | Log DIMM Num | BYTE | 1-based Logical DIMM number mapping to ACPI numbering ++ * 0x0A | UEFI Dev Path| STRING| String number for UEFI Device Path ++ * 0x0B | UEFI Dev Name| STRING| String number for UEFI Device Structured Name ++ * 0x0C | Device Name | STRING| String number for Device Name ++ * 0x0D | Mem Cntrl Num| BYTE | 1-based Memory controller number ++ * 0x0E | Mem Chan Num | BYTE | 1-based memory channel number (matches silk screen) ++ * 0x0F | IE DIMM Num | BYTE | 0-based DIMM number repored by IE. FF -> not supported ++ * | Reserved G12 or later ++ * 0x10 | IE PLDM ID | BYTE | IE PLDM Sensor ID. FF -> not supported ++ * | Reserved G12 or later ++ * 0x11 | Vendor ID | WORD | Module manufacturers ID code as read by SPD ++ * 0x13 | Device ID | WORD | (NVDIMM only) Module product ID code from SPD ++ * 0x15 | Sub Cntrl Ven| WORD | (NVDIMM only) Controller manufacturer ID from SPD ++ * 0x17 | Sub Cntrl Dev| WORD | (NVDIMM only) Controller product ID from SPD ++ * 0x19 | Interleave | BYTE | 1-based unique interleave set within Procssor Number ++ * 0x1A | Part Number | STRING| String number for HPE part number from OEM SPD ++ * 0x1B | DIMM Index | BYTE | 0-based DIMM Index Per Channel ++ */ ++ ++ if (gen < G9) return 0; ++ pr_handle_name("%s DIMM Location Record", company); ++ ++ if (h->length < 0x09) break; ++ if (!(opt.flags & FLAG_QUIET)) ++ pr_attr("Associated Memory Record", "0x%04X", WORD(data + 0x04)); ++ if (data[0x06] == 0xFF) ++ pr_attr("Board Number", "%s", "System Board"); ++ else ++ pr_attr("Board Number", "%d", data[0x06]); ++ pr_attr("DIMM Number", "%d", data[0x07]); ++ if (data[0x08] != 0xFF) ++ pr_attr("Processor Number", "%d", data[0x08]); ++ ++ if (h->length < 0x0A) break; ++ pr_attr("Logical DIMM Number", "%d", data[0x09]); ++ ++ if (h->length < 0x0D) break; ++ if (data[0x0A]) ++ pr_attr("UEFI Device Path", "%s", dmi_string(h, data[0x0A])); ++ if (data[0x0B]) ++ pr_attr("UEFI Device Name", "%s", dmi_string(h, data[0x0B])); ++ if (data[0x0C]) ++ pr_attr("Device Name", "%s", dmi_string(h, data[0x0C])); ++ ++ if (h->length < 0x19) break; ++ if (data[0x0D]) ++ pr_attr("Memory Controller Number", "%d", data[0x0D]); ++ if (data[0x0E]) ++ pr_attr("Memory Channel Number", "%d", data[0x0E]); ++ if (gen < G12 && data[0x0F] != 0xFF) ++ pr_attr("IE DIMM Number", "%d", data[0x0F]); ++ if (gen < G12 && data[0x10] != 0xFF) ++ pr_attr("IE PLDM ID", "%d", data[0x10]); ++ if (data[0x11] || data[0x12]) ++ pr_attr("Vendor ID", "0x%04X", WORD(data + 0x11)); ++ if (data[0x13] || data[0x14]) ++ pr_attr("Device ID", "0x%04X", WORD(data + 0x13)); ++ if (data[0x15] || data[0x16]) ++ dmi_memory_manufacturer_id("Controller Manufacturer ID", WORD(data + 0x15)); ++ if (data[0x17] || data[0x18]) ++ dmi_memory_product_id("Controller Product ID", WORD(data + 0x17)); ++ ++ if (h->length < 0x1A) break; ++ if (data[0x19]) ++ pr_attr("Best Interleave", "%d", data[0x19]); ++ if (h->length < 0x1B) break; ++ pr_attr("Part Number", "%s", dmi_string(h, data[0x1A])); ++ ++ if (h->length < 0x1C) break; ++ pr_attr("DIMM Index", "%d", data[0x1B]); ++ break; ++ + case 203: + /* + * Vendor Specific: HP Device Correlation Record +-- +2.47.0 + diff --git a/0035-dmioem-Fix-HPE-type-199-on-theoretical-big-endian-sy.patch b/0035-dmioem-Fix-HPE-type-199-on-theoretical-big-endian-sy.patch new file mode 100644 index 0000000..365fec3 --- /dev/null +++ b/0035-dmioem-Fix-HPE-type-199-on-theoretical-big-endian-sy.patch @@ -0,0 +1,50 @@ +From d9a917793dc2a5e4e625c27e75b1783ce992f471 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Mon, 16 Jun 2025 11:36:43 +0200 +Subject: [PATCH 35/45] dmioem: Fix HPE type 199 on theoretical big-endian + systems + +dmi_print_cpuid() expects a pointer to raw data to interpret as a +CPUID, not to a native integer. If we call DWORD() on the data before +calling dmi_print_cpuid(), and once again in dmi_print_cpuid(), we +end up swapping the bytes twice if running on a big-endian system, +which causes completely wrong CPU ID data to be displayed. + +The bug does not happen on x86 because DWORD() is essentially +idempotent on this architecture. + +Signed-off-by: Jean Delvare +--- + dmioem.c | 11 ++++++++--- + 1 file changed, 8 insertions(+), 3 deletions(-) + +diff --git a/dmioem.c b/dmioem.c +index 0a01919..096cd0c 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -1131,14 +1131,19 @@ static int dmi_decode_hp(const struct dmi_header *h) + pr_handle_name("%s ProLiant CPU Microcode Patch Support Info", company); + + for (ptr = 0x4; ptr + 12 <= h->length; ptr += 12) { +- u32 cpuid = DWORD(data + ptr + 2 * 4); ++ u8 cpuid[4]; + u32 date; + ++ memcpy(cpuid, data + ptr + 2 * 4, 4); + /* AMD omits BaseFamily. Reconstruction valid on family >= 15. */ + if (cpuid_type == cpuid_x86_amd) +- cpuid = ((cpuid & 0xfff00) << 8) | 0x0f00 | (cpuid & 0xff); ++ { ++ cpuid[3] = cpuid[2] & 0x0f; ++ cpuid[2] = cpuid[1]; ++ cpuid[1] = 0x0f; ++ } + +- dmi_print_cpuid(pr_attr, "CPU ID", cpuid_type, (u8 *) &cpuid); ++ dmi_print_cpuid(pr_attr, "CPU ID", cpuid_type, cpuid); + + date = DWORD(data + ptr + 4); + pr_subattr("Date", "%04x-%02x-%02x", +-- +2.47.0 + diff --git a/0036-dmioem-Fix-HPE-type-203-PCI-device-class-and-sub-cla.patch b/0036-dmioem-Fix-HPE-type-203-PCI-device-class-and-sub-cla.patch new file mode 100644 index 0000000..b151f29 --- /dev/null +++ b/0036-dmioem-Fix-HPE-type-203-PCI-device-class-and-sub-cla.patch @@ -0,0 +1,38 @@ +From b125744b65641fbb2fad7237305606d21b70a2c2 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Mon, 16 Jun 2025 11:36:47 +0200 +Subject: [PATCH 36/45] dmioem: Fix HPE type 203 PCI device class and sub-class + +Casting the PCI device class to a signed 8-bit type before extending +it to a 16-bit type causes the sign bit to replicate to the whole +upper byte. For example, a sub-class value of 0x80 ends up being +displayed as 0xFF80. + +It doesn't make sense to display an 8-bit value using a 16-bit format +in the first place anyway. Simplify the code and directly display the +8-bit PCI device class and sub-class values as-is. + +Fixes: 3e86b5d3a228 ("dmioem: Decode HPE OEM Record 203") +Signed-off-by: Jean Delvare +--- + dmioem.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/dmioem.c b/dmioem.c +index 096cd0c..dea752b 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -1297,8 +1297,8 @@ static int dmi_decode_hp(const struct dmi_header *h) + dmi_hp_203_pciinfo("PCI Device ID", WORD(data + 0x0A)); + dmi_hp_203_pciinfo("PCI Sub Vendor ID", WORD(data + 0x0C)); + dmi_hp_203_pciinfo("PCI Sub Device ID", WORD(data + 0x0E)); +- dmi_hp_203_pciinfo("PCI Class Code", (char)data[0x10]); +- dmi_hp_203_pciinfo("PCI Sub Class Code", (char)data[0x11]); ++ pr_attr("PCI Class Code", "0x%02x", data[0x10]); ++ pr_attr("PCI Sub Class Code", "0x%02x", data[0x11]); + } + dmi_hp_203_assoc_hndl("Parent Handle", WORD(data + 0x12)); + pr_attr("Flags", "0x%04X", WORD(data + 0x14)); +-- +2.47.0 + diff --git a/0037-dmioem-Drop-function-dmi_hp_203_pciinfo.patch b/0037-dmioem-Drop-function-dmi_hp_203_pciinfo.patch new file mode 100644 index 0000000..bb72dc4 --- /dev/null +++ b/0037-dmioem-Drop-function-dmi_hp_203_pciinfo.patch @@ -0,0 +1,51 @@ +From 1dc0c678cb55a2df5b6c39184d4e589d39ae17f0 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Mon, 30 Jun 2025 14:36:16 +0200 +Subject: [PATCH 37/45] dmioem: Drop function dmi_hp_203_pciinfo() + +The presence of the device has already been tested before, so testing +it again for individual fields is redundant. + +Signed-off-by: Jean Delvare +Reviewed-by: Jerry Hoemann +--- + dmioem.c | 16 ++++------------ + 1 file changed, 4 insertions(+), 12 deletions(-) + +diff --git a/dmioem.c b/dmioem.c +index dea752b..31efde6 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -359,14 +359,6 @@ static void dmi_hp_203_assoc_hndl(const char *fname, u16 num) + pr_attr(fname, "0x%04X", num); + } + +-static void dmi_hp_203_pciinfo(const char *fname, u16 num) +-{ +- if (num == 0xFFFF) +- pr_attr(fname, "Device Not Present"); +- else +- pr_attr(fname, "0x%04x", num); +-} +- + static void dmi_hp_203_bayenc(const char *fname, u8 num) + { + switch (num) +@@ -1293,10 +1285,10 @@ static int dmi_decode_hp(const struct dmi_header *h) + } + else + { +- dmi_hp_203_pciinfo("PCI Vendor ID", WORD(data + 0x08)); +- dmi_hp_203_pciinfo("PCI Device ID", WORD(data + 0x0A)); +- dmi_hp_203_pciinfo("PCI Sub Vendor ID", WORD(data + 0x0C)); +- dmi_hp_203_pciinfo("PCI Sub Device ID", WORD(data + 0x0E)); ++ pr_attr("PCI Vendor ID", "0x%04x", WORD(data + 0x08)); ++ pr_attr("PCI Device ID", "0x%04x", WORD(data + 0x0A)); ++ pr_attr("PCI Sub Vendor ID", "0x%04x", WORD(data + 0x0C)); ++ pr_attr("PCI Sub Device ID", "0x%04x", WORD(data + 0x0E)); + pr_attr("PCI Class Code", "0x%02x", data[0x10]); + pr_attr("PCI Sub Class Code", "0x%02x", data[0x11]); + } +-- +2.47.0 + diff --git a/0038-dmioem-Decode-HPE-OEM-Type-232.patch b/0038-dmioem-Decode-HPE-OEM-Type-232.patch new file mode 100644 index 0000000..ebcae2c --- /dev/null +++ b/0038-dmioem-Decode-HPE-OEM-Type-232.patch @@ -0,0 +1,119 @@ +From b960e98506912ca6a2eceeafc59be0d659e7f299 Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Fri, 25 Jul 2025 18:17:14 +0200 +Subject: [PATCH 38/45] dmioem: Decode HPE OEM Type 232 + +DIMM Attributes Record + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 85 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 85 insertions(+) + +diff --git a/dmioem.c b/dmioem.c +index 31efde6..cffa49d 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -725,6 +725,22 @@ static void dmi_hp_230_method_bus_seg_addr(u8 code, u8 bus_seg, u8 addr) + pr_attr("I2C Address", "0x%02x", addr >> 1); + } + ++static void dmi_hp_232_encrypt(u8 code) ++{ ++ const char *str = "Reserved"; ++ static const char * const status[] = { ++ "Not Encrypted", ++ "Encrypted", ++ "Unknown", ++ "Not Supported", ++ }; ++ ++ if (code < ARRAY_SIZE(status)) ++ str = status[code]; ++ ++ pr_attr("Encryption Status", "%s", str); ++} ++ + static void dmi_hp_238_loc(const char *fname, unsigned int code) + { + const char *str = "Reserved"; +@@ -1525,6 +1541,75 @@ static int dmi_decode_hp(const struct dmi_header *h) + dmi_hp_230_method_bus_seg_addr(data[0x08], data[0x09], data[0x0A]); + break; + ++ case 232: ++ /* ++ * Vendor Specific: DIMM Attributes Record ++ * ++ * This record is used to communicate information about DIMMs that is not ++ * available via Industry Standard SMBIOS Records. ++ * ++ * There will be one Record Type 232 for each DIMM socket possible in the ++ * system (just like Type 17 Records). ++ * ++ * Offset| Name | Width | Description ++ * ----------------------------------------- ++ * 0x00 | Type | BYTE | 0xE8, DIMM Attributes Record ++ * 0x01 | Length | BYTE | Length of structure ++ * 0x02 | Handle | WORD | Unique handle ++ * 0x04 | Assoc Handle| WORD | Associated Handle (Type 17) ++ * 0x06 | DIMM Attr | DWORD | Attributes Bitfield (Defined in code) ++ * 0x0A | Min Voltage | WORD | Minimum operating voltage in millivolts ++ * 0x0C | Cfg Voltage | WORD | Configured operating voltage in millivolts ++ * 0x0E | RESERVED | ++ * .... | RESERVED | ++ * 0x21 | RESERVED | ++ * 0x22 | Map-Out | BYTE | Bit Field reason for DIMM being mapped out ++ * 0x23 | Encryption | BYTE | Encryption status ++ */ ++ if (gen < G9) return 0; ++ pr_handle_name("%s DIMM Attributes Record", company); ++ ++ if (h->length < 0x0E) break; ++ if (!(opt.flags & FLAG_QUIET)) ++ pr_attr("Associated Handle", "0x%04X", WORD(data + 0x04)); ++ ++ feat = DWORD(data + 0x06); ++ pr_attr("Attributes", "0x%08X", feat); ++ /* Bit [1:0] HP SmartMemory */ ++ pr_subattr("HPE Smart Memory", ++ (feat & 0x03) == 0 ? "No" : ++ (feat & 0x03) == 1 ? "Yes" : "Unknown"); ++ /* Bit [3:2] Indicator if DIMM is Load Reduced (LR) */ ++ /* Bit [2]: 1 = Field Supported */ ++ if (feat & (1 << 2)) ++ pr_subattr("Load Reduced DIMM installed", ++ (feat & (1 << 3)) ? "Yes" : "No"); ++ /* Bit [5:4] HP Standard DIMM Indicator */ ++ /* Bit [4]: 1 = Field Supported */ ++ if (feat & (1 << 4)) ++ pr_subattr("HPE Standard Memory Installed", ++ (feat & (1 << 5)) ? "Yes" : "No"); ++ if (WORD(data + 0x0A)) ++ pr_attr("Minimum Voltage", "%d mV", WORD(data + 0x0A)); ++ else ++ pr_attr("Minimum Voltage", "Unknown"); ++ ++ if (WORD(data + 0x0C)) ++ pr_attr("Configured Voltage", "%d mV", WORD(data + 0x0C)); ++ else ++ pr_attr("Configured Voltage", "Unknown"); ++ ++ if (h->length < 0x23) break; ++ feat = data[0x22]; ++ if (feat) { ++ pr_attr("Map-Out Reason", "0x%0X", feat); ++ pr_subattr("Configuration Error", (feat & 0x01) ? "Yes" : "No"); ++ pr_subattr("Training Error", (feat & 0x02) ? "Yes" : "No"); ++ } ++ if (h->length < 0x24) break; ++ dmi_hp_232_encrypt(data[0x23]); ++ break; ++ + case 233: + /* + * Vendor Specific: HPE ProLiant NIC MAC Information +-- +2.47.0 + diff --git a/0039-dmidecode-Rename-BIOS-to-Firmware.patch b/0039-dmidecode-Rename-BIOS-to-Firmware.patch new file mode 100644 index 0000000..e907fb3 --- /dev/null +++ b/0039-dmidecode-Rename-BIOS-to-Firmware.patch @@ -0,0 +1,178 @@ +From f740b319c287f03227baadaef96171a8621303da Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Tue, 23 Sep 2025 13:42:04 +0200 +Subject: [PATCH 39/45] dmidecode: Rename BIOS to Firmware + +Starting with SMBIOS specification version 3.8.0, the term "BIOS" is +replaced by the more generic term "Firmware" or "Platform Firmware". +Update all references accordingly. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 32 ++++++++++++++++---------------- + man/dmidecode.8 | 10 +++++----- + 2 files changed, 21 insertions(+), 21 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 5709e8a..5298123 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -162,7 +162,7 @@ const char *dmi_string(const struct dmi_header *dm, u8 s) + static const char *dmi_smbios_structure_type(u8 code) + { + static const char *type[] = { +- "BIOS", /* 0 */ ++ "Platform Firmware", /* 0 */ + "System", + "Base Board", + "Chassis", +@@ -175,7 +175,7 @@ static const char *dmi_smbios_structure_type(u8 code) + "On Board Devices", + "OEM Strings", + "System Configuration Options", +- "BIOS Language", ++ "Firmware Language", + "Group Associations", + "System Event Log", + "Physical Memory Array", +@@ -340,7 +340,7 @@ void dmi_print_storage_size(const char *attr, u64 code, unsigned int shift) + } + + /* +- * 7.1 BIOS Information (Type 0) ++ * 7.1 Platform Firmware Information (Type 0) + */ + + static void dmi_bios_runtime_size(u32 code) +@@ -378,7 +378,7 @@ static void dmi_bios_characteristics(u64 code) + { + /* 7.1.1 */ + static const char *characteristics[] = { +- "BIOS characteristics not supported", /* 3 */ ++ "Firmware characteristics not supported", /* 3 */ + "ISA is supported", + "MCA is supported", + "EISA is supported", +@@ -386,13 +386,13 @@ static void dmi_bios_characteristics(u64 code) + "PC Card (PCMCIA) is supported", + "PNP is supported", + "APM is supported", +- "BIOS is upgradeable", +- "BIOS shadowing is allowed", ++ "Firmware is upgradeable", ++ "Firmware shadowing is allowed", + "VLB is supported", + "ESCD support is available", + "Boot from CD is supported", + "Selectable boot is supported", +- "BIOS ROM is socketed", ++ "Firmware ROM is socketed", + "Boot from PC Card (PCMCIA) is supported", + "EDD is supported", + "Japanese floppy for NEC 9800 1.2 MB is supported (int 13h)", +@@ -1398,8 +1398,8 @@ static const char *dmi_processor_status(u8 code) + static const char *status[] = { + "Unknown", /* 0x00 */ + "Enabled", +- "Disabled By User", +- "Disabled By BIOS", ++ "Disabled by user", ++ "Disabled by firmware", + "Idle", /* 0x04 */ + out_of_spec, + out_of_spec, +@@ -2495,7 +2495,7 @@ static void dmi_system_configuration_options(const struct dmi_header *h) + } + + /* +- * 7.14 BIOS Language Information (Type 13) ++ * 7.14 Firmware Language Information (Type 13) + */ + + static void dmi_bios_languages(const struct dmi_header *h) +@@ -4473,8 +4473,8 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + */ + switch (h->type) + { +- case 0: /* 7.1 BIOS Information */ +- pr_handle_name("BIOS Information"); ++ case 0: /* 7.1 Platform Firmware Information */ ++ pr_handle_name("Platform Firmware Information"); + if (h->length < 0x12) break; + pr_attr("Vendor", "%s", + dmi_string(h, data[0x04])); +@@ -4503,10 +4503,10 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + pr_list_end(); + if (h->length < 0x18) break; + if (data[0x14] != 0xFF && data[0x15] != 0xFF) +- pr_attr("BIOS Revision", "%u.%u", ++ pr_attr("Platform Firmware Revision", "%u.%u", + data[0x14], data[0x15]); + if (data[0x16] != 0xFF && data[0x17] != 0xFF) +- pr_attr("Firmware Revision", "%u.%u", ++ pr_attr("Embedded Controller Firmware Revision", "%u.%u", + data[0x16], data[0x17]); + break; + +@@ -4798,8 +4798,8 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + dmi_system_configuration_options(h); + break; + +- case 13: /* 7.14 BIOS Language Information */ +- pr_handle_name("BIOS Language Information"); ++ case 13: /* 7.14 Firmware Language Information */ ++ pr_handle_name("Firmware Language Information"); + if (h->length < 0x16) break; + if (ver >= 0x0201) + { +diff --git a/man/dmidecode.8 b/man/dmidecode.8 +index 6636b72..f25f9a0 100644 +--- a/man/dmidecode.8 ++++ b/man/dmidecode.8 +@@ -1,6 +1,6 @@ + '\" t + .\" ** The above line should force tbl to be a preprocessor ** +-.TH DMIDECODE 8 "February 2023" "dmidecode" ++.TH DMIDECODE 8 "June 2025" "dmidecode" + .\" + .SH NAME + dmidecode \- \s-1DMI\s0 table decoder +@@ -14,7 +14,7 @@ dmidecode \- \s-1DMI\s0 table decoder + is a tool for dumping a computer's \s-1DMI\s0 (some say \s-1SMBIOS\s0) table + contents in a human-readable format. This table contains a description of the + system's hardware components, as well as other useful pieces of information +-such as serial numbers and \s-1BIOS\s0 revision. Thanks to this table, you can ++such as serial numbers and firmware revision. Thanks to this table, you can + retrieve this information without having to probe for the actual hardware. + While this is a good point in terms of report speed and safeness, this also + makes the presented information possibly unreliable. +@@ -203,7 +203,7 @@ determine the output format and are mutually exclusive. + .P + Please note in case of + .B dmidecode +-is run on a system with BIOS that boasts new SMBIOS specification, which ++is run on a system with firmware that boasts new SMBIOS specification, which + is not supported by the tool yet, it will print out relevant message in + addition to requested data on the very top of the output. Thus informs the + output data is not reliable. +@@ -215,7 +215,7 @@ r l + __ + r l. + Type Information +-0 BIOS ++0 Platform Firmware + 1 System + 2 Baseboard + 3 Chassis +@@ -228,7 +228,7 @@ Type Information + 10 On Board Devices + 11 OEM Strings + 12 System Configuration Options +-13 BIOS Language ++13 Firmware Language + 14 Group Associations + 15 System Event Log + 16 Physical Memory Array +-- +2.47.0 + diff --git a/0040-dmidecode.8-Clarify-what-bios-and-firmware-keywords-.patch b/0040-dmidecode.8-Clarify-what-bios-and-firmware-keywords-.patch new file mode 100644 index 0000000..ca0f563 --- /dev/null +++ b/0040-dmidecode.8-Clarify-what-bios-and-firmware-keywords-.patch @@ -0,0 +1,40 @@ +From fba847d3cebdbabc96aa7d6cbc3cc94db5994249 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Tue, 23 Sep 2025 13:42:10 +0200 +Subject: [PATCH 40/45] dmidecode.8: Clarify what "bios" and "firmware" + keywords refer to + +When passing "bios" to a command line option, it means the platform +firmware, regardless of it technically implementing the BIOS standard. + +Signed-off-by: Jean Delvare +--- + man/dmidecode.8 | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/man/dmidecode.8 b/man/dmidecode.8 +index f25f9a0..c4c292d 100644 +--- a/man/dmidecode.8 ++++ b/man/dmidecode.8 +@@ -108,6 +108,9 @@ It must be a keyword from the following list: + .BR processor\-version , + .BR processor\-frequency . + .hy ++In this context, for historical reasons, "bios" designates the platform ++firmware (regardless of it technically implementing the BIOS standard), ++while "firmware" designates the embedded controller firmware, if applicable. + Each keyword corresponds to a given \s-1DMI\s0 type and a given offset + within this entry type. + Not all strings may be meaningful or even defined on all systems. Some +@@ -149,6 +152,8 @@ keyword from the following list: + .BR slot . + .hy + Refer to the DMI TYPES section below for details. ++In this context, for historical reasons, "bios" designates the platform ++firmware, regardless of it technically implementing the BIOS standard. + If this option is used more than once, the set of displayed entries will be + the union of all the given types. + If \fITYPE\fP is not provided or not valid, a list of all valid keywords +-- +2.47.0 + diff --git a/0041-dmidecode-Add-processor-family-Xeon-D.patch b/0041-dmidecode-Add-processor-family-Xeon-D.patch new file mode 100644 index 0000000..5f5cded --- /dev/null +++ b/0041-dmidecode-Add-processor-family-Xeon-D.patch @@ -0,0 +1,28 @@ +From b0d99f10627728e8c9be40c335cbe6b47223fbf7 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Tue, 23 Sep 2025 13:42:17 +0200 +Subject: [PATCH 41/45] dmidecode: Add processor family "Xeon D" + +SMBIOS specification version 3.8.0 added one more processor family: +Intel Xeon D, with code D0h. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/dmidecode.c b/dmidecode.c +index 5298123..a6cd97e 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -962,6 +962,7 @@ static const char *dmi_processor_family(const struct dmi_header *h, u16 ver) + { 0xCD, "Core i5" }, + { 0xCE, "Core i3" }, + { 0xCF, "Core i9" }, ++ { 0xD0, "Xeon D" }, + + { 0xD2, "C7-M" }, + { 0xD3, "C7-D" }, +-- +2.47.0 + diff --git a/0042-dmidecode-Deprecate-the-processor-voltage-field.patch b/0042-dmidecode-Deprecate-the-processor-voltage-field.patch new file mode 100644 index 0000000..9558d20 --- /dev/null +++ b/0042-dmidecode-Deprecate-the-processor-voltage-field.patch @@ -0,0 +1,34 @@ +From 21ddcb40b507a1e35ab5ee2e0121768d9d02c836 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Tue, 23 Sep 2025 13:42:23 +0200 +Subject: [PATCH 42/45] dmidecode: Deprecate the processor voltage field + +Since SMBIOS specification version 3.8.0, the processor voltage field +is deprecated, so don't print it if not set. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/dmidecode.c b/dmidecode.c +index a6cd97e..03ba201 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -4615,7 +4615,12 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + dmi_processor_id(h); + pr_attr("Version", "%s", + dmi_string(h, data[0x10])); +- dmi_processor_voltage("Voltage", data[0x11]); ++ /* ++ * Since SMBIOS 3.8.0, the processor voltage field ++ * is deprecated, so ignore it if no value is set. ++ */ ++ if (data[0x11]) ++ dmi_processor_voltage("Voltage", data[0x11]); + dmi_processor_frequency("External Clock", data + 0x12); + dmi_processor_frequency("Max Speed", data + 0x14); + dmi_processor_frequency("Current Speed", data + 0x16); +-- +2.47.0 + diff --git a/0043-dmidecode-Rework-the-decoding-of-the-arm64-SoC-ID.patch b/0043-dmidecode-Rework-the-decoding-of-the-arm64-SoC-ID.patch new file mode 100644 index 0000000..09cb935 --- /dev/null +++ b/0043-dmidecode-Rework-the-decoding-of-the-arm64-SoC-ID.patch @@ -0,0 +1,68 @@ +From 8c5ca6aac700c1336bb559ffaf0e6d5a831246bf Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Tue, 23 Sep 2025 13:42:28 +0200 +Subject: [PATCH 43/45] dmidecode: Rework the decoding of the arm64 SoC ID + +Version 3.8.0 of the SMBIOS specification clarified the text related +to Arm SoC_ID. Rework the code to match the new explanations more +closely. The result if the same, just it's more obviously correct. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 24 +++++++++++++++--------- + 1 file changed, 15 insertions(+), 9 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 03ba201..a9685a1 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -1170,8 +1170,9 @@ static enum cpuid_type dmi_get_cpuid_type(const struct dmi_header *h) + void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...), + const char *label, enum cpuid_type sig, const u8 *p) + { +- u32 eax, midr, jep106, soc_revision; +- u16 dx; ++ u32 eax, midr, soc_revision; ++ u16 dx, soc_id; ++ u8 jep106_code, jep106_bank; + + switch (sig) + { +@@ -1211,12 +1212,12 @@ void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...) + + case cpuid_arm_soc_id: /* ARM with SOC ID */ + /* +- * If Soc ID is supported, the first DWORD is the JEP-106 code; +- * the second DWORD is the SoC revision value. +- */ +- jep106 = DWORD(p); +- soc_revision = DWORD(p + 4); +- /* ++ * If SoC ID is supported, the first WORD is a SiP ++ * defined SoC ID; the next BYTE is the JEP-106 ++ * identification code of the SiP; the next BYTE is ++ * its bank index; lastly, the next DWORD is the SoC ++ * revision value. ++ * + * According to SMC Calling Convention (SMCCC) v1.3 specification + * (https://developer.arm.com/documentation/den0028/d/), the format + * of the values returned by the SMCCC_ARCH_SOC_ID call is as follows: +@@ -1231,9 +1232,14 @@ void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...) + * Bit[31] must be zero + * Bits[30:0] SoC revision + */ ++ soc_id = WORD(p); ++ jep106_code = p[2] & 0x7F; ++ jep106_bank = p[3] & 0x7F; ++ soc_revision = DWORD(p + 4); ++ + pr_attr("Signature", + "JEP-106 Bank 0x%02x Manufacturer 0x%02x, SoC ID 0x%04x, SoC Revision 0x%08x", +- (jep106 >> 24) & 0x7F, (jep106 >> 16) & 0x7F, jep106 & 0xFFFF, soc_revision); ++ jep106_bank, jep106_code, soc_id, soc_revision); + return; + + case cpuid_x86_intel: /* Intel */ +-- +2.47.0 + diff --git a/0044-dmidecode-Mark-SMBIOS-3.8.0-as-supported.patch b/0044-dmidecode-Mark-SMBIOS-3.8.0-as-supported.patch new file mode 100644 index 0000000..941d8e1 --- /dev/null +++ b/0044-dmidecode-Mark-SMBIOS-3.8.0-as-supported.patch @@ -0,0 +1,29 @@ +From 70c99ec5c133e78e6239f4c34a8c71687e18f492 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Tue, 23 Sep 2025 13:42:34 +0200 +Subject: [PATCH 44/45] dmidecode: Mark SMBIOS 3.8.0 as supported + +All changes mentioned in the SMBIOS 3.8.0 specification update are +implemented now, so mark this version as supported. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/dmidecode.c b/dmidecode.c +index a9685a1..0d3d825 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -89,7 +89,7 @@ static const char *bad_index = ""; + + enum cpuid_type cpuid_type = cpuid_none; + +-#define SUPPORTED_SMBIOS_VER 0x030701 ++#define SUPPORTED_SMBIOS_VER 0x030800 + + #define FLAG_NO_FILE_OFFSET (1 << 0) + #define FLAG_STOP_AT_EOT (1 << 1) +-- +2.47.0 + diff --git a/0045-dmioem-Decode-HPE-OEM-Type-244.patch b/0045-dmioem-Decode-HPE-OEM-Type-244.patch new file mode 100644 index 0000000..f393a11 --- /dev/null +++ b/0045-dmioem-Decode-HPE-OEM-Type-244.patch @@ -0,0 +1,120 @@ +From fa268715c0d7d8895842c6f9b92bcc1a17790000 Mon Sep 17 00:00:00 2001 +From: Jerry Hoemann +Date: Sat, 4 Oct 2025 15:57:46 +0200 +Subject: [PATCH 45/45] dmioem: Decode HPE OEM Type 244 + +DIMM Current Configuration Record + +Signed-off-by: Jerry Hoemann +Signed-off-by: Jean Delvare +--- + dmioem.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 86 insertions(+) + +diff --git a/dmioem.c b/dmioem.c +index cffa49d..7ce420e 100644 +--- a/dmioem.c ++++ b/dmioem.c +@@ -949,6 +949,22 @@ static void dmi_hp_242_speed(const char *attr, u16 speed) + pr_attr(attr, "%s", "Unknown"); + } + ++static void dmi_hp_244_health(u8 code) ++{ ++ const char *str = "Reserved"; ++ static const char * const health[] = { ++ "Healthy", /* 0x00 */ ++ "DIMM Missing", ++ "Config Inactive", ++ "SPA Missing", ++ "New Goal", ++ "Locked", /* 0x05 */ ++ }; ++ if (code < ARRAY_SIZE(health)) ++ str = health[code]; ++ pr_attr("Interleave Set Health", "%s", str); ++} ++ + static void dmi_hp_245_pcie_riser(const struct dmi_header *h) + { + const char *str = "Reserved"; +@@ -1919,6 +1935,76 @@ static int dmi_decode_hp(const struct dmi_header *h) + dmi_hp_242_speed("Capable Speed", WORD(data + 0x3C)); + break; + ++ case 244: ++ /* ++ * Vendor Specific: HPE DIMM Current Configuration Record ++ * ++ * This record is used to communicate information about the currently ++ * configured memory regions on DIMMs installed in the system. ++ * ++ * There will be at least one Type 244 Record for each DIMM installed ++ * in the system with configured non-volatile or volatile memory. ++ * ++ * The number of DIMM Configuration Records for each DIMM is specified by ++ * the Configured Region Count field in its corresponding Type 232 DIMM ++ * Capabilities record. Each record represents a memory region on the ++ * DIMM, labeled by its Region ID. The Memory Type field can be used to ++ * determine the currently configured memory type for the region. When ++ * set to Volatile, the data on the memory region is lost on a power ++ * cycle. When set to Byte Accessible Persistent, the data on ++ * the memory region is retained through a reset. The Region Memory Size ++ * field contains the size of the configured region in MiB. ++ * ++ * The Passphrase State specifies the enable/disable state of the ++ * Passphrase requirement and is only applicable when the DIMM region is ++ * configured as Byte Accessible Persistent. The Interleave Set Index ++ * specifies which interleave set the DIMM region belongs to, if any. ++ * Regions with identical interleave set indices mean the DIMM regions ++ * are interleaved. These indices should match what is found in the DIMM's ++ * PCAT Interleave Information tables. Interleave set indices are ++ * 1-based. This will be a unique value per interleave set. If the DIMM ++ * region is not interleaved, the interleave set index will ++ * still be a unique value. ++ * ++ * Offset | Name | Width | Description ++ * --------------------------------------- ++ * 0x00 | Type | BYTE | 0xF4, DIMM Current Configuration Record ++ * 0x01 | Length | BYTE | Length of structure ++ * 0x02 | Handle | WORD | Unique handle ++ * 0x04 | Hndl Assoc | WORD | Handle of corresponding Type 17 record ++ * 0x06 | Region ID | BYTE | Unique ID of memory region on DIMM ++ * 0x07 | Region Type| WORD | Persistence Type. Bit Field: See code ++ * 0x09 | Region Size| QWORD | Size of memory region in MiB ++ * 0x11 | Passphrase | BYTE | Current state of Passphrase. See code ++ * 0x12 | Set Index | WORD | Interleave set index. Region w/ same index ++ * | are part of same interleave set. ++ * 0x14 | DIMM Count | BYTE | Number of DIMMs in interleave set ++ * 0x15 | Health | BYTE | Health of Interleave set defined in code ++ */ ++ ++ pr_handle_name("%s DIMM Current Configuration", company); ++ if (h->length < 0x14) break; ++ if (!(opt.flags & FLAG_QUIET)) ++ pr_attr("Associated Handle", "0x%04X", WORD(data + 0x04)); ++ pr_attr("Region ID", "%hhu", data[0x06]); ++ feat = WORD(data + 0x07); ++ pr_attr("Persistence Type", "%s", (feat & 0x01) ? "Volatile" : ++ ((feat >> 1) & 0x01) ? "Byte Accessible" : ++ ((feat >> 2) & 0x01) ? "Block I/O" : ++ "Reserved"); ++ dmi_print_memory_size("Size", QWORD(data + 0x09), 2); ++ pr_attr("Passphrase Enabled", "%s", data[0x11] ? "Yes" : "No"); ++ feat = WORD(data + 0x12); ++ if (feat) ++ pr_attr("Interleave Set Index", "%u", feat); ++ if (h->length < 0x15) break; ++ if (feat) ++ pr_attr("Interleave DIMM Count", "%hhu", data[0x14]); ++ if (h->length < 0x16) break; ++ if (feat) ++ dmi_hp_244_health(data[0x15]); ++ break; ++ + case 245: + /* + * Vendor Specific: HPE Extension Board Inventory Record +-- +2.47.0 + diff --git a/dmidecode.spec b/dmidecode.spec index e597606..60d048d 100644 --- a/dmidecode.spec +++ b/dmidecode.spec @@ -1,10 +1,55 @@ Summary: Tool to analyse BIOS DMI data Name: dmidecode Version: 3.6 -Release: 4%{?dist} +Release: 5%{?dist} Epoch: 1 License: GPL-2.0-or-later Source0: https://download.savannah.gnu.org/releases/%{name}/%{name}-%{version}.tar.xz +Patch00: 0001-dmioem-Update-HPE-OEM-Type-238.patch +Patch01: 0002-dmioem-Decode-Dell-specific-DMI-type-218.patch +Patch02: 0003-dmioem-Decode-Dell-specific-DMI-type-177.patch +Patch03: 0004-dmioem-Update-HPE-OEM-Type-203.patch +Patch04: 0005-dmioem-Update-HPE-OEM-Type-224.patch +Patch05: 0006-dmidecode-Move-out_of_spec-into-the-common-header.patch +Patch06: 0007-dmioem-Decode-Dell-specific-DMI-type-212.patch +Patch07: 0008-dmioem-Update-HPE-OEM-Type-216.patch +Patch08: 0009-dmioem-Decode-Dell-specific-DMI-type-178.patch +Patch09: 0010-dmidecode-Update-the-sockets-in-Processor-Update-sec.patch +Patch10: 0011-dmidecode-Update-info-in-Processor-Family-field.patch +Patch11: 0012-dmidecode.8-Fix-groff-error.patch +Patch12: 0013-Fix-the-forward-declaration-of-dmi_print_memory_size.patch +Patch13: 0014-dmioem-Improve-code-portability-variable-declaration.patch +Patch14: 0015-dmioem-Correct-HPE-OEM-Type-216-format-14.patch +Patch15: 0016-dmioem-Correct-HPE-OEM-Type-216-format-18.patch +Patch16: 0017-dmioem-Update-HPE-OEM-Type-216.patch +Patch17: 0018-dmioem-Update-HPE-OEM-Type-245.patch +Patch18: 0019-dmidecode-Use-binary-unit-prefixes.patch +Patch19: 0020-dmidecode-Mark-SMBIOS-3.7.1-as-supported.patch +Patch20: 0021-dmidecode-Update-copyright-year-to-2025.patch +Patch21: 0022-Fix-unit-of-starting-and-ending-addresses.patch +Patch22: 0023-Stop-open-coding-the-u64-type.patch +Patch23: 0024-Get-rid-of-u64_range.patch +Patch24: 0025-biosdecode-Update-copyright-year-to-2025.patch +Patch25: 0026-dmioem-Support-42-byte-HPE-type-242-records.patch +Patch26: 0027-dmioem-Display-drive-capacity-in-power-of-10-units.patch +Patch27: 0028-dmioem-Spell-ProLiant-consistently.patch +Patch28: 0029-dmidecode-Fix-missing-end-of-list-in-type-0.patch +Patch29: 0030-dmioem-Add-type-HPE-Gen-12.patch +Patch30: 0031-dmioem-Decode-HPE-OEM-Type-193.patch +Patch31: 0032-Rename-variable-div.patch +Patch32: 0033-dmidecode-Expose-memory-utility-functions.patch +Patch33: 0034-dmioem-Decode-HPE-OEM-Type-202.patch +Patch34: 0035-dmioem-Fix-HPE-type-199-on-theoretical-big-endian-sy.patch +Patch35: 0036-dmioem-Fix-HPE-type-203-PCI-device-class-and-sub-cla.patch +Patch36: 0037-dmioem-Drop-function-dmi_hp_203_pciinfo.patch +Patch37: 0038-dmioem-Decode-HPE-OEM-Type-232.patch +Patch38: 0039-dmidecode-Rename-BIOS-to-Firmware.patch +Patch39: 0040-dmidecode.8-Clarify-what-bios-and-firmware-keywords-.patch +Patch40: 0041-dmidecode-Add-processor-family-Xeon-D.patch +Patch41: 0042-dmidecode-Deprecate-the-processor-voltage-field.patch +Patch42: 0043-dmidecode-Rework-the-decoding-of-the-arm64-SoC-ID.patch +Patch43: 0044-dmidecode-Mark-SMBIOS-3.8.0-as-supported.patch +Patch44: 0045-dmioem-Decode-HPE-OEM-Type-244.patch URL: https://www.nongnu.org/dmidecode/ BuildRequires: gcc make ExclusiveArch: %{ix86} x86_64 ia64 aarch64 riscv64 @@ -21,7 +66,7 @@ slots (e.g. AGP, PCI, ISA) and memory module slots, and the list of I/O ports (e.g. serial, parallel, USB). %prep -%autosetup +%autosetup -p1 %build %make_build CFLAGS="%{optflags}" LDFLAGS="%{__global_ldflags}" @@ -41,6 +86,10 @@ I/O ports (e.g. serial, parallel, USB). %{_mandir}/man8/* %changelog +* Tue Oct 14 2025 Lichen Liu - 1:3.6-5 +- update to upstream fa268715 + Resolves: RHEL-99252 + * Fri Mar 14 2025 David Abdurachmanov - 1:3.6-4 - Add riscv64