120 lines
3.5 KiB
Diff
120 lines
3.5 KiB
Diff
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commit 799a9d8b31f10d7d3d4db1365df409221a5ff413
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Author: Anton Arapov <aarapov@redhat.com>
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Date: Tue May 3 14:43:42 2011 +0200
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update to smbios 2.7.1
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---
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CHANGELOG | 9 +++++++++
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dmidecode.c | 38 +++++++++++++++++++++++++++++++-------
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2 files changed, 40 insertions(+), 7 deletions(-)
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diff --git a/CHANGELOG b/CHANGELOG
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index de3d7e8..c10f5f4 100644
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--- a/CHANGELOG
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+++ b/CHANGELOG
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@@ -1,3 +1,12 @@
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+2011-04-20 Jean Delvare <khali@linux-fr.org>
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+
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+ Update to support SMBIOS specification version 2.7.1.
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+
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+ * dmidecode.c: Add 6 AMD processor families (DMI type 4).
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+ * dmidecode.c: Add cache associativity value
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+ "20-way Set-associative" (DMI type 7).
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+ * dmidecode.c: Add PCI Express 3 slot types (DMI type 9).
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+
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2011-01-25 Jean Delvare <khali@linux-fr.org>
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* dmidecode.c: Fix boundary checks of memory array location codes
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diff --git a/dmidecode.c b/dmidecode.c
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index 7b081f9..f7b23c1 100644
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--- a/dmidecode.c
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+++ b/dmidecode.c
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@@ -707,6 +707,8 @@ static const char *dmi_processor_family(const struct dmi_header *h, u16 ver)
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{ 0x3A, "Athlon II Dual-Core M" },
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{ 0x3B, "Opteron 6100" },
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{ 0x3C, "Opteron 4100" },
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+ { 0x3D, "Opteron 6200" },
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+ { 0x3E, "Opteron 4200" },
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{ 0x40, "MIPS" },
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{ 0x41, "MIPS R4000" },
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@@ -714,6 +716,10 @@ static const char *dmi_processor_family(const struct dmi_header *h, u16 ver)
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{ 0x43, "MIPS R4400" },
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{ 0x44, "MIPS R4600" },
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{ 0x45, "MIPS R10000" },
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+ { 0x46, "C-Series" },
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+ { 0x47, "E-Series" },
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+ { 0x48, "S-Series" },
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+ { 0x49, "G-Series" },
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{ 0x50, "SPARC" },
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{ 0x51, "SuperSPARC" },
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@@ -997,7 +1003,8 @@ static void dmi_processor_id(u8 type, const u8 *p, const char *version, const ch
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sig = 1;
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else if ((type >= 0x18 && type <= 0x1D) /* AMD */
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|| type == 0x1F /* AMD */
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- || (type >= 0x38 && type <= 0x3C) /* AMD */
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+ || (type >= 0x38 && type <= 0x3E) /* AMD */
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+ || (type >= 0x46 && type <= 0x49) /* AMD */
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|| (type >= 0x83 && type <= 0x8F) /* AMD */
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|| (type >= 0xB6 && type <= 0xB7) /* AMD */
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|| (type >= 0xE6 && type <= 0xEF)) /* AMD */
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@@ -1143,10 +1150,20 @@ static const char *dmi_processor_upgrade(u8 code)
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"Socket LGA1156",
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"Socket LGA1567",
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"Socket PGA988A",
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- "Socket BGA1288" /* 0x20 */
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+ "Socket BGA1288",
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+ "Socket rPGA988B",
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+ "Socket BGA1023",
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+ "Socket BGA1024",
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+ "Socket BGA1155",
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+ "Socket LGA1356",
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+ "Socket LGA2011",
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+ "Socket FS1",
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+ "Socket FS2",
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+ "Socket FM1",
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+ "Socket FM2" /* 0x2A */
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};
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- if (code >= 0x01 && code <= 0x20)
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+ if (code >= 0x01 && code <= 0x2A)
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return upgrade[code - 0x01];
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return out_of_spec;
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}
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@@ -1493,10 +1510,11 @@ static const char *dmi_cache_associativity(u8 code)
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"24-way Set-associative",
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"32-way Set-associative",
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"48-way Set-associative",
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- "64-way Set-associative" /* 0x0D */
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+ "64-way Set-associative",
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+ "20-way Set-associative" /* 0x0E */
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};
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- if (code >= 0x01 && code <= 0x0D)
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+ if (code >= 0x01 && code <= 0x0E)
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return type[code - 0x01];
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return out_of_spec;
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}
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@@ -1660,12 +1678,18 @@ static const char *dmi_slot_type(u8 code)
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"PCI Express 2 x2",
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"PCI Express 2 x4",
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"PCI Express 2 x8",
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- "PCI Express 2 x16", /* 0xB0 */
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+ "PCI Express 2 x16",
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+ "PCI Express 3",
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+ "PCI Express 3 x1",
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+ "PCI Express 3 x2",
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+ "PCI Express 3 x4",
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+ "PCI Express 3 x8",
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+ "PCI Express 3 x16" /* 0xB6 */
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};
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if (code >= 0x01 && code <= 0x13)
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return type[code - 0x01];
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- if (code >= 0xA0 && code <= 0xB0)
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+ if (code >= 0xA0 && code <= 0xB6)
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return type_0xA0[code - 0xA0];
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return out_of_spec;
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}
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