Merged update from upstream sources
This is an automated DistroBaker update from upstream sources. If you do not know what this is about or would like to opt out, contact the OSCI team. Source: https://src.fedoraproject.org/rpms/ceph.git#950231a5bb563d75dca21a661872bd5e99c10107
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DistroBaker
parent
511e100206
commit
401597be54
2
.gitignore
vendored
2
.gitignore
vendored
@ -0,0 +1,2 @@
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ceph-*.tar.*
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*.src.rpm
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228
0001-src-common-crc32c_intel_fast.patch
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228
0001-src-common-crc32c_intel_fast.patch
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@ -0,0 +1,228 @@
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--- ceph-15.2.4/src/yasm-wrapper.orig 2020-06-30 11:40:51.000000000 -0400
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+++ ceph-15.2.4/src/yasm-wrapper 2020-07-20 12:21:34.574980869 -0400
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@@ -1,10 +1,11 @@
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-#!/bin/sh -e
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+#!/bin/sh
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# libtool and yasm do not get along.
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# filter out any crap that libtool feeds us that yasm does not understand.
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#echo $0: got $*
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new=""
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touch=""
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+object=""
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while [ -n "$*" ]; do
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case "$1" in
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-f )
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@@ -29,6 +30,12 @@
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touch="$1"
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shift
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;;
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+ -o )
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+ shift
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+ object="$1"
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+ new="$new -o $1"
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+ shift
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+ ;;
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* )
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new="$new $1"
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shift
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@@ -36,8 +43,15 @@
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esac
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done
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-#echo $0: yasm $new
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-yasm $new
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+#echo ${0}: yasm ${new}
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+yasm ${new}
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+
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+echo ${new} | grep -- "crc32c_intel_fast*asm\.s"
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+if [ $? -ne 0 ]; then
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+ touch /tmp/${object}
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+ ld -r -z ibt -z shstk -z noexecstack -o ${object}.tmp ${object}
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+ mv ${object}.tmp ${object}
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+fi
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[ -n "$touch" ] && touch $touch
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--- ceph-15.2.2/src/common/crc32c_intel_fast_asm.s.orig 2020-05-26 08:34:32.226201974 -0400
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+++ ceph-15.2.2/src/common/crc32c_intel_fast_asm.s 2020-05-26 17:19:20.327201974 -0400
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@@ -1,5 +1,5 @@
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;
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-; Copyright 2012-2013 Intel Corporation All Rights Reserved.
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+; Copyright 2012-2015 Intel Corporation All Rights Reserved.
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; All rights reserved.
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;
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; http://opensource.org/licenses/BSD-3-Clause
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@@ -59,16 +59,34 @@
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xor rbx, rbx ;; rbx = crc1 = 0;
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xor r10, r10 ;; r10 = crc2 = 0;
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+ cmp len, %%bSize*3*2
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+ jbe %%non_prefetch
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+
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%assign i 0
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%rep %%bSize/8 - 1
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- crc32 rax, [bufptmp+i + 0*%%bSize] ;; update crc0
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- crc32 rbx, [bufptmp+i + 1*%%bSize] ;; update crc1
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- crc32 r10, [bufptmp+i + 2*%%bSize] ;; update crc2
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+ %if i < %%bSize*3/4
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+ prefetchnta [bufptmp+ %%bSize*3 + i*4]
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+ %endif
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+ crc32 rax, qword [bufptmp+i + 0*%%bSize] ;; update crc0
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+ crc32 rbx, qword [bufptmp+i + 1*%%bSize] ;; update crc1
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+ crc32 r10, qword [bufptmp+i + 2*%%bSize] ;; update crc2
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%assign i (i+8)
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%endrep
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- crc32 rax, [bufptmp+i + 0*%%bSize] ;; update crc0
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- crc32 rbx, [bufptmp+i + 1*%%bSize] ;; update crc1
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-; SKIP ;crc32 r10, [bufptmp+i + 2*%%bSize] ;; update crc2
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+ jmp %%next %+ %1
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+
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+%%non_prefetch:
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+ %assign i 0
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+ %rep %%bSize/8 - 1
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+ crc32 rax, qword [bufptmp+i + 0*%%bSize] ;; update crc0
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+ crc32 rbx, qword [bufptmp+i + 1*%%bSize] ;; update crc1
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+ crc32 r10, qword [bufptmp+i + 2*%%bSize] ;; update crc2
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+ %assign i (i+8)
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+ %endrep
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+
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+%%next %+ %1:
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+ crc32 rax, qword [bufptmp+i + 0*%%bSize] ;; update crc0
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+ crc32 rbx, qword [bufptmp+i + 1*%%bSize] ;; update crc1
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+; SKIP ;crc32 r10, qword [bufptmp+i + 2*%%bSize] ;; update crc2
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; merge in crc0
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movzx bufp_dw, al
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@@ -180,12 +198,15 @@
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%define crc_init_dw r8d
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%endif
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-
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+ endbranch
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push rdi
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push rbx
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mov rax, crc_init ;; rax = crc_init;
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+ cmp len, 8
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+ jb less_than_8
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+
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; 1) ALIGN: ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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@@ -195,9 +216,6 @@
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;; amount of the address
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je proc_block ;; Skip if aligned
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- cmp len, 8
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- jb less_than_8
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-
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;;;; Calculate CRC of unaligned bytes of the buffer (if any) ;;;;
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mov rbx, [bufptmp] ;; load a quadword from the buffer
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add bufptmp, bufp ;; align buffer pointer for
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@@ -233,7 +251,7 @@
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jnc bit7 ;; jump to bit-6 if bit-7 == 0
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%assign i 0
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%rep 16
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- crc32 rax, [bufptmp+i] ;; compute crc32 of 8-byte data
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+ crc32 rax, qword [bufptmp+i] ;; compute crc32 of 8-byte data
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%assign i (i+8)
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%endrep
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je do_return ;; return if remaining data is zero
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@@ -244,7 +262,7 @@
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jnc bit6 ;; jump to bit-6 if bit-7 == 0
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%assign i 0
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%rep 8
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- crc32 rax, [bufptmp+i] ;; compute crc32 of 8-byte data
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+ crc32 rax, qword [bufptmp+i] ;; compute crc32 of 8-byte data
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%assign i (i+8)
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%endrep
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je do_return ;; return if remaining data is zero
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@@ -254,7 +272,7 @@
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jnc bit5 ;; jump to bit-5 if bit-6 == 0
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%assign i 0
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%rep 4
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- crc32 rax, [bufptmp+i] ;; compute crc32 of 8-byte data
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+ crc32 rax, qword [bufptmp+i] ;; compute crc32 of 8-byte data
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%assign i (i+8)
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%endrep
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je do_return ;; return if remaining data is zero
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@@ -264,7 +282,7 @@
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jnc bit4 ;; jump to bit-4 if bit-5 == 0
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%assign i 0
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%rep 2
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- crc32 rax, [bufptmp+i] ;; compute crc32 of 8-byte data
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+ crc32 rax, qword [bufptmp+i] ;; compute crc32 of 8-byte data
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%assign i (i+8)
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%endrep
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je do_return ;; return if remaining data is zero
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@@ -272,11 +290,11 @@
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bit4:
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shl len_b, 1 ;; shift-out MSB (bit-4)
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jnc bit3 ;; jump to bit-3 if bit-4 == 0
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- crc32 rax, [bufptmp] ;; compute crc32 of 8-byte data
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+ crc32 rax, qword [bufptmp] ;; compute crc32 of 8-byte data
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je do_return ;; return if remaining data is zero
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add bufptmp, 8 ;; buf +=8; (next 8 bytes)
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bit3:
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- mov rbx, [bufptmp] ;; load a 8-bytes from the buffer:
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+ mov rbx, qword [bufptmp] ;; load a 8-bytes from the buffer:
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shl len_b, 1 ;; shift-out MSB (bit-3)
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jnc bit2 ;; jump to bit-2 if bit-3 == 0
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crc32 eax, ebx ;; compute crc32 of 4-byte data
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--- ceph-15.2.2/src/common/crc32c_intel_fast_zero_asm.s.orig 2020-05-26 08:34:32.226201974 -0400
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+++ ceph-15.2.2/src/common/crc32c_intel_fast_zero_asm.s 2020-05-26 17:19:32.497201974 -0400
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@@ -1,5 +1,5 @@
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;
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-; Copyright 2012-2013 Intel Corporation All Rights Reserved.
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+; Copyright 2012-2015 Intel Corporation All Rights Reserved.
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; All rights reserved.
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;
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; http://opensource.org/licenses/BSD-3-Clause
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@@ -59,6 +59,19 @@
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xor rbx, rbx ;; rbx = crc1 = 0;
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xor r10, r10 ;; r10 = crc2 = 0;
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+ cmp len, %%bSize*3*2
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+ jbe %%non_prefetch
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+
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+ %assign i 0
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+ %rep %%bSize/8 - 1
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+ crc32 rax, bufptmp ;; update crc0
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+ crc32 rbx, bufptmp ;; update crc1
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+ crc32 r10, bufptmp ;; update crc2
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+ %assign i (i+8)
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+ %endrep
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+ jmp %%next %+ %1
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+
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+%%non_prefetch:
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%assign i 0
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%rep %%bSize/8 - 1
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crc32 rax, bufptmp ;; update crc0
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@@ -66,6 +79,8 @@
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crc32 r10, bufptmp ;; update crc2
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%assign i (i+8)
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%endrep
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+
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+%%next %+ %1:
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crc32 rax, bufptmp ;; update crc0
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crc32 rbx, bufptmp ;; update crc1
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; SKIP ;crc32 r10, bufptmp ;; update crc2
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@@ -180,12 +195,15 @@
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%define crc_init_dw r8d
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%endif
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-
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+ endbranch
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push rdi
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push rbx
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mov rax, crc_init ;; rax = crc_init;
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+ cmp len, 8
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+ jb less_than_8
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+
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; 1) ALIGN: ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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13
0002-src-common-CMakeLists.txt.patch
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13
0002-src-common-CMakeLists.txt.patch
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diff --git a/src/common/CMakeLists.txt b/src/common/CMakeLists.txt
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index 65ba10b0f1..eeedc29c37 100644
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--- a/src/common/CMakeLists.txt
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+++ b/src/common/CMakeLists.txt
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@@ -165,7 +165,7 @@ elseif(HAVE_ARMV8_CRC)
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crc32c_aarch64.c)
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endif(HAVE_INTEL)
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-add_library(crc32 ${crc32_srcs})
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+add_library(crc32 STATIC ${crc32_srcs})
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if(HAVE_ARMV8_CRC)
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set_target_properties(crc32 PROPERTIES
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COMPILE_FLAGS "${CMAKE_C_FLAGS} ${ARMV8_CRC_COMPILE_FLAGS}")
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21
0003-src-common-bitstr.h.patch
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21
0003-src-common-bitstr.h.patch
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@ -0,0 +1,21 @@
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--- ceph-15.1.0/src/common/bit_str.h.orig 2020-02-03 09:47:20.047149798 -0500
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+++ ceph-15.1.0/src/common/bit_str.h 2020-02-03 09:47:50.213149798 -0500
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@@ -17,6 +17,7 @@
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#include <cstdint>
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#include <iosfwd>
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#include <functional>
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+#include <ostream>
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namespace ceph {
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class Formatter;
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--- ceph-15.2.4/src/global/signal_handler.h.orig 2020-07-17 12:57:54.763628429 -0400
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+++ ceph-15.2.4/src/global/signal_handler.h 2020-07-17 12:58:10.610628429 -0400
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@@ -16,6 +16,8 @@
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#define CEPH_GLOBAL_SIGNAL_HANDLER_H
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#include <signal.h>
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+#include <string>
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+
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#include "acconfig.h"
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typedef void (*signal_handler_t)(int);
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13
cmake-modules-BuildBoost.cmake.noautopatch
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13
cmake-modules-BuildBoost.cmake.noautopatch
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@ -0,0 +1,13 @@
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diff --git a/cmake/modules/BuildBoost.cmake b/cmake/modules/BuildBoost.cmake
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index 2e92132366..3cb1e3d958 100644
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--- a/cmake/modules/BuildBoost.cmake
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+++ b/cmake/modules/BuildBoost.cmake
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@@ -62,7 +62,7 @@ function(do_build_boost version)
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else()
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list(APPEND boost_features "address-model=32")
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endif()
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- set(BOOST_CXXFLAGS "-fPIC -w") # check on arm, etc <---XXX
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+ set(BOOST_CXXFLAGS "-fPIC -w -fexceptions -fstack-protector-strong -grecord-gcc-switches -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -ftemplate-depth-1024 -fno-new-ttp-matching -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-free") # check on arm, etc <---XXX
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list(APPEND boost_features "cxxflags=${BOOST_CXXFLAGS}")
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set(boost_with_libs)
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