From b44dd57ea1d317df5053b34fa0d4e71f1e9915a1 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Tue, 2 Jul 2024 12:56:41 +0100 Subject: [PATCH] More fixes for Intel's APX (part 1) extensions. Resolves: RHEL-44713 --- binutils-Intel-APX-part-1-supplimental.patch | 540 +++++++++++++++++++ binutils.spec | 45 +- 2 files changed, 584 insertions(+), 1 deletion(-) create mode 100644 binutils-Intel-APX-part-1-supplimental.patch diff --git a/binutils-Intel-APX-part-1-supplimental.patch b/binutils-Intel-APX-part-1-supplimental.patch new file mode 100644 index 0000000..8dd3181 --- /dev/null +++ b/binutils-Intel-APX-part-1-supplimental.patch @@ -0,0 +1,540 @@ +diff -rupN binutils.orig/gold/testsuite/x86_64_ie_to_le.s binutils-2.41/gold/testsuite/x86_64_ie_to_le.s +--- binutils.orig/gold/testsuite/x86_64_ie_to_le.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.41/gold/testsuite/x86_64_ie_to_le.s 2024-07-01 15:47:30.204856624 +0100 +@@ -0,0 +1,17 @@ ++ .text ++ .p2align 4 ++ .globl _start ++ .type _start, @function ++_start: ++ addq foo@gottpoff(%rip), %r12 ++ movq foo@gottpoff(%rip), %rax ++ addq foo@gottpoff(%rip), %r16 ++ movq foo@gottpoff(%rip), %r20 ++ .size _start, .-_start ++ .section .tdata,"awT",@progbits ++ .align 4 ++ .type foo, @object ++ .size foo, 4 ++foo: ++ .long 30 ++ .section .note.GNU-stack,"",@progbits +diff -rupN binutils.orig/gold/testsuite/x86_64_ie_to_le.sh binutils-2.41/gold/testsuite/x86_64_ie_to_le.sh +--- binutils.orig/gold/testsuite/x86_64_ie_to_le.sh 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.41/gold/testsuite/x86_64_ie_to_le.sh 2024-07-01 15:47:30.204856624 +0100 +@@ -0,0 +1,29 @@ ++#!/bin/sh ++ ++# x86_64_ie_to_le.sh -- a test for IE -> LE conversion. ++ ++# Copyright (C) 2023 Free Software Foundation, Inc. ++ ++# This file is part of gold. ++ ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3 of the License, or ++# (at your option) any later version. ++ ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++ ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, ++# MA 02110-1301, USA. ++ ++set -e ++ ++grep -q "add[ \t]\+\$0x[a-f0-9]\+,%r12" x86_64_ie_to_le.stdout ++grep -q "mov[ \t]\+\$0x[a-f0-9]\+,%rax" x86_64_ie_to_le.stdout ++grep -q "add[ \t]\+\$0x[a-f0-9]\+,%r16" x86_64_ie_to_le.stdout ++grep -q "mov[ \t]\+\$0x[a-f0-9]\+,%r20" x86_64_ie_to_le.stdout +diff -rupN binutils.orig/ld/NEWS binutils-2.41/ld/NEWS +--- binutils.orig/ld/NEWS 2024-07-01 15:14:02.065309252 +0100 ++++ binutils-2.41/ld/NEWS 2024-07-01 15:57:53.858506649 +0100 +@@ -3,6 +3,8 @@ + * Add --section-ordering-file option to add extra mapping of input + sections to output sections. + ++* Support Intel APX relocations. ++ + * On RISC-V, add ld target option --[no-]check-uleb128. Should rebuild the + objects by binutils 2.42 and up if enabling the option and get warnings, + since the non-zero addend of SUB_ULEB128 shouldn't be generated from .uleb128 +diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1.s binutils-2.41/ld/testsuite/ld-x86-64/apx-load1.s +--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1.s 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1.s 2024-07-01 15:45:59.396610481 +0100 +@@ -0,0 +1,51 @@ ++ .data ++ .type bar, @object ++bar: ++ .byte 1 ++ .size bar, .-bar ++ .globl foo ++ .type foo, @object ++foo: ++ .byte 1 ++ .size foo, .-foo ++ .text ++ .globl _start ++ .type _start, @function ++_start: ++ adcl bar@GOTPCREL(%rip), %r16d ++ addl bar@GOTPCREL(%rip), %r17d ++ andl bar@GOTPCREL(%rip), %r18d ++ cmpl bar@GOTPCREL(%rip), %r19d ++ orl bar@GOTPCREL(%rip), %r20d ++ sbbl bar@GOTPCREL(%rip), %r21d ++ subl bar@GOTPCREL(%rip), %r22d ++ xorl bar@GOTPCREL(%rip), %r23d ++ testl %r24d, bar@GOTPCREL(%rip) ++ adcq bar@GOTPCREL(%rip), %r16 ++ addq bar@GOTPCREL(%rip), %r17 ++ andq bar@GOTPCREL(%rip), %r18 ++ cmpq bar@GOTPCREL(%rip), %r19 ++ orq bar@GOTPCREL(%rip), %r20 ++ sbbq bar@GOTPCREL(%rip), %r21 ++ subq bar@GOTPCREL(%rip), %r22 ++ xorq bar@GOTPCREL(%rip), %r23 ++ testq %r24, bar@GOTPCREL(%rip) ++ adcl foo@GOTPCREL(%rip), %r16d ++ addl foo@GOTPCREL(%rip), %r17d ++ andl foo@GOTPCREL(%rip), %r18d ++ cmpl foo@GOTPCREL(%rip), %r19d ++ orl foo@GOTPCREL(%rip), %r20d ++ sbbl foo@GOTPCREL(%rip), %r21d ++ subl foo@GOTPCREL(%rip), %r22d ++ xorl foo@GOTPCREL(%rip), %r23d ++ testl %r24d, foo@GOTPCREL(%rip) ++ adcq foo@GOTPCREL(%rip), %r16 ++ addq foo@GOTPCREL(%rip), %r17 ++ andq foo@GOTPCREL(%rip), %r18 ++ cmpq foo@GOTPCREL(%rip), %r19 ++ orq foo@GOTPCREL(%rip), %r20 ++ sbbq foo@GOTPCREL(%rip), %r21 ++ subq foo@GOTPCREL(%rip), %r22 ++ xorq foo@GOTPCREL(%rip), %r23 ++ testq %r24, foo@GOTPCREL(%rip) ++ .size _start, .-_start +diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1a.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1a.d +--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1a.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1a.d 2024-07-01 15:45:59.396610481 +0100 +@@ -0,0 +1,54 @@ ++#source: apx-load1.s ++#as: --64 -mrelax-relocations=yes ++#ld: -melf_x86_64 -z max-page-size=0x200000 -z noseparate-code ++#objdump: -dw --sym ++ ++.*: +file format .* ++ ++SYMBOL TABLE: ++#... ++0+6001d0 l O .data 0+1 bar ++#... ++0+6001d1 g O .data 0+1 foo ++#... ++ ++Disassembly of section .text: ++ ++0+4000b0 <_start>: ++ +[a-f0-9]+: d5 10 81 d0 d0 01 60 00 adc \$0x6001d0,%r16d ++ +[a-f0-9]+: d5 10 81 c1 d0 01 60 00 add \$0x6001d0,%r17d ++ +[a-f0-9]+: d5 10 81 e2 d0 01 60 00 and \$0x6001d0,%r18d ++ +[a-f0-9]+: d5 10 81 fb d0 01 60 00 cmp \$0x6001d0,%r19d ++ +[a-f0-9]+: d5 10 81 cc d0 01 60 00 or \$0x6001d0,%r20d ++ +[a-f0-9]+: d5 10 81 dd d0 01 60 00 sbb \$0x6001d0,%r21d ++ +[a-f0-9]+: d5 10 81 ee d0 01 60 00 sub \$0x6001d0,%r22d ++ +[a-f0-9]+: d5 10 81 f7 d0 01 60 00 xor \$0x6001d0,%r23d ++ +[a-f0-9]+: d5 11 f7 c0 d0 01 60 00 test \$0x6001d0,%r24d ++ +[a-f0-9]+: d5 18 81 d0 d0 01 60 00 adc \$0x6001d0,%r16 ++ +[a-f0-9]+: d5 18 81 c1 d0 01 60 00 add \$0x6001d0,%r17 ++ +[a-f0-9]+: d5 18 81 e2 d0 01 60 00 and \$0x6001d0,%r18 ++ +[a-f0-9]+: d5 18 81 fb d0 01 60 00 cmp \$0x6001d0,%r19 ++ +[a-f0-9]+: d5 18 81 cc d0 01 60 00 or \$0x6001d0,%r20 ++ +[a-f0-9]+: d5 18 81 dd d0 01 60 00 sbb \$0x6001d0,%r21 ++ +[a-f0-9]+: d5 18 81 ee d0 01 60 00 sub \$0x6001d0,%r22 ++ +[a-f0-9]+: d5 18 81 f7 d0 01 60 00 xor \$0x6001d0,%r23 ++ +[a-f0-9]+: d5 19 f7 c0 d0 01 60 00 test \$0x6001d0,%r24 ++ +[a-f0-9]+: d5 10 81 d0 d1 01 60 00 adc \$0x6001d1,%r16d ++ +[a-f0-9]+: d5 10 81 c1 d1 01 60 00 add \$0x6001d1,%r17d ++ +[a-f0-9]+: d5 10 81 e2 d1 01 60 00 and \$0x6001d1,%r18d ++ +[a-f0-9]+: d5 10 81 fb d1 01 60 00 cmp \$0x6001d1,%r19d ++ +[a-f0-9]+: d5 10 81 cc d1 01 60 00 or \$0x6001d1,%r20d ++ +[a-f0-9]+: d5 10 81 dd d1 01 60 00 sbb \$0x6001d1,%r21d ++ +[a-f0-9]+: d5 10 81 ee d1 01 60 00 sub \$0x6001d1,%r22d ++ +[a-f0-9]+: d5 10 81 f7 d1 01 60 00 xor \$0x6001d1,%r23d ++ +[a-f0-9]+: d5 11 f7 c0 d1 01 60 00 test \$0x6001d1,%r24d ++ +[a-f0-9]+: d5 18 81 d0 d1 01 60 00 adc \$0x6001d1,%r16 ++ +[a-f0-9]+: d5 18 81 c1 d1 01 60 00 add \$0x6001d1,%r17 ++ +[a-f0-9]+: d5 18 81 e2 d1 01 60 00 and \$0x6001d1,%r18 ++ +[a-f0-9]+: d5 18 81 fb d1 01 60 00 cmp \$0x6001d1,%r19 ++ +[a-f0-9]+: d5 18 81 cc d1 01 60 00 or \$0x6001d1,%r20 ++ +[a-f0-9]+: d5 18 81 dd d1 01 60 00 sbb \$0x6001d1,%r21 ++ +[a-f0-9]+: d5 18 81 ee d1 01 60 00 sub \$0x6001d1,%r22 ++ +[a-f0-9]+: d5 18 81 f7 d1 01 60 00 xor \$0x6001d1,%r23 ++ +[a-f0-9]+: d5 19 f7 c0 d1 01 60 00 test \$0x6001d1,%r24 ++#pass +diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1b.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1b.d +--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1b.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1b.d 2024-07-01 15:45:59.396610481 +0100 +@@ -0,0 +1,55 @@ ++#source: apx-load1.s ++#as: --x32 -mrelax-relocations=yes ++#ld: -melf32_x86_64 -z max-page-size=0x200000 -z noseparate-code ++#objdump: -dw --sym ++ ++.*: +file format .* ++ ++SYMBOL TABLE: ++#... ++0+600194 l O .data 0+1 bar ++#... ++0+600195 g O .data 0+1 foo ++#... ++ ++ ++Disassembly of section .text: ++ ++0+400074 <_start>: ++ +[a-f0-9]+: d5 10 81 d0 94 01 60 00 adc \$0x600194,%r16d ++ +[a-f0-9]+: d5 10 81 c1 94 01 60 00 add \$0x600194,%r17d ++ +[a-f0-9]+: d5 10 81 e2 94 01 60 00 and \$0x600194,%r18d ++ +[a-f0-9]+: d5 10 81 fb 94 01 60 00 cmp \$0x600194,%r19d ++ +[a-f0-9]+: d5 10 81 cc 94 01 60 00 or \$0x600194,%r20d ++ +[a-f0-9]+: d5 10 81 dd 94 01 60 00 sbb \$0x600194,%r21d ++ +[a-f0-9]+: d5 10 81 ee 94 01 60 00 sub \$0x600194,%r22d ++ +[a-f0-9]+: d5 10 81 f7 94 01 60 00 xor \$0x600194,%r23d ++ +[a-f0-9]+: d5 11 f7 c0 94 01 60 00 test \$0x600194,%r24d ++ +[a-f0-9]+: d5 18 81 d0 94 01 60 00 adc \$0x600194,%r16 ++ +[a-f0-9]+: d5 18 81 c1 94 01 60 00 add \$0x600194,%r17 ++ +[a-f0-9]+: d5 18 81 e2 94 01 60 00 and \$0x600194,%r18 ++ +[a-f0-9]+: d5 18 81 fb 94 01 60 00 cmp \$0x600194,%r19 ++ +[a-f0-9]+: d5 18 81 cc 94 01 60 00 or \$0x600194,%r20 ++ +[a-f0-9]+: d5 18 81 dd 94 01 60 00 sbb \$0x600194,%r21 ++ +[a-f0-9]+: d5 18 81 ee 94 01 60 00 sub \$0x600194,%r22 ++ +[a-f0-9]+: d5 18 81 f7 94 01 60 00 xor \$0x600194,%r23 ++ +[a-f0-9]+: d5 19 f7 c0 94 01 60 00 test \$0x600194,%r24 ++ +[a-f0-9]+: d5 10 81 d0 95 01 60 00 adc \$0x600195,%r16d ++ +[a-f0-9]+: d5 10 81 c1 95 01 60 00 add \$0x600195,%r17d ++ +[a-f0-9]+: d5 10 81 e2 95 01 60 00 and \$0x600195,%r18d ++ +[a-f0-9]+: d5 10 81 fb 95 01 60 00 cmp \$0x600195,%r19d ++ +[a-f0-9]+: d5 10 81 cc 95 01 60 00 or \$0x600195,%r20d ++ +[a-f0-9]+: d5 10 81 dd 95 01 60 00 sbb \$0x600195,%r21d ++ +[a-f0-9]+: d5 10 81 ee 95 01 60 00 sub \$0x600195,%r22d ++ +[a-f0-9]+: d5 10 81 f7 95 01 60 00 xor \$0x600195,%r23d ++ +[a-f0-9]+: d5 11 f7 c0 95 01 60 00 test \$0x600195,%r24d ++ +[a-f0-9]+: d5 18 81 d0 95 01 60 00 adc \$0x600195,%r16 ++ +[a-f0-9]+: d5 18 81 c1 95 01 60 00 add \$0x600195,%r17 ++ +[a-f0-9]+: d5 18 81 e2 95 01 60 00 and \$0x600195,%r18 ++ +[a-f0-9]+: d5 18 81 fb 95 01 60 00 cmp \$0x600195,%r19 ++ +[a-f0-9]+: d5 18 81 cc 95 01 60 00 or \$0x600195,%r20 ++ +[a-f0-9]+: d5 18 81 dd 95 01 60 00 sbb \$0x600195,%r21 ++ +[a-f0-9]+: d5 18 81 ee 95 01 60 00 sub \$0x600195,%r22 ++ +[a-f0-9]+: d5 18 81 f7 95 01 60 00 xor \$0x600195,%r23 ++ +[a-f0-9]+: d5 19 f7 c0 95 01 60 00 test \$0x600195,%r24 ++#pass +diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1c.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1c.d +--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1c.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1c.d 2024-07-01 15:45:59.397610484 +0100 +@@ -0,0 +1,47 @@ ++#source: apx-load1.s ++#as: --64 ++#ld: -shared -melf_x86_64 --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+188 <_start>: ++ +[a-f0-9]+: d5 40 13 05 f8 01 20 00 adc 0x2001f8\(%rip\),%r16d # 200388 <.*> ++ +[a-f0-9]+: d5 40 03 0d f0 01 20 00 add 0x2001f0\(%rip\),%r17d # 200388 <.*> ++ +[a-f0-9]+: d5 40 23 15 e8 01 20 00 and 0x2001e8\(%rip\),%r18d # 200388 <.*> ++ +[a-f0-9]+: d5 40 3b 1d e0 01 20 00 cmp 0x2001e0\(%rip\),%r19d # 200388 <.*> ++ +[a-f0-9]+: d5 40 0b 25 d8 01 20 00 or 0x2001d8\(%rip\),%r20d # 200388 <.*> ++ +[a-f0-9]+: d5 40 1b 2d d0 01 20 00 sbb 0x2001d0\(%rip\),%r21d # 200388 <.*> ++ +[a-f0-9]+: d5 40 2b 35 c8 01 20 00 sub 0x2001c8\(%rip\),%r22d # 200388 <.*> ++ +[a-f0-9]+: d5 40 33 3d c0 01 20 00 xor 0x2001c0\(%rip\),%r23d # 200388 <.*> ++ +[a-f0-9]+: d5 44 85 05 b8 01 20 00 test %r24d,0x2001b8\(%rip\) # 200388 <.*> ++ +[a-f0-9]+: d5 48 13 05 b0 01 20 00 adc 0x2001b0\(%rip\),%r16 # 200388 <.*> ++ +[a-f0-9]+: d5 48 03 0d a8 01 20 00 add 0x2001a8\(%rip\),%r17 # 200388 <.*> ++ +[a-f0-9]+: d5 48 23 15 a0 01 20 00 and 0x2001a0\(%rip\),%r18 # 200388 <.*> ++ +[a-f0-9]+: d5 48 3b 1d 98 01 20 00 cmp 0x200198\(%rip\),%r19 # 200388 <.*> ++ +[a-f0-9]+: d5 48 0b 25 90 01 20 00 or 0x200190\(%rip\),%r20 # 200388 <.*> ++ +[a-f0-9]+: d5 48 1b 2d 88 01 20 00 sbb 0x200188\(%rip\),%r21 # 200388 <.*> ++ +[a-f0-9]+: d5 48 2b 35 80 01 20 00 sub 0x200180\(%rip\),%r22 # 200388 <.*> ++ +[a-f0-9]+: d5 48 33 3d 78 01 20 00 xor 0x200178\(%rip\),%r23 # 200388 <.*> ++ +[a-f0-9]+: d5 4c 85 05 70 01 20 00 test %r24,0x200170\(%rip\) # 200388 <.*> ++ +[a-f0-9]+: d5 40 13 05 70 01 20 00 adc 0x200170\(%rip\),%r16d # 200390 <.*> ++ +[a-f0-9]+: d5 40 03 0d 68 01 20 00 add 0x200168\(%rip\),%r17d # 200390 <.*> ++ +[a-f0-9]+: d5 40 23 15 60 01 20 00 and 0x200160\(%rip\),%r18d # 200390 <.*> ++ +[a-f0-9]+: d5 40 3b 1d 58 01 20 00 cmp 0x200158\(%rip\),%r19d # 200390 <.*> ++ +[a-f0-9]+: d5 40 0b 25 50 01 20 00 or 0x200150\(%rip\),%r20d # 200390 <.*> ++ +[a-f0-9]+: d5 40 1b 2d 48 01 20 00 sbb 0x200148\(%rip\),%r21d # 200390 <.*> ++ +[a-f0-9]+: d5 40 2b 35 40 01 20 00 sub 0x200140\(%rip\),%r22d # 200390 <.*> ++ +[a-f0-9]+: d5 40 33 3d 38 01 20 00 xor 0x200138\(%rip\),%r23d # 200390 <.*> ++ +[a-f0-9]+: d5 44 85 05 30 01 20 00 test %r24d,0x200130\(%rip\) # 200390 <.*> ++ +[a-f0-9]+: d5 48 13 05 28 01 20 00 adc 0x200128\(%rip\),%r16 # 200390 <.*> ++ +[a-f0-9]+: d5 48 03 0d 20 01 20 00 add 0x200120\(%rip\),%r17 # 200390 <.*> ++ +[a-f0-9]+: d5 48 23 15 18 01 20 00 and 0x200118\(%rip\),%r18 # 200390 <.*> ++ +[a-f0-9]+: d5 48 3b 1d 10 01 20 00 cmp 0x200110\(%rip\),%r19 # 200390 <.*> ++ +[a-f0-9]+: d5 48 0b 25 08 01 20 00 or 0x200108\(%rip\),%r20 # 200390 <.*> ++ +[a-f0-9]+: d5 48 1b 2d 00 01 20 00 sbb 0x200100\(%rip\),%r21 # 200390 <.*> ++ +[a-f0-9]+: d5 48 2b 35 f8 00 20 00 sub 0x2000f8\(%rip\),%r22 # 200390 <.*> ++ +[a-f0-9]+: d5 48 33 3d f0 00 20 00 xor 0x2000f0\(%rip\),%r23 # 200390 <.*> ++ +[a-f0-9]+: d5 4c 85 05 e8 00 20 00 test %r24,0x2000e8\(%rip\) # 200390 <.*> ++#pass +diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1d.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1d.d +--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1d.d 1970-01-01 01:00:00.000000000 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1d.d 2024-07-01 15:45:59.397610484 +0100 +@@ -0,0 +1,47 @@ ++#source: apx-load1.s ++#as: --x32 ++#ld: -shared -melf32_x86_64 --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS ++#objdump: -dw ++ ++.*: +file format .* ++ ++Disassembly of section .text: ++ ++0+100 <_start>: ++ +[a-f0-9]+: d5 40 13 05 88 01 20 00 adc 0x200188\(%rip\),%r16d # 200290 <.*> ++ +[a-f0-9]+: d5 40 03 0d 80 01 20 00 add 0x200180\(%rip\),%r17d # 200290 <.*> ++ +[a-f0-9]+: d5 40 23 15 78 01 20 00 and 0x200178\(%rip\),%r18d # 200290 <.*> ++ +[a-f0-9]+: d5 40 3b 1d 70 01 20 00 cmp 0x200170\(%rip\),%r19d # 200290 <.*> ++ +[a-f0-9]+: d5 40 0b 25 68 01 20 00 or 0x200168\(%rip\),%r20d # 200290 <.*> ++ +[a-f0-9]+: d5 40 1b 2d 60 01 20 00 sbb 0x200160\(%rip\),%r21d # 200290 <.*> ++ +[a-f0-9]+: d5 40 2b 35 58 01 20 00 sub 0x200158\(%rip\),%r22d # 200290 <.*> ++ +[a-f0-9]+: d5 40 33 3d 50 01 20 00 xor 0x200150\(%rip\),%r23d # 200290 <.*> ++ +[a-f0-9]+: d5 44 85 05 48 01 20 00 test %r24d,0x200148\(%rip\) # 200290 <.*> ++ +[a-f0-9]+: d5 48 13 05 40 01 20 00 adc 0x200140\(%rip\),%r16 # 200290 <.*> ++ +[a-f0-9]+: d5 48 03 0d 38 01 20 00 add 0x200138\(%rip\),%r17 # 200290 <.*> ++ +[a-f0-9]+: d5 48 23 15 30 01 20 00 and 0x200130\(%rip\),%r18 # 200290 <.*> ++ +[a-f0-9]+: d5 48 3b 1d 28 01 20 00 cmp 0x200128\(%rip\),%r19 # 200290 <.*> ++ +[a-f0-9]+: d5 48 0b 25 20 01 20 00 or 0x200120\(%rip\),%r20 # 200290 <.*> ++ +[a-f0-9]+: d5 48 1b 2d 18 01 20 00 sbb 0x200118\(%rip\),%r21 # 200290 <.*> ++ +[a-f0-9]+: d5 48 2b 35 10 01 20 00 sub 0x200110\(%rip\),%r22 # 200290 <.*> ++ +[a-f0-9]+: d5 48 33 3d 08 01 20 00 xor 0x200108\(%rip\),%r23 # 200290 <.*> ++ +[a-f0-9]+: d5 4c 85 05 00 01 20 00 test %r24,0x200100\(%rip\) # 200290 <.*> ++ +[a-f0-9]+: d5 40 13 05 00 01 20 00 adc 0x200100\(%rip\),%r16d # 200298 <.*> ++ +[a-f0-9]+: d5 40 03 0d f8 00 20 00 add 0x2000f8\(%rip\),%r17d # 200298 <.*> ++ +[a-f0-9]+: d5 40 23 15 f0 00 20 00 and 0x2000f0\(%rip\),%r18d # 200298 <.*> ++ +[a-f0-9]+: d5 40 3b 1d e8 00 20 00 cmp 0x2000e8\(%rip\),%r19d # 200298 <.*> ++ +[a-f0-9]+: d5 40 0b 25 e0 00 20 00 or 0x2000e0\(%rip\),%r20d # 200298 <.*> ++ +[a-f0-9]+: d5 40 1b 2d d8 00 20 00 sbb 0x2000d8\(%rip\),%r21d # 200298 <.*> ++ +[a-f0-9]+: d5 40 2b 35 d0 00 20 00 sub 0x2000d0\(%rip\),%r22d # 200298 <.*> ++ +[a-f0-9]+: d5 40 33 3d c8 00 20 00 xor 0x2000c8\(%rip\),%r23d # 200298 <.*> ++ +[a-f0-9]+: d5 44 85 05 c0 00 20 00 test %r24d,0x2000c0\(%rip\) # 200298 <.*> ++ +[a-f0-9]+: d5 48 13 05 b8 00 20 00 adc 0x2000b8\(%rip\),%r16 # 200298 <.*> ++ +[a-f0-9]+: d5 48 03 0d b0 00 20 00 add 0x2000b0\(%rip\),%r17 # 200298 <.*> ++ +[a-f0-9]+: d5 48 23 15 a8 00 20 00 and 0x2000a8\(%rip\),%r18 # 200298 <.*> ++ +[a-f0-9]+: d5 48 3b 1d a0 00 20 00 cmp 0x2000a0\(%rip\),%r19 # 200298 <.*> ++ +[a-f0-9]+: d5 48 0b 25 98 00 20 00 or 0x200098\(%rip\),%r20 # 200298 <.*> ++ +[a-f0-9]+: d5 48 1b 2d 90 00 20 00 sbb 0x200090\(%rip\),%r21 # 200298 <.*> ++ +[a-f0-9]+: d5 48 2b 35 88 00 20 00 sub 0x200088\(%rip\),%r22 # 200298 <.*> ++ +[a-f0-9]+: d5 48 33 3d 80 00 20 00 xor 0x200080\(%rip\),%r23 # 200298 <.*> ++ +[a-f0-9]+: d5 4c 85 05 78 00 20 00 test %r24,0x200078\(%rip\) # 200298 <.*> ++#pass +diff -rupN binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.dd binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.dd +--- binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.dd 2024-07-01 15:14:02.056309227 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.dd 2024-07-01 15:47:08.955799034 +0100 +@@ -165,6 +165,55 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: c9[ ]+leave * + +[0-9a-f]+: c3[ ]+ret * ++# IE against global var ++ +[0-9a-f]+: d5 48 03 05 ([0-9a-f]{2} ){3}[ ]+add 0x[0-9a-f]+\(%rip\),%r16 +# [0-9a-f]+ ++# -> R_X86_64_TPOFF64 sG2 ++ +[0-9a-f]+: 00 * ++# IE -> LE against global var defined in exec ++ +[0-9a-f]+: d5 18 81 c1 60 ff ff[ ]+add \$0xf+60,%r17 ++# sg1 ++ +[0-9a-f]+: ff * ++# IE -> LE against local var ++ +[0-9a-f]+: d5 18 81 c2 80 ff ff[ ]+add \$0xf+80,%r18 ++# sl1 ++ +[0-9a-f]+: ff * ++# IE -> LE against hidden var ++ +[0-9a-f]+: d5 18 81 c3 a0 ff ff[ ]+add \$0xf+a0,%r19 ++# sh1 ++ +[0-9a-f]+: ff * ++# Direct access through %fs ++# IE against global var ++ +[0-9a-f]+: d5 48 8b 25 ([0-9a-f]{2} ){3}[ ]+mov 0x[0-9a-f]+\(%rip\),%r20 +# [0-9a-f]+ ++# -> R_X86_64_TPOFF64 sG5 ++ +[0-9a-f]+: 00 * ++# IE->LE against local var ++ +[0-9a-f]+: d5 18 c7 c5 90 ff ff[ ]+mov \$0xf+90,%r21 ++# sl5 ++ +[0-9a-f]+: ff * ++# IE->LE against hidden var ++ +[0-9a-f]+: d5 18 c7 c6 b0 ff ff[ ]+mov \$0xf+b0,%r22 ++ +[0-9a-f]+: ff * ++# GD -> IE because variable is not defined in executable ++ +[0-9a-f]+: d5 48 8b 05 ([0-9a-f]{2} ){3}[ ]+mov 0x[0-9a-f]+\(%rip\),%r16 +# [0-9a-f]+ ++# -> R_X86_64_TPOFF64 sG1 ++ +[0-9a-f]+: 00 * ++# GD -> IE because variable is not defined in executable where ++# the variable is referenced through IE too ++ +[0-9a-f]+: d5 48 8b 0d ([0-9a-f]{2} ){3}[ ]+mov 0x[0-9a-f]+\(%rip\),%r17 +# [0-9a-f]+ ++# -> R_X86_64_TPOFF64 sG2 ++ +[0-9a-f]+: 00 * ++# GD -> LE with global variable defined in executable ++ +[0-9a-f]+: d5 18 c7 c2 60 ff ff[ ]+mov \$0xf+60,%r18 ++# sg1 ++ +[0-9a-f]+: ff * ++# GD -> LE with local variable defined in executable ++ +[0-9a-f]+: d5 18 c7 c3 80 ff ff[ ]+mov \$0xf+80,%r19 ++# sl1 ++ +[0-9a-f]+: ff * ++# GD -> LE with hidden variable defined in executable ++ +[0-9a-f]+: d5 18 c7 c4 a0 ff ff[ ]+mov \$0xf+a0,%r20 ++# sh1 ++ +[0-9a-f]+: ff * + + [0-9a-f]+ <_start>: + +[0-9a-f]+: 55[ ]+push %rbp +diff -rupN binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.rd binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.rd +--- binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.rd 2024-07-01 15:14:02.056309227 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.rd 2024-07-01 15:47:08.956799037 +0100 +@@ -15,12 +15,12 @@ Section Headers: + +\[[ 0-9]+\] .dynsym +.* + +\[[ 0-9]+\] .dynstr +.* + +\[[ 0-9]+\] .rela.dyn +.* +- +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+1fd 00 +AX +0 +0 +4096 +- +\[[ 0-9]+\] .tdata +PROGBITS +0+6011fd 0+11fd 0+60 00 WAT +0 +0 +1 +- +\[[ 0-9]+\] .tbss +NOBITS +0+60125d 0+125d 0+40 00 WAT +0 +0 +1 +- +\[[ 0-9]+\] .dynamic +DYNAMIC +0+601260 0+1260 0+100 10 +WA +4 +0 +8 +- +\[[ 0-9]+\] .got +PROGBITS +0+601360 0+1360 0+20 08 +WA +0 +0 +8 +- +\[[ 0-9]+\] .got.plt +PROGBITS +0+601380 0+1380 0+18 08 +WA +0 +0 +8 ++ +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+25d 00 +AX +0 +0 +4096 ++ +\[[ 0-9]+\] .tdata +PROGBITS +0+60125d 0+125d 0+60 00 WAT +0 +0 +1 ++ +\[[ 0-9]+\] .tbss +NOBITS +0+6012bd 0+12bd 0+40 00 WAT +0 +0 +1 ++ +\[[ 0-9]+\] .dynamic +DYNAMIC +0+6012c0 0+12c0 0+100 10 +WA +4 +0 +8 ++ +\[[ 0-9]+\] .got +PROGBITS +0+6013c0 0+13c0 0+20 08 +WA +0 +0 +8 ++ +\[[ 0-9]+\] .got.plt +PROGBITS +0+6013e0 0+13e0 0+18 08 +WA +0 +0 +8 + +\[[ 0-9]+\] .symtab +.* + +\[[ 0-9]+\] .strtab +.* + +\[[ 0-9]+\] .shstrtab +.* +@@ -28,7 +28,7 @@ Key to Flags: + #... + + Elf file type is EXEC \(Executable file\) +-Entry point 0x401105 ++Entry point 0x401165 + There are [0-9]+ program headers, starting at offset [0-9]+ + + Program Headers: +@@ -36,10 +36,10 @@ Program Headers: + +PHDR.* + +INTERP.* + .*Requesting program interpreter.* +- +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+11fd 0x0+11fd R E 0x200000 +- +LOAD +0x0+11fd 0x0+6011fd 0x0+6011fd 0x0+19b 0x0+19b RW +0x200000 +- +DYNAMIC +0x0+1260 0x0+601260 0x0+601260 0x0+100 0x0+100 RW +0x8 +- +TLS +0x0+11fd 0x0+6011fd 0x0+6011fd 0x0+60 0x0+a0 R +0x1 ++ +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+125d 0x0+125d R E 0x200000 ++ +LOAD +0x0+125d 0x0+60125d 0x0+60125d 0x0+19b 0x0+19b RW +0x200000 ++ +DYNAMIC +0x0+12c0 0x0+6012c0 0x0+6012c0 0x0+100 0x0+100 RW +0x8 ++ +TLS +0x0+125d 0x0+60125d 0x0+60125d 0x0+60 0x0+a0 R +0x1 + + Section to Segment mapping: + +Segment Sections... +@@ -52,10 +52,10 @@ Program Headers: + + Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries: + +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend +-0+601360 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0 +-0+601368 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0 +-0+601370 +0+300000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0 +-0+601378 +0+400000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0 ++0+6013c0 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0 ++0+6013c8 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0 ++0+6013d0 +0+300000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0 ++0+6013d8 +0+400000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0 + + Symbol table '\.dynsym' contains [0-9]+ entries: + +Num: +Value +Size +Type +Bind +Vis +Ndx +Name +@@ -88,8 +88,8 @@ Symbol table '\.symtab' contains [0-9]+ + +[0-9]+: 0+9c +0 +TLS +LOCAL +DEFAULT +8 bl8 + .* FILE +LOCAL +DEFAULT +ABS + +[0-9]+: 0+a0 +0 +TLS +LOCAL +DEFAULT +7 _TLS_MODULE_BASE_ +- +[0-9]+: 0+601260 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC +- +[0-9]+: 0+601380 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_ ++ +[0-9]+: 0+6012c0 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC ++ +[0-9]+: 0+6013e0 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_ + +[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +7 sg8 + +[0-9]+: 0+7c +0 +TLS +GLOBAL +DEFAULT +8 bg8 + +[0-9]+: 0+74 +0 +TLS +GLOBAL +DEFAULT +8 bg6 +@@ -104,7 +104,7 @@ Symbol table '\.symtab' contains [0-9]+ + +[0-9]+: 0+58 +0 +TLS +GLOBAL +HIDDEN +7 sh7 + +[0-9]+: 0+5c +0 +TLS +GLOBAL +HIDDEN +7 sh8 + +[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +7 sg1 +- +[0-9]+: 0+401105 +0 +FUNC +GLOBAL +DEFAULT +6 _start ++ +[0-9]+: 0+401165 +0 +FUNC +GLOBAL +DEFAULT +6 _start + +[0-9]+: 0+4c +0 +TLS +GLOBAL +HIDDEN +7 sh4 + +[0-9]+: 0+78 +0 +TLS +GLOBAL +DEFAULT +8 bg7 + +[0-9]+: 0+50 +0 +TLS +GLOBAL +HIDDEN +7 sh5 +diff -rupN binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.s binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.s +--- binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.s 2024-07-01 15:14:02.056309227 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.s 2024-07-01 15:47:08.956799037 +0100 +@@ -126,3 +126,42 @@ fn2: + + leave + ret ++ ++ /* IE against global var */ ++ addq sG2@gottpoff(%rip), %r16 ++ ++ /* IE -> LE against global var defined in exec */ ++ addq sg1@gottpoff(%rip), %r17 ++ ++ /* IE -> LE against local var */ ++ addq sl1@gottpoff(%rip), %r18 ++ ++ /* IE -> LE against hidden var */ ++ addq sh1@gottpoff(%rip), %r19 ++ ++ /* Direct access through %fs */ ++ ++ /* IE against global var */ ++ movq sG5@gottpoff(%rip), %r20 ++ ++ /* IE->LE against local var */ ++ movq sl5@gottpoff(%rip), %r21 ++ ++ /* IE->LE against hidden var */ ++ movq sh5@gottpoff(%rip), %r22 ++ ++ /* GD -> IE because variable is not defined in executable */ ++ leaq sG1@tlsdesc(%rip), %r16 ++ ++ /* GD -> IE because variable is not defined in executable where ++ the variable is referenced through IE too */ ++ leaq sG2@tlsdesc(%rip), %r17 ++ ++ /* GD -> LE with global variable defined in executable */ ++ leaq sg1@tlsdesc(%rip), %r18 ++ ++ /* GD -> LE with local variable defined in executable */ ++ leaq sl1@tlsdesc(%rip), %r19 ++ ++ /* GD -> LE with hidden variable defined in executable */ ++ leaq sh1@tlsdesc(%rip), %r20 +diff -rupN binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp +--- binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp 2024-07-01 15:14:02.060309238 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp 2024-07-01 15:45:59.397610484 +0100 +@@ -604,6 +604,10 @@ run_dump_test "load1a" + run_dump_test "load1b" + run_dump_test "load1c" + run_dump_test "load1d" ++run_dump_test "apx-load1a" ++run_dump_test "apx-load1b" ++run_dump_test "apx-load1c" ++run_dump_test "apx-load1d" + run_dump_test "load2" + run_dump_test "call1a" + run_dump_test "call1b" diff --git a/binutils.spec b/binutils.spec index bf964a9..684cf2e 100644 --- a/binutils.spec +++ b/binutils.spec @@ -2,7 +2,7 @@ Summary: A GNU collection of binary utilities Name: binutils%{?_with_debug:-debug} Version: 2.41 -Release: 44%{?dist} +Release: 45%{?dist} License: GPL-3.0-or-later AND (GPL-3.0-or-later WITH Bison-exception-2.2) AND (LGPL-2.0-or-later WITH GCC-exception-2.0) AND BSD-3-Clause AND GFDL-1.3-or-later AND GPL-2.0-or-later AND LGPL-2.1-or-later AND LGPL-2.0-or-later URL: https://sourceware.org/binutils @@ -343,6 +343,10 @@ Patch40: binutils-section-ordering.patch # Lifetime: Fixed in 2.43 Patch41: binutils-aarch64-RELR.patch +# Purpose: More fixes for support for Intel's APX extensions (part 1) +# Lifetime: Fixed in 2.43 +Patch42: binutils-Intel-APX-part-1-supplimental.patch + # Purpose: Suppress the assembler's comment test as it fails - intermitantly - for RHEL-10 # Lifetime: TEMPORARY # Patch98: binutils-suppress-gas-comment-test.patch @@ -1380,6 +1384,45 @@ exit 0 #---------------------------------------------------------------------------- %changelog +* Mon Jul 01 2024 Nick Clifton - 2.41-45 +- More fixes for Intel's APX (part 1) extensions. (RHEL-44713) +- Total list of APX patches applied (so far): +- Feb 19 5190fa38286a5a6a664e21c04fde361b395d9f72 x86: support APX forms of U{RD,WR}MSR +- Feb 9 41e115853eef32304e3e6fcd7feb4ec116090ee0 x86/APX: with REX2 map 1 doesn't "chain" to maps 2 or 3 +- Feb 9 5a635f1f59ad08e572e36419f1145433fd670214 x86/APX: VROUND{P,S}{S,D} encodings require AVX512{F,VL} +- Jan 19 2519809009ed5e250ad9ed9b6184d9c45dba5029 x86/APX: be consistent with insn suffixes +- Jan 19 eea4357967b6182459d423c4d919a7cb0219604b x86/APX: VROUND{P,S}{S,D} can generally be encoded +- Jan 15 3037cefe56affe48ac53d85b9e33c2c3a408c41f opcodes: gas: x86: define and use Rex2 as attribute not constraint +- Jan 9 7c3df3c680c2bee0b17e60bfbadc751c67e05ed0 x86: add missing APX logic to cpu_flags_match() +- Jan 9 7c3df3c680c2bee0b17e60bfbadc751c67e05ed0 x86: add missing APX logic to cpu_flags_match() +- Jan 8 a0c9f938521a36b34a27740e5008e35f0ddd2b3f i386: Use .insn describe jmpabs's testcases. +- Jan 8 a0c9f938521a36b34a27740e5008e35f0ddd2b3f i386: Use .insn describe jmpabs's testcases. +- Jan 7 f322084c7c842fbfd8c3291ff3f8d114173b4674 i386: Correct adcx suffix in disassembler +- Dec 29 eed38d8a02b277825a682d8d1daeb0bcc4508b04 Fix x86-64: Add R_X86_64_CODE_4_GOTPCRELX +- Dec 29 3d5a60de52556f6a53d71d7e607c6696450ae3e4 x86-64: Add R_X86_64_CODE_4_GOTPCRELX +- Dec 29 302a296de0e83d6c320cc0f0d5dd1a1d73182009 x86: Append "#pass" to APX tests +- Dec 29 302a296de0e83d6c320cc0f0d5dd1a1d73182009 x86: Append "#pass" to APX tests +- Dec 29 2eda6e3ecdd0ea93586a532d9464e430f708334a x86: Don't use .insn with '/' +- Dec 29 2eda6e3ecdd0ea93586a532d9464e430f708334a x86: Don't use .insn with '/' +- Dec 28 ce9cddf5dd2a614815b1d9affa67c9419599ff63 Add tests for APX GPR32 with extend evex prefix +- Dec 28 cca90632f83d47bc7f913e098c4531e52327d272 Support APX JMPABS for disassemble +- Dec 28 ac32c879b26af580e29ecaa152e3d9d999f34caa Support APX pushp/popp +- Dec 28 a6d0019eb7fcd634e12b7bcc535d5181c47fc82a ld: Mention support for Intel APX relocations in NEWS +- Dec 28 a6d0019eb7fcd634e12b7bcc535d5181c47fc82a ld: Mention support for Intel APX relocations in NEWS +- Dec 28 80d61d8d614d68a0b1932ed3a86d4cda01e5633e Support APX GPR32 with rex2 prefix +- Dec 28 6967f19dcd3d2794976b2a193a0c30b626c92c3b Support APX NDD optimized encoding. +- Dec 28 6177c84d5edc2cb6b197f00bd06380b7b24a719f Support APX GPR32 with extend evex prefix +- Dec 28 5e2f0c9a5f3d467a341a0c3d579d9c6ee6daa4d1 gas: Mention initial support for Intel APX in NEWS +- Dec 28 3083f376435662c747ab946bb84e6e6698985610 Support APX NDD +- Dec 28 2b1d6655c5c62673547b9676d811ef58ce3f0d1e Created an empty EVEX_MAP4_ sub-table for EVEX instructions. +- Dec 28 08a98d4c1331cc726c8c76c14d9db34d6f0aadd6 Support APX Push2/Pop2 +- Dec 22 3e4a511bee874d73f9f749cc8cf3bc748b4d47b5 x86-64: refuse "high" 8-bit regs with .insn and VEX/XOP/EVEX encodings +- Dec 15 35266cb139697e00ee993118aa621fdac17e3f6e x86: fold assembly dialect attributes +- Jul 2 00a17c6ad068c95019e1f37cfc2d1b8aaebd6ecb Gold: Handle R_X86_64_CODE_4_GOTPC32_TLSDESC/R_X86_64_CODE_4_GOTTPOFF +- Jun 9 a533c8df598b5ef99c54a13e2b137c98b34b043c x86-64: Add R_X86_64_CODE_4_GOTTPOFF/R_X86_64_CODE_4_GOTPC32_TLSDESC +- Jun 8 3d5a60de52556f6a53d71d7e607c6696450ae3e4 x86-64: Add R_X86_64_CODE_4_GOTPCRELX +- Jun 8 4a54cb06585f568031dfd291d0fe45979ad75e98 gold: Handle R_X86_64_CODE_4_GOTPCRELX + * Mon Jun 24 2024 Nick Clifton - 2.41-44 - Fix building with documentation disabled. (RHEL-44615)