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binutils/binutils-2.35.1-update.patch

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Merged update from upstream sources This is an automated DistroBaker update from upstream sources. If you do not know what this is about or would like to opt out, contact the OSCI team. Source: https://src.fedoraproject.org/rpms/binutils.git#0781ec435c48a3c7f694d66b58d9bfb859e156b9
2020-11-25 23:17:33 +00:00
diff -rup binutils-2.35.1/bfd/dwarf2.c fred/binutils-2.35.1/bfd/dwarf2.c
--- binutils-2.35.1/bfd/dwarf2.c 2020-08-25 15:36:38.000000000 +0100
+++ fred/binutils-2.35.1/bfd/dwarf2.c 2020-11-25 14:37:33.000000000 +0000
@@ -3404,7 +3404,8 @@ scan_unit_for_symbols (struct comp_unit
else
{
func = NULL;
- if (abbrev->tag == DW_TAG_variable)
+ if (abbrev->tag == DW_TAG_variable
+ || abbrev->tag == DW_TAG_member)
{
size_t amt = sizeof (struct varinfo);
var = (struct varinfo *) bfd_zalloc (abfd, amt);
@@ -3516,7 +3517,7 @@ scan_unit_for_symbols (struct comp_unit
spec_var = lookup_var_by_offset (attr.u.val,
unit->variable_table);
if (spec_var == NULL)
- {
+ {
_bfd_error_handler (_("DWARF error: could not find "
"variable specification "
"at offset %lx"),
diff -rup binutils-2.35.1/bfd/elf64-ppc.c fred/binutils-2.35.1/bfd/elf64-ppc.c
--- binutils-2.35.1/bfd/elf64-ppc.c 2020-09-11 09:19:09.000000000 +0100
+++ fred/binutils-2.35.1/bfd/elf64-ppc.c 2020-11-25 14:37:33.000000000 +0000
@@ -114,7 +114,7 @@ static bfd_vma opd_entry_value
#define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol
#define elf_backend_hide_symbol ppc64_elf_hide_symbol
#define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym
-#define elf_backend_always_size_sections ppc64_elf_func_desc_adjust
+#define elf_backend_always_size_sections ppc64_elf_edit
#define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections
#define elf_backend_hash_symbol ppc64_elf_hash_symbol
#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
@@ -211,9 +211,10 @@ static bfd_vma opd_entry_value
#define PLD_R12_PC 0x04100000e5800000ULL
#define PNOP 0x0700000000000000ULL
-/* __glink_PLTresolve stub instructions. We enter with the index in R0. */
+/* __glink_PLTresolve stub instructions. We enter with the index in
+ R0 for ELFv1, and the address of a glink branch in R12 for ELFv2. */
#define GLINK_PLTRESOLVE_SIZE(htab) \
- (8u + (htab->opd_abi ? 11 * 4 : 14 * 4))
+ (8u + (htab->opd_abi ? 11 * 4 : htab->has_plt_localentry0 ? 14 * 4 : 13 * 4))
/* 0: */
/* .quad plt0-1f */
/* __glink: */
@@ -229,11 +230,14 @@ static bfd_vma opd_entry_value
/* mtctr %12 */
/* ld %11,16(%11) */
/* bctr */
-#define MFLR_R0 0x7c0802a6 /* mflr %r0 */
-#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */
-#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */
-#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */
-#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */
+
+#define MFLR_R0 0x7c0802a6 /* mflr %r0 */
+#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */
+#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */
+#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */
+#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */
+#define LD_R0_0R11 0xe80b0000 /* ld %r0,0(%r11) */
+#define ADD_R11_R0_R11 0x7d605a14 /* add %r11,%r0,%r11 */
/* Pad with this. */
#define NOP 0x60000000
@@ -6340,13 +6344,13 @@ static const struct sfpr_def_parms save_
};
/* Called near the start of bfd_elf_size_dynamic_sections. We use
- this hook to a) provide some gcc support functions, and b) transfer
- dynamic linking information gathered so far on function code symbol
- entries, to their corresponding function descriptor symbol entries. */
+ this hook to a) run the edit functions in this file, b) provide
+ some gcc support functions, and c) transfer dynamic linking
+ information gathered so far on function code symbol entries, to
+ their corresponding function descriptor symbol entries. */
static bfd_boolean
-ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED,
- struct bfd_link_info *info)
+ppc64_elf_edit (bfd *obfd ATTRIBUTE_UNUSED, struct bfd_link_info *info)
{
struct ppc_link_hash_table *htab;
@@ -6354,6 +6358,9 @@ ppc64_elf_func_desc_adjust (bfd *obfd AT
if (htab == NULL)
return FALSE;
+ /* Call back into the linker, which then runs the edit functions. */
+ htab->params->edit ();
+
/* Provide any missing _save* and _rest* functions. */
if (htab->sfpr != NULL)
{
@@ -7694,9 +7701,11 @@ ppc64_elf_inline_plt (struct bfd_link_in
return TRUE;
}
-/* Set htab->tls_get_addr and call the generic ELF tls_setup function. */
+/* Set htab->tls_get_addr and various other info specific to TLS.
+ This needs to run before dynamic symbols are processed in
+ bfd_elf_size_dynamic_sections. */
-asection *
+bfd_boolean
ppc64_elf_tls_setup (struct bfd_link_info *info)
{
struct ppc_link_hash_table *htab;
@@ -7704,7 +7713,7 @@ ppc64_elf_tls_setup (struct bfd_link_inf
htab = ppc_hash_table (info);
if (htab == NULL)
- return NULL;
+ return FALSE;
if (abiversion (info->output_bfd) == 1)
htab->opd_abi = 1;
@@ -7730,6 +7739,19 @@ ppc64_elf_tls_setup (struct bfd_link_inf
--plt-localentry can cause trouble. */
if (htab->params->plt_localentry0 < 0)
htab->params->plt_localentry0 = 0;
+ if (htab->params->plt_localentry0 && htab->has_power10_relocs)
+ {
+ /* The issue is that __glink_PLTresolve saves r2, which is done
+ because glibc ld.so _dl_runtime_resolve restores r2 to support
+ a glibc plt call optimisation where global entry code is
+ skipped on calls that resolve to the same binary. The
+ __glink_PLTresolve save of r2 is incompatible with code
+ making tail calls, because the tail call might go via the
+ resolver and thus overwrite the proper saved r2. */
+ _bfd_error_handler (_("warning: --plt-localentry is incompatible with "
+ "power10 pc-relative code"));
+ htab->params->plt_localentry0 = 0;
+ }
if (htab->params->plt_localentry0
&& elf_link_hash_lookup (&htab->elf, "GLIBC_2.26",
FALSE, FALSE, FALSE) == NULL)
@@ -7826,7 +7848,7 @@ ppc64_elf_tls_setup (struct bfd_link_inf
_bfd_elf_strtab_delref (elf_hash_table (info)->dynstr,
opt_fd->dynstr_index);
if (!bfd_elf_link_record_dynamic_symbol (info, opt_fd))
- return NULL;
+ return FALSE;
}
if (tga_fd != NULL)
{
@@ -7885,7 +7907,7 @@ ppc64_elf_tls_setup (struct bfd_link_inf
&& htab->params->no_tls_get_addr_regsave == -1)
htab->params->no_tls_get_addr_regsave = 0;
- return _bfd_elf_tls_setup (info->output_bfd, info);
+ return TRUE;
}
/* Return TRUE iff REL is a branch reloc with a global symbol matching
@@ -10834,62 +10856,60 @@ eh_advance_size (unsigned int delta)
static inline unsigned int
plt_stub_size (struct ppc_link_hash_table *htab,
struct ppc_stub_hash_entry *stub_entry,
- bfd_vma off)
+ bfd_vma off,
+ unsigned int odd)
{
unsigned size;
if (stub_entry->stub_type >= ppc_stub_plt_call_notoc)
{
if (htab->params->power10_stubs != 0)
- {
- bfd_vma start = (stub_entry->stub_offset
- + stub_entry->group->stub_sec->output_offset
- + stub_entry->group->stub_sec->output_section->vma);
- if (stub_entry->stub_type > ppc_stub_plt_call_notoc)
- start += 4;
- size = 8 + size_power10_offset (off, start & 4);
- }
+ size = 8 + size_power10_offset (off, odd);
else
size = 8 + size_offset (off - 8);
if (stub_entry->stub_type > ppc_stub_plt_call_notoc)
size += 4;
- return size;
}
-
- size = 12;
- if (ALWAYS_EMIT_R2SAVE
- || stub_entry->stub_type == ppc_stub_plt_call_r2save)
- size += 4;
- if (PPC_HA (off) != 0)
- size += 4;
- if (htab->opd_abi)
+ else
{
- size += 4;
- if (htab->params->plt_static_chain)
+ size = 12;
+ if (ALWAYS_EMIT_R2SAVE
+ || stub_entry->stub_type == ppc_stub_plt_call_r2save)
size += 4;
- if (htab->params->plt_thread_safe
- && htab->elf.dynamic_sections_created
- && stub_entry->h != NULL
- && stub_entry->h->elf.dynindx != -1)
- size += 8;
- if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain) != PPC_HA (off))
+ if (PPC_HA (off) != 0)
size += 4;
+ if (htab->opd_abi)
+ {
+ size += 4;
+ if (htab->params->plt_static_chain)
+ size += 4;
+ if (htab->params->plt_thread_safe
+ && htab->elf.dynamic_sections_created
+ && stub_entry->h != NULL
+ && stub_entry->h->elf.dynindx != -1)
+ size += 8;
+ if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain)
+ != PPC_HA (off))
+ size += 4;
+ }
}
if (stub_entry->h != NULL
&& is_tls_get_addr (&stub_entry->h->elf, htab)
&& htab->params->tls_get_addr_opt)
{
- if (htab->params->no_tls_get_addr_regsave)
+ if (!htab->params->no_tls_get_addr_regsave)
{
- size += 7 * 4;
- if (stub_entry->stub_type == ppc_stub_plt_call_r2save)
- size += 6 * 4;
+ size += 30 * 4;
+ if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ size += 4;
}
else
{
- size += 30 * 4;
- if (stub_entry->stub_type == ppc_stub_plt_call_r2save)
- size += 4;
+ size += 7 * 4;
+ if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ size += 6 * 4;
}
}
return size;
@@ -10904,7 +10924,8 @@ plt_stub_size (struct ppc_link_hash_tabl
static inline unsigned int
plt_stub_pad (struct ppc_link_hash_table *htab,
struct ppc_stub_hash_entry *stub_entry,
- bfd_vma plt_off)
+ bfd_vma plt_off,
+ unsigned int odd)
{
int stub_align;
unsigned stub_size;
@@ -10919,7 +10940,7 @@ plt_stub_pad (struct ppc_link_hash_table
}
stub_align = 1 << -htab->params->plt_stub_align;
- stub_size = plt_stub_size (htab, stub_entry, plt_off);
+ stub_size = plt_stub_size (htab, stub_entry, plt_off, odd);
if (((stub_off + stub_size - 1) & -stub_align) - (stub_off & -stub_align)
> ((stub_size - 1) & -stub_align))
return stub_align - (stub_off & (stub_align - 1));
@@ -11114,14 +11135,12 @@ build_plt_stub (struct ppc_link_hash_tab
#define MR_R3_R0 0x7c030378
#define BCTRL 0x4e800421
-static inline bfd_byte *
-build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
+static bfd_byte *
+build_tls_get_addr_head (struct ppc_link_hash_table *htab,
struct ppc_stub_hash_entry *stub_entry,
- bfd_byte *p, bfd_vma offset, Elf_Internal_Rela *r)
+ bfd_byte *p)
{
bfd *obfd = htab->params->stub_bfd;
- bfd_byte *loc = p;
- unsigned int i;
bfd_put_32 (obfd, LD_R0_0R3 + 0, p), p += 4;
bfd_put_32 (obfd, LD_R12_0R3 + 8, p), p += 4;
@@ -11130,21 +11149,43 @@ build_tls_get_addr_stub (struct ppc_link
bfd_put_32 (obfd, ADD_R3_R12_R13, p), p += 4;
bfd_put_32 (obfd, BEQLR, p), p += 4;
bfd_put_32 (obfd, MR_R3_R0, p), p += 4;
- if (htab->params->no_tls_get_addr_regsave)
- {
- if (r != NULL)
- r[0].r_offset += 7 * 4;
- if (stub_entry->stub_type != ppc_stub_plt_call_r2save)
- return build_plt_stub (htab, stub_entry, p, offset, r);
+ if (!htab->params->no_tls_get_addr_regsave)
+ p = tls_get_addr_prologue (obfd, p, htab);
+ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
bfd_put_32 (obfd, MFLR_R0, p);
p += 4;
bfd_put_32 (obfd, STD_R0_0R1 + STK_LINKER (htab), p);
p += 4;
+ }
+ return p;
+}
- if (r != NULL)
- r[0].r_offset += 2 * 4;
- p = build_plt_stub (htab, stub_entry, p, offset, r);
+static bfd_byte *
+build_tls_get_addr_tail (struct ppc_link_hash_table *htab,
+ struct ppc_stub_hash_entry *stub_entry,
+ bfd_byte *p,
+ bfd_byte *loc)
+{
+ bfd *obfd = htab->params->stub_bfd;
+
+ if (!htab->params->no_tls_get_addr_regsave)
+ {
+ bfd_put_32 (obfd, BCTRL, p - 4);
+
+ if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
+ bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p);
+ p += 4;
+ }
+ p = tls_get_addr_epilogue (obfd, p, htab);
+ }
+ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
bfd_put_32 (obfd, BCTRL, p - 4);
bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p);
@@ -11156,24 +11197,6 @@ build_tls_get_addr_stub (struct ppc_link
bfd_put_32 (obfd, BLR, p);
p += 4;
}
- else
- {
- p = tls_get_addr_prologue (obfd, p, htab);
-
- if (r != NULL)
- r[0].r_offset += 18 * 4;
-
- p = build_plt_stub (htab, stub_entry, p, offset, r);
- bfd_put_32 (obfd, BCTRL, p - 4);
-
- if (stub_entry->stub_type == ppc_stub_plt_call_r2save)
- {
- bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p);
- p += 4;
- }
-
- p = tls_get_addr_epilogue (obfd, p, htab);
- }
if (htab->glink_eh_frame != NULL
&& htab->glink_eh_frame->size != 0)
@@ -11182,21 +11205,11 @@ build_tls_get_addr_stub (struct ppc_link
base = htab->glink_eh_frame->contents + stub_entry->group->eh_base + 17;
eh = base + stub_entry->group->eh_size;
- if (htab->params->no_tls_get_addr_regsave)
- {
- unsigned int lr_used, delta;
- lr_used = stub_entry->stub_offset + (p - 20 - loc);
- delta = lr_used - stub_entry->group->lr_restore;
- stub_entry->group->lr_restore = lr_used + 16;
- eh = eh_advance (htab->elf.dynobj, eh, delta);
- *eh++ = DW_CFA_offset_extended_sf;
- *eh++ = 65;
- *eh++ = -(STK_LINKER (htab) / 8) & 0x7f;
- *eh++ = DW_CFA_advance_loc + 4;
- }
- else
+
+ if (!htab->params->no_tls_get_addr_regsave)
{
- unsigned int cfa_updt, delta;
+ unsigned int cfa_updt, delta, i;
+
/* After the bctrl, lr has been modified so we need to emit
.eh_frame info saying the return address is on the stack. In
fact we must put the EH info at or before the call rather
@@ -11235,10 +11248,27 @@ build_tls_get_addr_stub (struct ppc_link
for (i = 4; i < 12; i++)
*eh++ = DW_CFA_restore + i;
*eh++ = DW_CFA_advance_loc + 2;
+ *eh++ = DW_CFA_restore_extended;
+ *eh++ = 65;
+ stub_entry->group->eh_size = eh - base;
+ }
+ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
+ unsigned int lr_used, delta;
+
+ lr_used = stub_entry->stub_offset + (p - 20 - loc);
+ delta = lr_used - stub_entry->group->lr_restore;
+ stub_entry->group->lr_restore = lr_used + 16;
+ eh = eh_advance (htab->elf.dynobj, eh, delta);
+ *eh++ = DW_CFA_offset_extended_sf;
+ *eh++ = 65;
+ *eh++ = -(STK_LINKER (htab) / 8) & 0x7f;
+ *eh++ = DW_CFA_advance_loc + 4;
+ *eh++ = DW_CFA_restore_extended;
+ *eh++ = 65;
+ stub_entry->group->eh_size = eh - base;
}
- *eh++ = DW_CFA_restore_extended;
- *eh++ = 65;
- stub_entry->group->eh_size = eh - base;
}
return p;
}
@@ -11372,6 +11402,7 @@ ppc_build_one_stub (struct bfd_hash_entr
struct ppc_branch_hash_entry *br_entry;
struct bfd_link_info *info;
struct ppc_link_hash_table *htab;
+ bfd *obfd;
bfd_byte *loc;
bfd_byte *p, *relp;
bfd_vma targ, off;
@@ -11379,6 +11410,7 @@ ppc_build_one_stub (struct bfd_hash_entr
asection *plt;
int num_rel;
int odd;
+ bfd_boolean is_tga;
/* Massage our args to the form they really have. */
stub_entry = (struct ppc_stub_hash_entry *) gen_entry;
@@ -11428,6 +11460,7 @@ ppc_build_one_stub (struct bfd_hash_entr
off = targ - off;
p = loc;
+ obfd = htab->params->stub_bfd;
if (stub_entry->stub_type == ppc_stub_long_branch_r2off)
{
bfd_vma r2off = get_r2off (info, stub_entry);
@@ -11437,23 +11470,21 @@ ppc_build_one_stub (struct bfd_hash_entr
htab->stub_error = TRUE;
return FALSE;
}
- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p);
+ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p);
p += 4;
if (PPC_HA (r2off) != 0)
{
- bfd_put_32 (htab->params->stub_bfd,
- ADDIS_R2_R2 | PPC_HA (r2off), p);
+ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p);
p += 4;
}
if (PPC_LO (r2off) != 0)
{
- bfd_put_32 (htab->params->stub_bfd,
- ADDI_R2_R2 | PPC_LO (r2off), p);
+ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p);
p += 4;
}
off -= p - loc;
}
- bfd_put_32 (htab->params->stub_bfd, B_DOT | (off & 0x3fffffc), p);
+ bfd_put_32 (obfd, B_DOT | (off & 0x3fffffc), p);
p += 4;
if (off + (1 << 25) >= (bfd_vma) (1 << 26))
@@ -11579,19 +11610,17 @@ ppc_build_one_stub (struct bfd_hash_entr
}
p = loc;
+ obfd = htab->params->stub_bfd;
if (stub_entry->stub_type != ppc_stub_plt_branch_r2off)
{
if (PPC_HA (off) != 0)
{
- bfd_put_32 (htab->params->stub_bfd,
- ADDIS_R12_R2 | PPC_HA (off), p);
+ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p);
p += 4;
- bfd_put_32 (htab->params->stub_bfd,
- LD_R12_0R12 | PPC_LO (off), p);
+ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p);
}
else
- bfd_put_32 (htab->params->stub_bfd,
- LD_R12_0R2 | PPC_LO (off), p);
+ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p);
}
else
{
@@ -11603,36 +11632,32 @@ ppc_build_one_stub (struct bfd_hash_entr
return FALSE;
}
- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p);
+ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p);
p += 4;
if (PPC_HA (off) != 0)
{
- bfd_put_32 (htab->params->stub_bfd,
- ADDIS_R12_R2 | PPC_HA (off), p);
+ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p);
p += 4;
- bfd_put_32 (htab->params->stub_bfd,
- LD_R12_0R12 | PPC_LO (off), p);
+ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p);
}
else
- bfd_put_32 (htab->params->stub_bfd, LD_R12_0R2 | PPC_LO (off), p);
+ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p);
if (PPC_HA (r2off) != 0)
{
p += 4;
- bfd_put_32 (htab->params->stub_bfd,
- ADDIS_R2_R2 | PPC_HA (r2off), p);
+ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p);
}
if (PPC_LO (r2off) != 0)
{
p += 4;
- bfd_put_32 (htab->params->stub_bfd,
- ADDI_R2_R2 | PPC_LO (r2off), p);
+ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p);
}
}
p += 4;
- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p);
+ bfd_put_32 (obfd, MTCTR_R12, p);
p += 4;
- bfd_put_32 (htab->params->stub_bfd, BCTR, p);
+ bfd_put_32 (obfd, BCTR, p);
p += 4;
break;
@@ -11646,12 +11671,23 @@ ppc_build_one_stub (struct bfd_hash_entr
off = (stub_entry->stub_offset
+ stub_entry->group->stub_sec->output_offset
+ stub_entry->group->stub_sec->output_section->vma);
+ obfd = htab->params->stub_bfd;
+ is_tga = ((stub_entry->stub_type == ppc_stub_plt_call_notoc
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ && stub_entry->h != NULL
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
+ && htab->params->tls_get_addr_opt);
+ if (is_tga)
+ {
+ p = build_tls_get_addr_head (htab, stub_entry, p);
+ off += p - loc;
+ }
if (stub_entry->stub_type == ppc_stub_long_branch_both
|| stub_entry->stub_type == ppc_stub_plt_branch_both
|| stub_entry->stub_type == ppc_stub_plt_call_both)
{
off += 4;
- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p);
+ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p);
p += 4;
}
if (stub_entry->stub_type >= ppc_stub_plt_call_notoc)
@@ -11684,17 +11720,39 @@ ppc_build_one_stub (struct bfd_hash_entr
if (htab->params->power10_stubs != 0)
{
bfd_boolean load = stub_entry->stub_type >= ppc_stub_plt_call_notoc;
- p = build_power10_offset (htab->params->stub_bfd, p, off, odd, load);
+ p = build_power10_offset (obfd, p, off, odd, load);
}
else
{
+ if (htab->glink_eh_frame != NULL
+ && htab->glink_eh_frame->size != 0)
+ {
+ bfd_byte *base, *eh;
+ unsigned int lr_used, delta;
+
+ base = (htab->glink_eh_frame->contents
+ + stub_entry->group->eh_base + 17);
+ eh = base + stub_entry->group->eh_size;
+ lr_used = stub_entry->stub_offset + (p - loc) + 8;
+ delta = lr_used - stub_entry->group->lr_restore;
+ stub_entry->group->lr_restore = lr_used + 8;
+ eh = eh_advance (htab->elf.dynobj, eh, delta);
+ *eh++ = DW_CFA_register;
+ *eh++ = 65;
+ *eh++ = 12;
+ *eh++ = DW_CFA_advance_loc + 2;
+ *eh++ = DW_CFA_restore_extended;
+ *eh++ = 65;
+ stub_entry->group->eh_size = eh - base;
+ }
+
/* The notoc stubs calculate their target (either a PLT entry or
the global entry point of a function) relative to the PC
returned by the "bcl" two instructions past the start of the
sequence emitted by build_offset. The offset is therefore 8
less than calculated from the start of the sequence. */
off -= 8;
- p = build_offset (htab->params->stub_bfd, p, off,
+ p = build_offset (obfd, p, off,
stub_entry->stub_type >= ppc_stub_plt_call_notoc);
}
@@ -11706,17 +11764,19 @@ ppc_build_one_stub (struct bfd_hash_entr
+ stub_entry->group->stub_sec->output_offset
+ stub_entry->group->stub_sec->output_section->vma
+ (p - loc));
- bfd_put_32 (htab->params->stub_bfd,
- B_DOT | ((targ - from) & 0x3fffffc), p);
+ bfd_put_32 (obfd, B_DOT | ((targ - from) & 0x3fffffc), p);
}
else
{
- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p);
+ bfd_put_32 (obfd, MTCTR_R12, p);
p += 4;
- bfd_put_32 (htab->params->stub_bfd, BCTR, p);
+ bfd_put_32 (obfd, BCTR, p);
}
p += 4;
+ if (is_tga)
+ p = build_tls_get_addr_tail (htab, stub_entry, p, loc);
+
if (info->emitrelocations)
{
bfd_vma roff = relp - stub_entry->group->stub_sec->contents;
@@ -11747,33 +11807,6 @@ ppc_build_one_stub (struct bfd_hash_entr
return FALSE;
}
}
-
- if (htab->params->power10_stubs == 0
- && htab->glink_eh_frame != NULL
- && htab->glink_eh_frame->size != 0)
- {
- bfd_byte *base, *eh;
- unsigned int lr_used, delta;
-
- base = (htab->glink_eh_frame->contents
- + stub_entry->group->eh_base + 17);
- eh = base + stub_entry->group->eh_size;
- lr_used = stub_entry->stub_offset + 8;
- if (stub_entry->stub_type == ppc_stub_long_branch_both
- || stub_entry->stub_type == ppc_stub_plt_branch_both
- || stub_entry->stub_type == ppc_stub_plt_call_both)
- lr_used += 4;
- delta = lr_used - stub_entry->group->lr_restore;
- stub_entry->group->lr_restore = lr_used + 8;
- eh = eh_advance (htab->elf.dynobj, eh, delta);
- *eh++ = DW_CFA_register;
- *eh++ = 65;
- *eh++ = 12;
- *eh++ = DW_CFA_advance_loc + 2;
- *eh++ = DW_CFA_restore_extended;
- *eh++ = 65;
- stub_entry->group->eh_size = eh - base;
- }
break;
case ppc_stub_plt_call:
@@ -11842,12 +11875,20 @@ ppc_build_one_stub (struct bfd_hash_entr
r[0].r_offset += 2;
r[0].r_addend = targ;
}
- if (stub_entry->h != NULL
- && is_tls_get_addr (&stub_entry->h->elf, htab)
- && htab->params->tls_get_addr_opt)
- p = build_tls_get_addr_stub (htab, stub_entry, loc, off, r);
- else
- p = build_plt_stub (htab, stub_entry, loc, off, r);
+ p = loc;
+ obfd = htab->params->stub_bfd;
+ is_tga = (stub_entry->h != NULL
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
+ && htab->params->tls_get_addr_opt);
+ if (is_tga)
+ {
+ p = build_tls_get_addr_head (htab, stub_entry, p);
+ if (r != NULL)
+ r[0].r_offset += p - loc;
+ }
+ p = build_plt_stub (htab, stub_entry, p, off, r);
+ if (is_tga)
+ p = build_tls_get_addr_tail (htab, stub_entry, p, loc);
break;
case ppc_stub_save_res:
@@ -12143,11 +12184,19 @@ ppc_size_one_stub (struct bfd_hash_entry
case ppc_stub_plt_call_notoc:
case ppc_stub_plt_call_both:
- off = (stub_entry->stub_offset
- + stub_entry->group->stub_sec->output_offset
- + stub_entry->group->stub_sec->output_section->vma);
+ lr_used = 0;
+ if (stub_entry->h != NULL
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
+ && htab->params->tls_get_addr_opt)
+ {
+ lr_used += 7 * 4;
+ if (!htab->params->no_tls_get_addr_regsave)
+ lr_used += 11 * 4;
+ else if (stub_entry->stub_type == ppc_stub_plt_call_both)
+ lr_used += 2 * 4;
+ }
if (stub_entry->stub_type == ppc_stub_plt_call_both)
- off += 4;
+ lr_used += 4;
targ = stub_entry->plt_ent->plt.offset & ~1;
if (targ >= (bfd_vma) -2)
abort ();
@@ -12163,16 +12212,21 @@ ppc_size_one_stub (struct bfd_hash_entry
plt = htab->pltlocal;
}
targ += plt->output_offset + plt->output_section->vma;
+ off = (stub_entry->stub_offset
+ + stub_entry->group->stub_sec->output_offset
+ + stub_entry->group->stub_sec->output_section->vma
+ + lr_used);
odd = off & 4;
off = targ - off;
if (htab->params->plt_stub_align != 0)
{
- unsigned pad = plt_stub_pad (htab, stub_entry, off);
+ unsigned pad = plt_stub_pad (htab, stub_entry, off, odd);
stub_entry->group->stub_sec->size += pad;
stub_entry->stub_offset = stub_entry->group->stub_sec->size;
off -= pad;
+ odd ^= pad & 4;
}
if (info->emitrelocations)
@@ -12186,15 +12240,13 @@ ppc_size_one_stub (struct bfd_hash_entry
stub_entry->group->stub_sec->flags |= SEC_RELOC;
}
- size = plt_stub_size (htab, stub_entry, off);
+ size = plt_stub_size (htab, stub_entry, off, odd);
if (htab->params->power10_stubs == 0)
{
/* After the bcl, lr has been modified so we need to emit
.eh_frame info saying the return address is in r12. */
- lr_used = stub_entry->stub_offset + 8;
- if (stub_entry->stub_type == ppc_stub_plt_call_both)
- lr_used += 4;
+ lr_used += stub_entry->stub_offset + 8;
/* The eh_frame info will consist of a DW_CFA_advance_loc or
variant, DW_CFA_register, 65, 12, DW_CFA_advance_loc+2,
DW_CFA_restore_extended 65. */
@@ -12202,6 +12254,30 @@ ppc_size_one_stub (struct bfd_hash_entry
stub_entry->group->eh_size += eh_advance_size (delta) + 6;
stub_entry->group->lr_restore = lr_used + 8;
}
+ if ((stub_entry->stub_type == ppc_stub_plt_call_notoc
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ && stub_entry->h != NULL
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
+ && htab->params->tls_get_addr_opt)
+ {
+ if (!htab->params->no_tls_get_addr_regsave)
+ {
+ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4;
+ delta = cfa_updt - stub_entry->group->lr_restore;
+ stub_entry->group->eh_size += eh_advance_size (delta);
+ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35;
+ stub_entry->group->lr_restore
+ = stub_entry->stub_offset + size - 4;
+ }
+ else if (stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
+ lr_used = stub_entry->stub_offset + size - 20;
+ delta = lr_used - stub_entry->group->lr_restore;
+ stub_entry->group->eh_size += eh_advance_size (delta) + 6;
+ stub_entry->group->lr_restore
+ = stub_entry->stub_offset + size - 4;
+ }
+ }
break;
case ppc_stub_plt_call:
@@ -12227,7 +12303,7 @@ ppc_size_one_stub (struct bfd_hash_entry
if (htab->params->plt_stub_align != 0)
{
- unsigned pad = plt_stub_pad (htab, stub_entry, off);
+ unsigned pad = plt_stub_pad (htab, stub_entry, off, 0);
stub_entry->group->stub_sec->size += pad;
stub_entry->stub_offset = stub_entry->group->stub_sec->size;
@@ -12244,14 +12320,22 @@ ppc_size_one_stub (struct bfd_hash_entry
stub_entry->group->stub_sec->flags |= SEC_RELOC;
}
- size = plt_stub_size (htab, stub_entry, off);
+ size = plt_stub_size (htab, stub_entry, off, 0);
if (stub_entry->h != NULL
&& is_tls_get_addr (&stub_entry->h->elf, htab)
&& htab->params->tls_get_addr_opt
&& stub_entry->stub_type == ppc_stub_plt_call_r2save)
{
- if (htab->params->no_tls_get_addr_regsave)
+ if (!htab->params->no_tls_get_addr_regsave)
+ {
+ /* Adjustments to r1 need to be described. */
+ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4;
+ delta = cfa_updt - stub_entry->group->lr_restore;
+ stub_entry->group->eh_size += eh_advance_size (delta);
+ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35;
+ }
+ else
{
lr_used = stub_entry->stub_offset + size - 20;
/* The eh_frame info will consist of a DW_CFA_advance_loc
@@ -12260,15 +12344,7 @@ ppc_size_one_stub (struct bfd_hash_entry
delta = lr_used - stub_entry->group->lr_restore;
stub_entry->group->eh_size += eh_advance_size (delta) + 6;
}
- else
- {
- /* Adjustments to r1 need to be described. */
- unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4;
- delta = cfa_updt - stub_entry->group->lr_restore;
- stub_entry->group->eh_size += eh_advance_size (delta);
- stub_entry->group->eh_size += htab->opd_abi ? 36 : 35;
- }
- stub_entry->group->lr_restore = size - 4;
+ stub_entry->group->lr_restore = stub_entry->stub_offset + size - 4;
}
break;
@@ -13814,11 +13890,11 @@ ppc64_elf_size_stubs (struct bfd_link_in
/* Augmentation. */
p += 1;
- *p++ = DW_CFA_advance_loc + 1;
+ *p++ = DW_CFA_advance_loc + (htab->has_plt_localentry0 ? 3 : 2);
*p++ = DW_CFA_register;
*p++ = 65;
*p++ = htab->opd_abi ? 12 : 0;
- *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 5 : 7);
+ *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 4 : 2);
*p++ = DW_CFA_restore_extended;
*p++ = 65;
p += ((24 + align - 1) & -align) - 24;
@@ -14179,8 +14255,6 @@ write_plt_relocs_for_local_syms (struct
}
val = sym->st_value + ent->addend;
- if (ELF_ST_TYPE (sym->st_info) != STT_GNU_IFUNC)
- val += PPC64_LOCAL_ENTRY_OFFSET (sym->st_other);
if (sym_sec != NULL && sym_sec->output_section != NULL)
val += sym_sec->output_offset + sym_sec->output_section->vma;
@@ -14414,23 +14488,60 @@ ppc64_elf_build_stubs (struct bfd_link_i
}
else
{
+ unsigned int insn;
+
+ /* 0:
+ . .quad plt0-1f # plt0 entry relative to 1:
+ #
+ # We get here with r12 initially @ a glink branch
+ # Load the address of _dl_runtime_resolve from plt0 and
+ # jump to it, with r0 set to the index of the PLT entry
+ # to be resolved and r11 the link map.
+ __glink_PLTresolve:
+ . std %r2,24(%r1) # optional
+ . mflr %r0
+ . bcl 20,31,1f
+ 1:
+ . mflr %r11
+ . mtlr %r0
+ . ld %r0,(0b-1b)(%r11)
+ . sub %r12,%r12,%r11
+ . add %r11,%r0,%r11
+ . addi %r0,%r12,1b-2f
+ . ld %r12,0(%r11)
+ . srdi %r0,%r0,2
+ . mtctr %r12
+ . ld %r11,8(%r11)
+ . bctr
+ 2:
+ . b __glink_PLTresolve
+ . ...
+ . b __glink_PLTresolve */
+
+ if (htab->has_plt_localentry0)
+ {
+ bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p);
+ p += 4;
+ }
bfd_put_32 (htab->glink->owner, MFLR_R0, p);
p += 4;
bfd_put_32 (htab->glink->owner, BCL_20_31, p);
p += 4;
bfd_put_32 (htab->glink->owner, MFLR_R11, p);
p += 4;
- bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p);
- p += 4;
- bfd_put_32 (htab->glink->owner, LD_R2_0R11 | (-16 & 0xfffc), p);
- p += 4;
bfd_put_32 (htab->glink->owner, MTLR_R0, p);
p += 4;
+ if (htab->has_plt_localentry0)
+ insn = LD_R0_0R11 | (-20 & 0xfffc);
+ else
+ insn = LD_R0_0R11 | (-16 & 0xfffc);
+ bfd_put_32 (htab->glink->owner, insn, p);
+ p += 4;
bfd_put_32 (htab->glink->owner, SUB_R12_R12_R11, p);
p += 4;
- bfd_put_32 (htab->glink->owner, ADD_R11_R2_R11, p);
+ bfd_put_32 (htab->glink->owner, ADD_R11_R0_R11, p);
p += 4;
- bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-48 & 0xffff), p);
+ bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-44 & 0xffff), p);
p += 4;
bfd_put_32 (htab->glink->owner, LD_R12_0R11, p);
p += 4;
@@ -15880,22 +15991,25 @@ ppc64_elf_relocate_section (bfd *output_
addend = 0;
reloc_dest = DEST_STUB;
- if (((stub_entry->stub_type == ppc_stub_plt_call
- && ALWAYS_EMIT_R2SAVE)
- || stub_entry->stub_type == ppc_stub_plt_call_r2save
- || stub_entry->stub_type == ppc_stub_plt_call_both)
- && !(h != NULL
- && is_tls_get_addr (&h->elf, htab)
- && htab->params->tls_get_addr_opt)
- && rel + 1 < relend
- && rel[1].r_offset == rel->r_offset + 4
- && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE)
- relocation += 4;
- else if ((stub_entry->stub_type == ppc_stub_long_branch_both
- || stub_entry->stub_type == ppc_stub_plt_branch_both
- || stub_entry->stub_type == ppc_stub_plt_call_both)
- && r_type == R_PPC64_REL24_NOTOC)
- relocation += 4;
+ if ((((stub_entry->stub_type == ppc_stub_plt_call
+ && ALWAYS_EMIT_R2SAVE)
+ || stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ && rel + 1 < relend
+ && rel[1].r_offset == rel->r_offset + 4
+ && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE)
+ || ((stub_entry->stub_type == ppc_stub_long_branch_both
+ || stub_entry->stub_type == ppc_stub_plt_branch_both
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ && r_type == R_PPC64_REL24_NOTOC))
+ {
+ /* Skip over the r2 store at the start of the stub. */
+ if (!(stub_entry->stub_type >= ppc_stub_plt_call
+ && htab->params->tls_get_addr_opt
+ && h != NULL
+ && is_tls_get_addr (&h->elf, htab)))
+ relocation += 4;
+ }
if (r_type == R_PPC64_REL24_NOTOC
&& (stub_entry->stub_type == ppc_stub_plt_call_notoc
@@ -15944,7 +16058,8 @@ ppc64_elf_relocate_section (bfd *output_
break;
case R_PPC64_GOT16_DS:
- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC)
+ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC
+ || !htab->do_toc_opt)
break;
from = TOCstart + htab->sec_info[input_section->id].toc_off;
if (relocation + addend - from + 0x8000 < 0x10000
@@ -15963,7 +16078,8 @@ ppc64_elf_relocate_section (bfd *output_
case R_PPC64_GOT16_LO_DS:
case R_PPC64_GOT16_HA:
- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC)
+ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC
+ || !htab->do_toc_opt)
break;
from = TOCstart + htab->sec_info[input_section->id].toc_off;
if (relocation + addend - from + 0x80008000ULL < 0x100000000ULL
@@ -15986,34 +16102,38 @@ ppc64_elf_relocate_section (bfd *output_
break;
case R_PPC64_GOT_PCREL34:
- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC)
+ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC
+ || !htab->do_toc_opt)
break;
from = (rel->r_offset
+ input_section->output_section->vma
+ input_section->output_offset);
- if (relocation - from + (1ULL << 33) < 1ULL << 34
- && SYMBOL_REFERENCES_LOCAL (info, &h->elf))
- {
- offset = rel->r_offset;
- pinsn = bfd_get_32 (input_bfd, contents + offset);
- pinsn <<= 32;
- pinsn |= bfd_get_32 (input_bfd, contents + offset + 4);
- if ((pinsn & ((-1ULL << 50) | (63ULL << 26)))
- == ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */))
- {
- /* Replace with paddi. */
- pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26);
- r_type = R_PPC64_PCREL34;
- rel->r_info = ELF64_R_INFO (r_symndx, r_type);
- bfd_put_32 (input_bfd, pinsn >> 32, contents + offset);
- bfd_put_32 (input_bfd, pinsn, contents + offset + 4);
- goto pcrelopt;
- }
- }
- break;
+ if (!(relocation - from + (1ULL << 33) < 1ULL << 34
+ && SYMBOL_REFERENCES_LOCAL (info, &h->elf)))
+ break;
+
+ offset = rel->r_offset;
+ pinsn = bfd_get_32 (input_bfd, contents + offset);
+ pinsn <<= 32;
+ pinsn |= bfd_get_32 (input_bfd, contents + offset + 4);
+ if ((pinsn & ((-1ULL << 50) | (63ULL << 26)))
+ != ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */))
+ break;
+
+ /* Replace with paddi. */
+ pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26);
+ r_type = R_PPC64_PCREL34;
+ rel->r_info = ELF64_R_INFO (r_symndx, r_type);
+ bfd_put_32 (input_bfd, pinsn >> 32, contents + offset);
+ bfd_put_32 (input_bfd, pinsn, contents + offset + 4);
+ /* Fall through. */
case R_PPC64_PCREL34:
- if (SYMBOL_REFERENCES_LOCAL (info, &h->elf))
+ if (!htab->params->no_pcrel_opt
+ && rel + 1 < relend
+ && rel[1].r_offset == rel->r_offset
+ && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT)
+ && SYMBOL_REFERENCES_LOCAL (info, &h->elf))
{
offset = rel->r_offset;
pinsn = bfd_get_32 (input_bfd, contents + offset);
@@ -16023,43 +16143,37 @@ ppc64_elf_relocate_section (bfd *output_
== ((1ULL << 58) | (2ULL << 56) | (1ULL << 52)
| (14ULL << 26) /* paddi */))
{
- pcrelopt:
- if (rel + 1 < relend
- && rel[1].r_offset == offset
- && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT))
- {
- bfd_vma off2 = rel[1].r_addend;
- if (off2 == 0)
- /* zero means next insn. */
- off2 = 8;
- off2 += offset;
- if (off2 + 4 <= input_section->size)
+ bfd_vma off2 = rel[1].r_addend;
+ if (off2 == 0)
+ /* zero means next insn. */
+ off2 = 8;
+ off2 += offset;
+ if (off2 + 4 <= input_section->size)
+ {
+ uint64_t pinsn2;
+ bfd_signed_vma addend_off;
+ pinsn2 = bfd_get_32 (input_bfd, contents + off2);
+ pinsn2 <<= 32;
+ if ((pinsn2 & (63ULL << 58)) == 1ULL << 58)
{
- uint64_t pinsn2;
- bfd_signed_vma addend_off;
- pinsn2 = bfd_get_32 (input_bfd, contents + off2);
- pinsn2 <<= 32;
+ if (off2 + 8 > input_section->size)
+ break;
+ pinsn2 |= bfd_get_32 (input_bfd,
+ contents + off2 + 4);
+ }
+ if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off))
+ {
+ addend += addend_off;
+ rel->r_addend = addend;
+ bfd_put_32 (input_bfd, pinsn >> 32,
+ contents + offset);
+ bfd_put_32 (input_bfd, pinsn,
+ contents + offset + 4);
+ bfd_put_32 (input_bfd, pinsn2 >> 32,
+ contents + off2);
if ((pinsn2 & (63ULL << 58)) == 1ULL << 58)
- {
- if (off2 + 8 > input_section->size)
- break;
- pinsn2 |= bfd_get_32 (input_bfd,
- contents + off2 + 4);
- }
- if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off))
- {
- addend += addend_off;
- rel->r_addend = addend;
- bfd_put_32 (input_bfd, pinsn >> 32,
- contents + offset);
- bfd_put_32 (input_bfd, pinsn,
- contents + offset + 4);
- bfd_put_32 (input_bfd, pinsn2 >> 32,
- contents + off2);
- if ((pinsn2 & (63ULL << 58)) == 1ULL << 58)
- bfd_put_32 (input_bfd, pinsn2,
- contents + off2 + 4);
- }
+ bfd_put_32 (input_bfd, pinsn2,
+ contents + off2 + 4);
}
}
}
diff -rup binutils-2.35.1/bfd/elf64-ppc.h fred/binutils-2.35.1/bfd/elf64-ppc.h
--- binutils-2.35.1/bfd/elf64-ppc.h 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/bfd/elf64-ppc.h 2020-11-25 14:37:34.000000000 +0000
@@ -27,6 +27,7 @@ struct ppc64_elf_params
/* Linker call-backs. */
asection * (*add_stub_section) (const char *, asection *);
void (*layout_sections_again) (void);
+ void (*edit) (void);
/* Maximum size of a group of input sections that can be handled by
one stub section. A value of +/-1 indicates the bfd back-end
@@ -57,6 +58,9 @@ struct ppc64_elf_params
/* Whether to use power10 instructions in linkage stubs. */
int power10_stubs;
+ /* Whether R_PPC64_PCREL_OPT should be ignored. */
+ int no_pcrel_opt;
+
/* Whether to canonicalize .opd so that there are no overlapping
.opd entries. */
int non_overlapping_opd;
@@ -77,7 +81,7 @@ bfd_boolean ppc64_elf_edit_opd
(struct bfd_link_info *);
bfd_boolean ppc64_elf_inline_plt
(struct bfd_link_info *);
-asection *ppc64_elf_tls_setup
+bfd_boolean ppc64_elf_tls_setup
(struct bfd_link_info *);
bfd_boolean ppc64_elf_tls_optimize
(struct bfd_link_info *);
diff -rup binutils-2.35.1/bfd/elfxx-x86.c fred/binutils-2.35.1/bfd/elfxx-x86.c
--- binutils-2.35.1/bfd/elfxx-x86.c 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/bfd/elfxx-x86.c 2020-11-25 14:37:34.000000000 +0000
@@ -2417,15 +2417,19 @@ _bfd_x86_elf_merge_gnu_properties (struc
abort ();
if (aprop != NULL && bprop != NULL)
{
- features = 0;
- if (htab->params->ibt)
- features = GNU_PROPERTY_X86_FEATURE_1_IBT;
- if (htab->params->shstk)
- features |= GNU_PROPERTY_X86_FEATURE_1_SHSTK;
number = aprop->u.number;
- /* Add GNU_PROPERTY_X86_FEATURE_1_IBT and
- GNU_PROPERTY_X86_FEATURE_1_SHSTK. */
- aprop->u.number = (number & bprop->u.number) | features;
+ aprop->u.number = number & bprop->u.number;
+ if (pr_type == GNU_PROPERTY_X86_FEATURE_1_AND)
+ {
+ features = 0;
+ if (htab->params->ibt)
+ features = GNU_PROPERTY_X86_FEATURE_1_IBT;
+ if (htab->params->shstk)
+ features |= GNU_PROPERTY_X86_FEATURE_1_SHSTK;
+ /* Add GNU_PROPERTY_X86_FEATURE_1_IBT and
+ GNU_PROPERTY_X86_FEATURE_1_SHSTK. */
+ aprop->u.number |= features;
+ }
updated = number != (unsigned int) aprop->u.number;
/* Remove the property if all feature bits are cleared. */
if (aprop->u.number == 0)
@@ -2437,10 +2441,13 @@ _bfd_x86_elf_merge_gnu_properties (struc
have them. Set IBT and SHSTK properties for -z ibt and -z
shstk if needed. */
features = 0;
- if (htab->params->ibt)
- features = GNU_PROPERTY_X86_FEATURE_1_IBT;
- if (htab->params->shstk)
- features |= GNU_PROPERTY_X86_FEATURE_1_SHSTK;
+ if (pr_type == GNU_PROPERTY_X86_FEATURE_1_AND)
+ {
+ if (htab->params->ibt)
+ features = GNU_PROPERTY_X86_FEATURE_1_IBT;
+ if (htab->params->shstk)
+ features |= GNU_PROPERTY_X86_FEATURE_1_SHSTK;
+ }
if (features)
{
if (aprop != NULL)
diff -rup binutils-2.35.1/binutils/dwarf.c fred/binutils-2.35.1/binutils/dwarf.c
--- binutils-2.35.1/binutils/dwarf.c 2020-09-03 15:51:01.000000000 +0100
+++ fred/binutils-2.35.1/binutils/dwarf.c 2020-11-25 14:37:35.000000000 +0000
@@ -849,101 +849,208 @@ fetch_indexed_value (dwarf_vma offset, d
/* FIXME: There are better and more efficient ways to handle
these structures. For now though, I just want something that
is simple to implement. */
+/* Records a single attribute in an abbrev. */
typedef struct abbrev_attr
{
- unsigned long attribute;
- unsigned long form;
- bfd_signed_vma implicit_const;
- struct abbrev_attr *next;
+ unsigned long attribute;
+ unsigned long form;
+ bfd_signed_vma implicit_const;
+ struct abbrev_attr * next;
}
abbrev_attr;
+/* Records a single abbrev. */
typedef struct abbrev_entry
{
- unsigned long entry;
- unsigned long tag;
- int children;
- struct abbrev_attr *first_attr;
- struct abbrev_attr *last_attr;
- struct abbrev_entry *next;
+ unsigned long number;
+ unsigned long tag;
+ int children;
+ struct abbrev_attr * first_attr;
+ struct abbrev_attr * last_attr;
+ struct abbrev_entry * next;
}
abbrev_entry;
-static abbrev_entry *first_abbrev = NULL;
-static abbrev_entry *last_abbrev = NULL;
+/* Records a set of abbreviations. */
+typedef struct abbrev_list
+{
+ abbrev_entry * first_abbrev;
+ abbrev_entry * last_abbrev;
+ dwarf_vma abbrev_base;
+ dwarf_vma abbrev_offset;
+ struct abbrev_list * next;
+ unsigned char * start_of_next_abbrevs;
+}
+abbrev_list;
+
+/* Records all the abbrevs found so far. */
+static struct abbrev_list * abbrev_lists = NULL;
+
+typedef struct abbrev_map
+{
+ dwarf_vma start;
+ dwarf_vma end;
+ abbrev_list * list;
+} abbrev_map;
+
+/* Maps between CU offsets and abbrev sets. */
+static abbrev_map * cu_abbrev_map = NULL;
+static unsigned long num_abbrev_map_entries = 0;
+static unsigned long next_free_abbrev_map_entry = 0;
+
+#define INITIAL_NUM_ABBREV_MAP_ENTRIES 8
+#define ABBREV_MAP_ENTRIES_INCREMENT 8
static void
-free_abbrevs (void)
+record_abbrev_list_for_cu (dwarf_vma start, dwarf_vma end, abbrev_list * list)
{
- abbrev_entry *abbrv;
+ if (cu_abbrev_map == NULL)
+ {
+ num_abbrev_map_entries = INITIAL_NUM_ABBREV_MAP_ENTRIES;
+ cu_abbrev_map = xmalloc (num_abbrev_map_entries * sizeof (* cu_abbrev_map));
+ }
+ else if (next_free_abbrev_map_entry == num_abbrev_map_entries)
+ {
+ num_abbrev_map_entries += ABBREV_MAP_ENTRIES_INCREMENT;
+ cu_abbrev_map = xrealloc (cu_abbrev_map, num_abbrev_map_entries * sizeof (* cu_abbrev_map));
+ }
- for (abbrv = first_abbrev; abbrv;)
+ cu_abbrev_map[next_free_abbrev_map_entry].start = start;
+ cu_abbrev_map[next_free_abbrev_map_entry].end = end;
+ cu_abbrev_map[next_free_abbrev_map_entry].list = list;
+ next_free_abbrev_map_entry ++;
+}
+
+static void
+free_all_abbrevs (void)
+{
+ abbrev_list * list;
+
+ for (list = abbrev_lists; list != NULL;)
{
- abbrev_entry *next_abbrev = abbrv->next;
- abbrev_attr *attr;
+ abbrev_list * next = list->next;
+ abbrev_entry * abbrv;
- for (attr = abbrv->first_attr; attr;)
+ for (abbrv = list->first_abbrev; abbrv != NULL;)
{
- abbrev_attr *next_attr = attr->next;
+ abbrev_entry * next_abbrev = abbrv->next;
+ abbrev_attr * attr;
+
+ for (attr = abbrv->first_attr; attr;)
+ {
+ abbrev_attr *next_attr = attr->next;
- free (attr);
- attr = next_attr;
+ free (attr);
+ attr = next_attr;
+ }
+
+ free (abbrv);
+ abbrv = next_abbrev;
}
- free (abbrv);
- abbrv = next_abbrev;
+ free (list);
+ list = next;
}
- last_abbrev = first_abbrev = NULL;
+ abbrev_lists = NULL;
+}
+
+static abbrev_list *
+new_abbrev_list (dwarf_vma abbrev_base, dwarf_vma abbrev_offset)
+{
+ abbrev_list * list = (abbrev_list *) xcalloc (sizeof * list, 1);
+
+ list->abbrev_base = abbrev_base;
+ list->abbrev_offset = abbrev_offset;
+
+ list->next = abbrev_lists;
+ abbrev_lists = list;
+
+ return list;
+}
+
+static abbrev_list *
+find_abbrev_list_by_abbrev_offset (dwarf_vma abbrev_base,
+ dwarf_vma abbrev_offset)
+{
+ abbrev_list * list;
+
+ for (list = abbrev_lists; list != NULL; list = list->next)
+ if (list->abbrev_base == abbrev_base
+ && list->abbrev_offset == abbrev_offset)
+ return list;
+
+ return NULL;
+}
+
+/* Find the abbreviation map for the CU that includes OFFSET.
+ OFFSET is an absolute offset from the start of the .debug_info section. */
+/* FIXME: This function is going to slow down readelf & objdump.
+ Consider using a better algorithm to mitigate this effect. */
+
+static abbrev_map *
+find_abbrev_map_by_offset (dwarf_vma offset)
+{
+ unsigned long i;
+
+ for (i = 0; i < next_free_abbrev_map_entry; i++)
+ if (cu_abbrev_map[i].start <= offset
+ && cu_abbrev_map[i].end > offset)
+ return cu_abbrev_map + i;
+
+ return NULL;
}
static void
-add_abbrev (unsigned long number, unsigned long tag, int children)
+add_abbrev (unsigned long number,
+ unsigned long tag,
+ int children,
+ abbrev_list * list)
{
- abbrev_entry *entry;
+ abbrev_entry * entry;
- entry = (abbrev_entry *) malloc (sizeof (*entry));
- if (entry == NULL)
- /* ugg */
- return;
+ entry = (abbrev_entry *) xmalloc (sizeof (*entry));
- entry->entry = number;
+ entry->number = number;
entry->tag = tag;
entry->children = children;
entry->first_attr = NULL;
entry->last_attr = NULL;
entry->next = NULL;
- if (first_abbrev == NULL)
- first_abbrev = entry;
+ assert (list != NULL);
+
+ if (list->first_abbrev == NULL)
+ list->first_abbrev = entry;
else
- last_abbrev->next = entry;
+ list->last_abbrev->next = entry;
- last_abbrev = entry;
+ list->last_abbrev = entry;
}
static void
-add_abbrev_attr (unsigned long attribute, unsigned long form,
- bfd_signed_vma implicit_const)
+add_abbrev_attr (unsigned long attribute,
+ unsigned long form,
+ bfd_signed_vma implicit_const,
+ abbrev_list * list)
{
abbrev_attr *attr;
- attr = (abbrev_attr *) malloc (sizeof (*attr));
- if (attr == NULL)
- /* ugg */
- return;
+ attr = (abbrev_attr *) xmalloc (sizeof (*attr));
attr->attribute = attribute;
attr->form = form;
attr->implicit_const = implicit_const;
attr->next = NULL;
- if (last_abbrev->first_attr == NULL)
- last_abbrev->first_attr = attr;
+ assert (list != NULL && list->last_abbrev != NULL);
+
+ if (list->last_abbrev->first_attr == NULL)
+ list->last_abbrev->first_attr = attr;
else
- last_abbrev->last_attr->next = attr;
+ list->last_abbrev->last_attr->next = attr;
- last_abbrev->last_attr = attr;
+ list->last_abbrev->last_attr = attr;
}
/* Processes the (partial) contents of a .debug_abbrev section.
@@ -952,11 +1059,10 @@ add_abbrev_attr (unsigned long attribute
an abbreviation set was found. */
static unsigned char *
-process_abbrev_section (unsigned char *start, unsigned char *end)
+process_abbrev_set (unsigned char * start,
+ const unsigned char * end,
+ abbrev_list * list)
{
- if (first_abbrev != NULL)
- return NULL;
-
while (start < end)
{
unsigned long entry;
@@ -966,7 +1072,7 @@ process_abbrev_section (unsigned char *s
READ_ULEB (entry, start, end);
- /* A single zero is supposed to end the section according
+ /* A single zero is supposed to end the set according
to the standard. If there's more, then signal that to
the caller. */
if (start == end)
@@ -980,7 +1086,7 @@ process_abbrev_section (unsigned char *s
children = *start++;
- add_abbrev (entry, tag, children);
+ add_abbrev (entry, tag, children, list);
do
{
@@ -1003,7 +1109,7 @@ process_abbrev_section (unsigned char *s
break;
}
- add_abbrev_attr (attribute, form, implicit_const);
+ add_abbrev_attr (attribute, form, implicit_const, list);
}
while (attribute != 0);
}
@@ -1868,7 +1974,7 @@ skip_attr_bytes (unsigned long
case DW_FORM_ref_addr:
if (dwarf_version == 2)
SAFE_BYTE_GET_AND_INC (uvalue, data, pointer_size, end);
- else if (dwarf_version == 3 || dwarf_version == 4)
+ else if (dwarf_version > 2)
SAFE_BYTE_GET_AND_INC (uvalue, data, offset_size, end);
else
return NULL;
@@ -1919,7 +2025,23 @@ skip_attr_bytes (unsigned long
break;
case DW_FORM_ref8:
+ {
+ dwarf_vma high_bits;
+
+ SAFE_BYTE_GET64 (data, &high_bits, &uvalue, end);
+ data += 8;
+ if (sizeof (uvalue) > 4)
+ uvalue += high_bits << 32;
+ else if (high_bits != 0)
+ {
+ /* FIXME: What to do ? */
+ return NULL;
+ }
+ break;
+ }
+
case DW_FORM_data8:
+ case DW_FORM_ref_sig8:
data += 8;
break;
@@ -1934,6 +2056,7 @@ skip_attr_bytes (unsigned long
case DW_FORM_block:
case DW_FORM_exprloc:
READ_ULEB (uvalue, data, end);
+ data += uvalue;
break;
case DW_FORM_block1:
@@ -1951,12 +2074,12 @@ skip_attr_bytes (unsigned long
data += 4 + uvalue;
break;
- case DW_FORM_ref_sig8:
- data += 8;
- break;
-
case DW_FORM_indirect:
- /* FIXME: Handle this form. */
+ READ_ULEB (form, data, end);
+ if (form == DW_FORM_implicit_const)
+ SKIP_ULEB (data, end);
+ return skip_attr_bytes (form, data, end, pointer_size, offset_size, dwarf_version, value_return);
+
default:
return NULL;
}
@@ -1967,40 +2090,137 @@ skip_attr_bytes (unsigned long
return data;
}
-/* Return IS_SIGNED set to TRUE if the type at
- DATA can be determined to be a signed type. */
+/* Given form FORM with value UVALUE, locate and return the abbreviation
+ associated with it. */
+
+static abbrev_entry *
+get_type_abbrev_from_form (unsigned long form,
+ unsigned long uvalue,
+ dwarf_vma cu_offset,
+ const struct dwarf_section * section,
+ unsigned long * abbrev_num_return,
+ unsigned char ** data_return,
+ unsigned long * cu_offset_return)
+{
+ unsigned long abbrev_number;
+ abbrev_map * map;
+ abbrev_entry * entry;
+ unsigned char * data;
+
+ if (abbrev_num_return != NULL)
+ * abbrev_num_return = 0;
+ if (data_return != NULL)
+ * data_return = NULL;
+
+ switch (form)
+ {
+ case DW_FORM_GNU_ref_alt:
+ /* FIXME: We are unable to handle this form at the moment. */
+ return NULL;
+
+ case DW_FORM_ref_addr:
+ if (uvalue >= section->size)
+ {
+ warn (_("Unable to resolve ref_addr form: uvalue %lx > section size %lx (%s)\n"),
+ uvalue, (long) section->size, section->name);
+ return NULL;
+ }
+ break;
+
+ case DW_FORM_ref1:
+ case DW_FORM_ref2:
+ case DW_FORM_ref4:
+ case DW_FORM_ref8:
+ case DW_FORM_ref_udata:
+ if (uvalue + cu_offset > section->size)
+ {
+ warn (_("Unable to resolve ref form: uvalue %lx + cu_offset %lx > section size %lx\n"),
+ uvalue, (long) cu_offset, (long) section->size);
+ return NULL;
+ }
+ uvalue += cu_offset;
+ break;
+
+ /* FIXME: Are there other DW_FORMs that can be used by types ? */
+
+ default:
+ warn (_("Unexpected form %lx encountered whilst finding abbreviation for type\n"), form);
+ return NULL;
+ }
+
+ data = (unsigned char *) section->start + uvalue;
+ map = find_abbrev_map_by_offset (uvalue);
+
+ if (map == NULL)
+ {
+ warn (_("Unable to find abbreviations for CU offset %#lx\n"), uvalue);
+ return NULL;
+ }
+ if (map->list == NULL)
+ {
+ warn (_("Empty abbreviation list encountered for CU offset %lx\n"), uvalue);
+ return NULL;
+ }
+
+ if (cu_offset_return != NULL)
+ {
+ if (form == DW_FORM_ref_addr)
+ * cu_offset_return = map->start;
+ else
+ * cu_offset_return = cu_offset;
+ }
+
+ READ_ULEB (abbrev_number, data, section->start + section->size);
+
+ for (entry = map->list->first_abbrev; entry != NULL; entry = entry->next)
+ if (entry->number == abbrev_number)
+ break;
+
+ if (abbrev_num_return != NULL)
+ * abbrev_num_return = abbrev_number;
+
+ if (data_return != NULL)
+ * data_return = data;
+
+ if (entry == NULL)
+ warn (_("Unable to find entry for abbreviation %lu\n"), abbrev_number);
+
+ return entry;
+}
+
+/* Return IS_SIGNED set to TRUE if the type using abbreviation ENTRY
+ can be determined to be a signed type. The data for ENTRY can be
+ found starting at DATA. */
static void
-get_type_signedness (unsigned char * start,
+get_type_signedness (abbrev_entry * entry,
+ const struct dwarf_section * section,
unsigned char * data,
unsigned const char * end,
+ dwarf_vma cu_offset,
dwarf_vma pointer_size,
dwarf_vma offset_size,
int dwarf_version,
bfd_boolean * is_signed,
- bfd_boolean is_nested)
+ unsigned int nesting)
{
- unsigned long abbrev_number;
- abbrev_entry * entry;
abbrev_attr * attr;
* is_signed = FALSE;
- READ_ULEB (abbrev_number, data, end);
-
- for (entry = first_abbrev;
- entry != NULL && entry->entry != abbrev_number;
- entry = entry->next)
- continue;
-
- if (entry == NULL)
- /* FIXME: Issue a warning ? */
- return;
+#define MAX_NESTING 20
+ if (nesting > MAX_NESTING)
+ {
+ /* FIXME: Warn - or is this expected ?
+ NB/ We need to avoid infinite recursion. */
+ return;
+ }
for (attr = entry->first_attr;
attr != NULL && attr->attribute;
attr = attr->next)
{
+ unsigned char * orig_data = data;
dwarf_vma uvalue = 0;
data = skip_attr_bytes (attr->form, data, end, pointer_size,
@@ -2010,25 +2230,38 @@ get_type_signedness (unsigned char *
switch (attr->attribute)
{
-#if 0 /* FIXME: It would be nice to print the name of the type,
- but this would mean updating a lot of binutils tests. */
+ case DW_AT_linkage_name:
case DW_AT_name:
- if (attr->form == DW_FORM_strp)
- printf ("%s", fetch_indirect_string (uvalue));
+ if (do_wide)
+ {
+ if (attr->form == DW_FORM_strp)
+ printf (", %s", fetch_indirect_string (uvalue));
+ else if (attr->form == DW_FORM_string)
+ printf (", %s", orig_data);
+ }
break;
-#endif
+
case DW_AT_type:
/* Recurse. */
- if (is_nested)
- {
- /* FIXME: Warn - or is this expected ?
- NB/ We need to avoid infinite recursion. */
- return;
- }
- if (uvalue >= (size_t) (end - start))
- return;
- get_type_signedness (start, start + uvalue, end, pointer_size,
- offset_size, dwarf_version, is_signed, TRUE);
+ {
+ abbrev_entry * type_abbrev;
+ unsigned char * type_data;
+ unsigned long type_cu_offset;
+
+ type_abbrev = get_type_abbrev_from_form (attr->form,
+ uvalue,
+ cu_offset,
+ section,
+ NULL /* abbrev num return */,
+ & type_data,
+ & type_cu_offset);
+ if (type_abbrev == NULL)
+ break;
+
+ get_type_signedness (type_abbrev, section, type_data, end, type_cu_offset,
+ pointer_size, offset_size, dwarf_version,
+ is_signed, nesting + 1);
+ }
break;
case DW_AT_encoding:
@@ -2202,11 +2435,10 @@ read_and_display_attr_value (unsigned lo
case DW_FORM_ref_addr:
if (dwarf_version == 2)
SAFE_BYTE_GET_AND_INC (uvalue, data, pointer_size, end);
- else if (dwarf_version == 3 || dwarf_version == 4)
+ else if (dwarf_version > 2)
SAFE_BYTE_GET_AND_INC (uvalue, data, offset_size, end);
else
- error (_("Internal error: DWARF version is not 2, 3 or 4.\n"));
-
+ error (_("Internal error: DW_FORM_ref_addr is not supported in DWARF version 1.\n"));
break;
case DW_FORM_addr:
@@ -2271,12 +2503,12 @@ read_and_display_attr_value (unsigned lo
{
case DW_FORM_ref_addr:
if (!do_loc)
- printf ("%c<0x%s>", delimiter, dwarf_vmatoa ("x",uvalue));
+ printf ("%c<0x%s>", delimiter, dwarf_vmatoa ("x", uvalue));
break;
case DW_FORM_GNU_ref_alt:
if (!do_loc)
- printf ("%c<alt 0x%s>", delimiter, dwarf_vmatoa ("x",uvalue));
+ printf ("%c<alt 0x%s>", delimiter, dwarf_vmatoa ("x", uvalue));
/* FIXME: Follow the reference... */
break;
@@ -2662,9 +2894,18 @@ read_and_display_attr_value (unsigned lo
&& uvalue < (size_t) (end - start))
{
bfd_boolean is_signed = FALSE;
-
- get_type_signedness (start, start + uvalue, end, pointer_size,
- offset_size, dwarf_version, & is_signed, FALSE);
+ abbrev_entry * type_abbrev;
+ unsigned char * type_data;
+ unsigned long type_cu_offset;
+
+ type_abbrev = get_type_abbrev_from_form (form, uvalue, cu_offset,
+ section, NULL, & type_data, & type_cu_offset);
+ if (type_abbrev != NULL)
+ {
+ get_type_signedness (type_abbrev, section, type_data, end, type_cu_offset,
+ pointer_size, offset_size, dwarf_version,
+ & is_signed, 0);
+ }
level_type_signed[level] = is_signed;
}
break;
@@ -2986,40 +3227,22 @@ read_and_display_attr_value (unsigned lo
case DW_AT_import:
{
- if (form == DW_FORM_ref_sig8
- || form == DW_FORM_GNU_ref_alt)
- break;
+ unsigned long abbrev_number;
+ abbrev_entry *entry;
- if (form == DW_FORM_ref1
- || form == DW_FORM_ref2
- || form == DW_FORM_ref4
- || form == DW_FORM_ref_udata)
- uvalue += cu_offset;
-
- if (uvalue >= section->size)
- warn (_("Offset %s used as value for DW_AT_import attribute of DIE at offset 0x%lx is too big.\n"),
- dwarf_vmatoa ("x", uvalue),
- (unsigned long) (orig_data - section->start));
+ entry = get_type_abbrev_from_form (form, uvalue, cu_offset,
+ section, & abbrev_number, NULL, NULL);
+ if (entry == NULL)
+ {
+ if (form != DW_FORM_GNU_ref_alt)
+ warn (_("Offset %s used as value for DW_AT_import attribute of DIE at offset 0x%lx is too big.\n"),
+ dwarf_vmatoa ("x", uvalue),
+ (unsigned long) (orig_data - section->start));
+ }
else
{
- unsigned long abbrev_number;
- abbrev_entry *entry;
- unsigned char *p = section->start + uvalue;
-
- READ_ULEB (abbrev_number, p, end);
-
printf (_("\t[Abbrev Number: %ld"), abbrev_number);
- /* Don't look up abbrev for DW_FORM_ref_addr, as it very often will
- use different abbrev table, and we don't track .debug_info chunks
- yet. */
- if (form != DW_FORM_ref_addr)
- {
- for (entry = first_abbrev; entry != NULL; entry = entry->next)
- if (entry->entry == abbrev_number)
- break;
- if (entry != NULL)
- printf (" (%s)", get_TAG_name (entry->tag));
- }
+ printf (" (%s)", get_TAG_name (entry->tag));
printf ("]");
}
}
@@ -3238,8 +3461,100 @@ process_debug_info (struct dwarf_section
if (!do_loc && dwarf_start_die == 0)
introduce (section, FALSE);
+
+ free_all_abbrevs ();
+ free (cu_abbrev_map);
+ cu_abbrev_map = NULL;
+ next_free_abbrev_map_entry = 0;
- for (section_begin = start, unit = 0; start < end; unit++)
+ /* In order to be able to resolve DW_FORM_ref_attr forms we need
+ to load *all* of the abbrevs for all CUs in this .debug_info
+ section. This does effectively mean that we (partially) read
+ every CU header twice. */
+ for (section_begin = start; start < end;)
+ {
+ DWARF2_Internal_CompUnit compunit;
+ unsigned char * hdrptr;
+ dwarf_vma abbrev_base;
+ size_t abbrev_size;
+ dwarf_vma cu_offset;
+ unsigned int offset_size;
+ unsigned int initial_length_size;
+ struct cu_tu_set * this_set;
+ abbrev_list * list;
+
+ hdrptr = start;
+
+ SAFE_BYTE_GET_AND_INC (compunit.cu_length, hdrptr, 4, end);
+
+ if (compunit.cu_length == 0xffffffff)
+ {
+ SAFE_BYTE_GET_AND_INC (compunit.cu_length, hdrptr, 8, end);
+ offset_size = 8;
+ initial_length_size = 12;
+ }
+ else
+ {
+ offset_size = 4;
+ initial_length_size = 4;
+ }
+
+ SAFE_BYTE_GET_AND_INC (compunit.cu_version, hdrptr, 2, end);
+
+ cu_offset = start - section_begin;
+
+ this_set = find_cu_tu_set_v2 (cu_offset, do_types);
+
+ if (compunit.cu_version < 5)
+ {
+ compunit.cu_unit_type = DW_UT_compile;
+ /* Initialize it due to a false compiler warning. */
+ compunit.cu_pointer_size = -1;
+ }
+ else
+ {
+ SAFE_BYTE_GET_AND_INC (compunit.cu_unit_type, hdrptr, 1, end);
+ do_types = (compunit.cu_unit_type == DW_UT_type);
+
+ SAFE_BYTE_GET_AND_INC (compunit.cu_pointer_size, hdrptr, 1, end);
+ }
+
+ SAFE_BYTE_GET_AND_INC (compunit.cu_abbrev_offset, hdrptr, offset_size, end);
+
+ if (this_set == NULL)
+ {
+ abbrev_base = 0;
+ abbrev_size = debug_displays [abbrev_sec].section.size;
+ }
+ else
+ {
+ abbrev_base = this_set->section_offsets [DW_SECT_ABBREV];
+ abbrev_size = this_set->section_sizes [DW_SECT_ABBREV];
+ }
+
+ list = find_abbrev_list_by_abbrev_offset (abbrev_base,
+ compunit.cu_abbrev_offset);
+ if (list == NULL)
+ {
+ unsigned char * next;
+
+ list = new_abbrev_list (abbrev_base,
+ compunit.cu_abbrev_offset);
+ next = process_abbrev_set
+ (((unsigned char *) debug_displays [abbrev_sec].section.start
+ + abbrev_base + compunit.cu_abbrev_offset),
+ ((unsigned char *) debug_displays [abbrev_sec].section.start
+ + abbrev_base + abbrev_size),
+ list);
+ list->start_of_next_abbrevs = next;
+ }
+
+ start = section_begin + cu_offset + compunit.cu_length
+ + initial_length_size;
+ record_abbrev_list_for_cu (cu_offset, start - section_begin, list);
+ }
+
+ for (start = section_begin, unit = 0; start < end; unit++)
{
DWARF2_Internal_CompUnit compunit;
unsigned char *hdrptr;
@@ -3255,6 +3570,7 @@ process_debug_info (struct dwarf_section
struct cu_tu_set *this_set;
dwarf_vma abbrev_base;
size_t abbrev_size;
+ abbrev_list * list = NULL;
hdrptr = start;
@@ -3361,6 +3677,10 @@ process_debug_info (struct dwarf_section
dwarf_vmatoa ("x", compunit.cu_length),
offset_size == 8 ? "64-bit" : "32-bit");
printf (_(" Version: %d\n"), compunit.cu_version);
+ if (compunit.cu_version >= 5)
+ printf (_(" Unit Type: %s (%x)\n"),
+ get_DW_UT_name (compunit.cu_unit_type) ?: "???",
+ compunit.cu_unit_type);
printf (_(" Abbrev Offset: 0x%s\n"),
dwarf_vmatoa ("x", compunit.cu_abbrev_offset));
printf (_(" Pointer Size: %d\n"), compunit.cu_pointer_size);
@@ -3419,6 +3739,7 @@ process_debug_info (struct dwarf_section
}
if (compunit.cu_unit_type != DW_UT_compile
+ && compunit.cu_unit_type != DW_UT_partial
&& compunit.cu_unit_type != DW_UT_type)
{
warn (_("CU at offset %s contains corrupt or "
@@ -3427,8 +3748,6 @@ process_debug_info (struct dwarf_section
continue;
}
- free_abbrevs ();
-
/* Process the abbrevs used by this compilation unit. */
if (compunit.cu_abbrev_offset >= abbrev_size)
warn (_("Debug info is corrupted, abbrev offset (%lx) is larger than abbrev section size (%lx)\n"),
@@ -3441,11 +3760,24 @@ process_debug_info (struct dwarf_section
(unsigned long) abbrev_base + abbrev_size,
(unsigned long) debug_displays [abbrev_sec].section.size);
else
- process_abbrev_section
- (((unsigned char *) debug_displays [abbrev_sec].section.start
- + abbrev_base + compunit.cu_abbrev_offset),
- ((unsigned char *) debug_displays [abbrev_sec].section.start
- + abbrev_base + abbrev_size));
+ {
+ list = find_abbrev_list_by_abbrev_offset (abbrev_base,
+ compunit.cu_abbrev_offset);
+ if (list == NULL)
+ {
+ unsigned char * next;
+
+ list = new_abbrev_list (abbrev_base,
+ compunit.cu_abbrev_offset);
+ next = process_abbrev_set
+ (((unsigned char *) debug_displays [abbrev_sec].section.start
+ + abbrev_base + compunit.cu_abbrev_offset),
+ ((unsigned char *) debug_displays [abbrev_sec].section.start
+ + abbrev_base + abbrev_size),
+ list);
+ list->start_of_next_abbrevs = next;
+ }
+ }
level = 0;
last_level = level;
@@ -3525,11 +3857,13 @@ process_debug_info (struct dwarf_section
/* Scan through the abbreviation list until we reach the
correct entry. */
- for (entry = first_abbrev;
- entry && entry->entry != abbrev_number;
- entry = entry->next)
+ if (list == NULL)
continue;
+ for (entry = list->first_abbrev; entry != NULL; entry = entry->next)
+ if (entry->number == abbrev_number)
+ break;
+
if (entry == NULL)
{
if (!do_loc && do_printing)
@@ -5714,30 +6048,37 @@ display_debug_abbrev (struct dwarf_secti
{
abbrev_entry *entry;
unsigned char *start = section->start;
- unsigned char *end = start + section->size;
+ const unsigned char *end = start + section->size;
introduce (section, FALSE);
do
{
- unsigned char *last;
-
- free_abbrevs ();
+ abbrev_list * list;
+ dwarf_vma offset;
- last = start;
- start = process_abbrev_section (start, end);
+ offset = start - section->start;
+ list = find_abbrev_list_by_abbrev_offset (0, offset);
+ if (list == NULL)
+ {
+ list = new_abbrev_list (0, offset);
+ start = process_abbrev_set (start, end, list);
+ list->start_of_next_abbrevs = start;
+ }
+ else
+ start = list->start_of_next_abbrevs;
- if (first_abbrev == NULL)
+ if (list->first_abbrev == NULL)
continue;
- printf (_(" Number TAG (0x%lx)\n"), (long) (last - section->start));
+ printf (_(" Number TAG (0x%lx)\n"), (long) offset);
- for (entry = first_abbrev; entry; entry = entry->next)
+ for (entry = list->first_abbrev; entry; entry = entry->next)
{
abbrev_attr *attr;
printf (" %ld %s [%s]\n",
- entry->entry,
+ entry->number,
get_TAG_name (entry->tag),
entry->children ? _("has children") : _("no children"));
@@ -6013,7 +6354,9 @@ display_loclists_list (struct dwarf_sect
SAFE_BYTE_GET_AND_INC (llet, start, 1, section_end);
- if (vstart && llet == DW_LLE_offset_pair)
+ if (vstart && (llet == DW_LLE_offset_pair
+ || llet == DW_LLE_start_end
+ || llet == DW_LLE_start_length))
{
off = offset + (vstart - *start_ptr);
@@ -6034,7 +6377,18 @@ display_loclists_list (struct dwarf_sect
break;
case DW_LLE_offset_pair:
READ_ULEB (begin, start, section_end);
+ begin += base_address;
+ READ_ULEB (end, start, section_end);
+ end += base_address;
+ break;
+ case DW_LLE_start_end:
+ SAFE_BYTE_GET_AND_INC (begin, start, pointer_size, section_end);
+ SAFE_BYTE_GET_AND_INC (end, start, pointer_size, section_end);
+ break;
+ case DW_LLE_start_length:
+ SAFE_BYTE_GET_AND_INC (begin, start, pointer_size, section_end);
READ_ULEB (end, start, section_end);
+ end += begin;
break;
case DW_LLE_base_address:
SAFE_BYTE_GET_AND_INC (base_address, start, pointer_size,
@@ -6061,7 +6415,9 @@ display_loclists_list (struct dwarf_sect
}
if (llet == DW_LLE_end_of_list)
break;
- if (llet != DW_LLE_offset_pair)
+ if (llet != DW_LLE_offset_pair
+ && llet != DW_LLE_start_end
+ && llet != DW_LLE_start_length)
continue;
if (start + 2 > section_end)
@@ -6073,8 +6429,8 @@ display_loclists_list (struct dwarf_sect
READ_ULEB (length, start, section_end);
- print_dwarf_vma (begin + base_address, pointer_size);
- print_dwarf_vma (end + base_address, pointer_size);
+ print_dwarf_vma (begin, pointer_size);
+ print_dwarf_vma (end, pointer_size);
putchar ('(');
need_frame_base = decode_location_expression (start,
@@ -7082,8 +7438,15 @@ display_debug_rnglists_list (unsigned ch
if (rlet == DW_RLE_base_address)
continue;
- print_dwarf_vma (begin + base_address, pointer_size);
- print_dwarf_vma (end + base_address, pointer_size);
+ /* Only a DW_RLE_offset_pair needs the base address added. */
+ if (rlet == DW_RLE_offset_pair)
+ {
+ begin += base_address;
+ end += base_address;
+ }
+
+ print_dwarf_vma (begin, pointer_size);
+ print_dwarf_vma (end, pointer_size);
if (begin == end)
fputs (_("(start == end)"), stdout);
@@ -10747,8 +11110,12 @@ free_debug_memory (void)
{
unsigned int i;
- free_abbrevs ();
+ free_all_abbrevs ();
+ free (cu_abbrev_map);
+ cu_abbrev_map = NULL;
+ next_free_abbrev_map_entry = 0;
+
for (i = 0; i < max; i++)
free_debug_section ((enum dwarf_section_display_enum) i);
diff -rup binutils-2.35.1/binutils/readelf.c fred/binutils-2.35.1/binutils/readelf.c
--- binutils-2.35.1/binutils/readelf.c 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/binutils/readelf.c 2020-11-25 14:37:35.000000000 +0000
@@ -12091,9 +12091,9 @@ print_dynamic_symbol (Filedata *filedata
int len_avail = 21;
if (! do_wide && version_string != NULL)
{
- char buffer[256];
+ char buffer[16];
- len_avail -= sprintf (buffer, "@%s", version_string);
+ len_avail -= 1 + strlen (version_string);
if (sym_info == symbol_undefined)
len_avail -= sprintf (buffer," (%d)", vna_other);
diff -rup binutils-2.35.1/binutils/testsuite/binutils-all/dw5.W fred/binutils-2.35.1/binutils/testsuite/binutils-all/dw5.W
--- binutils-2.35.1/binutils/testsuite/binutils-all/dw5.W 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/binutils/testsuite/binutils-all/dw5.W 2020-11-25 14:37:36.000000000 +0000
@@ -3,6 +3,7 @@ Contents of the .debug_info section:
Compilation Unit @ offset 0x0:
Length: 0x160 \(32-bit\)
Version: 5
+ Unit Type: DW_UT_compile \(1\)
Abbrev Offset: 0x0
Pointer Size: 8
<0><c>: Abbrev Number: 6 \(DW_TAG_compile_unit\)
diff -rup binutils-2.35.1/binutils/testsuite/binutils-all/dwarf-attributes.W fred/binutils-2.35.1/binutils/testsuite/binutils-all/dwarf-attributes.W
--- binutils-2.35.1/binutils/testsuite/binutils-all/dwarf-attributes.W 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/binutils/testsuite/binutils-all/dwarf-attributes.W 2020-11-25 14:37:36.000000000 +0000
@@ -3,6 +3,7 @@ Contents of the .debug_info section:
Compilation Unit @ offset 0x0:
Length: 0x40 \(32-bit\)
Version: 5
+ Unit Type: DW_UT_compile \(1\)
Abbrev Offset: 0x0
Pointer Size: 4
<0><c>: Abbrev Number: 1 \(User TAG value: 0x5555\)
diff -rup binutils-2.35.1/binutils/testsuite/binutils-all/x86-64/x86-64.exp fred/binutils-2.35.1/binutils/testsuite/binutils-all/x86-64/x86-64.exp
--- binutils-2.35.1/binutils/testsuite/binutils-all/x86-64/x86-64.exp 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/binutils/testsuite/binutils-all/x86-64/x86-64.exp 2020-11-25 14:37:37.000000000 +0000
@@ -27,3 +27,34 @@ foreach t $test_list {
verbose [file rootname $t]
run_dump_test [file rootname $t]
}
+
+set t $srcdir/$subdir/pr26808.dwp.bz2
+# We need to strip the ".bz2", but can leave the dirname.
+set test $subdir/[file tail $t]
+set testname [file rootname $test]
+verbose $testname
+if {[catch "system \"bzip2 -dc $t > $tempfile\""] != 0} {
+ untested "bzip2 -dc ($testname)"
+} else {
+ send_log "$READELF -wi $tempfile > tmpdir/pr26808.out 2> /dev/null\n"
+ verbose "$READELF -wi $tempfile > tmpdir/pr26808.out 2> /dev/null" 1
+ set got [catch "system \"$READELF -wi $tempfile > tmpdir/pr26808.out 2> /dev/null\""]
+
+ if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]]} then {
+ fail $testname
+ } else {
+ send_log "cmp tmpdir/pr26808.out $srcdir/$subdir/pr26808.dump\n"
+ verbose "cmp tmpdir/pr26808.out $srcdir/$subdir/pr26808.dump" 1
+ set status [remote_exec build cmp "tmpdir/pr26808.out $srcdir/$subdir/pr26808.dump"]
+ set exec_output [lindex $status 1]
+ set exec_output [prune_warnings $exec_output]
+
+ if [string match "" $exec_output] then {
+ pass "readelf -wi ($testname)"
+ } else {
+ send_log "$exec_output\n"
+ verbose "$exec_output" 1
+ fail "readelf -wi ($testname)"
+ }
+ }
+}
diff -rup binutils-2.35.1/elfcpp/dwarf.h fred/binutils-2.35.1/elfcpp/dwarf.h
--- binutils-2.35.1/elfcpp/dwarf.h 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/elfcpp/dwarf.h 2020-11-25 14:37:39.000000000 +0000
@@ -81,6 +81,11 @@ namespace elfcpp
#define DW_IDX_DUP(name, value) , name = value
#define DW_END_IDX };
+#define DW_FIRST_UT(name, value) enum dwarf_unit_type { \
+ name = value
+#define DW_UT(name, value) , name = value
+#define DW_END_UT };
+
#include "dwarf2.def"
#undef DW_FIRST_TAG
@@ -117,6 +122,10 @@ namespace elfcpp
#undef DW_IDX_DUP
#undef DW_END_IDX
+#undef DW_FIRST_UT
+#undef DW_UT
+#undef DW_END_UT
+
// Frame unwind information.
enum DW_EH_PE
diff -rup binutils-2.35.1/gas/config/tc-aarch64.c fred/binutils-2.35.1/gas/config/tc-aarch64.c
--- binutils-2.35.1/gas/config/tc-aarch64.c 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/config/tc-aarch64.c 2020-11-25 14:37:39.000000000 +0000
@@ -250,12 +250,6 @@ set_fatal_syntax_error (const char *erro
typedef struct
{
const char *template;
- unsigned long value;
-} asm_barrier_opt;
-
-typedef struct
-{
- const char *template;
uint32_t value;
} asm_nzcv;
@@ -3994,7 +3988,7 @@ static int
parse_barrier (char **str)
{
char *p, *q;
- const asm_barrier_opt *o;
+ const struct aarch64_name_value_pair *o;
p = q = *str;
while (ISALPHA (*q))
@@ -8936,6 +8930,25 @@ static const struct aarch64_cpu_option_t
| AARCH64_FEATURE_DOTPROD
| AARCH64_FEATURE_PROFILE),
"Neoverse N1"},
+ {"neoverse-n2", AARCH64_FEATURE (AARCH64_ARCH_V8_5,
+ AARCH64_FEATURE_BFLOAT16
+ | AARCH64_FEATURE_I8MM
+ | AARCH64_FEATURE_F16
+ | AARCH64_FEATURE_SVE
+ | AARCH64_FEATURE_SVE2
+ | AARCH64_FEATURE_SVE2_BITPERM
+ | AARCH64_FEATURE_MEMTAG
+ | AARCH64_FEATURE_RNG),
+ "Neoverse N2"},
+ {"neoverse-v1", AARCH64_FEATURE (AARCH64_ARCH_V8_4,
+ AARCH64_FEATURE_PROFILE
+ | AARCH64_FEATURE_CVADP
+ | AARCH64_FEATURE_SVE
+ | AARCH64_FEATURE_SSBS
+ | AARCH64_FEATURE_RNG
+ | AARCH64_FEATURE_F16
+ | AARCH64_FEATURE_BFLOAT16
+ | AARCH64_FEATURE_I8MM), "Neoverse V1"},
{"qdf24xx", AARCH64_FEATURE (AARCH64_ARCH_V8,
AARCH64_FEATURE_CRC | AARCH64_FEATURE_CRYPTO
| AARCH64_FEATURE_RDMA),
diff -rup binutils-2.35.1/gas/config/tc-arm.c fred/binutils-2.35.1/gas/config/tc-arm.c
--- binutils-2.35.1/gas/config/tc-arm.c 2020-08-14 08:14:39.000000000 +0100
+++ fred/binutils-2.35.1/gas/config/tc-arm.c 2020-11-25 14:37:39.000000000 +0000
@@ -5936,7 +5936,15 @@ parse_address_main (char **str, int i, i
if (skip_past_char (&p, '[') == FAIL)
{
- if (skip_past_char (&p, '=') == FAIL)
+ if (group_type == GROUP_MVE
+ && (reg = arm_reg_parse (&p, REG_TYPE_RN)) != FAIL)
+ {
+ /* [r0-r15] expected as argument but receiving r0-r15 without
+ [] brackets. */
+ inst.error = BAD_SYNTAX;
+ return PARSE_OPERAND_FAIL;
+ }
+ else if (skip_past_char (&p, '=') == FAIL)
{
/* Bare address - translate to PC-relative offset. */
inst.relocs[0].pc_rel = 1;
@@ -26506,14 +26514,14 @@ static const struct asm_opcode insns[] =
#define ARM_VARIANT & fpu_vfp_ext_v1
#undef THUMB_VARIANT
#define THUMB_VARIANT & arm_ext_v6t2
- mnCEF(vmla, _vmla, 3, (RNSDQMQ, oRNSDQMQ, RNSDQ_RNSC_MQ_RR), neon_mac_maybe_scalar),
- mnCEF(vmul, _vmul, 3, (RNSDQMQ, oRNSDQMQ, RNSDQ_RNSC_MQ_RR), neon_mul),
mcCE(fcpyd, eb00b40, 2, (RVD, RVD), vfp_dp_rd_rm),
#undef ARM_VARIANT
#define ARM_VARIANT & fpu_vfp_ext_v1xd
+ mnCEF(vmla, _vmla, 3, (RNSDQMQ, oRNSDQMQ, RNSDQ_RNSC_MQ_RR), neon_mac_maybe_scalar),
+ mnCEF(vmul, _vmul, 3, (RNSDQMQ, oRNSDQMQ, RNSDQ_RNSC_MQ_RR), neon_mul),
MNCE(vmov, 0, 1, (VMOV), neon_mov),
mcCE(fmrs, e100a10, 2, (RR, RVS), vfp_reg_from_sp),
mcCE(fmsr, e000a10, 2, (RVS, RR), vfp_sp_from_reg),
@@ -31587,6 +31595,16 @@ static const struct arm_cpu_option_table
ARM_CPU_OPT ("neoverse-n1", "Neoverse N1", ARM_ARCH_V8_2A,
ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD),
+ ARM_CPU_OPT ("neoverse-n2", "Neoverse N2", ARM_ARCH_V8_5A,
+ ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST
+ | ARM_EXT2_BF16
+ | ARM_EXT2_I8MM),
+ FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4),
+ ARM_CPU_OPT ("neoverse-v1", "Neoverse V1", ARM_ARCH_V8_4A,
+ ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST
+ | ARM_EXT2_BF16
+ | ARM_EXT2_I8MM),
+ FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4),
/* ??? XSCALE is really an architecture. */
ARM_CPU_OPT ("xscale", NULL, ARM_ARCH_XSCALE,
ARM_ARCH_NONE,
diff -rup binutils-2.35.1/gas/config/tc-i386.c fred/binutils-2.35.1/gas/config/tc-i386.c
--- binutils-2.35.1/gas/config/tc-i386.c 2020-08-10 08:20:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/config/tc-i386.c 2020-11-25 14:37:39.000000000 +0000
@@ -7115,6 +7115,23 @@ process_suffix (void)
unsigned int op;
enum { need_word, need_dword, need_qword } need;
+ /* Check the register operand for the address size prefix if
+ the memory operand has no real registers, like symbol, DISP
+ or symbol(%rip). */
+ if (i.mem_operands == 1
+ && i.reg_operands == 1
+ && i.operands == 2
+ && i.types[1].bitfield.class == Reg
+ && (flag_code == CODE_32BIT
+ ? i.op[1].regs->reg_type.bitfield.word
+ : i.op[1].regs->reg_type.bitfield.dword)
+ && ((i.base_reg == NULL && i.index_reg == NULL)
+ || (i.base_reg
+ && i.base_reg->reg_num == RegIP
+ && i.base_reg->reg_type.bitfield.qword))
+ && !add_prefix (ADDR_PREFIX_OPCODE))
+ return 0;
+
if (flag_code == CODE_32BIT)
need = i.prefix[ADDR_PREFIX] ? need_word : need_dword;
else if (i.prefix[ADDR_PREFIX])
diff -rup binutils-2.35.1/gas/config/tc-ppc.c fred/binutils-2.35.1/gas/config/tc-ppc.c
--- binutils-2.35.1/gas/config/tc-ppc.c 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/config/tc-ppc.c 2020-11-25 14:37:39.000000000 +0000
@@ -3335,6 +3335,15 @@ md_assemble (char *str)
}
insn = opcode->opcode;
+ if (!target_big_endian
+ && ((insn & ~(1 << 26)) == 46u << 26
+ || (insn & ~(0xc0 << 1)) == (31u << 26 | 533 << 1)))
+ {
+ /* lmw, stmw, lswi, lswx, stswi, stswx */
+ as_bad (_("`%s' invalid when little-endian"), str);
+ ppc_clear_labels ();
+ return;
+ }
str = s;
while (ISSPACE (*str))
diff -rup binutils-2.35.1/gas/doc/c-aarch64.texi fred/binutils-2.35.1/gas/doc/c-aarch64.texi
--- binutils-2.35.1/gas/doc/c-aarch64.texi 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/doc/c-aarch64.texi 2020-11-25 14:37:40.000000000 +0000
@@ -72,6 +72,8 @@ on the target processor. The following
@code{exynos-m1},
@code{falkor},
@code{neoverse-n1},
+@code{neoverse-n2},
+@code{neoverse-v1},
@code{neoverse-e1},
@code{qdf24xx},
@code{saphira},
diff -rup binutils-2.35.1/gas/doc/c-arm.texi fred/binutils-2.35.1/gas/doc/c-arm.texi
--- binutils-2.35.1/gas/doc/c-arm.texi 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/doc/c-arm.texi 2020-11-25 14:37:40.000000000 +0000
@@ -151,6 +151,8 @@ recognized:
@code{marvell-pj4},
@code{marvell-whitney},
@code{neoverse-n1},
+@code{neoverse-n2},
+@code{neoverse-v1},
@code{xgene1},
@code{xgene2},
@code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
diff -rup binutils-2.35.1/gas/dwarf2dbg.c fred/binutils-2.35.1/gas/dwarf2dbg.c
--- binutils-2.35.1/gas/dwarf2dbg.c 2020-09-15 09:11:49.000000000 +0100
+++ fred/binutils-2.35.1/gas/dwarf2dbg.c 2020-11-25 14:37:39.000000000 +0000
@@ -211,7 +211,6 @@ struct file_entry
{
const char * filename;
unsigned int dir;
- bfd_boolean auto_assigned;
unsigned char md5[NUM_MD5_BYTES];
};
@@ -219,6 +218,7 @@ struct file_entry
static struct file_entry *files;
static unsigned int files_in_use;
static unsigned int files_allocated;
+static unsigned int num_of_auto_assigned;
/* Table of directories used by .debug_line. */
static char ** dirs = NULL;
@@ -633,7 +633,7 @@ get_directory_table_entry (const char *
}
static bfd_boolean
-assign_file_to_slot (unsigned long i, const char *file, unsigned int dir, bfd_boolean auto_assign)
+assign_file_to_slot (unsigned long i, const char *file, unsigned int dir)
{
if (i >= files_allocated)
{
@@ -653,7 +653,6 @@ assign_file_to_slot (unsigned long i, co
files[i].filename = file;
files[i].dir = dir;
- files[i].auto_assigned = auto_assign;
memset (files[i].md5, 0, NUM_MD5_BYTES);
if (files_in_use < i + 1)
@@ -717,9 +716,11 @@ allocate_filenum (const char * pathname)
return i;
}
- if (!assign_file_to_slot (i, file, dir, TRUE))
+ if (!assign_file_to_slot (i, file, dir))
return -1;
+ num_of_auto_assigned++;
+
last_used = i;
last_used_dir_len = dir_len;
@@ -792,30 +793,15 @@ allocate_filename_to_slot (const char *
}
fail:
- /* If NUM was previously allocated automatically then
- choose another slot for it, so that we can reuse NUM. */
- if (files[num].auto_assigned)
- {
- /* Find an unused slot. */
- for (i = 1; i < files_in_use; ++i)
- if (files[i].filename == NULL)
- break;
- if (! assign_file_to_slot (i, files[num].filename, files[num].dir, TRUE))
- return FALSE;
- files[num].filename = NULL;
- }
- else
- {
- as_bad (_("file table slot %u is already occupied by a different file (%s%s%s vs %s%s%s)"),
- num,
- dir == NULL ? "" : dir,
- dir == NULL ? "" : "/",
- files[num].filename,
- dirname == NULL ? "" : dirname,
- dirname == NULL ? "" : "/",
- filename);
- return FALSE;
- }
+ as_bad (_("file table slot %u is already occupied by a different file (%s%s%s vs %s%s%s)"),
+ num,
+ dir == NULL ? "" : dir,
+ dir == NULL ? "" : "/",
+ files[num].filename,
+ dirname == NULL ? "" : dirname,
+ dirname == NULL ? "" : "/",
+ filename);
+ return FALSE;
}
if (dirname == NULL)
@@ -833,7 +819,7 @@ allocate_filename_to_slot (const char *
d = get_directory_table_entry (dirname, dirlen, num == 0);
i = num;
- if (! assign_file_to_slot (i, file, d, FALSE))
+ if (! assign_file_to_slot (i, file, d))
return FALSE;
if (with_md5)
@@ -1030,6 +1016,7 @@ dwarf2_directive_filename (void)
char *filename;
const char * dirname = NULL;
int filename_len;
+ unsigned int i;
/* Continue to accept a bare string and pass it off. */
SKIP_WHITESPACE ();
@@ -1096,6 +1083,18 @@ dwarf2_directive_filename (void)
return NULL;
}
+ if (num_of_auto_assigned)
+ {
+ /* Clear slots auto-assigned before the first .file <NUMBER>
+ directive was seen. */
+ if (files_in_use != (num_of_auto_assigned + 1))
+ abort ();
+ for (i = 1; i < files_in_use; i++)
+ files[i].filename = NULL;
+ files_in_use = 0;
+ num_of_auto_assigned = 0;
+ }
+
if (! allocate_filename_to_slot (dirname, filename, (unsigned int) num,
with_md5))
return NULL;
diff -rup binutils-2.35.1/gas/testsuite/gas/aarch64/system.d fred/binutils-2.35.1/gas/testsuite/gas/aarch64/system.d
--- binutils-2.35.1/gas/testsuite/gas/aarch64/system.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/aarch64/system.d 2020-11-25 14:37:40.000000000 +0000
@@ -190,6 +190,7 @@ Disassembly of section \.text:
.*: d5033edf isb #0xe
.*: d5033fdf isb
.*: d5033fdf isb
+.*: d5033fdf isb
.*: d503309f ssbb
.*: d503349f pssbb
.*: d8000000 prfm pldl1keep, 0 <LABEL1>
diff -rup binutils-2.35.1/gas/testsuite/gas/aarch64/system.s fred/binutils-2.35.1/gas/testsuite/gas/aarch64/system.s
--- binutils-2.35.1/gas/testsuite/gas/aarch64/system.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/aarch64/system.s 2020-11-25 14:37:40.000000000 +0000
@@ -44,6 +44,7 @@
all_barriers op=isb, from=0, to=15
isb
+ isb sy
ssbb
pssbb
diff -rup binutils-2.35.1/gas/testsuite/gas/elf/dwarf-5-cu.d fred/binutils-2.35.1/gas/testsuite/gas/elf/dwarf-5-cu.d
--- binutils-2.35.1/gas/testsuite/gas/elf/dwarf-5-cu.d 2020-08-25 11:21:34.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/elf/dwarf-5-cu.d 2020-11-25 14:37:42.000000000 +0000
@@ -6,6 +6,7 @@
Compilation Unit @ offset 0x0:
Length: 0x.*
Version: 5
+ Unit Type: DW_UT_compile \(1\)
Abbrev Offset: 0x0
Pointer Size: .
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/enqcmd-intel.d fred/binutils-2.35.1/gas/testsuite/gas/i386/enqcmd-intel.d
--- binutils-2.35.1/gas/testsuite/gas/i386/enqcmd-intel.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/enqcmd-intel.d 2020-11-25 14:37:42.000000000 +0000
@@ -8,13 +8,21 @@
Disassembly of section \.text:
-00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds ax,\[si\]
+0+ <_start>:
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd eax,\[ecx\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd ax,\[si\]
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds eax,\[ecx\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds ax,\[si\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd cx,ds:0x0
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd cx,ds:0x1234
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds cx,ds:0x0
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds cx,ds:0x1234
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd eax,\[ecx\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd ax,\[si\]
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds eax,\[ecx\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds ax,\[si\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd cx,ds:0x0
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd cx,ds:0x1234
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds cx,ds:0x0
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds cx,ds:0x1234
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/enqcmd.d fred/binutils-2.35.1/gas/testsuite/gas/i386/enqcmd.d
--- binutils-2.35.1/gas/testsuite/gas/i386/enqcmd.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/enqcmd.d 2020-11-25 14:37:42.000000000 +0000
@@ -8,13 +8,21 @@
Disassembly of section \.text:
-00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds \(%si\),%ax
+0+ <_start>:
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
+ +[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd \(%si\),%ax
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+ +[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds \(%si\),%ax
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd 0x0,%cx
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd 0x1234,%cx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds 0x0,%cx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds 0x1234,%cx
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
+ +[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd \(%si\),%ax
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+ +[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds \(%si\),%ax
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd 0x0,%cx
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd 0x1234,%cx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds 0x0,%cx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds 0x1234,%cx
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/enqcmd.s fred/binutils-2.35.1/gas/testsuite/gas/i386/enqcmd.s
--- binutils-2.35.1/gas/testsuite/gas/i386/enqcmd.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/enqcmd.s 2020-11-25 14:37:42.000000000 +0000
@@ -7,9 +7,17 @@ _start:
enqcmd (%si),%ax
enqcmds (%ecx),%eax
enqcmds (%si),%ax
+ enqcmd foo, %cx
+ enqcmd 0x1234, %cx
+ enqcmds foo, %cx
+ enqcmds 0x1234, %cx
.intel_syntax noprefix
enqcmd eax,[ecx]
enqcmd ax,[si]
enqcmds eax,[ecx]
enqcmds ax,[si]
+ enqcmd cx,ds:foo
+ enqcmd cx,ds:0x1234
+ enqcmds cx,ds:foo
+ enqcmds cx,ds:0x1234
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/evex-no-scale-64.d fred/binutils-2.35.1/gas/testsuite/gas/i386/evex-no-scale-64.d
--- binutils-2.35.1/gas/testsuite/gas/i386/evex-no-scale-64.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/evex-no-scale-64.d 2020-11-25 14:37:42.000000000 +0000
@@ -10,5 +10,5 @@ Disassembly of section .text:
+[a-f0-9]+: 62 f1 7c 48 28 04 05 40 00 00 00 vmovaps 0x40\(,%rax,1\),%zmm0
+[a-f0-9]+: 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0
+[a-f0-9]+: 67 62 f1 7c 48 28 04 05 40 00 00 00 vmovaps 0x40\(,%eax,1\),%zmm0
- +[a-f0-9]+: 67 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0
+ +[a-f0-9]+: 67 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40\(,%eiz,1\),%zmm0
+[a-f0-9]+: 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/i386.exp fred/binutils-2.35.1/gas/testsuite/gas/i386/i386.exp
--- binutils-2.35.1/gas/testsuite/gas/i386/i386.exp 2020-09-15 09:11:49.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/i386.exp 2020-11-25 14:37:42.000000000 +0000
@@ -475,9 +475,11 @@ if [expr ([istarget "i*86-*-*"] || [ist
run_dump_test "cldemote-intel"
run_dump_test "movdir"
run_dump_test "movdir-intel"
+ run_dump_test "movdir-16bit"
run_list_test "movdir64b-reg"
run_dump_test "enqcmd"
run_dump_test "enqcmd-intel"
+ run_dump_test "enqcmd-16bit"
run_list_test "enqcmd-inval"
run_dump_test "serialize"
run_dump_test "tsxldtrk"
@@ -594,6 +596,10 @@ if [expr ([istarget "i*86-*-*"] || [ist
run_dump_test "dwarf2-line-2"
run_dump_test "dwarf2-line-3"
run_dump_test "dwarf2-line-4"
+ run_dump_test "dwarf4-line-1"
+ run_dump_test "dwarf5-line-1"
+ run_dump_test "dwarf5-line-2"
+ run_dump_test "dwarf5-line-3"
run_dump_test "dw2-compress-2"
run_dump_test "dw2-compressed-2"
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/movdir-intel.d fred/binutils-2.35.1/gas/testsuite/gas/i386/movdir-intel.d
--- binutils-2.35.1/gas/testsuite/gas/i386/movdir-intel.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/movdir-intel.d 2020-11-25 14:37:42.000000000 +0000
@@ -8,19 +8,16 @@
Disassembly of section \.text:
-00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri DWORD PTR \[bx\+di\],eax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b ax,\[bx\+di\]
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 67[ ]*movdir64b eax,\[edi\+eiz\*2\]
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
-[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri DWORD PTR \[bx\+di\],eax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b ax,\[bx\+di\]
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 90[ ]*movdir64b eax,\[eax\+edx\*4\]
+0+ <_start>:
+ +[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[ecx\],eax
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b eax,\[ecx\]
+ +[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b ax,\[si\]
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b cx,ds:0x0
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b cx,ds:0x1234
+ +[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[ecx\],eax
+ +[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[ecx\],eax
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b eax,\[ecx\]
+ +[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b ax,\[si\]
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b cx,ds:0x0
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b cx,ds:0x1234
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/movdir.d fred/binutils-2.35.1/gas/testsuite/gas/i386/movdir.d
--- binutils-2.35.1/gas/testsuite/gas/i386/movdir.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/movdir.d 2020-11-25 14:37:42.000000000 +0000
@@ -8,19 +8,16 @@
Disassembly of section \.text:
-00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri %eax,\(%bx,%di\)
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%bx,%di\),%ax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 67[ ]*movdir64b \(%edi,%eiz,2\),%eax
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
-[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri %eax,\(%bx,%di\)
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%bx,%di\),%ax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 90[ ]*movdir64b \(%eax,%edx,4\),%eax
+0+ <_start>:
+ +[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+ +[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/movdir.s fred/binutils-2.35.1/gas/testsuite/gas/i386/movdir.s
--- binutils-2.35.1/gas/testsuite/gas/i386/movdir.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/movdir.s 2020-11-25 14:37:42.000000000 +0000
@@ -3,19 +3,16 @@
.allow_index_reg
.text
_start:
- .rept 2
movdiri %eax, (%ecx)
movdir64b (%ecx),%eax
movdir64b (%si),%ax
+ movdir64b foo, %cx
+ movdir64b 0x1234, %cx
.intel_syntax noprefix
movdiri [ecx], eax
movdiri dword ptr [ecx], eax
movdir64b eax,[ecx]
movdir64b ax,[si]
-
- .att_syntax prefix
- .code16
- .endr
-
- nop
+ movdir64b cx,ds:foo
+ movdir64b cx,ds:0x1234
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/x86-64-addr32-intel.d fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-addr32-intel.d
--- binutils-2.35.1/gas/testsuite/gas/i386/x86-64-addr32-intel.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-addr32-intel.d 2020-11-25 14:37:42.000000000 +0000
@@ -11,15 +11,15 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[eax\+0x0\].*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[r8d\+0x0\].*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+rax,\[eip\+0x0\].*
-[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 lea[ ]+rax,ds:0x0 .*
+[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 lea[ ]+rax,\[eiz\*1\+0x0\].*
[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898
[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898
[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov eax,ds:0x600898
[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898
[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898
-[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+rbx,QWORD PTR ds:0x800898
+[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x800898\]
[ ]*[a-f0-9]+: 67 48 a1 ef cd ab 89 addr32 mov rax,ds:0x89abcdef
-[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+rbx,QWORD PTR ds:0x89abcdef
+[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x89abcdef\]
[ ]*[a-f0-9]+: 67 48 b8 ef cd ab 89 00 00 00 00 addr32 movabs rax,0x89abcdef
[ ]*[a-f0-9]+: 67 48 bb ef cd ab 89 00 00 00 00 addr32 movabs rbx,0x89abcdef
[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al
@@ -27,9 +27,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax
[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax
[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax
-[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+QWORD PTR ds:0x800898,rbx
+[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+QWORD PTR \[eiz\*1\+0x800898\],rbx
[ ]*[a-f0-9]+: 67 48 a3 ef cd ab 89 addr32 mov ds:0x89abcdef,rax
-[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+QWORD PTR ds:0x89abcdef,rbx
-[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+DWORD PTR ds:0xff332211,eax
+[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+QWORD PTR \[eiz\*1\+0x89abcdef\],rbx
+[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*1\+0xff332211\],eax
[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*2\+0xff332211\],eax
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/x86-64-addr32.d fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-addr32.d
--- binutils-2.35.1/gas/testsuite/gas/i386/x86-64-addr32.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-addr32.d 2020-11-25 14:37:42.000000000 +0000
@@ -10,15 +10,15 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%eax\),%rax.*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%r8d\),%rax.*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+0x0\(%eip\),%rax.*
-[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+lea[ ]+0x0,%rax.*
+[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+lea[ ]+0x0\(,%eiz,1\),%rax.*
[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al
[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax
[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax
[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax
[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax
-[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+0x800898,%rbx
+[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+0x800898\(,%eiz,1\),%rbx
[ ]*[a-f0-9]+: 67 48 a1 ef cd ab 89 addr32 mov 0x89abcdef,%rax
-[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+0x89abcdef,%rbx
+[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+0x89abcdef\(,%eiz,1\),%rbx
[ ]*[a-f0-9]+: 67 48 b8 ef cd ab 89 00 00 00 00 addr32 movabs \$0x89abcdef,%rax
[ ]*[a-f0-9]+: 67 48 bb ef cd ab 89 00 00 00 00 addr32 movabs \$0x89abcdef,%rbx
[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898
@@ -26,9 +26,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898
[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898
[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898
-[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+%rbx,0x800898
+[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+%rbx,0x800898\(,%eiz,1\)
[ ]*[a-f0-9]+: 67 48 a3 ef cd ab 89 addr32 mov %rax,0x89abcdef
-[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+%rbx,0x89abcdef
-[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+%eax,0xff332211
+[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+%rbx,0x89abcdef\(,%eiz,1\)
+[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+%eax,0xff332211\(,%eiz,1\)
[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+%eax,0xff332211\(,%eiz,2\)
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd-intel.d fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd-intel.d
--- binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd-intel.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd-intel.d 2020-11-25 14:37:42.000000000 +0000
@@ -9,12 +9,32 @@
Disassembly of section \.text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd rax,\[rcx\]
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds rax,\[rcx\]
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd rax,\[rcx\]
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds rax,\[rcx\]
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd rax,\[rcx\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd eax,\[ecx\]
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds rax,\[rcx\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds eax,\[ecx\]
+ +[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd rcx,\[rip\+0x0\] #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
+ +[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd ecx,\[eiz\*1\+0x12345678\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds ecx,\[eiz\*1\+0x12345678\]
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd rax,\[rcx\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd eax,\[ecx\]
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds rax,\[rcx\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds eax,\[ecx\]
+ +[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd rcx,\[rip\+0x0\] #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
+ +[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd ecx,\[eiz\*1\+0x12345678\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds ecx,\[eiz\*1\+0x12345678\]
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd.d fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd.d
--- binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd.d 2020-11-25 14:37:42.000000000 +0000
@@ -9,12 +9,32 @@
Disassembly of section \.text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%rcx\),%rax
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%rcx\),%rax
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%rcx\),%rax
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%rcx\),%rax
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%rcx\),%rax
+ +[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%rcx\),%rax
+ +[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+ +[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%rip\),%rcx #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
+ +[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds 0x12345678\(,%eiz,1\),%ecx
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%rcx\),%rax
+ +[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%rcx\),%rax
+ +[a-f0-9]+: 67 f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+ +[a-f0-9]+: f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%rip\),%rcx #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0d 00 00 00 00 enqcmd 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
+ +[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds 0x12345678\(,%eiz,1\),%ecx
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd.s fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd.s
--- binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-enqcmd.s 2020-11-25 14:37:42.000000000 +0000
@@ -7,9 +7,29 @@ _start:
enqcmd (%ecx),%eax
enqcmds (%rcx),%rax
enqcmds (%ecx),%eax
+ enqcmd foo(%rip),%rcx
+ enqcmd foo(%rip),%ecx
+ enqcmd foo(%eip),%ecx
+ enqcmds foo(%rip),%rcx
+ enqcmds foo(%rip),%ecx
+ enqcmds foo(%eip),%ecx
+ enqcmd foo, %ecx
+ enqcmd 0x12345678, %ecx
+ enqcmds foo, %ecx
+ enqcmds 0x12345678, %ecx
.intel_syntax noprefix
enqcmd rax,[rcx]
enqcmd eax,[ecx]
enqcmds rax,[rcx]
enqcmds eax,[ecx]
+ enqcmd rcx,[rip+foo]
+ enqcmd ecx,[rip+foo]
+ enqcmd ecx,[eip+foo]
+ enqcmds rcx,[rip+foo]
+ enqcmds ecx,[rip+foo]
+ enqcmds ecx,[eip+foo]
+ enqcmd ecx,ds:foo
+ enqcmd ecx,ds:0x12345678
+ enqcmds ecx,ds:foo
+ enqcmds ecx,ds:0x12345678
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir-intel.d fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir-intel.d
--- binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir-intel.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir-intel.d 2020-11-25 14:37:42.000000000 +0000
@@ -9,13 +9,23 @@
Disassembly of section \.text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri QWORD PTR \[rcx\],rax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b rax,\[rcx\]
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b eax,\[ecx]
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[rcx\],eax
-[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri QWORD PTR \[rcx\],rax
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[rcx\],eax
-[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri QWORD PTR \[rcx\],rax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b rax,\[rcx\]
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
+ +[a-f0-9]+: 48 0f 38 f9 01 movdiri QWORD PTR \[rcx\],rax
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b rax,\[rcx\]
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b eax,\[ecx\]
+ +[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b ecx,\[eiz\*1\+0x12345678\]
+ +[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[rcx\],eax
+ +[a-f0-9]+: 48 0f 38 f9 01 movdiri QWORD PTR \[rcx\],rax
+ +[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[rcx\],eax
+ +[a-f0-9]+: 48 0f 38 f9 01 movdiri QWORD PTR \[rcx\],rax
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b rax,\[rcx\]
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b eax,\[ecx\]
+ +[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b ecx,\[eiz\*1\+0x12345678\]
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir.d fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir.d
--- binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir.d 2020-11-25 14:37:42.000000000 +0000
@@ -9,13 +9,23 @@
Disassembly of section \.text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%rcx\),%rax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%rcx\)
-[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%rcx\)
-[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%rcx\),%rax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%rcx\),%rax
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
+ +[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
+ +[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
+ +[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%rcx\),%rax
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir.s fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir.s
--- binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/i386/x86-64-movdir.s 2020-11-25 14:37:42.000000000 +0000
@@ -6,6 +6,11 @@ _start:
movdiri %rax, (%rcx)
movdir64b (%rcx),%rax
movdir64b (%ecx),%eax
+ movdir64b foo(%rip),%rcx
+ movdir64b foo(%rip),%ecx
+ movdir64b foo(%eip),%ecx
+ movdir64b foo, %ecx
+ movdir64b 0x12345678, %ecx
.intel_syntax noprefix
movdiri [rcx],eax
@@ -14,3 +19,8 @@ _start:
movdiri qword ptr [rcx],rax
movdir64b rax,[rcx]
movdir64b eax,[ecx]
+ movdir64b rcx,[rip+foo]
+ movdir64b ecx,[rip+foo]
+ movdir64b ecx,[eip+foo]
+ movdir64b ecx,ds:foo
+ movdir64b ecx,ds:0x12345678
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/476.d fred/binutils-2.35.1/gas/testsuite/gas/ppc/476.d
--- binutils-2.35.1/gas/testsuite/gas/ppc/476.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/476.d 2020-11-25 14:37:47.000000000 +0000
@@ -7,491 +7,485 @@
Disassembly of section \.text:
0+00 <ppc476>:
- 0: (7c 64 2a 14|14 2a 64 7c) add r3,r4,r5
- 4: (7c 64 2a 15|15 2a 64 7c) add\. r3,r4,r5
- 8: (7c 64 28 14|14 28 64 7c) addc r3,r4,r5
- c: (7c 64 28 15|15 28 64 7c) addc\. r3,r4,r5
- 10: (7c 64 2c 14|14 2c 64 7c) addco r3,r4,r5
- 14: (7c 64 2c 15|15 2c 64 7c) addco\. r3,r4,r5
- 18: (7c 64 29 14|14 29 64 7c) adde r3,r4,r5
- 1c: (7c 64 29 15|15 29 64 7c) adde\. r3,r4,r5
- 20: (7c 64 2d 14|14 2d 64 7c) addeo r3,r4,r5
- 24: (7c 64 2d 15|15 2d 64 7c) addeo\. r3,r4,r5
- 28: (38 64 ff 80|80 ff 64 38) addi r3,r4,-128
- 2c: (30 64 ff 80|80 ff 64 30) addic r3,r4,-128
- 30: (34 64 ff 80|80 ff 64 34) addic\. r3,r4,-128
- 34: (3c 64 ff 80|80 ff 64 3c) addis r3,r4,-128
- 38: (7c 64 01 d4|d4 01 64 7c) addme r3,r4
- 3c: (7c 64 01 d5|d5 01 64 7c) addme\. r3,r4
- 40: (7c 64 05 d4|d4 05 64 7c) addmeo r3,r4
- 44: (7c 64 05 d5|d5 05 64 7c) addmeo\. r3,r4
- 48: (7c 64 2e 14|14 2e 64 7c) addo r3,r4,r5
- 4c: (7c 64 2e 15|15 2e 64 7c) addo\. r3,r4,r5
- 50: (7c 64 01 94|94 01 64 7c) addze r3,r4
- 54: (7c 64 01 95|95 01 64 7c) addze\. r3,r4
- 58: (7c 64 05 94|94 05 64 7c) addzeo r3,r4
- 5c: (7c 64 05 95|95 05 64 7c) addzeo\. r3,r4
- 60: (7c 83 28 38|38 28 83 7c) and r3,r4,r5
- 64: (7c 83 28 39|39 28 83 7c) and\. r3,r4,r5
- 68: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15
- 6c: (7e 30 90 79|79 90 30 7e) andc\. r16,r17,r18
- 70: (70 83 de ad|ad de 83 70) andi\. r3,r4,57005
- 74: (74 83 de ad|ad de 83 74) andis\. r3,r4,57005
- 78: (48 00 00 02|02 00 00 48) ba 0 <ppc476>
- 7c: (40 01 00 00|00 00 01 40) bdnzf gt,7c <ppc476\+0x7c>
- 80: (40 85 00 02|02 00 85 40) blea cr1,0 <ppc476>
- 84: (4d 80 04 20|20 04 80 4d) bltctr
- 88: (4c 8a 04 20|20 04 8a 4c) bnectr cr2
- 8c: (4c 86 04 20|20 04 86 4c) bnectr cr1
- 90: (4c 86 04 20|20 04 86 4c) bnectr cr1
- 94: (4d 80 04 21|21 04 80 4d) bltctrl
- 98: (4c 8a 04 21|21 04 8a 4c) bnectrl cr2
- 9c: (4c 86 04 21|21 04 86 4c) bnectrl cr1
- a0: (4c 86 04 21|21 04 86 4c) bnectrl cr1
- a4: (40 43 00 01|01 00 43 40) bdzfl so,a4 <ppc476\+0xa4>
- a8: (4d 80 00 20|20 00 80 4d) bltlr
- ac: (4c 8a 00 20|20 00 8a 4c) bnelr cr2
- b0: (4c 86 00 20|20 00 86 4c) bnelr cr1
- b4: (4c 86 00 20|20 00 86 4c) bnelr cr1
- b8: (4d 80 00 21|21 00 80 4d) bltlrl
- bc: (4c 8a 00 21|21 00 8a 4c) bnelrl cr2
- c0: (4c 86 00 21|21 00 86 4c) bnelrl cr1
- c4: (4c 86 00 21|21 00 86 4c) bnelrl cr1
- c8: (48 00 00 00|00 00 00 48) b c8 <ppc476\+0xc8>
- cc: (48 00 00 01|01 00 00 48) bl cc <ppc476\+0xcc>
- d0: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27
- d4: (7c 03 20 00|00 20 03 7c) cmpw r3,r4
- d8: (7f 83 20 00|00 20 83 7f) cmpw cr7,r3,r4
- dc: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
- e0: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
- e4: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167
- e8: (2f 83 ff 59|59 ff 83 2f) cmpwi cr7,r3,-167
- ec: (7c 03 20 40|40 20 03 7c) cmplw r3,r4
- f0: (7f 83 20 40|40 20 83 7f) cmplw cr7,r3,r4
- f4: (28 03 00 a7|a7 00 03 28) cmplwi r3,167
- f8: (2b 83 00 a7|a7 00 83 2b) cmplwi cr7,r3,167
- fc: (7c 03 20 40|40 20 03 7c) cmplw r3,r4
- 100: (28 03 00 a7|a7 00 03 28) cmplwi r3,167
- 104: (7c 03 20 00|00 20 03 7c) cmpw r3,r4
- 108: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167
- 10c: (7d 6a 00 34|34 00 6a 7d) cntlzw r10,r11
- 110: (7d 6a 00 35|35 00 6a 7d) cntlzw\. r10,r11
- 114: (4c 85 32 02|02 32 85 4c) crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq
- 118: (4c 64 29 02|02 29 64 4c) crandc so,4\*cr1\+lt,4\*cr1\+gt
- 11c: (4c e0 0a 42|42 0a e0 4c) creqv 4\*cr1\+so,lt,gt
- 120: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so
- 124: (4c 01 10 42|42 10 01 4c) crnor lt,gt,eq
- 128: (4c a6 3b 82|82 3b a6 4c) cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so
- 12c: (4c 43 23 42|42 23 43 4c) crorc eq,so,4\*cr1\+lt
- 130: (4c c7 01 82|82 01 c7 4c) crxor 4\*cr1\+eq,4\*cr1\+so,lt
- 134: (7c 09 55 ec|ec 55 09 7c) dcba r9,r10
- 138: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7
- 13c: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7
- 140: (7c 06 3b ac|ac 3b 06 7c) dcbi r6,r7
- 144: (7c 85 33 0c|0c 33 85 7c) dcblc 4,r5,r6
- 148: (7c 06 38 6c|6c 38 06 7c) dcbst r6,r7
- 14c: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
- 150: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
- 154: (7d 05 32 2c|2c 32 05 7d) dcbt 8,r5,r6
- 158: (7c e8 49 4c|4c 49 e8 7c) dcbtls 7,r8,r9
- 15c: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7
- 160: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7
- 164: (7d 26 39 ec|ec 39 26 7d) dcbtst 9,r6,r7
- 168: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12
- 16c: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2
- 170: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6
- 174: (7c 00 03 8c|8c 03 00 7c) dccci
- 178: (7c 00 03 8c|8c 03 00 7c) dccci
- 17c: (7c 00 03 8c|8c 03 00 7c) dccci
- 180: (7c 20 03 8c|8c 03 20 7c) dci 1
- 184: (7d 4b 63 d6|d6 63 4b 7d) divw r10,r11,r12
- 188: (7d 6c 6b d7|d7 6b 6c 7d) divw\. r11,r12,r13
- 18c: (7d 4b 67 d6|d6 67 4b 7d) divwo r10,r11,r12
- 190: (7d 6c 6f d7|d7 6f 6c 7d) divwo\. r11,r12,r13
- 194: (7d 4b 63 96|96 63 4b 7d) divwu r10,r11,r12
- 198: (7d 6c 6b 97|97 6b 6c 7d) divwu\. r11,r12,r13
- 19c: (7d 4b 67 96|96 67 4b 7d) divwuo r10,r11,r12
- 1a0: (7d 6c 6f 97|97 6f 6c 7d) divwuo\. r11,r12,r13
- 1a4: (7c 83 28 9c|9c 28 83 7c) dlmzb r3,r4,r5
- 1a8: (7c 83 28 9d|9d 28 83 7c) dlmzb\. r3,r4,r5
- 1ac: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12
- 1b0: (7d 6a 62 39|39 62 6a 7d) eqv\. r10,r11,r12
- 1b4: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19
- 1b8: (7c 83 07 74|74 07 83 7c) extsb r3,r4
- 1bc: (7c 83 07 75|75 07 83 7c) extsb\. r3,r4
- 1c0: (7c 83 07 34|34 07 83 7c) extsh r3,r4
- 1c4: (7c 83 07 35|35 07 83 7c) extsh\. r3,r4
- 1c8: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31
- 1cc: (fe a0 fa 11|11 fa a0 fe) fabs\. f21,f31
- 1d0: (fd 4b 60 2a|2a 60 4b fd) fadd f10,f11,f12
- 1d4: (fd 4b 60 2b|2b 60 4b fd) fadd\. f10,f11,f12
- 1d8: (ed 4b 60 2a|2a 60 4b ed) fadds f10,f11,f12
- 1dc: (ed 4b 60 2b|2b 60 4b ed) fadds\. f10,f11,f12
- 1e0: (fd 40 5e 9c|9c 5e 40 fd) fcfid f10,f11
- 1e4: (fd 40 5e 9d|9d 5e 40 fd) fcfid\. f10,f11
- 1e8: (fd 8a 58 40|40 58 8a fd) fcmpo cr3,f10,f11
- 1ec: (fd 84 28 00|00 28 84 fd) fcmpu cr3,f4,f5
- 1f0: (fd 4b 60 10|10 60 4b fd) fcpsgn f10,f11,f12
- 1f4: (fd 4b 60 11|11 60 4b fd) fcpsgn\. f10,f11,f12
- 1f8: (fd 40 5e 5c|5c 5e 40 fd) fctid f10,f11
- 1fc: (fd 40 5e 5d|5d 5e 40 fd) fctid\. f10,f11
- 200: (fd 40 5e 5e|5e 5e 40 fd) fctidz f10,f11
- 204: (fd 40 5e 5f|5f 5e 40 fd) fctidz\. f10,f11
- 208: (fd 40 58 1c|1c 58 40 fd) fctiw f10,f11
- 20c: (fd 40 58 1d|1d 58 40 fd) fctiw\. f10,f11
- 210: (fd 40 58 1e|1e 58 40 fd) fctiwz f10,f11
- 214: (fd 40 58 1f|1f 58 40 fd) fctiwz\. f10,f11
- 218: (fd 4b 60 24|24 60 4b fd) fdiv f10,f11,f12
- 21c: (fd 4b 60 25|25 60 4b fd) fdiv\. f10,f11,f12
- 220: (ed 4b 60 24|24 60 4b ed) fdivs f10,f11,f12
- 224: (ed 4b 60 25|25 60 4b ed) fdivs\. f10,f11,f12
- 228: (fd 4b 6b 3a|3a 6b 4b fd) fmadd f10,f11,f12,f13
- 22c: (fd 4b 6b 3b|3b 6b 4b fd) fmadd\. f10,f11,f12,f13
- 230: (ed 4b 6b 3a|3a 6b 4b ed) fmadds f10,f11,f12,f13
- 234: (ed 4b 6b 3b|3b 6b 4b ed) fmadds\. f10,f11,f12,f13
- 238: (fc 60 20 90|90 20 60 fc) fmr f3,f4
- 23c: (fc 60 20 91|91 20 60 fc) fmr\. f3,f4
- 240: (fd 4b 6b 38|38 6b 4b fd) fmsub f10,f11,f12,f13
- 244: (fd 4b 6b 39|39 6b 4b fd) fmsub\. f10,f11,f12,f13
- 248: (ed 4b 6b 38|38 6b 4b ed) fmsubs f10,f11,f12,f13
- 24c: (ed 4b 6b 39|39 6b 4b ed) fmsubs\. f10,f11,f12,f13
- 250: (fd 4b 03 32|32 03 4b fd) fmul f10,f11,f12
- 254: (fd 4b 03 33|33 03 4b fd) fmul\. f10,f11,f12
- 258: (ed 4b 03 32|32 03 4b ed) fmuls f10,f11,f12
- 25c: (ed 4b 03 33|33 03 4b ed) fmuls\. f10,f11,f12
- 260: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30
- 264: (fe 80 f1 11|11 f1 80 fe) fnabs\. f20,f30
- 268: (fc 60 20 50|50 20 60 fc) fneg f3,f4
- 26c: (fc 60 20 51|51 20 60 fc) fneg\. f3,f4
- 270: (fd 4b 6b 3e|3e 6b 4b fd) fnmadd f10,f11,f12,f13
- 274: (fd 4b 6b 3f|3f 6b 4b fd) fnmadd\. f10,f11,f12,f13
- 278: (ed 4b 6b 3e|3e 6b 4b ed) fnmadds f10,f11,f12,f13
- 27c: (ed 4b 6b 3f|3f 6b 4b ed) fnmadds\. f10,f11,f12,f13
- 280: (fd 4b 6b 3c|3c 6b 4b fd) fnmsub f10,f11,f12,f13
- 284: (fd 4b 6b 3d|3d 6b 4b fd) fnmsub\. f10,f11,f12,f13
- 288: (ed 4b 6b 3c|3c 6b 4b ed) fnmsubs f10,f11,f12,f13
- 28c: (ed 4b 6b 3d|3d 6b 4b ed) fnmsubs\. f10,f11,f12,f13
- 290: (fd c0 78 30|30 78 c0 fd) fre f14,f15
- 294: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15
- 298: (ed c0 78 30|30 78 c0 ed) fres f14,f15
- 29c: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15
- 2a0: (fd 40 5b d0|d0 5b 40 fd) frim f10,f11
- 2a4: (fd 40 5b d1|d1 5b 40 fd) frim\. f10,f11
- 2a8: (fd 40 5b 10|10 5b 40 fd) frin f10,f11
- 2ac: (fd 40 5b 11|11 5b 40 fd) frin\. f10,f11
- 2b0: (fd 40 5b 90|90 5b 40 fd) frip f10,f11
- 2b4: (fd 40 5b 91|91 5b 40 fd) frip\. f10,f11
- 2b8: (fd 40 5b 50|50 5b 40 fd) friz f10,f11
- 2bc: (fd 40 5b 51|51 5b 40 fd) friz\. f10,f11
- 2c0: (fc c0 38 18|18 38 c0 fc) frsp f6,f7
- 2c4: (fd 00 48 19|19 48 00 fd) frsp\. f8,f9
- 2c8: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15
- 2cc: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15
- 2d0: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15
- 2d4: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15
- 2d8: (fd 4b 6b 2e|2e 6b 4b fd) fsel f10,f11,f12,f13
- 2dc: (fd 4b 6b 2f|2f 6b 4b fd) fsel\. f10,f11,f12,f13
- 2e0: (fd 40 58 2c|2c 58 40 fd) fsqrt f10,f11
- 2e4: (fd 40 58 2d|2d 58 40 fd) fsqrt\. f10,f11
- 2e8: (ed 40 58 2c|2c 58 40 ed) fsqrts f10,f11
- 2ec: (ed 40 58 2d|2d 58 40 ed) fsqrts\. f10,f11
- 2f0: (fd 4b 60 28|28 60 4b fd) fsub f10,f11,f12
- 2f4: (fd 4b 60 29|29 60 4b fd) fsub\. f10,f11,f12
- 2f8: (ed 4b 60 28|28 60 4b ed) fsubs f10,f11,f12
- 2fc: (ed 4b 60 29|29 60 4b ed) fsubs\. f10,f11,f12
- 300: (7c 03 27 ac|ac 27 03 7c) icbi r3,r4
- 304: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18
- 308: (7c a8 48 2c|2c 48 a8 7c) icbt 5,r8,r9
- 30c: (7d ae 7b cc|cc 7b ae 7d) icbtls 13,r14,r15
- 310: (7c 00 07 8c|8c 07 00 7c) iccci
- 314: (7c 00 07 8c|8c 07 00 7c) iccci
- 318: (7c 00 07 8c|8c 07 00 7c) iccci
- 31c: (7c 20 07 8c|8c 07 20 7c) ici 1
- 320: (7c 03 27 cc|cc 27 03 7c) icread r3,r4
- 324: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27
- 328: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28
- 32c: (4c 00 01 2c|2c 01 00 4c) isync
- 330: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\)
- 334: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\)
- 338: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22
- 33c: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5
- 340: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\)
- 344: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\)
- 348: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22
- 34c: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15
- 350: (7d 43 26 ae|ae 26 43 7d) lfiwax f10,r3,r4
- 354: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\)
- 358: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\)
- 35c: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12
- 360: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12
- 364: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\)
- 368: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\)
- 36c: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11
- 370: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11
- 374: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5
- 378: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\)
- 37c: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\)
- 380: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24
- 384: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25
- 388: (b8 61 ff f0|f0 ff 61 b8) lmw r3,-16\(r1\)
- 38c: (7c a4 84 aa|aa 84 a4 7c) lswi r5,r4,16
- 390: (7c 64 2c 2a|2a 2c 64 7c) lswx r3,r4,r5
- 394: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5
- 398: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5
- 39c: (7c 64 28 29|29 28 64 7c) lwarx r3,r4,r5,1
- 3a0: (7c 64 2c 2c|2c 2c 64 7c) lwbrx r3,r4,r5
- 3a4: (80 c7 00 00|00 00 c7 80) lwz r6,0\(r7\)
- 3a8: (84 61 00 10|10 00 61 84) lwzu r3,16\(r1\)
- 3ac: (7c 64 28 6e|6e 28 64 7c) lwzux r3,r4,r5
- 3b0: (7c 64 28 2e|2e 28 64 7c) lwzx r3,r4,r5
- 3b4: (10 64 29 58|58 29 64 10) macchw r3,r4,r5
- 3b8: (10 64 29 59|59 29 64 10) macchw\. r3,r4,r5
- 3bc: (10 64 2d 58|58 2d 64 10) macchwo r3,r4,r5
- 3c0: (10 64 2d 59|59 2d 64 10) macchwo\. r3,r4,r5
- 3c4: (10 64 29 d8|d8 29 64 10) macchws r3,r4,r5
- 3c8: (10 64 29 d9|d9 29 64 10) macchws\. r3,r4,r5
- 3cc: (10 64 2d d8|d8 2d 64 10) macchwso r3,r4,r5
- 3d0: (10 64 2d d9|d9 2d 64 10) macchwso\. r3,r4,r5
- 3d4: (10 64 29 98|98 29 64 10) macchwsu r3,r4,r5
- 3d8: (10 64 29 99|99 29 64 10) macchwsu\. r3,r4,r5
- 3dc: (10 64 2d 98|98 2d 64 10) macchwsuo r3,r4,r5
- 3e0: (10 64 2d 99|99 2d 64 10) macchwsuo\. r3,r4,r5
- 3e4: (10 64 29 18|18 29 64 10) macchwu r3,r4,r5
- 3e8: (10 64 29 19|19 29 64 10) macchwu\. r3,r4,r5
- 3ec: (10 64 2d 18|18 2d 64 10) macchwuo r3,r4,r5
- 3f0: (10 64 2d 19|19 2d 64 10) macchwuo\. r3,r4,r5
- 3f4: (10 64 28 58|58 28 64 10) machhw r3,r4,r5
- 3f8: (10 64 28 59|59 28 64 10) machhw\. r3,r4,r5
- 3fc: (10 64 2c 58|58 2c 64 10) machhwo r3,r4,r5
- 400: (10 64 2c 59|59 2c 64 10) machhwo\. r3,r4,r5
- 404: (10 64 28 d8|d8 28 64 10) machhws r3,r4,r5
- 408: (10 64 28 d9|d9 28 64 10) machhws\. r3,r4,r5
- 40c: (10 64 2c d8|d8 2c 64 10) machhwso r3,r4,r5
- 410: (10 64 2c d9|d9 2c 64 10) machhwso\. r3,r4,r5
- 414: (10 64 28 98|98 28 64 10) machhwsu r3,r4,r5
- 418: (10 64 28 99|99 28 64 10) machhwsu\. r3,r4,r5
- 41c: (10 64 2c 98|98 2c 64 10) machhwsuo r3,r4,r5
- 420: (10 64 2c 99|99 2c 64 10) machhwsuo\. r3,r4,r5
- 424: (10 64 28 18|18 28 64 10) machhwu r3,r4,r5
- 428: (10 64 28 19|19 28 64 10) machhwu\. r3,r4,r5
- 42c: (10 64 2c 18|18 2c 64 10) machhwuo r3,r4,r5
- 430: (10 64 2c 19|19 2c 64 10) machhwuo\. r3,r4,r5
- 434: (10 64 2b 58|58 2b 64 10) maclhw r3,r4,r5
- 438: (10 64 2b 59|59 2b 64 10) maclhw\. r3,r4,r5
- 43c: (10 64 2f 58|58 2f 64 10) maclhwo r3,r4,r5
- 440: (10 64 2f 59|59 2f 64 10) maclhwo\. r3,r4,r5
- 444: (10 64 2b d8|d8 2b 64 10) maclhws r3,r4,r5
- 448: (10 64 2b d9|d9 2b 64 10) maclhws\. r3,r4,r5
- 44c: (10 64 2f d8|d8 2f 64 10) maclhwso r3,r4,r5
- 450: (10 64 2f d9|d9 2f 64 10) maclhwso\. r3,r4,r5
- 454: (10 64 2b 98|98 2b 64 10) maclhwsu r3,r4,r5
- 458: (10 64 2b 99|99 2b 64 10) maclhwsu\. r3,r4,r5
- 45c: (10 64 2f 98|98 2f 64 10) maclhwsuo r3,r4,r5
- 460: (10 64 2f 99|99 2f 64 10) maclhwsuo\. r3,r4,r5
- 464: (10 64 2b 18|18 2b 64 10) maclhwu r3,r4,r5
- 468: (10 64 2b 19|19 2b 64 10) maclhwu\. r3,r4,r5
- 46c: (10 64 2f 18|18 2f 64 10) maclhwuo r3,r4,r5
- 470: (10 64 2f 19|19 2f 64 10) maclhwuo\. r3,r4,r5
- 474: (7c 00 06 ac|ac 06 00 7c) mbar
- 478: (7c 00 06 ac|ac 06 00 7c) mbar
- 47c: (7c 20 06 ac|ac 06 20 7c) mbar 1
- 480: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1
- 484: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4
- 488: (7d 80 04 00|00 04 80 7d) mcrxr cr3
- 48c: (7c 60 00 26|26 00 60 7c) mfcr r3
- 490: (7c 60 00 26|26 00 60 7c) mfcr r3
- 494: (7c aa 3a 86|86 3a aa 7c) mfdcr r5,234
- 498: (7c 64 02 46|46 02 64 7c) mfdcrux r3,r4
- 49c: (7c 85 02 06|06 02 85 7c) mfdcrx r4,r5
- 4a0: (ff c0 04 8e|8e 04 c0 ff) mffs f30
- 4a4: (ff e0 04 8f|8f 04 e0 ff) mffs\. f31
- 4a8: (7e 60 00 a6|a6 00 60 7e) mfmsr r19
- 4ac: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
- 4b0: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128
- 4b4: (7c 6c 42 a6|a6 42 6c 7c) mftb r3
- 4b8: (7c 00 04 ac|ac 04 00 7c) msync
- 4bc: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
- 4c0: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
- 4c4: (7d 10 6b 86|86 6b 10 7d) mtdcr 432,r8
- 4c8: (7c 83 03 46|46 03 83 7c) mtdcrux r3,r4
- 4cc: (7c e6 03 06|06 03 e6 7c) mtdcrx r6,r7
- 4d0: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3
- 4d4: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3
- 4d8: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3
- 4dc: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3
- 4e0: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
- 4e4: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
- 4e8: (fc 0d 55 8e|8e 55 0d fc) mtfsf 6,f10,0,1
- 4ec: (fe 0c 55 8e|8e 55 0c fe) mtfsf 6,f10,1
- 4f0: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11
- 4f4: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11
- 4f8: (fc 0d 5d 8f|8f 5d 0d fc) mtfsf\. 6,f11,0,1
- 4fc: (fe 0c 5d 8f|8f 5d 0c fe) mtfsf\. 6,f11,1
- 500: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
- 504: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
- 508: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
- 50c: (ff 01 01 0c|0c 01 01 ff) mtfsfi 6,0,1
- 510: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15
- 514: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15
- 518: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15
- 51c: (ff 01 f1 0d|0d f1 01 ff) mtfsfi\. 6,15,1
- 520: (7d 40 01 24|24 01 40 7d) mtmsr r10
- 524: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
- 528: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3
- 52c: (10 64 29 50|50 29 64 10) mulchw r3,r4,r5
- 530: (10 64 29 51|51 29 64 10) mulchw\. r3,r4,r5
- 534: (10 64 29 10|10 29 64 10) mulchwu r3,r4,r5
- 538: (10 64 29 11|11 29 64 10) mulchwu\. r3,r4,r5
- 53c: (10 64 28 50|50 28 64 10) mulhhw r3,r4,r5
- 540: (10 64 28 51|51 28 64 10) mulhhw\. r3,r4,r5
- 544: (10 64 28 10|10 28 64 10) mulhhwu r3,r4,r5
- 548: (10 64 28 11|11 28 64 10) mulhhwu\. r3,r4,r5
- 54c: (7c 64 28 96|96 28 64 7c) mulhw r3,r4,r5
- 550: (7c 64 28 97|97 28 64 7c) mulhw\. r3,r4,r5
- 554: (7c 64 28 16|16 28 64 7c) mulhwu r3,r4,r5
- 558: (7c 64 28 17|17 28 64 7c) mulhwu\. r3,r4,r5
- 55c: (10 64 2b 50|50 2b 64 10) mullhw r3,r4,r5
- 560: (10 64 2b 51|51 2b 64 10) mullhw\. r3,r4,r5
- 564: (10 64 2b 10|10 2b 64 10) mullhwu r3,r4,r5
- 568: (10 64 2b 11|11 2b 64 10) mullhwu\. r3,r4,r5
- 56c: (1c 64 00 05|05 00 64 1c) mulli r3,r4,5
- 570: (7c 64 29 d6|d6 29 64 7c) mullw r3,r4,r5
- 574: (7c 64 29 d7|d7 29 64 7c) mullw\. r3,r4,r5
- 578: (7c 64 2d d6|d6 2d 64 7c) mullwo r3,r4,r5
- 57c: (7c 64 2d d7|d7 2d 64 7c) mullwo\. r3,r4,r5
- 580: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30
- 584: (7f bc f3 b9|b9 f3 bc 7f) nand\. r28,r29,r30
- 588: (7c 64 00 d0|d0 00 64 7c) neg r3,r4
- 58c: (7c 64 00 d1|d1 00 64 7c) neg\. r3,r4
- 590: (7e 11 04 d0|d0 04 11 7e) nego r16,r17
- 594: (7e 53 04 d1|d1 04 53 7e) nego\. r18,r19
- 598: (10 64 29 5c|5c 29 64 10) nmacchw r3,r4,r5
- 59c: (10 64 29 5d|5d 29 64 10) nmacchw\. r3,r4,r5
- 5a0: (10 64 2d 5c|5c 2d 64 10) nmacchwo r3,r4,r5
- 5a4: (10 64 2d 5d|5d 2d 64 10) nmacchwo\. r3,r4,r5
- 5a8: (10 64 29 dc|dc 29 64 10) nmacchws r3,r4,r5
- 5ac: (10 64 29 dd|dd 29 64 10) nmacchws\. r3,r4,r5
- 5b0: (10 64 2d dc|dc 2d 64 10) nmacchwso r3,r4,r5
- 5b4: (10 64 2d dd|dd 2d 64 10) nmacchwso\. r3,r4,r5
- 5b8: (10 64 28 5c|5c 28 64 10) nmachhw r3,r4,r5
- 5bc: (10 64 28 5d|5d 28 64 10) nmachhw\. r3,r4,r5
- 5c0: (10 64 2c 5c|5c 2c 64 10) nmachhwo r3,r4,r5
- 5c4: (10 64 2c 5d|5d 2c 64 10) nmachhwo\. r3,r4,r5
- 5c8: (10 64 28 dc|dc 28 64 10) nmachhws r3,r4,r5
- 5cc: (10 64 28 dd|dd 28 64 10) nmachhws\. r3,r4,r5
- 5d0: (10 64 2c dc|dc 2c 64 10) nmachhwso r3,r4,r5
- 5d4: (10 64 2c dd|dd 2c 64 10) nmachhwso\. r3,r4,r5
- 5d8: (10 64 2b 5c|5c 2b 64 10) nmaclhw r3,r4,r5
- 5dc: (10 64 2b 5d|5d 2b 64 10) nmaclhw\. r3,r4,r5
- 5e0: (10 64 2f 5c|5c 2f 64 10) nmaclhwo r3,r4,r5
- 5e4: (10 64 2f 5d|5d 2f 64 10) nmaclhwo\. r3,r4,r5
- 5e8: (10 64 2b dc|dc 2b 64 10) nmaclhws r3,r4,r5
- 5ec: (10 64 2b dd|dd 2b 64 10) nmaclhws\. r3,r4,r5
- 5f0: (10 64 2f dc|dc 2f 64 10) nmaclhwso r3,r4,r5
- 5f4: (10 64 2f dd|dd 2f 64 10) nmaclhwso\. r3,r4,r5
- 5f8: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22
- 5fc: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22
- 600: (7c 40 23 78|78 23 40 7c) or r0,r2,r4
- 604: (7d cc 83 79|79 83 cc 7d) or\. r12,r14,r16
- 608: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17
- 60c: (7e 72 a3 39|39 a3 72 7e) orc\. r18,r19,r20
- 610: (60 21 00 00|00 00 21 60) ori r1,r1,0
- 614: (64 83 de ad|ad de 83 64) oris r3,r4,57005
- 618: (7c 83 00 f4|f4 00 83 7c) popcntb r3,r4
- 61c: (7c 83 01 34|34 01 83 7c) prtyw r3,r4
- 620: (4c 00 00 66|66 00 00 4c) rfci
- 624: (4c 00 00 64|64 00 00 4c) rfi
- 628: (4c 00 00 4c|4c 00 00 4c) rfmci
- 62c: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27
- 630: (50 83 65 37|37 65 83 50) rlwimi\. r3,r4,12,20,27
- 634: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27
- 638: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31
- 63c: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19
- 640: (54 83 00 37|37 00 83 54) rlwinm\. r3,r4,0,0,27
- 644: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5
- 648: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5
- 64c: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5
- 650: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5
- 654: (44 00 00 02|02 00 00 44) sc
- 658: (7c 83 28 30|30 28 83 7c) slw r3,r4,r5
- 65c: (7c 83 28 31|31 28 83 7c) slw\. r3,r4,r5
- 660: (7c 83 2e 30|30 2e 83 7c) sraw r3,r4,r5
- 664: (7c 83 2e 31|31 2e 83 7c) sraw\. r3,r4,r5
- 668: (7c 83 86 70|70 86 83 7c) srawi r3,r4,16
- 66c: (7c 83 86 71|71 86 83 7c) srawi\. r3,r4,16
- 670: (7c 83 2c 30|30 2c 83 7c) srw r3,r4,r5
- 674: (7c 83 2c 31|31 2c 83 7c) srw\. r3,r4,r5
- 678: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31
- 67c: (99 61 00 02|02 00 61 99) stb r11,2\(r1\)
- 680: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\)
- 684: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15
- 688: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5
- 68c: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\)
- 690: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\)
- 694: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2
- 698: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31
- 69c: (7d 43 27 ae|ae 27 43 7d) stfiwx f10,r3,r4
- 6a0: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\)
- 6a4: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\)
- 6a8: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28
- 6ac: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25
- 6b0: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\)
- 6b4: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8
- 6b8: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\)
- 6bc: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23
- 6c0: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14
- 6c4: (bc c1 ff f0|f0 ff c1 bc) stmw r6,-16\(r1\)
- 6c8: (7c 64 85 aa|aa 85 64 7c) stswi r3,r4,16
- 6cc: (7c 64 2d 2a|2a 2d 64 7c) stswx r3,r4,r5
- 6d0: (90 c7 ff f0|f0 ff c7 90) stw r6,-16\(r7\)
- 6d4: (7c 64 2d 2c|2c 2d 64 7c) stwbrx r3,r4,r5
- 6d8: (7c 64 29 2d|2d 29 64 7c) stwcx\. r3,r4,r5
- 6dc: (94 61 00 10|10 00 61 94) stwu r3,16\(r1\)
- 6e0: (7c 64 29 6e|6e 29 64 7c) stwux r3,r4,r5
- 6e4: (7c 64 29 2e|2e 29 64 7c) stwx r3,r4,r5
- 6e8: (7c 64 28 50|50 28 64 7c) subf r3,r4,r5
- 6ec: (7c 64 28 51|51 28 64 7c) subf\. r3,r4,r5
- 6f0: (7c 64 28 10|10 28 64 7c) subfc r3,r4,r5
- 6f4: (7c 64 28 11|11 28 64 7c) subfc\. r3,r4,r5
- 6f8: (7c 64 2c 10|10 2c 64 7c) subfco r3,r4,r5
- 6fc: (7c 64 2c 11|11 2c 64 7c) subfco\. r3,r4,r5
- 700: (7c 64 29 10|10 29 64 7c) subfe r3,r4,r5
- 704: (7c 64 29 11|11 29 64 7c) subfe\. r3,r4,r5
- 708: (7c 64 2d 10|10 2d 64 7c) subfeo r3,r4,r5
- 70c: (7c 64 2d 11|11 2d 64 7c) subfeo\. r3,r4,r5
- 710: (20 64 00 05|05 00 64 20) subfic r3,r4,5
- 714: (7c 64 01 d0|d0 01 64 7c) subfme r3,r4
- 718: (7c 64 01 d1|d1 01 64 7c) subfme\. r3,r4
- 71c: (7c 64 05 d0|d0 05 64 7c) subfmeo r3,r4
- 720: (7c 64 05 d1|d1 05 64 7c) subfmeo\. r3,r4
- 724: (7c 64 2c 50|50 2c 64 7c) subfo r3,r4,r5
- 728: (7c 64 2c 51|51 2c 64 7c) subfo\. r3,r4,r5
- 72c: (7c 64 01 90|90 01 64 7c) subfze r3,r4
- 730: (7c 64 01 91|91 01 64 7c) subfze\. r3,r4
- 734: (7c 64 05 90|90 05 64 7c) subfzeo r3,r4
- 738: (7c 64 05 91|91 05 64 7c) subfzeo\. r3,r4
- 73c: (7c 07 46 24|24 46 07 7c) tlbivax r7,r8
- 740: (7c 22 3f 64|64 3f 22 7c) tlbre r1,r2,7
- 744: (7c 0b 67 24|24 67 0b 7c) tlbsx r11,r12
- 748: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14
- 74c: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14
- 750: (7c 00 04 6c|6c 04 00 7c) tlbsync
- 754: (7c 00 07 a4|a4 07 00 7c) tlbwe
- 758: (7c 00 07 a4|a4 07 00 7c) tlbwe
- 75c: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1
- 760: (7f e0 00 08|08 00 e0 7f) trap
- 764: (7f e0 00 08|08 00 e0 7f) trap
- 768: (7c 83 20 08|08 20 83 7c) tweq r3,r4
- 76c: (7c a3 20 08|08 20 a3 7c) twlge r3,r4
- 770: (7c 83 20 08|08 20 83 7c) tweq r3,r4
- 774: (0d 03 00 0f|0f 00 03 0d) twgti r3,15
- 778: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15
- 77c: (0d 03 00 0f|0f 00 03 0d) twgti r3,15
- 780: (7c a3 20 08|08 20 a3 7c) twlge r3,r4
- 784: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15
- 788: (7c 60 01 06|06 01 60 7c) wrtee r3
- 78c: (7c 00 81 46|46 81 00 7c) wrteei 1
- 790: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31
- 794: (7f dd fa 79|79 fa dd 7f) xor\. r29,r30,r31
- 798: (68 83 de ad|ad de 83 68) xori r3,r4,57005
- 79c: (6c 83 de ad|ad de 83 6c) xoris r3,r4,57005
+.*: (7c 64 2a 14|14 2a 64 7c) add r3,r4,r5
+.*: (7c 64 2a 15|15 2a 64 7c) add\. r3,r4,r5
+.*: (7c 64 28 14|14 28 64 7c) addc r3,r4,r5
+.*: (7c 64 28 15|15 28 64 7c) addc\. r3,r4,r5
+.*: (7c 64 2c 14|14 2c 64 7c) addco r3,r4,r5
+.*: (7c 64 2c 15|15 2c 64 7c) addco\. r3,r4,r5
+.*: (7c 64 29 14|14 29 64 7c) adde r3,r4,r5
+.*: (7c 64 29 15|15 29 64 7c) adde\. r3,r4,r5
+.*: (7c 64 2d 14|14 2d 64 7c) addeo r3,r4,r5
+.*: (7c 64 2d 15|15 2d 64 7c) addeo\. r3,r4,r5
+.*: (38 64 ff 80|80 ff 64 38) addi r3,r4,-128
+.*: (30 64 ff 80|80 ff 64 30) addic r3,r4,-128
+.*: (34 64 ff 80|80 ff 64 34) addic\. r3,r4,-128
+.*: (3c 64 ff 80|80 ff 64 3c) addis r3,r4,-128
+.*: (7c 64 01 d4|d4 01 64 7c) addme r3,r4
+.*: (7c 64 01 d5|d5 01 64 7c) addme\. r3,r4
+.*: (7c 64 05 d4|d4 05 64 7c) addmeo r3,r4
+.*: (7c 64 05 d5|d5 05 64 7c) addmeo\. r3,r4
+.*: (7c 64 2e 14|14 2e 64 7c) addo r3,r4,r5
+.*: (7c 64 2e 15|15 2e 64 7c) addo\. r3,r4,r5
+.*: (7c 64 01 94|94 01 64 7c) addze r3,r4
+.*: (7c 64 01 95|95 01 64 7c) addze\. r3,r4
+.*: (7c 64 05 94|94 05 64 7c) addzeo r3,r4
+.*: (7c 64 05 95|95 05 64 7c) addzeo\. r3,r4
+.*: (7c 83 28 38|38 28 83 7c) and r3,r4,r5
+.*: (7c 83 28 39|39 28 83 7c) and\. r3,r4,r5
+.*: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15
+.*: (7e 30 90 79|79 90 30 7e) andc\. r16,r17,r18
+.*: (70 83 de ad|ad de 83 70) andi\. r3,r4,57005
+.*: (74 83 de ad|ad de 83 74) andis\. r3,r4,57005
+.*: (48 00 00 02|02 00 00 48) ba 0 <ppc476>
+.*: (40 01 00 00|00 00 01 40) bdnzf gt,7c <ppc476\+0x7c>
+.*: (40 85 00 02|02 00 85 40) blea cr1,0 <ppc476>
+.*: (4d 80 04 20|20 04 80 4d) bltctr
+.*: (4c 8a 04 20|20 04 8a 4c) bnectr cr2
+.*: (4c 86 04 20|20 04 86 4c) bnectr cr1
+.*: (4c 86 04 20|20 04 86 4c) bnectr cr1
+.*: (4d 80 04 21|21 04 80 4d) bltctrl
+.*: (4c 8a 04 21|21 04 8a 4c) bnectrl cr2
+.*: (4c 86 04 21|21 04 86 4c) bnectrl cr1
+.*: (4c 86 04 21|21 04 86 4c) bnectrl cr1
+.*: (40 43 00 01|01 00 43 40) bdzfl so,a4 <ppc476\+0xa4>
+.*: (4d 80 00 20|20 00 80 4d) bltlr
+.*: (4c 8a 00 20|20 00 8a 4c) bnelr cr2
+.*: (4c 86 00 20|20 00 86 4c) bnelr cr1
+.*: (4c 86 00 20|20 00 86 4c) bnelr cr1
+.*: (4d 80 00 21|21 00 80 4d) bltlrl
+.*: (4c 8a 00 21|21 00 8a 4c) bnelrl cr2
+.*: (4c 86 00 21|21 00 86 4c) bnelrl cr1
+.*: (4c 86 00 21|21 00 86 4c) bnelrl cr1
+.*: (48 00 00 00|00 00 00 48) b c8 <ppc476\+0xc8>
+.*: (48 00 00 01|01 00 00 48) bl cc <ppc476\+0xcc>
+.*: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27
+.*: (7c 03 20 00|00 20 03 7c) cmpw r3,r4
+.*: (7f 83 20 00|00 20 83 7f) cmpw cr7,r3,r4
+.*: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
+.*: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
+.*: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167
+.*: (2f 83 ff 59|59 ff 83 2f) cmpwi cr7,r3,-167
+.*: (7c 03 20 40|40 20 03 7c) cmplw r3,r4
+.*: (7f 83 20 40|40 20 83 7f) cmplw cr7,r3,r4
+.*: (28 03 00 a7|a7 00 03 28) cmplwi r3,167
+.*: (2b 83 00 a7|a7 00 83 2b) cmplwi cr7,r3,167
+.*: (7c 03 20 40|40 20 03 7c) cmplw r3,r4
+.*: (28 03 00 a7|a7 00 03 28) cmplwi r3,167
+.*: (7c 03 20 00|00 20 03 7c) cmpw r3,r4
+.*: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167
+.*: (7d 6a 00 34|34 00 6a 7d) cntlzw r10,r11
+.*: (7d 6a 00 35|35 00 6a 7d) cntlzw\. r10,r11
+.*: (4c 85 32 02|02 32 85 4c) crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq
+.*: (4c 64 29 02|02 29 64 4c) crandc so,4\*cr1\+lt,4\*cr1\+gt
+.*: (4c e0 0a 42|42 0a e0 4c) creqv 4\*cr1\+so,lt,gt
+.*: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so
+.*: (4c 01 10 42|42 10 01 4c) crnor lt,gt,eq
+.*: (4c a6 3b 82|82 3b a6 4c) cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so
+.*: (4c 43 23 42|42 23 43 4c) crorc eq,so,4\*cr1\+lt
+.*: (4c c7 01 82|82 01 c7 4c) crxor 4\*cr1\+eq,4\*cr1\+so,lt
+.*: (7c 09 55 ec|ec 55 09 7c) dcba r9,r10
+.*: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7
+.*: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7
+.*: (7c 06 3b ac|ac 3b 06 7c) dcbi r6,r7
+.*: (7c 85 33 0c|0c 33 85 7c) dcblc 4,r5,r6
+.*: (7c 06 38 6c|6c 38 06 7c) dcbst r6,r7
+.*: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
+.*: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
+.*: (7d 05 32 2c|2c 32 05 7d) dcbt 8,r5,r6
+.*: (7c e8 49 4c|4c 49 e8 7c) dcbtls 7,r8,r9
+.*: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7
+.*: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7
+.*: (7d 26 39 ec|ec 39 26 7d) dcbtst 9,r6,r7
+.*: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12
+.*: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2
+.*: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6
+.*: (7c 00 03 8c|8c 03 00 7c) dccci
+.*: (7c 00 03 8c|8c 03 00 7c) dccci
+.*: (7c 00 03 8c|8c 03 00 7c) dccci
+.*: (7c 20 03 8c|8c 03 20 7c) dci 1
+.*: (7d 4b 63 d6|d6 63 4b 7d) divw r10,r11,r12
+.*: (7d 6c 6b d7|d7 6b 6c 7d) divw\. r11,r12,r13
+.*: (7d 4b 67 d6|d6 67 4b 7d) divwo r10,r11,r12
+.*: (7d 6c 6f d7|d7 6f 6c 7d) divwo\. r11,r12,r13
+.*: (7d 4b 63 96|96 63 4b 7d) divwu r10,r11,r12
+.*: (7d 6c 6b 97|97 6b 6c 7d) divwu\. r11,r12,r13
+.*: (7d 4b 67 96|96 67 4b 7d) divwuo r10,r11,r12
+.*: (7d 6c 6f 97|97 6f 6c 7d) divwuo\. r11,r12,r13
+.*: (7c 83 28 9c|9c 28 83 7c) dlmzb r3,r4,r5
+.*: (7c 83 28 9d|9d 28 83 7c) dlmzb\. r3,r4,r5
+.*: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12
+.*: (7d 6a 62 39|39 62 6a 7d) eqv\. r10,r11,r12
+.*: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19
+.*: (7c 83 07 74|74 07 83 7c) extsb r3,r4
+.*: (7c 83 07 75|75 07 83 7c) extsb\. r3,r4
+.*: (7c 83 07 34|34 07 83 7c) extsh r3,r4
+.*: (7c 83 07 35|35 07 83 7c) extsh\. r3,r4
+.*: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31
+.*: (fe a0 fa 11|11 fa a0 fe) fabs\. f21,f31
+.*: (fd 4b 60 2a|2a 60 4b fd) fadd f10,f11,f12
+.*: (fd 4b 60 2b|2b 60 4b fd) fadd\. f10,f11,f12
+.*: (ed 4b 60 2a|2a 60 4b ed) fadds f10,f11,f12
+.*: (ed 4b 60 2b|2b 60 4b ed) fadds\. f10,f11,f12
+.*: (fd 40 5e 9c|9c 5e 40 fd) fcfid f10,f11
+.*: (fd 40 5e 9d|9d 5e 40 fd) fcfid\. f10,f11
+.*: (fd 8a 58 40|40 58 8a fd) fcmpo cr3,f10,f11
+.*: (fd 84 28 00|00 28 84 fd) fcmpu cr3,f4,f5
+.*: (fd 4b 60 10|10 60 4b fd) fcpsgn f10,f11,f12
+.*: (fd 4b 60 11|11 60 4b fd) fcpsgn\. f10,f11,f12
+.*: (fd 40 5e 5c|5c 5e 40 fd) fctid f10,f11
+.*: (fd 40 5e 5d|5d 5e 40 fd) fctid\. f10,f11
+.*: (fd 40 5e 5e|5e 5e 40 fd) fctidz f10,f11
+.*: (fd 40 5e 5f|5f 5e 40 fd) fctidz\. f10,f11
+.*: (fd 40 58 1c|1c 58 40 fd) fctiw f10,f11
+.*: (fd 40 58 1d|1d 58 40 fd) fctiw\. f10,f11
+.*: (fd 40 58 1e|1e 58 40 fd) fctiwz f10,f11
+.*: (fd 40 58 1f|1f 58 40 fd) fctiwz\. f10,f11
+.*: (fd 4b 60 24|24 60 4b fd) fdiv f10,f11,f12
+.*: (fd 4b 60 25|25 60 4b fd) fdiv\. f10,f11,f12
+.*: (ed 4b 60 24|24 60 4b ed) fdivs f10,f11,f12
+.*: (ed 4b 60 25|25 60 4b ed) fdivs\. f10,f11,f12
+.*: (fd 4b 6b 3a|3a 6b 4b fd) fmadd f10,f11,f12,f13
+.*: (fd 4b 6b 3b|3b 6b 4b fd) fmadd\. f10,f11,f12,f13
+.*: (ed 4b 6b 3a|3a 6b 4b ed) fmadds f10,f11,f12,f13
+.*: (ed 4b 6b 3b|3b 6b 4b ed) fmadds\. f10,f11,f12,f13
+.*: (fc 60 20 90|90 20 60 fc) fmr f3,f4
+.*: (fc 60 20 91|91 20 60 fc) fmr\. f3,f4
+.*: (fd 4b 6b 38|38 6b 4b fd) fmsub f10,f11,f12,f13
+.*: (fd 4b 6b 39|39 6b 4b fd) fmsub\. f10,f11,f12,f13
+.*: (ed 4b 6b 38|38 6b 4b ed) fmsubs f10,f11,f12,f13
+.*: (ed 4b 6b 39|39 6b 4b ed) fmsubs\. f10,f11,f12,f13
+.*: (fd 4b 03 32|32 03 4b fd) fmul f10,f11,f12
+.*: (fd 4b 03 33|33 03 4b fd) fmul\. f10,f11,f12
+.*: (ed 4b 03 32|32 03 4b ed) fmuls f10,f11,f12
+.*: (ed 4b 03 33|33 03 4b ed) fmuls\. f10,f11,f12
+.*: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30
+.*: (fe 80 f1 11|11 f1 80 fe) fnabs\. f20,f30
+.*: (fc 60 20 50|50 20 60 fc) fneg f3,f4
+.*: (fc 60 20 51|51 20 60 fc) fneg\. f3,f4
+.*: (fd 4b 6b 3e|3e 6b 4b fd) fnmadd f10,f11,f12,f13
+.*: (fd 4b 6b 3f|3f 6b 4b fd) fnmadd\. f10,f11,f12,f13
+.*: (ed 4b 6b 3e|3e 6b 4b ed) fnmadds f10,f11,f12,f13
+.*: (ed 4b 6b 3f|3f 6b 4b ed) fnmadds\. f10,f11,f12,f13
+.*: (fd 4b 6b 3c|3c 6b 4b fd) fnmsub f10,f11,f12,f13
+.*: (fd 4b 6b 3d|3d 6b 4b fd) fnmsub\. f10,f11,f12,f13
+.*: (ed 4b 6b 3c|3c 6b 4b ed) fnmsubs f10,f11,f12,f13
+.*: (ed 4b 6b 3d|3d 6b 4b ed) fnmsubs\. f10,f11,f12,f13
+.*: (fd c0 78 30|30 78 c0 fd) fre f14,f15
+.*: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15
+.*: (ed c0 78 30|30 78 c0 ed) fres f14,f15
+.*: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15
+.*: (fd 40 5b d0|d0 5b 40 fd) frim f10,f11
+.*: (fd 40 5b d1|d1 5b 40 fd) frim\. f10,f11
+.*: (fd 40 5b 10|10 5b 40 fd) frin f10,f11
+.*: (fd 40 5b 11|11 5b 40 fd) frin\. f10,f11
+.*: (fd 40 5b 90|90 5b 40 fd) frip f10,f11
+.*: (fd 40 5b 91|91 5b 40 fd) frip\. f10,f11
+.*: (fd 40 5b 50|50 5b 40 fd) friz f10,f11
+.*: (fd 40 5b 51|51 5b 40 fd) friz\. f10,f11
+.*: (fc c0 38 18|18 38 c0 fc) frsp f6,f7
+.*: (fd 00 48 19|19 48 00 fd) frsp\. f8,f9
+.*: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15
+.*: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15
+.*: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15
+.*: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15
+.*: (fd 4b 6b 2e|2e 6b 4b fd) fsel f10,f11,f12,f13
+.*: (fd 4b 6b 2f|2f 6b 4b fd) fsel\. f10,f11,f12,f13
+.*: (fd 40 58 2c|2c 58 40 fd) fsqrt f10,f11
+.*: (fd 40 58 2d|2d 58 40 fd) fsqrt\. f10,f11
+.*: (ed 40 58 2c|2c 58 40 ed) fsqrts f10,f11
+.*: (ed 40 58 2d|2d 58 40 ed) fsqrts\. f10,f11
+.*: (fd 4b 60 28|28 60 4b fd) fsub f10,f11,f12
+.*: (fd 4b 60 29|29 60 4b fd) fsub\. f10,f11,f12
+.*: (ed 4b 60 28|28 60 4b ed) fsubs f10,f11,f12
+.*: (ed 4b 60 29|29 60 4b ed) fsubs\. f10,f11,f12
+.*: (7c 03 27 ac|ac 27 03 7c) icbi r3,r4
+.*: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18
+.*: (7c a8 48 2c|2c 48 a8 7c) icbt 5,r8,r9
+.*: (7d ae 7b cc|cc 7b ae 7d) icbtls 13,r14,r15
+.*: (7c 00 07 8c|8c 07 00 7c) iccci
+.*: (7c 00 07 8c|8c 07 00 7c) iccci
+.*: (7c 00 07 8c|8c 07 00 7c) iccci
+.*: (7c 20 07 8c|8c 07 20 7c) ici 1
+.*: (7c 03 27 cc|cc 27 03 7c) icread r3,r4
+.*: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27
+.*: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28
+.*: (4c 00 01 2c|2c 01 00 4c) isync
+.*: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\)
+.*: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\)
+.*: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22
+.*: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5
+.*: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\)
+.*: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\)
+.*: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22
+.*: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15
+.*: (7d 43 26 ae|ae 26 43 7d) lfiwax f10,r3,r4
+.*: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\)
+.*: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\)
+.*: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12
+.*: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12
+.*: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\)
+.*: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\)
+.*: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11
+.*: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11
+.*: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5
+.*: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\)
+.*: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\)
+.*: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24
+.*: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25
+.*: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5
+.*: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5
+.*: (7c 64 28 29|29 28 64 7c) lwarx r3,r4,r5,1
+.*: (7c 64 2c 2c|2c 2c 64 7c) lwbrx r3,r4,r5
+.*: (80 c7 00 00|00 00 c7 80) lwz r6,0\(r7\)
+.*: (84 61 00 10|10 00 61 84) lwzu r3,16\(r1\)
+.*: (7c 64 28 6e|6e 28 64 7c) lwzux r3,r4,r5
+.*: (7c 64 28 2e|2e 28 64 7c) lwzx r3,r4,r5
+.*: (10 64 29 58|58 29 64 10) macchw r3,r4,r5
+.*: (10 64 29 59|59 29 64 10) macchw\. r3,r4,r5
+.*: (10 64 2d 58|58 2d 64 10) macchwo r3,r4,r5
+.*: (10 64 2d 59|59 2d 64 10) macchwo\. r3,r4,r5
+.*: (10 64 29 d8|d8 29 64 10) macchws r3,r4,r5
+.*: (10 64 29 d9|d9 29 64 10) macchws\. r3,r4,r5
+.*: (10 64 2d d8|d8 2d 64 10) macchwso r3,r4,r5
+.*: (10 64 2d d9|d9 2d 64 10) macchwso\. r3,r4,r5
+.*: (10 64 29 98|98 29 64 10) macchwsu r3,r4,r5
+.*: (10 64 29 99|99 29 64 10) macchwsu\. r3,r4,r5
+.*: (10 64 2d 98|98 2d 64 10) macchwsuo r3,r4,r5
+.*: (10 64 2d 99|99 2d 64 10) macchwsuo\. r3,r4,r5
+.*: (10 64 29 18|18 29 64 10) macchwu r3,r4,r5
+.*: (10 64 29 19|19 29 64 10) macchwu\. r3,r4,r5
+.*: (10 64 2d 18|18 2d 64 10) macchwuo r3,r4,r5
+.*: (10 64 2d 19|19 2d 64 10) macchwuo\. r3,r4,r5
+.*: (10 64 28 58|58 28 64 10) machhw r3,r4,r5
+.*: (10 64 28 59|59 28 64 10) machhw\. r3,r4,r5
+.*: (10 64 2c 58|58 2c 64 10) machhwo r3,r4,r5
+.*: (10 64 2c 59|59 2c 64 10) machhwo\. r3,r4,r5
+.*: (10 64 28 d8|d8 28 64 10) machhws r3,r4,r5
+.*: (10 64 28 d9|d9 28 64 10) machhws\. r3,r4,r5
+.*: (10 64 2c d8|d8 2c 64 10) machhwso r3,r4,r5
+.*: (10 64 2c d9|d9 2c 64 10) machhwso\. r3,r4,r5
+.*: (10 64 28 98|98 28 64 10) machhwsu r3,r4,r5
+.*: (10 64 28 99|99 28 64 10) machhwsu\. r3,r4,r5
+.*: (10 64 2c 98|98 2c 64 10) machhwsuo r3,r4,r5
+.*: (10 64 2c 99|99 2c 64 10) machhwsuo\. r3,r4,r5
+.*: (10 64 28 18|18 28 64 10) machhwu r3,r4,r5
+.*: (10 64 28 19|19 28 64 10) machhwu\. r3,r4,r5
+.*: (10 64 2c 18|18 2c 64 10) machhwuo r3,r4,r5
+.*: (10 64 2c 19|19 2c 64 10) machhwuo\. r3,r4,r5
+.*: (10 64 2b 58|58 2b 64 10) maclhw r3,r4,r5
+.*: (10 64 2b 59|59 2b 64 10) maclhw\. r3,r4,r5
+.*: (10 64 2f 58|58 2f 64 10) maclhwo r3,r4,r5
+.*: (10 64 2f 59|59 2f 64 10) maclhwo\. r3,r4,r5
+.*: (10 64 2b d8|d8 2b 64 10) maclhws r3,r4,r5
+.*: (10 64 2b d9|d9 2b 64 10) maclhws\. r3,r4,r5
+.*: (10 64 2f d8|d8 2f 64 10) maclhwso r3,r4,r5
+.*: (10 64 2f d9|d9 2f 64 10) maclhwso\. r3,r4,r5
+.*: (10 64 2b 98|98 2b 64 10) maclhwsu r3,r4,r5
+.*: (10 64 2b 99|99 2b 64 10) maclhwsu\. r3,r4,r5
+.*: (10 64 2f 98|98 2f 64 10) maclhwsuo r3,r4,r5
+.*: (10 64 2f 99|99 2f 64 10) maclhwsuo\. r3,r4,r5
+.*: (10 64 2b 18|18 2b 64 10) maclhwu r3,r4,r5
+.*: (10 64 2b 19|19 2b 64 10) maclhwu\. r3,r4,r5
+.*: (10 64 2f 18|18 2f 64 10) maclhwuo r3,r4,r5
+.*: (10 64 2f 19|19 2f 64 10) maclhwuo\. r3,r4,r5
+.*: (7c 00 06 ac|ac 06 00 7c) mbar
+.*: (7c 00 06 ac|ac 06 00 7c) mbar
+.*: (7c 20 06 ac|ac 06 20 7c) mbar 1
+.*: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1
+.*: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4
+.*: (7d 80 04 00|00 04 80 7d) mcrxr cr3
+.*: (7c 60 00 26|26 00 60 7c) mfcr r3
+.*: (7c 60 00 26|26 00 60 7c) mfcr r3
+.*: (7c aa 3a 86|86 3a aa 7c) mfdcr r5,234
+.*: (7c 64 02 46|46 02 64 7c) mfdcrux r3,r4
+.*: (7c 85 02 06|06 02 85 7c) mfdcrx r4,r5
+.*: (ff c0 04 8e|8e 04 c0 ff) mffs f30
+.*: (ff e0 04 8f|8f 04 e0 ff) mffs\. f31
+.*: (7e 60 00 a6|a6 00 60 7e) mfmsr r19
+.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
+.*: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128
+.*: (7c 6c 42 a6|a6 42 6c 7c) mftb r3
+.*: (7c 00 04 ac|ac 04 00 7c) msync
+.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
+.*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
+.*: (7d 10 6b 86|86 6b 10 7d) mtdcr 432,r8
+.*: (7c 83 03 46|46 03 83 7c) mtdcrux r3,r4
+.*: (7c e6 03 06|06 03 e6 7c) mtdcrx r6,r7
+.*: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3
+.*: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3
+.*: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3
+.*: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3
+.*: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
+.*: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
+.*: (fc 0d 55 8e|8e 55 0d fc) mtfsf 6,f10,0,1
+.*: (fe 0c 55 8e|8e 55 0c fe) mtfsf 6,f10,1
+.*: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11
+.*: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11
+.*: (fc 0d 5d 8f|8f 5d 0d fc) mtfsf\. 6,f11,0,1
+.*: (fe 0c 5d 8f|8f 5d 0c fe) mtfsf\. 6,f11,1
+.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
+.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
+.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
+.*: (ff 01 01 0c|0c 01 01 ff) mtfsfi 6,0,1
+.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15
+.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15
+.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15
+.*: (ff 01 f1 0d|0d f1 01 ff) mtfsfi\. 6,15,1
+.*: (7d 40 01 24|24 01 40 7d) mtmsr r10
+.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
+.*: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3
+.*: (10 64 29 50|50 29 64 10) mulchw r3,r4,r5
+.*: (10 64 29 51|51 29 64 10) mulchw\. r3,r4,r5
+.*: (10 64 29 10|10 29 64 10) mulchwu r3,r4,r5
+.*: (10 64 29 11|11 29 64 10) mulchwu\. r3,r4,r5
+.*: (10 64 28 50|50 28 64 10) mulhhw r3,r4,r5
+.*: (10 64 28 51|51 28 64 10) mulhhw\. r3,r4,r5
+.*: (10 64 28 10|10 28 64 10) mulhhwu r3,r4,r5
+.*: (10 64 28 11|11 28 64 10) mulhhwu\. r3,r4,r5
+.*: (7c 64 28 96|96 28 64 7c) mulhw r3,r4,r5
+.*: (7c 64 28 97|97 28 64 7c) mulhw\. r3,r4,r5
+.*: (7c 64 28 16|16 28 64 7c) mulhwu r3,r4,r5
+.*: (7c 64 28 17|17 28 64 7c) mulhwu\. r3,r4,r5
+.*: (10 64 2b 50|50 2b 64 10) mullhw r3,r4,r5
+.*: (10 64 2b 51|51 2b 64 10) mullhw\. r3,r4,r5
+.*: (10 64 2b 10|10 2b 64 10) mullhwu r3,r4,r5
+.*: (10 64 2b 11|11 2b 64 10) mullhwu\. r3,r4,r5
+.*: (1c 64 00 05|05 00 64 1c) mulli r3,r4,5
+.*: (7c 64 29 d6|d6 29 64 7c) mullw r3,r4,r5
+.*: (7c 64 29 d7|d7 29 64 7c) mullw\. r3,r4,r5
+.*: (7c 64 2d d6|d6 2d 64 7c) mullwo r3,r4,r5
+.*: (7c 64 2d d7|d7 2d 64 7c) mullwo\. r3,r4,r5
+.*: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30
+.*: (7f bc f3 b9|b9 f3 bc 7f) nand\. r28,r29,r30
+.*: (7c 64 00 d0|d0 00 64 7c) neg r3,r4
+.*: (7c 64 00 d1|d1 00 64 7c) neg\. r3,r4
+.*: (7e 11 04 d0|d0 04 11 7e) nego r16,r17
+.*: (7e 53 04 d1|d1 04 53 7e) nego\. r18,r19
+.*: (10 64 29 5c|5c 29 64 10) nmacchw r3,r4,r5
+.*: (10 64 29 5d|5d 29 64 10) nmacchw\. r3,r4,r5
+.*: (10 64 2d 5c|5c 2d 64 10) nmacchwo r3,r4,r5
+.*: (10 64 2d 5d|5d 2d 64 10) nmacchwo\. r3,r4,r5
+.*: (10 64 29 dc|dc 29 64 10) nmacchws r3,r4,r5
+.*: (10 64 29 dd|dd 29 64 10) nmacchws\. r3,r4,r5
+.*: (10 64 2d dc|dc 2d 64 10) nmacchwso r3,r4,r5
+.*: (10 64 2d dd|dd 2d 64 10) nmacchwso\. r3,r4,r5
+.*: (10 64 28 5c|5c 28 64 10) nmachhw r3,r4,r5
+.*: (10 64 28 5d|5d 28 64 10) nmachhw\. r3,r4,r5
+.*: (10 64 2c 5c|5c 2c 64 10) nmachhwo r3,r4,r5
+.*: (10 64 2c 5d|5d 2c 64 10) nmachhwo\. r3,r4,r5
+.*: (10 64 28 dc|dc 28 64 10) nmachhws r3,r4,r5
+.*: (10 64 28 dd|dd 28 64 10) nmachhws\. r3,r4,r5
+.*: (10 64 2c dc|dc 2c 64 10) nmachhwso r3,r4,r5
+.*: (10 64 2c dd|dd 2c 64 10) nmachhwso\. r3,r4,r5
+.*: (10 64 2b 5c|5c 2b 64 10) nmaclhw r3,r4,r5
+.*: (10 64 2b 5d|5d 2b 64 10) nmaclhw\. r3,r4,r5
+.*: (10 64 2f 5c|5c 2f 64 10) nmaclhwo r3,r4,r5
+.*: (10 64 2f 5d|5d 2f 64 10) nmaclhwo\. r3,r4,r5
+.*: (10 64 2b dc|dc 2b 64 10) nmaclhws r3,r4,r5
+.*: (10 64 2b dd|dd 2b 64 10) nmaclhws\. r3,r4,r5
+.*: (10 64 2f dc|dc 2f 64 10) nmaclhwso r3,r4,r5
+.*: (10 64 2f dd|dd 2f 64 10) nmaclhwso\. r3,r4,r5
+.*: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22
+.*: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22
+.*: (7c 40 23 78|78 23 40 7c) or r0,r2,r4
+.*: (7d cc 83 79|79 83 cc 7d) or\. r12,r14,r16
+.*: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17
+.*: (7e 72 a3 39|39 a3 72 7e) orc\. r18,r19,r20
+.*: (60 21 00 00|00 00 21 60) ori r1,r1,0
+.*: (64 83 de ad|ad de 83 64) oris r3,r4,57005
+.*: (7c 83 00 f4|f4 00 83 7c) popcntb r3,r4
+.*: (7c 83 01 34|34 01 83 7c) prtyw r3,r4
+.*: (4c 00 00 66|66 00 00 4c) rfci
+.*: (4c 00 00 64|64 00 00 4c) rfi
+.*: (4c 00 00 4c|4c 00 00 4c) rfmci
+.*: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27
+.*: (50 83 65 37|37 65 83 50) rlwimi\. r3,r4,12,20,27
+.*: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27
+.*: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31
+.*: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19
+.*: (54 83 00 37|37 00 83 54) rlwinm\. r3,r4,0,0,27
+.*: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5
+.*: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5
+.*: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5
+.*: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5
+.*: (44 00 00 02|02 00 00 44) sc
+.*: (7c 83 28 30|30 28 83 7c) slw r3,r4,r5
+.*: (7c 83 28 31|31 28 83 7c) slw\. r3,r4,r5
+.*: (7c 83 2e 30|30 2e 83 7c) sraw r3,r4,r5
+.*: (7c 83 2e 31|31 2e 83 7c) sraw\. r3,r4,r5
+.*: (7c 83 86 70|70 86 83 7c) srawi r3,r4,16
+.*: (7c 83 86 71|71 86 83 7c) srawi\. r3,r4,16
+.*: (7c 83 2c 30|30 2c 83 7c) srw r3,r4,r5
+.*: (7c 83 2c 31|31 2c 83 7c) srw\. r3,r4,r5
+.*: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31
+.*: (99 61 00 02|02 00 61 99) stb r11,2\(r1\)
+.*: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\)
+.*: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15
+.*: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5
+.*: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\)
+.*: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\)
+.*: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2
+.*: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31
+.*: (7d 43 27 ae|ae 27 43 7d) stfiwx f10,r3,r4
+.*: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\)
+.*: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\)
+.*: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28
+.*: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25
+.*: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\)
+.*: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8
+.*: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\)
+.*: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23
+.*: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14
+.*: (90 c7 ff f0|f0 ff c7 90) stw r6,-16\(r7\)
+.*: (7c 64 2d 2c|2c 2d 64 7c) stwbrx r3,r4,r5
+.*: (7c 64 29 2d|2d 29 64 7c) stwcx\. r3,r4,r5
+.*: (94 61 00 10|10 00 61 94) stwu r3,16\(r1\)
+.*: (7c 64 29 6e|6e 29 64 7c) stwux r3,r4,r5
+.*: (7c 64 29 2e|2e 29 64 7c) stwx r3,r4,r5
+.*: (7c 64 28 50|50 28 64 7c) subf r3,r4,r5
+.*: (7c 64 28 51|51 28 64 7c) subf\. r3,r4,r5
+.*: (7c 64 28 10|10 28 64 7c) subfc r3,r4,r5
+.*: (7c 64 28 11|11 28 64 7c) subfc\. r3,r4,r5
+.*: (7c 64 2c 10|10 2c 64 7c) subfco r3,r4,r5
+.*: (7c 64 2c 11|11 2c 64 7c) subfco\. r3,r4,r5
+.*: (7c 64 29 10|10 29 64 7c) subfe r3,r4,r5
+.*: (7c 64 29 11|11 29 64 7c) subfe\. r3,r4,r5
+.*: (7c 64 2d 10|10 2d 64 7c) subfeo r3,r4,r5
+.*: (7c 64 2d 11|11 2d 64 7c) subfeo\. r3,r4,r5
+.*: (20 64 00 05|05 00 64 20) subfic r3,r4,5
+.*: (7c 64 01 d0|d0 01 64 7c) subfme r3,r4
+.*: (7c 64 01 d1|d1 01 64 7c) subfme\. r3,r4
+.*: (7c 64 05 d0|d0 05 64 7c) subfmeo r3,r4
+.*: (7c 64 05 d1|d1 05 64 7c) subfmeo\. r3,r4
+.*: (7c 64 2c 50|50 2c 64 7c) subfo r3,r4,r5
+.*: (7c 64 2c 51|51 2c 64 7c) subfo\. r3,r4,r5
+.*: (7c 64 01 90|90 01 64 7c) subfze r3,r4
+.*: (7c 64 01 91|91 01 64 7c) subfze\. r3,r4
+.*: (7c 64 05 90|90 05 64 7c) subfzeo r3,r4
+.*: (7c 64 05 91|91 05 64 7c) subfzeo\. r3,r4
+.*: (7c 07 46 24|24 46 07 7c) tlbivax r7,r8
+.*: (7c 22 3f 64|64 3f 22 7c) tlbre r1,r2,7
+.*: (7c 0b 67 24|24 67 0b 7c) tlbsx r11,r12
+.*: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14
+.*: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14
+.*: (7c 00 04 6c|6c 04 00 7c) tlbsync
+.*: (7c 00 07 a4|a4 07 00 7c) tlbwe
+.*: (7c 00 07 a4|a4 07 00 7c) tlbwe
+.*: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1
+.*: (7f e0 00 08|08 00 e0 7f) trap
+.*: (7f e0 00 08|08 00 e0 7f) trap
+.*: (7c 83 20 08|08 20 83 7c) tweq r3,r4
+.*: (7c a3 20 08|08 20 a3 7c) twlge r3,r4
+.*: (7c 83 20 08|08 20 83 7c) tweq r3,r4
+.*: (0d 03 00 0f|0f 00 03 0d) twgti r3,15
+.*: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15
+.*: (0d 03 00 0f|0f 00 03 0d) twgti r3,15
+.*: (7c a3 20 08|08 20 a3 7c) twlge r3,r4
+.*: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15
+.*: (7c 60 01 06|06 01 60 7c) wrtee r3
+.*: (7c 00 81 46|46 81 00 7c) wrteei 1
+.*: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31
+.*: (7f dd fa 79|79 fa dd 7f) xor\. r29,r30,r31
+.*: (68 83 de ad|ad de 83 68) xori r3,r4,57005
+.*: (6c 83 de ad|ad de 83 6c) xoris r3,r4,57005
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/476.s fred/binutils-2.35.1/gas/testsuite/gas/ppc/476.s
--- binutils-2.35.1/gas/testsuite/gas/ppc/476.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/476.s 2020-11-25 14:37:47.000000000 +0000
@@ -226,9 +226,6 @@ ppc476:
lhzu 14,2(1)
lhzux 20,22,24
lhzx 23,24,25
- lmw 3,-16(1)
- lswi 5,4,16
- lswx 3,4,5
lwarx 3,4,5
lwarx 3,4,5,0
lwarx 3,4,5,1
@@ -433,9 +430,6 @@ ppc476:
sthu 18,12(1)
sthux 21,22,23
sthx 12,13,14
- stmw 6,-16(1)
- stswi 3,4,16
- stswx 3,4,5
stw 6,-16(7)
stwbrx 3,4,5
stwcx. 3,4,5
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/a2.d fred/binutils-2.35.1/gas/testsuite/gas/ppc/a2.d
--- binutils-2.35.1/gas/testsuite/gas/ppc/a2.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/a2.d 2020-11-25 14:37:47.000000000 +0000
@@ -9,577 +9,569 @@
Disassembly of section \.text:
0+00 <start>:
- 0: (7c 85 32 15|15 32 85 7c) add\. r4,r5,r6
- 4: (7c 85 32 14|14 32 85 7c) add r4,r5,r6
- 8: (7c 85 30 15|15 30 85 7c) addc\. r4,r5,r6
- c: (7c 85 30 14|14 30 85 7c) addc r4,r5,r6
- 10: (7c 85 34 15|15 34 85 7c) addco\. r4,r5,r6
- 14: (7c 85 34 14|14 34 85 7c) addco r4,r5,r6
- 18: (7c 85 31 15|15 31 85 7c) adde\. r4,r5,r6
- 1c: (7c 85 31 14|14 31 85 7c) adde r4,r5,r6
- 20: (7c 85 35 15|15 35 85 7c) addeo\. r4,r5,r6
- 24: (7c 85 35 14|14 35 85 7c) addeo r4,r5,r6
- 28: (38 85 00 0d|0d 00 85 38) addi r4,r5,13
- 2c: (38 85 ff f3|f3 ff 85 38) addi r4,r5,-13
- 30: (34 85 00 0d|0d 00 85 34) addic\. r4,r5,13
- 34: (34 85 ff f3|f3 ff 85 34) addic\. r4,r5,-13
- 38: (30 85 00 0d|0d 00 85 30) addic r4,r5,13
- 3c: (30 85 ff f3|f3 ff 85 30) addic r4,r5,-13
- 40: (3c 85 00 17|17 00 85 3c) addis r4,r5,23
- 44: (3c 85 ff e9|e9 ff 85 3c) addis r4,r5,-23
- 48: (7c 85 01 d5|d5 01 85 7c) addme\. r4,r5
- 4c: (7c 85 01 d4|d4 01 85 7c) addme r4,r5
- 50: (7c 85 05 d5|d5 05 85 7c) addmeo\. r4,r5
- 54: (7c 85 05 d4|d4 05 85 7c) addmeo r4,r5
- 58: (7c 85 36 15|15 36 85 7c) addo\. r4,r5,r6
- 5c: (7c 85 36 14|14 36 85 7c) addo r4,r5,r6
- 60: (7c 85 01 95|95 01 85 7c) addze\. r4,r5
- 64: (7c 85 01 94|94 01 85 7c) addze r4,r5
- 68: (7c 85 05 95|95 05 85 7c) addzeo\. r4,r5
- 6c: (7c 85 05 94|94 05 85 7c) addzeo r4,r5
- 70: (7c a4 30 39|39 30 a4 7c) and\. r4,r5,r6
- 74: (7c a4 30 38|38 30 a4 7c) and r4,r5,r6
- 78: (7c a4 30 79|79 30 a4 7c) andc\. r4,r5,r6
- 7c: (7c a4 30 78|78 30 a4 7c) andc r4,r5,r6
- 80: (70 a4 00 06|06 00 a4 70) andi\. r4,r5,6
- 84: (74 a4 00 06|06 00 a4 74) andis\. r4,r5,6
- 88: (00 00 02 00|00 02 00 00) attn
- 8c: (48 00 00 02|02 00 00 48) ba 0 <start>
- 8c: R_PPC(|64)_ADDR24 label_abs
- 90: (40 8a 00 00|00 00 8a 40) bne cr2,90 <start\+0x90>
- 90: R_PPC(|64)_REL14 foo
- 94: (40 ca 00 00|00 00 ca 40) bne- cr2,94 <start\+0x94>
- 94: R_PPC(|64)_REL14 foo
- 98: (40 ea 00 00|00 00 ea 40) bne\+ cr2,98 <start\+0x98>
- 98: R_PPC(|64)_REL14 foo
- 9c: (40 85 00 02|02 00 85 40) blea cr1,0 <start>
- 9c: R_PPC(|64)_ADDR14 foo_abs
- a0: (40 c5 00 02|02 00 c5 40) blea- cr1,0 <start>
- a0: R_PPC(|64)_ADDR14 foo_abs
- a4: (40 e5 00 02|02 00 e5 40) blea\+ cr1,0 <start>
- a4: R_PPC(|64)_ADDR14 foo_abs
- a8: (4c 86 0c 20|20 0c 86 4c) bcctr 4,4\*cr1\+eq,1
- ac: (4c c6 04 20|20 04 c6 4c) bnectr- cr1
- b0: (4c e6 04 20|20 04 e6 4c) bnectr\+ cr1
- b4: (4c 86 0c 21|21 0c 86 4c) bcctrl 4,4\*cr1\+eq,1
- b8: (4c c6 04 21|21 04 c6 4c) bnectrl- cr1
- bc: (4c e6 04 21|21 04 e6 4c) bnectrl\+ cr1
- c0: (40 8a 00 01|01 00 8a 40) bnel cr2,c0 <start\+0xc0>
- c0: R_PPC(|64)_REL14 foo
- c4: (40 ca 00 01|01 00 ca 40) bnel- cr2,c4 <start\+0xc4>
- c4: R_PPC(|64)_REL14 foo
- c8: (40 ea 00 01|01 00 ea 40) bnel\+ cr2,c8 <start\+0xc8>
- c8: R_PPC(|64)_REL14 foo
- cc: (40 85 00 03|03 00 85 40) blela cr1,0 <start>
- cc: R_PPC(|64)_ADDR14 foo_abs
- d0: (40 c5 00 03|03 00 c5 40) blela- cr1,0 <start>
- d0: R_PPC(|64)_ADDR14 foo_abs
- d4: (40 e5 00 03|03 00 e5 40) blela\+ cr1,0 <start>
- d4: R_PPC(|64)_ADDR14 foo_abs
- d8: (4c 86 08 20|20 08 86 4c) bclr 4,4\*cr1\+eq,1
- dc: (4c c6 00 20|20 00 c6 4c) bnelr- cr1
- e0: (4c e6 00 20|20 00 e6 4c) bnelr\+ cr1
- e4: (4c 86 08 21|21 08 86 4c) bclrl 4,4\*cr1\+eq,1
- e8: (4c c6 00 21|21 00 c6 4c) bnelrl- cr1
- ec: (4c e6 00 21|21 00 e6 4c) bnelrl\+ cr1
- f0: (48 00 00 00|00 00 00 48) b f0 <start\+0xf0>
- f0: R_PPC(|64)_REL24 label
- f4: (48 00 00 03|03 00 00 48) bla 0 <start>
- f4: R_PPC(|64)_ADDR24 label_abs
- f8: (48 00 00 01|01 00 00 48) bl f8 <start\+0xf8>
- f8: R_PPC(|64)_REL24 label
- fc: (7d 6a 61 f8|f8 61 6a 7d) bpermd r10,r11,r12
- 100: (7c a7 40 00|00 40 a7 7c) cmpd cr1,r7,r8
- 104: (7d 6a 63 f8|f8 63 6a 7d) cmpb r10,r11,r12
- 108: (2c aa 00 0d|0d 00 aa 2c) cmpdi cr1,r10,13
- 10c: (2c aa ff f3|f3 ff aa 2c) cmpdi cr1,r10,-13
- 110: (7c a7 40 40|40 40 a7 7c) cmpld cr1,r7,r8
- 114: (28 aa 00 64|64 00 aa 28) cmpldi cr1,r10,100
- 118: (7e b4 00 75|75 00 b4 7e) cntlzd\. r20,r21
- 11c: (7e b4 00 74|74 00 b4 7e) cntlzd r20,r21
- 120: (7e b4 00 35|35 00 b4 7e) cntlzw\. r20,r21
- 124: (7e b4 00 34|34 00 b4 7e) cntlzw r20,r21
- 128: (4c 22 1a 02|02 1a 22 4c) crand gt,eq,so
- 12c: (4c 22 19 02|02 19 22 4c) crandc gt,eq,so
- 130: (4c 22 1a 42|42 1a 22 4c) creqv gt,eq,so
- 134: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so
- 138: (4c 22 18 42|42 18 22 4c) crnor gt,eq,so
- 13c: (4c 22 1b 82|82 1b 22 4c) cror gt,eq,so
- 140: (4c 22 1b 42|42 1b 22 4c) crorc gt,eq,so
- 144: (4c 22 19 82|82 19 22 4c) crxor gt,eq,so
- 148: (7c 0a 5d ec|ec 5d 0a 7c) dcba r10,r11
- 14c: (7c 0a 58 ac|ac 58 0a 7c) dcbf r10,r11
- 150: (7c 2a 58 ac|ac 58 2a 7c) dcbfl r10,r11
- 154: (7c 0a 58 fe|fe 58 0a 7c) dcbfep r10,r11
- 158: (7c 0a 5b ac|ac 5b 0a 7c) dcbi r10,r11
- 15c: (7c 0a 5b 0c|0c 5b 0a 7c) dcblc r10,r11
- 160: (7c 2a 5b 0c|0c 5b 2a 7c) dcblc 1,r10,r11
- 164: (7c 0a 58 6c|6c 58 0a 7c) dcbst r10,r11
- 168: (7c 0a 58 7e|7e 58 0a 7c) dcbstep r10,r11
- 16c: (7c 0a 5a 2c|2c 5a 0a 7c) dcbt r10,r11
- 170: (7c 2a 5a 2c|2c 5a 2a 7c) dcbt 1,r10,r11
- 174: (7d 4b 62 7e|7e 62 4b 7d) dcbtep r10,r11,r12
- 178: (7c 0a 59 4c|4c 59 0a 7c) dcbtls r10,r11
- 17c: (7c 2a 59 4c|4c 59 2a 7c) dcbtls 1,r10,r11
- 180: (7c 0a 59 ec|ec 59 0a 7c) dcbtst r10,r11
- 184: (7c 2a 59 ec|ec 59 2a 7c) dcbtst 1,r10,r11
- 188: (7d 4b 61 fe|fe 61 4b 7d) dcbtstep r10,r11,r12
- 18c: (7c 0a 59 0c|0c 59 0a 7c) dcbtstls r10,r11
- 190: (7c 2a 59 0c|0c 59 2a 7c) dcbtstls 1,r10,r11
- 194: (7c 0a 5f ec|ec 5f 0a 7c) dcbz r10,r11
- 198: (7c 0a 5f fe|fe 5f 0a 7c) dcbzep r10,r11
- 19c: (7c 00 03 8c|8c 03 00 7c) dccci
- 1a0: (7c 00 03 8c|8c 03 00 7c) dccci
- 1a4: (7c 00 03 8c|8c 03 00 7c) dccci
- 1a8: (7d 40 03 8c|8c 03 40 7d) dci 10
- 1ac: (7e 95 b3 d3|d3 b3 95 7e) divd\. r20,r21,r22
- 1b0: (7e 95 b3 d2|d2 b3 95 7e) divd r20,r21,r22
- 1b4: (7e 95 b7 d3|d3 b7 95 7e) divdo\. r20,r21,r22
- 1b8: (7e 95 b7 d2|d2 b7 95 7e) divdo r20,r21,r22
- 1bc: (7e 95 b3 93|93 b3 95 7e) divdu\. r20,r21,r22
- 1c0: (7e 95 b3 92|92 b3 95 7e) divdu r20,r21,r22
- 1c4: (7e 95 b7 93|93 b7 95 7e) divduo\. r20,r21,r22
- 1c8: (7e 95 b7 92|92 b7 95 7e) divduo r20,r21,r22
- 1cc: (7e 95 b3 d7|d7 b3 95 7e) divw\. r20,r21,r22
- 1d0: (7e 95 b3 d6|d6 b3 95 7e) divw r20,r21,r22
- 1d4: (7e 95 b7 d7|d7 b7 95 7e) divwo\. r20,r21,r22
- 1d8: (7e 95 b7 d6|d6 b7 95 7e) divwo r20,r21,r22
- 1dc: (7e 95 b3 97|97 b3 95 7e) divwu\. r20,r21,r22
- 1e0: (7e 95 b3 96|96 b3 95 7e) divwu r20,r21,r22
- 1e4: (7e 95 b7 97|97 b7 95 7e) divwuo\. r20,r21,r22
- 1e8: (7e 95 b7 96|96 b7 95 7e) divwuo r20,r21,r22
- 1ec: (7e b4 b2 39|39 b2 b4 7e) eqv\. r20,r21,r22
- 1f0: (7e b4 b2 38|38 b2 b4 7e) eqv r20,r21,r22
- 1f4: (7c 0a 58 66|66 58 0a 7c) eratilx 0,r10,r11
- 1f8: (7c 2a 58 66|66 58 2a 7c) eratilx 1,r10,r11
- 1fc: (7c ea 58 66|66 58 ea 7c) eratilx 7,r10,r11
- 200: (7d 4b 66 66|66 66 4b 7d) erativax r10,r11,r12
- 204: (7d 4b 01 66|66 01 4b 7d) eratre r10,r11,0
- 208: (7d 4b 19 66|66 19 4b 7d) eratre r10,r11,3
- 20c: (7d 4b 61 27|27 61 4b 7d) eratsx\. r10,r11,r12
- 210: (7d 4b 61 26|26 61 4b 7d) eratsx r10,r11,r12
- 214: (7d 4b 01 a6|a6 01 4b 7d) eratwe r10,r11,0
- 218: (7d 4b 19 a6|a6 19 4b 7d) eratwe r10,r11,3
- 21c: (7d 6a 07 75|75 07 6a 7d) extsb\. r10,r11
- 220: (7d 6a 07 74|74 07 6a 7d) extsb r10,r11
- 224: (7d 6a 07 35|35 07 6a 7d) extsh\. r10,r11
- 228: (7d 6a 07 34|34 07 6a 7d) extsh r10,r11
- 22c: (7d 6a 07 b5|b5 07 6a 7d) extsw\. r10,r11
- 230: (7d 6a 07 b4|b4 07 6a 7d) extsw r10,r11
- 234: (fe 80 aa 11|11 aa 80 fe) fabs\. f20,f21
- 238: (fe 80 aa 10|10 aa 80 fe) fabs f20,f21
- 23c: (fe 95 b0 2b|2b b0 95 fe) fadd\. f20,f21,f22
- 240: (fe 95 b0 2a|2a b0 95 fe) fadd f20,f21,f22
- 244: (ee 95 b0 2b|2b b0 95 ee) fadds\. f20,f21,f22
- 248: (ee 95 b0 2a|2a b0 95 ee) fadds f20,f21,f22
- 24c: (fe 80 ae 9d|9d ae 80 fe) fcfid\. f20,f21
- 250: (fe 80 ae 9c|9c ae 80 fe) fcfid f20,f21
- 254: (fc 14 a8 40|40 a8 14 fc) fcmpo cr0,f20,f21
- 258: (fc 94 a8 40|40 a8 94 fc) fcmpo cr1,f20,f21
- 25c: (fc 14 a8 00|00 a8 14 fc) fcmpu cr0,f20,f21
- 260: (fc 94 a8 00|00 a8 94 fc) fcmpu cr1,f20,f21
- 264: (fe 95 b0 11|11 b0 95 fe) fcpsgn\. f20,f21,f22
- 268: (fe 95 b0 10|10 b0 95 fe) fcpsgn f20,f21,f22
- 26c: (fe 80 ae 5d|5d ae 80 fe) fctid\. f20,f21
- 270: (fe 80 ae 5c|5c ae 80 fe) fctid f20,f21
- 274: (fe 80 ae 5f|5f ae 80 fe) fctidz\. f20,f21
- 278: (fe 80 ae 5e|5e ae 80 fe) fctidz f20,f21
- 27c: (fe 80 a8 1d|1d a8 80 fe) fctiw\. f20,f21
- 280: (fe 80 a8 1c|1c a8 80 fe) fctiw f20,f21
- 284: (fe 80 a8 1f|1f a8 80 fe) fctiwz\. f20,f21
- 288: (fe 80 a8 1e|1e a8 80 fe) fctiwz f20,f21
- 28c: (fe 95 b0 25|25 b0 95 fe) fdiv\. f20,f21,f22
- 290: (fe 95 b0 24|24 b0 95 fe) fdiv f20,f21,f22
- 294: (ee 95 b0 25|25 b0 95 ee) fdivs\. f20,f21,f22
- 298: (ee 95 b0 24|24 b0 95 ee) fdivs f20,f21,f22
- 29c: (fe 95 bd bb|bb bd 95 fe) fmadd\. f20,f21,f22,f23
- 2a0: (fe 95 bd ba|ba bd 95 fe) fmadd f20,f21,f22,f23
- 2a4: (ee 95 bd bb|bb bd 95 ee) fmadds\. f20,f21,f22,f23
- 2a8: (ee 95 bd ba|ba bd 95 ee) fmadds f20,f21,f22,f23
- 2ac: (fe 80 a8 91|91 a8 80 fe) fmr\. f20,f21
- 2b0: (fe 80 a8 90|90 a8 80 fe) fmr f20,f21
- 2b4: (fe 95 bd b9|b9 bd 95 fe) fmsub\. f20,f21,f22,f23
- 2b8: (fe 95 bd b8|b8 bd 95 fe) fmsub f20,f21,f22,f23
- 2bc: (ee 95 bd b9|b9 bd 95 ee) fmsubs\. f20,f21,f22,f23
- 2c0: (ee 95 bd b8|b8 bd 95 ee) fmsubs f20,f21,f22,f23
- 2c4: (fe 95 05 b3|b3 05 95 fe) fmul\. f20,f21,f22
- 2c8: (fe 95 05 b2|b2 05 95 fe) fmul f20,f21,f22
- 2cc: (ee 95 05 b3|b3 05 95 ee) fmuls\. f20,f21,f22
- 2d0: (ee 95 05 b2|b2 05 95 ee) fmuls f20,f21,f22
- 2d4: (fe 80 a9 11|11 a9 80 fe) fnabs\. f20,f21
- 2d8: (fe 80 a9 10|10 a9 80 fe) fnabs f20,f21
- 2dc: (fe 80 a8 51|51 a8 80 fe) fneg\. f20,f21
- 2e0: (fe 80 a8 50|50 a8 80 fe) fneg f20,f21
- 2e4: (fe 95 bd bf|bf bd 95 fe) fnmadd\. f20,f21,f22,f23
- 2e8: (fe 95 bd be|be bd 95 fe) fnmadd f20,f21,f22,f23
- 2ec: (ee 95 bd bf|bf bd 95 ee) fnmadds\. f20,f21,f22,f23
- 2f0: (ee 95 bd be|be bd 95 ee) fnmadds f20,f21,f22,f23
- 2f4: (fe 95 bd bd|bd bd 95 fe) fnmsub\. f20,f21,f22,f23
- 2f8: (fe 95 bd bc|bc bd 95 fe) fnmsub f20,f21,f22,f23
- 2fc: (ee 95 bd bd|bd bd 95 ee) fnmsubs\. f20,f21,f22,f23
- 300: (ee 95 bd bc|bc bd 95 ee) fnmsubs f20,f21,f22,f23
- 304: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21
- 308: (fe 80 a8 30|30 a8 80 fe) fre f20,f21
- 30c: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21
- 310: (fe 80 a8 30|30 a8 80 fe) fre f20,f21
- 314: (fe 81 a8 31|31 a8 81 fe) fre\. f20,f21,1
- 318: (fe 81 a8 30|30 a8 81 fe) fre f20,f21,1
- 31c: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21
- 320: (ee 80 a8 30|30 a8 80 ee) fres f20,f21
- 324: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21
- 328: (ee 80 a8 30|30 a8 80 ee) fres f20,f21
- 32c: (ee 81 a8 31|31 a8 81 ee) fres\. f20,f21,1
- 330: (ee 81 a8 30|30 a8 81 ee) fres f20,f21,1
- 334: (fe 80 ab d1|d1 ab 80 fe) frim\. f20,f21
- 338: (fe 80 ab d0|d0 ab 80 fe) frim f20,f21
- 33c: (fe 80 ab 11|11 ab 80 fe) frin\. f20,f21
- 340: (fe 80 ab 10|10 ab 80 fe) frin f20,f21
- 344: (fe 80 ab 91|91 ab 80 fe) frip\. f20,f21
- 348: (fe 80 ab 90|90 ab 80 fe) frip f20,f21
- 34c: (fe 80 ab 51|51 ab 80 fe) friz\. f20,f21
- 350: (fe 80 ab 50|50 ab 80 fe) friz f20,f21
- 354: (fe 80 a8 19|19 a8 80 fe) frsp\. f20,f21
- 358: (fe 80 a8 18|18 a8 80 fe) frsp f20,f21
- 35c: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21
- 360: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21
- 364: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21
- 368: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21
- 36c: (fe 81 a8 35|35 a8 81 fe) frsqrte\. f20,f21,1
- 370: (fe 81 a8 34|34 a8 81 fe) frsqrte f20,f21,1
- 374: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21
- 378: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21
- 37c: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21
- 380: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21
- 384: (ee 81 a8 34|34 a8 81 ee) frsqrtes f20,f21,1
- 388: (ee 81 a8 35|35 a8 81 ee) frsqrtes\. f20,f21,1
- 38c: (fe 95 bd af|af bd 95 fe) fsel\. f20,f21,f22,f23
- 390: (fe 95 bd ae|ae bd 95 fe) fsel f20,f21,f22,f23
- 394: (fe 80 a8 2d|2d a8 80 fe) fsqrt\. f20,f21
- 398: (fe 80 a8 2c|2c a8 80 fe) fsqrt f20,f21
- 39c: (ee 80 a8 2d|2d a8 80 ee) fsqrts\. f20,f21
- 3a0: (ee 80 a8 2c|2c a8 80 ee) fsqrts f20,f21
- 3a4: (fe 95 b0 29|29 b0 95 fe) fsub\. f20,f21,f22
- 3a8: (fe 95 b0 28|28 b0 95 fe) fsub f20,f21,f22
- 3ac: (ee 95 b0 29|29 b0 95 ee) fsubs\. f20,f21,f22
- 3b0: (ee 95 b0 28|28 b0 95 ee) fsubs f20,f21,f22
- 3b4: (7c 0a 5f ac|ac 5f 0a 7c) icbi r10,r11
- 3b8: (7c 0a 5f be|be 5f 0a 7c) icbiep r10,r11
- 3bc: (7c 0a 58 2c|2c 58 0a 7c) icbt r10,r11
- 3c0: (7c ea 58 2c|2c 58 ea 7c) icbt 7,r10,r11
- 3c4: (7c 0a 5b cc|cc 5b 0a 7c) icbtls r10,r11
- 3c8: (7c ea 5b cc|cc 5b ea 7c) icbtls 7,r10,r11
- 3cc: (7c 00 07 8c|8c 07 00 7c) iccci
- 3d0: (7c 00 07 8c|8c 07 00 7c) iccci
- 3d4: (7c 00 07 8c|8c 07 00 7c) iccci
- 3d8: (7d 40 07 8c|8c 07 40 7d) ici 10
- 3dc: (7d 4b 63 2d|2d 63 4b 7d) icswx\. r10,r11,r12
- 3e0: (7d 4b 63 2c|2c 63 4b 7d) icswx r10,r11,r12
- 3e4: (7d 4b 65 de|de 65 4b 7d) isel r10,r11,r12,23
- 3e8: (4c 00 01 2c|2c 01 00 4c) isync
- 3ec: (7d 4b 60 be|be 60 4b 7d) lbepx r10,r11,r12
- 3f0: (89 4b ff ef|ef ff 4b 89) lbz r10,-17\(r11\)
- 3f4: (89 4b 00 11|11 00 4b 89) lbz r10,17\(r11\)
- 3f8: (8d 4b ff ff|ff ff 4b 8d) lbzu r10,-1\(r11\)
- 3fc: (8d 4b 00 01|01 00 4b 8d) lbzu r10,1\(r11\)
- 400: (7d 4b 68 ee|ee 68 4b 7d) lbzux r10,r11,r13
- 404: (7d 4b 68 ae|ae 68 4b 7d) lbzx r10,r11,r13
- 408: (e9 4b ff f8|f8 ff 4b e9) ld r10,-8\(r11\)
- 40c: (e9 4b 00 08|08 00 4b e9) ld r10,8\(r11\)
- 410: (7d 4b 60 a8|a8 60 4b 7d) ldarx r10,r11,r12
- 414: (7d 4b 60 a9|a9 60 4b 7d) ldarx r10,r11,r12,1
- 418: (7d 4b 64 28|28 64 4b 7d) ldbrx r10,r11,r12
- 41c: (7d 4b 60 3a|3a 60 4b 7d) ldepx r10,r11,r12
- 420: (e9 4b ff f9|f9 ff 4b e9) ldu r10,-8\(r11\)
- 424: (e9 4b 00 09|09 00 4b e9) ldu r10,8\(r11\)
- 428: (7d 4b 60 6a|6a 60 4b 7d) ldux r10,r11,r12
- 42c: (7d 4b 60 2a|2a 60 4b 7d) ldx r10,r11,r12
- 430: (ca 8a ff f8|f8 ff 8a ca) lfd f20,-8\(r10\)
- 434: (ca 8a 00 08|08 00 8a ca) lfd f20,8\(r10\)
- 438: (7e 8a 5c be|be 5c 8a 7e) lfdepx f20,r10,r11
- 43c: (ce 8a ff f8|f8 ff 8a ce) lfdu f20,-8\(r10\)
- 440: (ce 8a 00 08|08 00 8a ce) lfdu f20,8\(r10\)
- 444: (7e 8a 5c ee|ee 5c 8a 7e) lfdux f20,r10,r11
- 448: (7e 8a 5c ae|ae 5c 8a 7e) lfdx f20,r10,r11
- 44c: (7e 8a 5e ae|ae 5e 8a 7e) lfiwax f20,r10,r11
- 450: (7e 8a 5e ee|ee 5e 8a 7e) lfiwzx f20,r10,r11
- 454: (c2 8a ff fc|fc ff 8a c2) lfs f20,-4\(r10\)
- 458: (c2 8a 00 04|04 00 8a c2) lfs f20,4\(r10\)
- 45c: (c6 8a ff fc|fc ff 8a c6) lfsu f20,-4\(r10\)
- 460: (c6 8a 00 04|04 00 8a c6) lfsu f20,4\(r10\)
- 464: (7e 8a 5c 6e|6e 5c 8a 7e) lfsux f20,r10,r11
- 468: (7e 8a 5c 2e|2e 5c 8a 7e) lfsx f20,r10,r11
- 46c: (a9 4b 00 02|02 00 4b a9) lha r10,2\(r11\)
- 470: (ad 4b ff fe|fe ff 4b ad) lhau r10,-2\(r11\)
- 474: (7d 4b 62 ee|ee 62 4b 7d) lhaux r10,r11,r12
- 478: (7d 4b 62 ae|ae 62 4b 7d) lhax r10,r11,r12
- 47c: (7d 4b 66 2c|2c 66 4b 7d) lhbrx r10,r11,r12
- 480: (7d 4b 62 3e|3e 62 4b 7d) lhepx r10,r11,r12
- 484: (a1 4b ff fe|fe ff 4b a1) lhz r10,-2\(r11\)
- 488: (a1 4b 00 02|02 00 4b a1) lhz r10,2\(r11\)
- 48c: (a5 4b ff fe|fe ff 4b a5) lhzu r10,-2\(r11\)
- 490: (a5 4b 00 02|02 00 4b a5) lhzu r10,2\(r11\)
- 494: (7d 4b 62 6e|6e 62 4b 7d) lhzux r10,r11,r12
- 498: (7d 4b 62 2e|2e 62 4b 7d) lhzx r10,r11,r12
- 49c: (ba 8a 00 10|10 00 8a ba) lmw r20,16\(r10\)
- 4a0: (7d 4b 0c aa|aa 0c 4b 7d) lswi r10,r11,1
- 4a4: (7d 8b 04 aa|aa 04 8b 7d) lswi r12,r11,32
- 4a8: (7d 4b 64 2a|2a 64 4b 7d) lswx r10,r11,r12
- 4ac: (e9 4b ff fe|fe ff 4b e9) lwa r10,-4\(r11\)
- 4b0: (e9 4b 00 06|06 00 4b e9) lwa r10,4\(r11\)
- 4b4: (7d 4b 60 28|28 60 4b 7d) lwarx r10,r11,r12
- 4b8: (7d 4b 60 29|29 60 4b 7d) lwarx r10,r11,r12,1
- 4bc: (7d 4b 62 ea|ea 62 4b 7d) lwaux r10,r11,r12
- 4c0: (7d 4b 62 aa|aa 62 4b 7d) lwax r10,r11,r12
- 4c4: (7d 4b 64 2c|2c 64 4b 7d) lwbrx r10,r11,r12
- 4c8: (7d 4b 60 3e|3e 60 4b 7d) lwepx r10,r11,r12
- 4cc: (81 4b ff fc|fc ff 4b 81) lwz r10,-4\(r11\)
- 4d0: (81 4b 00 04|04 00 4b 81) lwz r10,4\(r11\)
- 4d4: (85 4b ff fc|fc ff 4b 85) lwzu r10,-4\(r11\)
- 4d8: (85 4b 00 04|04 00 4b 85) lwzu r10,4\(r11\)
- 4dc: (7d 4b 60 6e|6e 60 4b 7d) lwzux r10,r11,r12
- 4e0: (7d 4b 60 2e|2e 60 4b 7d) lwzx r10,r11,r12
- 4e4: (7c 00 06 ac|ac 06 00 7c) mbar
- 4e8: (7c 00 06 ac|ac 06 00 7c) mbar
- 4ec: (7c 00 06 ac|ac 06 00 7c) mbar
- 4f0: (7c 20 06 ac|ac 06 20 7c) mbar 1
- 4f4: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1
- 4f8: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4
- 4fc: (7c 00 04 00|00 04 00 7c) mcrxr cr0
- 500: (7d 80 04 00|00 04 80 7d) mcrxr cr3
- 504: (7c 60 00 26|26 00 60 7c) mfcr r3
- 508: (7c 70 20 26|26 20 70 7c) mfocrf r3,2
- 50c: (7c 70 10 26|26 10 70 7c) mfocrf r3,1
- 510: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
- 514: (7d 4a 3a 87|87 3a 4a 7d) mfdcr\. r10,234
- 518: (7d 4a 3a 86|86 3a 4a 7d) mfdcr r10,234
- 51c: (7d 4b 02 07|07 02 4b 7d) mfdcrx\. r10,r11
- 520: (7d 4b 02 06|06 02 4b 7d) mfdcrx r10,r11
- 524: (fe 80 04 8f|8f 04 80 fe) mffs\. f20
- 528: (fe 80 04 8e|8e 04 80 fe) mffs f20
- 52c: (7d 40 00 a6|a6 00 40 7d) mfmsr r10
- 530: (7c 70 10 26|26 10 70 7c) mfocrf r3,1
- 534: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
- 538: (7d 4a 3a a6|a6 3a 4a 7d) mfspr r10,234
- 53c: (7d 4c 42 a6|a6 42 4c 7d) mftb r10
- 540: (7d 4d 42 a6|a6 42 4d 7d) mftbu r10
- 544: (7c 00 51 dc|dc 51 00 7c) msgclr r10
- 548: (7c 00 51 9c|9c 51 00 7c) msgsnd r10
- 54c: (7c 60 01 20|20 01 60 7c) mtcrf 0,r3
- 550: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3
- 554: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
- 558: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
- 55c: (7d 4a 3b 87|87 3b 4a 7d) mtdcr\. 234,r10
- 560: (7d 4a 3b 86|86 3b 4a 7d) mtdcr 234,r10
- 564: (7d 6a 03 07|07 03 6a 7d) mtdcrx\. r10,r11
- 568: (7d 6a 03 06|06 03 6a 7d) mtdcrx r10,r11
- 56c: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3
- 570: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3
- 574: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3
- 578: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3
- 57c: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20
- 580: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20
- 584: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20
- 588: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20
- 58c: (fe 0d a5 8f|8f a5 0d fe) mtfsf\. 6,f20,1,1
- 590: (fe 0d a5 8e|8e a5 0d fe) mtfsf 6,f20,1,1
- 594: (ff 00 01 0d|0d 01 00 ff) mtfsfi\. 6,0
- 598: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
- 59c: (ff 00 d1 0d|0d d1 00 ff) mtfsfi\. 6,13
- 5a0: (ff 00 d1 0c|0c d1 00 ff) mtfsfi 6,13
- 5a4: (ff 01 d1 0d|0d d1 01 ff) mtfsfi\. 6,13,1
- 5a8: (ff 01 d1 0c|0c d1 01 ff) mtfsfi 6,13,1
- 5ac: (7d 40 01 24|24 01 40 7d) mtmsr r10
- 5b0: (7d 40 01 24|24 01 40 7d) mtmsr r10
- 5b4: (7d 41 01 24|24 01 41 7d) mtmsr r10,1
- 5b8: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3
- 5bc: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
- 5c0: (7d 4a 3b a6|a6 3b 4a 7d) mtspr 234,r10
- 5c4: (7e 95 b0 93|93 b0 95 7e) mulhd\. r20,r21,r22
- 5c8: (7e 95 b0 92|92 b0 95 7e) mulhd r20,r21,r22
- 5cc: (7e 95 b0 13|13 b0 95 7e) mulhdu\. r20,r21,r22
- 5d0: (7e 95 b0 12|12 b0 95 7e) mulhdu r20,r21,r22
- 5d4: (7e 95 b0 97|97 b0 95 7e) mulhw\. r20,r21,r22
- 5d8: (7e 95 b0 96|96 b0 95 7e) mulhw r20,r21,r22
- 5dc: (7e 95 b0 17|17 b0 95 7e) mulhwu\. r20,r21,r22
- 5e0: (7e 95 b0 16|16 b0 95 7e) mulhwu r20,r21,r22
- 5e4: (7e 95 b1 d3|d3 b1 95 7e) mulld\. r20,r21,r22
- 5e8: (7e 95 b1 d2|d2 b1 95 7e) mulld r20,r21,r22
- 5ec: (7e 95 b5 d3|d3 b5 95 7e) mulldo\. r20,r21,r22
- 5f0: (7e 95 b5 d2|d2 b5 95 7e) mulldo r20,r21,r22
- 5f4: (1e 95 00 64|64 00 95 1e) mulli r20,r21,100
- 5f8: (1e 95 ff 9c|9c ff 95 1e) mulli r20,r21,-100
- 5fc: (7e 95 b1 d7|d7 b1 95 7e) mullw\. r20,r21,r22
- 600: (7e 95 b1 d6|d6 b1 95 7e) mullw r20,r21,r22
- 604: (7e 95 b5 d7|d7 b5 95 7e) mullwo\. r20,r21,r22
- 608: (7e 95 b5 d6|d6 b5 95 7e) mullwo r20,r21,r22
- 60c: (7e b4 b3 b9|b9 b3 b4 7e) nand\. r20,r21,r22
- 610: (7e b4 b3 b8|b8 b3 b4 7e) nand r20,r21,r22
- 614: (7e 95 00 d1|d1 00 95 7e) neg\. r20,r21
- 618: (7e 95 00 d0|d0 00 95 7e) neg r20,r21
- 61c: (7e 95 04 d1|d1 04 95 7e) nego\. r20,r21
- 620: (7e 95 04 d0|d0 04 95 7e) nego r20,r21
- 624: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22
- 628: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22
- 62c: (7e b4 b3 79|79 b3 b4 7e) or\. r20,r21,r22
- 630: (7e b4 b3 78|78 b3 b4 7e) or r20,r21,r22
- 634: (7e b4 b3 39|39 b3 b4 7e) orc\. r20,r21,r22
- 638: (7e b4 b3 38|38 b3 b4 7e) orc r20,r21,r22
- 63c: (62 b4 10 00|00 10 b4 62) ori r20,r21,4096
- 640: (66 b4 10 00|00 10 b4 66) oris r20,r21,4096
- 644: (7d 6a 00 f4|f4 00 6a 7d) popcntb r10,r11
- 648: (7d 6a 03 f4|f4 03 6a 7d) popcntd r10,r11
- 64c: (7d 6a 02 f4|f4 02 6a 7d) popcntw r10,r11
- 650: (7d 6a 01 74|74 01 6a 7d) prtyd r10,r11
- 654: (7d 6a 01 34|34 01 6a 7d) prtyw r10,r11
- 658: (4c 00 00 66|66 00 00 4c) rfci
- 65c: (4c 00 00 cc|cc 00 00 4c) rfgi
- 660: (4c 00 00 64|64 00 00 4c) rfi
- 664: (4c 00 00 4c|4c 00 00 4c) rfmci
- 668: (79 6a 67 f1|f1 67 6a 79) rldcl\. r10,r11,r12,63
- 66c: (79 6a 67 f0|f0 67 6a 79) rldcl r10,r11,r12,63
- 670: (79 6a 67 f3|f3 67 6a 79) rldcr\. r10,r11,r12,63
- 674: (79 6a 67 f2|f2 67 6a 79) rldcr r10,r11,r12,63
- 678: (79 6a bf e9|e9 bf 6a 79) rldic\. r10,r11,23,63
- 67c: (79 6a bf e8|e8 bf 6a 79) rldic r10,r11,23,63
- 680: (79 6a bf e1|e1 bf 6a 79) rldicl\. r10,r11,23,63
- 684: (79 6a bf e0|e0 bf 6a 79) rldicl r10,r11,23,63
- 688: (79 6a bf e5|e5 bf 6a 79) rldicr\. r10,r11,23,63
- 68c: (79 6a bf e4|e4 bf 6a 79) rldicr r10,r11,23,63
- 690: (79 6a bf ed|ed bf 6a 79) rldimi\. r10,r11,23,63
- 694: (79 6a bf ec|ec bf 6a 79) rldimi r10,r11,23,63
- 698: (51 6a b8 3f|3f b8 6a 51) rlwimi\. r10,r11,23,0,31
- 69c: (51 6a b8 3e|3e b8 6a 51) rlwimi r10,r11,23,0,31
- 6a0: (55 6a b8 3f|3f b8 6a 55) rotlwi\. r10,r11,23
- 6a4: (55 6a b8 3e|3e b8 6a 55) rotlwi r10,r11,23
- 6a8: (5d 6a b8 3f|3f b8 6a 5d) rotlw\. r10,r11,r23
- 6ac: (5d 6a b8 3e|3e b8 6a 5d) rotlw r10,r11,r23
- 6b0: (44 00 00 02|02 00 00 44) sc
- 6b4: (44 00 0c 82|82 0c 00 44) sc 100
- 6b8: (7d 6a 60 37|37 60 6a 7d) sld\. r10,r11,r12
- 6bc: (7d 6a 60 36|36 60 6a 7d) sld r10,r11,r12
- 6c0: (7d 6a 60 31|31 60 6a 7d) slw\. r10,r11,r12
- 6c4: (7d 6a 60 30|30 60 6a 7d) slw r10,r11,r12
- 6c8: (7d 6a 66 35|35 66 6a 7d) srad\. r10,r11,r12
- 6cc: (7d 6a 66 34|34 66 6a 7d) srad r10,r11,r12
- 6d0: (7d 6a fe 77|77 fe 6a 7d) sradi\. r10,r11,63
- 6d4: (7d 6a fe 76|76 fe 6a 7d) sradi r10,r11,63
- 6d8: (7d 6a 66 31|31 66 6a 7d) sraw\. r10,r11,r12
- 6dc: (7d 6a 66 30|30 66 6a 7d) sraw r10,r11,r12
- 6e0: (7d 6a fe 71|71 fe 6a 7d) srawi\. r10,r11,31
- 6e4: (7d 6a fe 70|70 fe 6a 7d) srawi r10,r11,31
- 6e8: (7d 6a 64 37|37 64 6a 7d) srd\. r10,r11,r12
- 6ec: (7d 6a 64 36|36 64 6a 7d) srd r10,r11,r12
- 6f0: (7d 6a 64 31|31 64 6a 7d) srw\. r10,r11,r12
- 6f4: (7d 6a 64 30|30 64 6a 7d) srw r10,r11,r12
- 6f8: (99 4b ff ff|ff ff 4b 99) stb r10,-1\(r11\)
- 6fc: (99 4b 00 01|01 00 4b 99) stb r10,1\(r11\)
- 700: (7d 4b 61 be|be 61 4b 7d) stbepx r10,r11,r12
- 704: (9d 4b ff ff|ff ff 4b 9d) stbu r10,-1\(r11\)
- 708: (9d 4b 00 01|01 00 4b 9d) stbu r10,1\(r11\)
- 70c: (7d 4b 61 ee|ee 61 4b 7d) stbux r10,r11,r12
- 710: (7d 4b 61 ae|ae 61 4b 7d) stbx r10,r11,r12
- 714: (f9 4b ff f8|f8 ff 4b f9) std r10,-8\(r11\)
- 718: (f9 4b 00 08|08 00 4b f9) std r10,8\(r11\)
- 71c: (7d 4b 65 28|28 65 4b 7d) stdbrx r10,r11,r12
- 720: (7d 4b 61 ad|ad 61 4b 7d) stdcx\. r10,r11,r12
- 724: (7d 4b 61 3a|3a 61 4b 7d) stdepx r10,r11,r12
- 728: (f9 4b ff f9|f9 ff 4b f9) stdu r10,-8\(r11\)
- 72c: (f9 4b 00 09|09 00 4b f9) stdu r10,8\(r11\)
- 730: (7d 4b 61 6a|6a 61 4b 7d) stdux r10,r11,r12
- 734: (7d 4b 61 2a|2a 61 4b 7d) stdx r10,r11,r12
- 738: (da 8a ff f8|f8 ff 8a da) stfd f20,-8\(r10\)
- 73c: (da 8a 00 08|08 00 8a da) stfd f20,8\(r10\)
- 740: (7e 8a 5d be|be 5d 8a 7e) stfdepx f20,r10,r11
- 744: (de 8a ff f8|f8 ff 8a de) stfdu f20,-8\(r10\)
- 748: (de 8a 00 08|08 00 8a de) stfdu f20,8\(r10\)
- 74c: (7e 8a 5d ee|ee 5d 8a 7e) stfdux f20,r10,r11
- 750: (7e 8a 5d ae|ae 5d 8a 7e) stfdx f20,r10,r11
- 754: (7e 8a 5f ae|ae 5f 8a 7e) stfiwx f20,r10,r11
- 758: (d2 8a ff fc|fc ff 8a d2) stfs f20,-4\(r10\)
- 75c: (d2 8a 00 04|04 00 8a d2) stfs f20,4\(r10\)
- 760: (d6 8a ff fc|fc ff 8a d6) stfsu f20,-4\(r10\)
- 764: (d6 8a 00 04|04 00 8a d6) stfsu f20,4\(r10\)
- 768: (7e 8a 5d 6e|6e 5d 8a 7e) stfsux f20,r10,r11
- 76c: (7e 8a 5d 2e|2e 5d 8a 7e) stfsx f20,r10,r11
- 770: (b1 4b ff fe|fe ff 4b b1) sth r10,-2\(r11\)
- 774: (b1 4b 00 02|02 00 4b b1) sth r10,2\(r11\)
- 778: (b1 4b ff fc|fc ff 4b b1) sth r10,-4\(r11\)
- 77c: (b1 4b 00 04|04 00 4b b1) sth r10,4\(r11\)
- 780: (7d 4b 67 2c|2c 67 4b 7d) sthbrx r10,r11,r12
- 784: (7d 4b 63 3e|3e 63 4b 7d) sthepx r10,r11,r12
- 788: (b5 4b ff fe|fe ff 4b b5) sthu r10,-2\(r11\)
- 78c: (b5 4b 00 02|02 00 4b b5) sthu r10,2\(r11\)
- 790: (7d 4b 63 6e|6e 63 4b 7d) sthux r10,r11,r12
- 794: (7d 4b 63 2e|2e 63 4b 7d) sthx r10,r11,r12
- 798: (be 8a 00 10|10 00 8a be) stmw r20,16\(r10\)
- 79c: (7d 4b 0d aa|aa 0d 4b 7d) stswi r10,r11,1
- 7a0: (7d 4b 05 aa|aa 05 4b 7d) stswi r10,r11,32
- 7a4: (7d 4b 65 2a|2a 65 4b 7d) stswx r10,r11,r12
- 7a8: (7d 4b 65 2c|2c 65 4b 7d) stwbrx r10,r11,r12
- 7ac: (7d 4b 61 2d|2d 61 4b 7d) stwcx\. r10,r11,r12
- 7b0: (7d 4b 61 3e|3e 61 4b 7d) stwepx r10,r11,r12
- 7b4: (95 4b ff fc|fc ff 4b 95) stwu r10,-4\(r11\)
- 7b8: (95 4b 00 04|04 00 4b 95) stwu r10,4\(r11\)
- 7bc: (7d 4b 61 6e|6e 61 4b 7d) stwux r10,r11,r12
- 7c0: (7d 4b 61 2e|2e 61 4b 7d) stwx r10,r11,r12
- 7c4: (7e 95 b0 51|51 b0 95 7e) subf\. r20,r21,r22
- 7c8: (7e 95 b0 50|50 b0 95 7e) subf r20,r21,r22
- 7cc: (7e 95 b0 11|11 b0 95 7e) subfc\. r20,r21,r22
- 7d0: (7e 95 b0 10|10 b0 95 7e) subfc r20,r21,r22
- 7d4: (7e 95 b4 11|11 b4 95 7e) subfco\. r20,r21,r22
- 7d8: (7e 95 b4 10|10 b4 95 7e) subfco r20,r21,r22
- 7dc: (7e 95 b1 11|11 b1 95 7e) subfe\. r20,r21,r22
- 7e0: (7e 95 b1 10|10 b1 95 7e) subfe r20,r21,r22
- 7e4: (7e 95 b5 11|11 b5 95 7e) subfeo\. r20,r21,r22
- 7e8: (7e 95 b5 10|10 b5 95 7e) subfeo r20,r21,r22
- 7ec: (22 95 00 64|64 00 95 22) subfic r20,r21,100
- 7f0: (22 95 ff 9c|9c ff 95 22) subfic r20,r21,-100
- 7f4: (7e 95 01 d1|d1 01 95 7e) subfme\. r20,r21
- 7f8: (7e 95 01 d0|d0 01 95 7e) subfme r20,r21
- 7fc: (7e 95 05 d1|d1 05 95 7e) subfmeo\. r20,r21
- 800: (7e 95 05 d0|d0 05 95 7e) subfmeo r20,r21
- 804: (7e 95 b4 51|51 b4 95 7e) subfo\. r20,r21,r22
- 808: (7e 95 b4 50|50 b4 95 7e) subfo r20,r21,r22
- 80c: (7e 95 01 91|91 01 95 7e) subfze\. r20,r21
- 810: (7e 95 01 90|90 01 95 7e) subfze r20,r21
- 814: (7e 95 05 91|91 05 95 7e) subfzeo\. r20,r21
- 818: (7e 95 05 90|90 05 95 7e) subfzeo r20,r21
- 81c: (7c 00 04 ac|ac 04 00 7c) hwsync
- 820: (7c 00 04 ac|ac 04 00 7c) hwsync
- 824: (7c 00 04 ac|ac 04 00 7c) hwsync
- 828: (7c 20 04 ac|ac 04 20 7c) lwsync
- 82c: (7c aa 58 88|88 58 aa 7c) tdlge r10,r11
- 830: (08 aa 00 64|64 00 aa 08) tdlgei r10,100
- 834: (08 aa ff 9c|9c ff aa 08) tdlgei r10,-100
- 838: (7c 6a 58 24|24 58 6a 7c) tlbilxva r10,r11
- 83c: (7c 0a 5e 24|24 5e 0a 7c) tlbivax r10,r11
- 840: (7c 00 07 64|64 07 00 7c) tlbre
- 844: (7d 4b 3f 64|64 3f 4b 7d) tlbre r10,r11,7
- 848: (7c 0a 5e a5|a5 5e 0a 7c) tlbsrx\. r10,r11
- 84c: (7d 4b 67 25|25 67 4b 7d) tlbsx\. r10,r11,r12
- 850: (7d 4b 67 24|24 67 4b 7d) tlbsx r10,r11,r12
- 854: (7c 00 04 6c|6c 04 00 7c) tlbsync
- 858: (7c 00 07 a4|a4 07 00 7c) tlbwe
- 85c: (7d 4b 3f a4|a4 3f 4b 7d) tlbwe r10,r11,7
- 860: (7c aa 58 08|08 58 aa 7c) twlge r10,r11
- 864: (0c aa 00 64|64 00 aa 0c) twlgei r10,100
- 868: (0c aa ff 9c|9c ff aa 0c) twlgei r10,-100
- 86c: (7c 00 00 7c|7c 00 00 7c) wait
- 870: (7c 00 00 7c|7c 00 00 7c) wait
- 874: (7c 20 00 7c|7c 00 20 7c) waitrsv
- 878: (7c 40 00 7c|7c 00 40 7c) waitimpl
- 87c: (7c 40 00 7c|7c 00 40 7c) waitimpl
- 880: (7c 20 00 7c|7c 00 20 7c) waitrsv
- 884: (7c 00 01 6c|6c 01 00 7c) wchkall
- 888: (7c 00 01 6c|6c 01 00 7c) wchkall
- 88c: (7d 80 01 6c|6c 01 80 7d) wchkall cr3
- 890: (7c 2a 5f 4c|4c 5f 2a 7c) wclr 1,r10,r11
- 894: (7c 20 07 4c|4c 07 20 7c) wclrall 1
- 898: (7c 4a 5f 4c|4c 5f 4a 7c) wclrone r10,r11
- 89c: (7d 40 01 06|06 01 40 7d) wrtee r10
- 8a0: (7c 00 81 46|46 81 00 7c) wrteei 1
- 8a4: (7d 6a 62 79|79 62 6a 7d) xor\. r10,r11,r12
- 8a8: (7d 6a 62 78|78 62 6a 7d) xor r10,r11,r12
- 8ac: (69 6a 10 00|00 10 6a 69) xori r10,r11,4096
- 8b0: (6d 6a 10 00|00 10 6a 6d) xoris r10,r11,4096
+.*: (7c 85 32 15|15 32 85 7c) add\. r4,r5,r6
+.*: (7c 85 32 14|14 32 85 7c) add r4,r5,r6
+.*: (7c 85 30 15|15 30 85 7c) addc\. r4,r5,r6
+.*: (7c 85 30 14|14 30 85 7c) addc r4,r5,r6
+.*: (7c 85 34 15|15 34 85 7c) addco\. r4,r5,r6
+.*: (7c 85 34 14|14 34 85 7c) addco r4,r5,r6
+.*: (7c 85 31 15|15 31 85 7c) adde\. r4,r5,r6
+.*: (7c 85 31 14|14 31 85 7c) adde r4,r5,r6
+.*: (7c 85 35 15|15 35 85 7c) addeo\. r4,r5,r6
+.*: (7c 85 35 14|14 35 85 7c) addeo r4,r5,r6
+.*: (38 85 00 0d|0d 00 85 38) addi r4,r5,13
+.*: (38 85 ff f3|f3 ff 85 38) addi r4,r5,-13
+.*: (34 85 00 0d|0d 00 85 34) addic\. r4,r5,13
+.*: (34 85 ff f3|f3 ff 85 34) addic\. r4,r5,-13
+.*: (30 85 00 0d|0d 00 85 30) addic r4,r5,13
+.*: (30 85 ff f3|f3 ff 85 30) addic r4,r5,-13
+.*: (3c 85 00 17|17 00 85 3c) addis r4,r5,23
+.*: (3c 85 ff e9|e9 ff 85 3c) addis r4,r5,-23
+.*: (7c 85 01 d5|d5 01 85 7c) addme\. r4,r5
+.*: (7c 85 01 d4|d4 01 85 7c) addme r4,r5
+.*: (7c 85 05 d5|d5 05 85 7c) addmeo\. r4,r5
+.*: (7c 85 05 d4|d4 05 85 7c) addmeo r4,r5
+.*: (7c 85 36 15|15 36 85 7c) addo\. r4,r5,r6
+.*: (7c 85 36 14|14 36 85 7c) addo r4,r5,r6
+.*: (7c 85 01 95|95 01 85 7c) addze\. r4,r5
+.*: (7c 85 01 94|94 01 85 7c) addze r4,r5
+.*: (7c 85 05 95|95 05 85 7c) addzeo\. r4,r5
+.*: (7c 85 05 94|94 05 85 7c) addzeo r4,r5
+.*: (7c a4 30 39|39 30 a4 7c) and\. r4,r5,r6
+.*: (7c a4 30 38|38 30 a4 7c) and r4,r5,r6
+.*: (7c a4 30 79|79 30 a4 7c) andc\. r4,r5,r6
+.*: (7c a4 30 78|78 30 a4 7c) andc r4,r5,r6
+.*: (70 a4 00 06|06 00 a4 70) andi\. r4,r5,6
+.*: (74 a4 00 06|06 00 a4 74) andis\. r4,r5,6
+.*: (00 00 02 00|00 02 00 00) attn
+.*: (48 00 00 02|02 00 00 48) ba 0 <start>
+.*: R_PPC(|64)_ADDR24 label_abs
+.*: (40 8a 00 00|00 00 8a 40) bne cr2,90 <start\+0x90>
+.*: R_PPC(|64)_REL14 foo
+.*: (40 ca 00 00|00 00 ca 40) bne- cr2,94 <start\+0x94>
+.*: R_PPC(|64)_REL14 foo
+.*: (40 ea 00 00|00 00 ea 40) bne\+ cr2,98 <start\+0x98>
+.*: R_PPC(|64)_REL14 foo
+.*: (40 85 00 02|02 00 85 40) blea cr1,0 <start>
+.*: R_PPC(|64)_ADDR14 foo_abs
+.*: (40 c5 00 02|02 00 c5 40) blea- cr1,0 <start>
+.*: R_PPC(|64)_ADDR14 foo_abs
+.*: (40 e5 00 02|02 00 e5 40) blea\+ cr1,0 <start>
+.*: R_PPC(|64)_ADDR14 foo_abs
+.*: (4c 86 0c 20|20 0c 86 4c) bcctr 4,4\*cr1\+eq,1
+.*: (4c c6 04 20|20 04 c6 4c) bnectr- cr1
+.*: (4c e6 04 20|20 04 e6 4c) bnectr\+ cr1
+.*: (4c 86 0c 21|21 0c 86 4c) bcctrl 4,4\*cr1\+eq,1
+.*: (4c c6 04 21|21 04 c6 4c) bnectrl- cr1
+.*: (4c e6 04 21|21 04 e6 4c) bnectrl\+ cr1
+.*: (40 8a 00 01|01 00 8a 40) bnel cr2,c0 <start\+0xc0>
+.*: R_PPC(|64)_REL14 foo
+.*: (40 ca 00 01|01 00 ca 40) bnel- cr2,c4 <start\+0xc4>
+.*: R_PPC(|64)_REL14 foo
+.*: (40 ea 00 01|01 00 ea 40) bnel\+ cr2,c8 <start\+0xc8>
+.*: R_PPC(|64)_REL14 foo
+.*: (40 85 00 03|03 00 85 40) blela cr1,0 <start>
+.*: R_PPC(|64)_ADDR14 foo_abs
+.*: (40 c5 00 03|03 00 c5 40) blela- cr1,0 <start>
+.*: R_PPC(|64)_ADDR14 foo_abs
+.*: (40 e5 00 03|03 00 e5 40) blela\+ cr1,0 <start>
+.*: R_PPC(|64)_ADDR14 foo_abs
+.*: (4c 86 08 20|20 08 86 4c) bclr 4,4\*cr1\+eq,1
+.*: (4c c6 00 20|20 00 c6 4c) bnelr- cr1
+.*: (4c e6 00 20|20 00 e6 4c) bnelr\+ cr1
+.*: (4c 86 08 21|21 08 86 4c) bclrl 4,4\*cr1\+eq,1
+.*: (4c c6 00 21|21 00 c6 4c) bnelrl- cr1
+.*: (4c e6 00 21|21 00 e6 4c) bnelrl\+ cr1
+.*: (48 00 00 00|00 00 00 48) b f0 <start\+0xf0>
+.*: R_PPC(|64)_REL24 label
+.*: (48 00 00 03|03 00 00 48) bla 0 <start>
+.*: R_PPC(|64)_ADDR24 label_abs
+.*: (48 00 00 01|01 00 00 48) bl f8 <start\+0xf8>
+.*: R_PPC(|64)_REL24 label
+.*: (7d 6a 61 f8|f8 61 6a 7d) bpermd r10,r11,r12
+.*: (7c a7 40 00|00 40 a7 7c) cmpd cr1,r7,r8
+.*: (7d 6a 63 f8|f8 63 6a 7d) cmpb r10,r11,r12
+.*: (2c aa 00 0d|0d 00 aa 2c) cmpdi cr1,r10,13
+.*: (2c aa ff f3|f3 ff aa 2c) cmpdi cr1,r10,-13
+.*: (7c a7 40 40|40 40 a7 7c) cmpld cr1,r7,r8
+.*: (28 aa 00 64|64 00 aa 28) cmpldi cr1,r10,100
+.*: (7e b4 00 75|75 00 b4 7e) cntlzd\. r20,r21
+.*: (7e b4 00 74|74 00 b4 7e) cntlzd r20,r21
+.*: (7e b4 00 35|35 00 b4 7e) cntlzw\. r20,r21
+.*: (7e b4 00 34|34 00 b4 7e) cntlzw r20,r21
+.*: (4c 22 1a 02|02 1a 22 4c) crand gt,eq,so
+.*: (4c 22 19 02|02 19 22 4c) crandc gt,eq,so
+.*: (4c 22 1a 42|42 1a 22 4c) creqv gt,eq,so
+.*: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so
+.*: (4c 22 18 42|42 18 22 4c) crnor gt,eq,so
+.*: (4c 22 1b 82|82 1b 22 4c) cror gt,eq,so
+.*: (4c 22 1b 42|42 1b 22 4c) crorc gt,eq,so
+.*: (4c 22 19 82|82 19 22 4c) crxor gt,eq,so
+.*: (7c 0a 5d ec|ec 5d 0a 7c) dcba r10,r11
+.*: (7c 0a 58 ac|ac 58 0a 7c) dcbf r10,r11
+.*: (7c 2a 58 ac|ac 58 2a 7c) dcbfl r10,r11
+.*: (7c 0a 58 fe|fe 58 0a 7c) dcbfep r10,r11
+.*: (7c 0a 5b ac|ac 5b 0a 7c) dcbi r10,r11
+.*: (7c 0a 5b 0c|0c 5b 0a 7c) dcblc r10,r11
+.*: (7c 2a 5b 0c|0c 5b 2a 7c) dcblc 1,r10,r11
+.*: (7c 0a 58 6c|6c 58 0a 7c) dcbst r10,r11
+.*: (7c 0a 58 7e|7e 58 0a 7c) dcbstep r10,r11
+.*: (7c 0a 5a 2c|2c 5a 0a 7c) dcbt r10,r11
+.*: (7c 2a 5a 2c|2c 5a 2a 7c) dcbt 1,r10,r11
+.*: (7d 4b 62 7e|7e 62 4b 7d) dcbtep r10,r11,r12
+.*: (7c 0a 59 4c|4c 59 0a 7c) dcbtls r10,r11
+.*: (7c 2a 59 4c|4c 59 2a 7c) dcbtls 1,r10,r11
+.*: (7c 0a 59 ec|ec 59 0a 7c) dcbtst r10,r11
+.*: (7c 2a 59 ec|ec 59 2a 7c) dcbtst 1,r10,r11
+.*: (7d 4b 61 fe|fe 61 4b 7d) dcbtstep r10,r11,r12
+.*: (7c 0a 59 0c|0c 59 0a 7c) dcbtstls r10,r11
+.*: (7c 2a 59 0c|0c 59 2a 7c) dcbtstls 1,r10,r11
+.*: (7c 0a 5f ec|ec 5f 0a 7c) dcbz r10,r11
+.*: (7c 0a 5f fe|fe 5f 0a 7c) dcbzep r10,r11
+.*: (7c 00 03 8c|8c 03 00 7c) dccci
+.*: (7c 00 03 8c|8c 03 00 7c) dccci
+.*: (7c 00 03 8c|8c 03 00 7c) dccci
+.*: (7d 40 03 8c|8c 03 40 7d) dci 10
+.*: (7e 95 b3 d3|d3 b3 95 7e) divd\. r20,r21,r22
+.*: (7e 95 b3 d2|d2 b3 95 7e) divd r20,r21,r22
+.*: (7e 95 b7 d3|d3 b7 95 7e) divdo\. r20,r21,r22
+.*: (7e 95 b7 d2|d2 b7 95 7e) divdo r20,r21,r22
+.*: (7e 95 b3 93|93 b3 95 7e) divdu\. r20,r21,r22
+.*: (7e 95 b3 92|92 b3 95 7e) divdu r20,r21,r22
+.*: (7e 95 b7 93|93 b7 95 7e) divduo\. r20,r21,r22
+.*: (7e 95 b7 92|92 b7 95 7e) divduo r20,r21,r22
+.*: (7e 95 b3 d7|d7 b3 95 7e) divw\. r20,r21,r22
+.*: (7e 95 b3 d6|d6 b3 95 7e) divw r20,r21,r22
+.*: (7e 95 b7 d7|d7 b7 95 7e) divwo\. r20,r21,r22
+.*: (7e 95 b7 d6|d6 b7 95 7e) divwo r20,r21,r22
+.*: (7e 95 b3 97|97 b3 95 7e) divwu\. r20,r21,r22
+.*: (7e 95 b3 96|96 b3 95 7e) divwu r20,r21,r22
+.*: (7e 95 b7 97|97 b7 95 7e) divwuo\. r20,r21,r22
+.*: (7e 95 b7 96|96 b7 95 7e) divwuo r20,r21,r22
+.*: (7e b4 b2 39|39 b2 b4 7e) eqv\. r20,r21,r22
+.*: (7e b4 b2 38|38 b2 b4 7e) eqv r20,r21,r22
+.*: (7c 0a 58 66|66 58 0a 7c) eratilx 0,r10,r11
+.*: (7c 2a 58 66|66 58 2a 7c) eratilx 1,r10,r11
+.*: (7c ea 58 66|66 58 ea 7c) eratilx 7,r10,r11
+.*: (7d 4b 66 66|66 66 4b 7d) erativax r10,r11,r12
+.*: (7d 4b 01 66|66 01 4b 7d) eratre r10,r11,0
+.*: (7d 4b 19 66|66 19 4b 7d) eratre r10,r11,3
+.*: (7d 4b 61 27|27 61 4b 7d) eratsx\. r10,r11,r12
+.*: (7d 4b 61 26|26 61 4b 7d) eratsx r10,r11,r12
+.*: (7d 4b 01 a6|a6 01 4b 7d) eratwe r10,r11,0
+.*: (7d 4b 19 a6|a6 19 4b 7d) eratwe r10,r11,3
+.*: (7d 6a 07 75|75 07 6a 7d) extsb\. r10,r11
+.*: (7d 6a 07 74|74 07 6a 7d) extsb r10,r11
+.*: (7d 6a 07 35|35 07 6a 7d) extsh\. r10,r11
+.*: (7d 6a 07 34|34 07 6a 7d) extsh r10,r11
+.*: (7d 6a 07 b5|b5 07 6a 7d) extsw\. r10,r11
+.*: (7d 6a 07 b4|b4 07 6a 7d) extsw r10,r11
+.*: (fe 80 aa 11|11 aa 80 fe) fabs\. f20,f21
+.*: (fe 80 aa 10|10 aa 80 fe) fabs f20,f21
+.*: (fe 95 b0 2b|2b b0 95 fe) fadd\. f20,f21,f22
+.*: (fe 95 b0 2a|2a b0 95 fe) fadd f20,f21,f22
+.*: (ee 95 b0 2b|2b b0 95 ee) fadds\. f20,f21,f22
+.*: (ee 95 b0 2a|2a b0 95 ee) fadds f20,f21,f22
+.*: (fe 80 ae 9d|9d ae 80 fe) fcfid\. f20,f21
+.*: (fe 80 ae 9c|9c ae 80 fe) fcfid f20,f21
+.*: (fc 14 a8 40|40 a8 14 fc) fcmpo cr0,f20,f21
+.*: (fc 94 a8 40|40 a8 94 fc) fcmpo cr1,f20,f21
+.*: (fc 14 a8 00|00 a8 14 fc) fcmpu cr0,f20,f21
+.*: (fc 94 a8 00|00 a8 94 fc) fcmpu cr1,f20,f21
+.*: (fe 95 b0 11|11 b0 95 fe) fcpsgn\. f20,f21,f22
+.*: (fe 95 b0 10|10 b0 95 fe) fcpsgn f20,f21,f22
+.*: (fe 80 ae 5d|5d ae 80 fe) fctid\. f20,f21
+.*: (fe 80 ae 5c|5c ae 80 fe) fctid f20,f21
+.*: (fe 80 ae 5f|5f ae 80 fe) fctidz\. f20,f21
+.*: (fe 80 ae 5e|5e ae 80 fe) fctidz f20,f21
+.*: (fe 80 a8 1d|1d a8 80 fe) fctiw\. f20,f21
+.*: (fe 80 a8 1c|1c a8 80 fe) fctiw f20,f21
+.*: (fe 80 a8 1f|1f a8 80 fe) fctiwz\. f20,f21
+.*: (fe 80 a8 1e|1e a8 80 fe) fctiwz f20,f21
+.*: (fe 95 b0 25|25 b0 95 fe) fdiv\. f20,f21,f22
+.*: (fe 95 b0 24|24 b0 95 fe) fdiv f20,f21,f22
+.*: (ee 95 b0 25|25 b0 95 ee) fdivs\. f20,f21,f22
+.*: (ee 95 b0 24|24 b0 95 ee) fdivs f20,f21,f22
+.*: (fe 95 bd bb|bb bd 95 fe) fmadd\. f20,f21,f22,f23
+.*: (fe 95 bd ba|ba bd 95 fe) fmadd f20,f21,f22,f23
+.*: (ee 95 bd bb|bb bd 95 ee) fmadds\. f20,f21,f22,f23
+.*: (ee 95 bd ba|ba bd 95 ee) fmadds f20,f21,f22,f23
+.*: (fe 80 a8 91|91 a8 80 fe) fmr\. f20,f21
+.*: (fe 80 a8 90|90 a8 80 fe) fmr f20,f21
+.*: (fe 95 bd b9|b9 bd 95 fe) fmsub\. f20,f21,f22,f23
+.*: (fe 95 bd b8|b8 bd 95 fe) fmsub f20,f21,f22,f23
+.*: (ee 95 bd b9|b9 bd 95 ee) fmsubs\. f20,f21,f22,f23
+.*: (ee 95 bd b8|b8 bd 95 ee) fmsubs f20,f21,f22,f23
+.*: (fe 95 05 b3|b3 05 95 fe) fmul\. f20,f21,f22
+.*: (fe 95 05 b2|b2 05 95 fe) fmul f20,f21,f22
+.*: (ee 95 05 b3|b3 05 95 ee) fmuls\. f20,f21,f22
+.*: (ee 95 05 b2|b2 05 95 ee) fmuls f20,f21,f22
+.*: (fe 80 a9 11|11 a9 80 fe) fnabs\. f20,f21
+.*: (fe 80 a9 10|10 a9 80 fe) fnabs f20,f21
+.*: (fe 80 a8 51|51 a8 80 fe) fneg\. f20,f21
+.*: (fe 80 a8 50|50 a8 80 fe) fneg f20,f21
+.*: (fe 95 bd bf|bf bd 95 fe) fnmadd\. f20,f21,f22,f23
+.*: (fe 95 bd be|be bd 95 fe) fnmadd f20,f21,f22,f23
+.*: (ee 95 bd bf|bf bd 95 ee) fnmadds\. f20,f21,f22,f23
+.*: (ee 95 bd be|be bd 95 ee) fnmadds f20,f21,f22,f23
+.*: (fe 95 bd bd|bd bd 95 fe) fnmsub\. f20,f21,f22,f23
+.*: (fe 95 bd bc|bc bd 95 fe) fnmsub f20,f21,f22,f23
+.*: (ee 95 bd bd|bd bd 95 ee) fnmsubs\. f20,f21,f22,f23
+.*: (ee 95 bd bc|bc bd 95 ee) fnmsubs f20,f21,f22,f23
+.*: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21
+.*: (fe 80 a8 30|30 a8 80 fe) fre f20,f21
+.*: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21
+.*: (fe 80 a8 30|30 a8 80 fe) fre f20,f21
+.*: (fe 81 a8 31|31 a8 81 fe) fre\. f20,f21,1
+.*: (fe 81 a8 30|30 a8 81 fe) fre f20,f21,1
+.*: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21
+.*: (ee 80 a8 30|30 a8 80 ee) fres f20,f21
+.*: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21
+.*: (ee 80 a8 30|30 a8 80 ee) fres f20,f21
+.*: (ee 81 a8 31|31 a8 81 ee) fres\. f20,f21,1
+.*: (ee 81 a8 30|30 a8 81 ee) fres f20,f21,1
+.*: (fe 80 ab d1|d1 ab 80 fe) frim\. f20,f21
+.*: (fe 80 ab d0|d0 ab 80 fe) frim f20,f21
+.*: (fe 80 ab 11|11 ab 80 fe) frin\. f20,f21
+.*: (fe 80 ab 10|10 ab 80 fe) frin f20,f21
+.*: (fe 80 ab 91|91 ab 80 fe) frip\. f20,f21
+.*: (fe 80 ab 90|90 ab 80 fe) frip f20,f21
+.*: (fe 80 ab 51|51 ab 80 fe) friz\. f20,f21
+.*: (fe 80 ab 50|50 ab 80 fe) friz f20,f21
+.*: (fe 80 a8 19|19 a8 80 fe) frsp\. f20,f21
+.*: (fe 80 a8 18|18 a8 80 fe) frsp f20,f21
+.*: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21
+.*: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21
+.*: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21
+.*: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21
+.*: (fe 81 a8 35|35 a8 81 fe) frsqrte\. f20,f21,1
+.*: (fe 81 a8 34|34 a8 81 fe) frsqrte f20,f21,1
+.*: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21
+.*: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21
+.*: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21
+.*: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21
+.*: (ee 81 a8 34|34 a8 81 ee) frsqrtes f20,f21,1
+.*: (ee 81 a8 35|35 a8 81 ee) frsqrtes\. f20,f21,1
+.*: (fe 95 bd af|af bd 95 fe) fsel\. f20,f21,f22,f23
+.*: (fe 95 bd ae|ae bd 95 fe) fsel f20,f21,f22,f23
+.*: (fe 80 a8 2d|2d a8 80 fe) fsqrt\. f20,f21
+.*: (fe 80 a8 2c|2c a8 80 fe) fsqrt f20,f21
+.*: (ee 80 a8 2d|2d a8 80 ee) fsqrts\. f20,f21
+.*: (ee 80 a8 2c|2c a8 80 ee) fsqrts f20,f21
+.*: (fe 95 b0 29|29 b0 95 fe) fsub\. f20,f21,f22
+.*: (fe 95 b0 28|28 b0 95 fe) fsub f20,f21,f22
+.*: (ee 95 b0 29|29 b0 95 ee) fsubs\. f20,f21,f22
+.*: (ee 95 b0 28|28 b0 95 ee) fsubs f20,f21,f22
+.*: (7c 0a 5f ac|ac 5f 0a 7c) icbi r10,r11
+.*: (7c 0a 5f be|be 5f 0a 7c) icbiep r10,r11
+.*: (7c 0a 58 2c|2c 58 0a 7c) icbt r10,r11
+.*: (7c ea 58 2c|2c 58 ea 7c) icbt 7,r10,r11
+.*: (7c 0a 5b cc|cc 5b 0a 7c) icbtls r10,r11
+.*: (7c ea 5b cc|cc 5b ea 7c) icbtls 7,r10,r11
+.*: (7c 00 07 8c|8c 07 00 7c) iccci
+.*: (7c 00 07 8c|8c 07 00 7c) iccci
+.*: (7c 00 07 8c|8c 07 00 7c) iccci
+.*: (7d 40 07 8c|8c 07 40 7d) ici 10
+.*: (7d 4b 63 2d|2d 63 4b 7d) icswx\. r10,r11,r12
+.*: (7d 4b 63 2c|2c 63 4b 7d) icswx r10,r11,r12
+.*: (7d 4b 65 de|de 65 4b 7d) isel r10,r11,r12,23
+.*: (4c 00 01 2c|2c 01 00 4c) isync
+.*: (7d 4b 60 be|be 60 4b 7d) lbepx r10,r11,r12
+.*: (89 4b ff ef|ef ff 4b 89) lbz r10,-17\(r11\)
+.*: (89 4b 00 11|11 00 4b 89) lbz r10,17\(r11\)
+.*: (8d 4b ff ff|ff ff 4b 8d) lbzu r10,-1\(r11\)
+.*: (8d 4b 00 01|01 00 4b 8d) lbzu r10,1\(r11\)
+.*: (7d 4b 68 ee|ee 68 4b 7d) lbzux r10,r11,r13
+.*: (7d 4b 68 ae|ae 68 4b 7d) lbzx r10,r11,r13
+.*: (e9 4b ff f8|f8 ff 4b e9) ld r10,-8\(r11\)
+.*: (e9 4b 00 08|08 00 4b e9) ld r10,8\(r11\)
+.*: (7d 4b 60 a8|a8 60 4b 7d) ldarx r10,r11,r12
+.*: (7d 4b 60 a9|a9 60 4b 7d) ldarx r10,r11,r12,1
+.*: (7d 4b 64 28|28 64 4b 7d) ldbrx r10,r11,r12
+.*: (7d 4b 60 3a|3a 60 4b 7d) ldepx r10,r11,r12
+.*: (e9 4b ff f9|f9 ff 4b e9) ldu r10,-8\(r11\)
+.*: (e9 4b 00 09|09 00 4b e9) ldu r10,8\(r11\)
+.*: (7d 4b 60 6a|6a 60 4b 7d) ldux r10,r11,r12
+.*: (7d 4b 60 2a|2a 60 4b 7d) ldx r10,r11,r12
+.*: (ca 8a ff f8|f8 ff 8a ca) lfd f20,-8\(r10\)
+.*: (ca 8a 00 08|08 00 8a ca) lfd f20,8\(r10\)
+.*: (7e 8a 5c be|be 5c 8a 7e) lfdepx f20,r10,r11
+.*: (ce 8a ff f8|f8 ff 8a ce) lfdu f20,-8\(r10\)
+.*: (ce 8a 00 08|08 00 8a ce) lfdu f20,8\(r10\)
+.*: (7e 8a 5c ee|ee 5c 8a 7e) lfdux f20,r10,r11
+.*: (7e 8a 5c ae|ae 5c 8a 7e) lfdx f20,r10,r11
+.*: (7e 8a 5e ae|ae 5e 8a 7e) lfiwax f20,r10,r11
+.*: (7e 8a 5e ee|ee 5e 8a 7e) lfiwzx f20,r10,r11
+.*: (c2 8a ff fc|fc ff 8a c2) lfs f20,-4\(r10\)
+.*: (c2 8a 00 04|04 00 8a c2) lfs f20,4\(r10\)
+.*: (c6 8a ff fc|fc ff 8a c6) lfsu f20,-4\(r10\)
+.*: (c6 8a 00 04|04 00 8a c6) lfsu f20,4\(r10\)
+.*: (7e 8a 5c 6e|6e 5c 8a 7e) lfsux f20,r10,r11
+.*: (7e 8a 5c 2e|2e 5c 8a 7e) lfsx f20,r10,r11
+.*: (a9 4b 00 02|02 00 4b a9) lha r10,2\(r11\)
+.*: (ad 4b ff fe|fe ff 4b ad) lhau r10,-2\(r11\)
+.*: (7d 4b 62 ee|ee 62 4b 7d) lhaux r10,r11,r12
+.*: (7d 4b 62 ae|ae 62 4b 7d) lhax r10,r11,r12
+.*: (7d 4b 66 2c|2c 66 4b 7d) lhbrx r10,r11,r12
+.*: (7d 4b 62 3e|3e 62 4b 7d) lhepx r10,r11,r12
+.*: (a1 4b ff fe|fe ff 4b a1) lhz r10,-2\(r11\)
+.*: (a1 4b 00 02|02 00 4b a1) lhz r10,2\(r11\)
+.*: (a5 4b ff fe|fe ff 4b a5) lhzu r10,-2\(r11\)
+.*: (a5 4b 00 02|02 00 4b a5) lhzu r10,2\(r11\)
+.*: (7d 4b 62 6e|6e 62 4b 7d) lhzux r10,r11,r12
+.*: (7d 4b 62 2e|2e 62 4b 7d) lhzx r10,r11,r12
+.*: (e9 4b ff fe|fe ff 4b e9) lwa r10,-4\(r11\)
+.*: (e9 4b 00 06|06 00 4b e9) lwa r10,4\(r11\)
+.*: (7d 4b 60 28|28 60 4b 7d) lwarx r10,r11,r12
+.*: (7d 4b 60 29|29 60 4b 7d) lwarx r10,r11,r12,1
+.*: (7d 4b 62 ea|ea 62 4b 7d) lwaux r10,r11,r12
+.*: (7d 4b 62 aa|aa 62 4b 7d) lwax r10,r11,r12
+.*: (7d 4b 64 2c|2c 64 4b 7d) lwbrx r10,r11,r12
+.*: (7d 4b 60 3e|3e 60 4b 7d) lwepx r10,r11,r12
+.*: (81 4b ff fc|fc ff 4b 81) lwz r10,-4\(r11\)
+.*: (81 4b 00 04|04 00 4b 81) lwz r10,4\(r11\)
+.*: (85 4b ff fc|fc ff 4b 85) lwzu r10,-4\(r11\)
+.*: (85 4b 00 04|04 00 4b 85) lwzu r10,4\(r11\)
+.*: (7d 4b 60 6e|6e 60 4b 7d) lwzux r10,r11,r12
+.*: (7d 4b 60 2e|2e 60 4b 7d) lwzx r10,r11,r12
+.*: (7c 00 06 ac|ac 06 00 7c) mbar
+.*: (7c 00 06 ac|ac 06 00 7c) mbar
+.*: (7c 00 06 ac|ac 06 00 7c) mbar
+.*: (7c 20 06 ac|ac 06 20 7c) mbar 1
+.*: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1
+.*: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4
+.*: (7c 00 04 00|00 04 00 7c) mcrxr cr0
+.*: (7d 80 04 00|00 04 80 7d) mcrxr cr3
+.*: (7c 60 00 26|26 00 60 7c) mfcr r3
+.*: (7c 70 20 26|26 20 70 7c) mfocrf r3,2
+.*: (7c 70 10 26|26 10 70 7c) mfocrf r3,1
+.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
+.*: (7d 4a 3a 87|87 3a 4a 7d) mfdcr\. r10,234
+.*: (7d 4a 3a 86|86 3a 4a 7d) mfdcr r10,234
+.*: (7d 4b 02 07|07 02 4b 7d) mfdcrx\. r10,r11
+.*: (7d 4b 02 06|06 02 4b 7d) mfdcrx r10,r11
+.*: (fe 80 04 8f|8f 04 80 fe) mffs\. f20
+.*: (fe 80 04 8e|8e 04 80 fe) mffs f20
+.*: (7d 40 00 a6|a6 00 40 7d) mfmsr r10
+.*: (7c 70 10 26|26 10 70 7c) mfocrf r3,1
+.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
+.*: (7d 4a 3a a6|a6 3a 4a 7d) mfspr r10,234
+.*: (7d 4c 42 a6|a6 42 4c 7d) mftb r10
+.*: (7d 4d 42 a6|a6 42 4d 7d) mftbu r10
+.*: (7c 00 51 dc|dc 51 00 7c) msgclr r10
+.*: (7c 00 51 9c|9c 51 00 7c) msgsnd r10
+.*: (7c 60 01 20|20 01 60 7c) mtcrf 0,r3
+.*: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3
+.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
+.*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
+.*: (7d 4a 3b 87|87 3b 4a 7d) mtdcr\. 234,r10
+.*: (7d 4a 3b 86|86 3b 4a 7d) mtdcr 234,r10
+.*: (7d 6a 03 07|07 03 6a 7d) mtdcrx\. r10,r11
+.*: (7d 6a 03 06|06 03 6a 7d) mtdcrx r10,r11
+.*: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3
+.*: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3
+.*: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3
+.*: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3
+.*: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20
+.*: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20
+.*: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20
+.*: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20
+.*: (fe 0d a5 8f|8f a5 0d fe) mtfsf\. 6,f20,1,1
+.*: (fe 0d a5 8e|8e a5 0d fe) mtfsf 6,f20,1,1
+.*: (ff 00 01 0d|0d 01 00 ff) mtfsfi\. 6,0
+.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
+.*: (ff 00 d1 0d|0d d1 00 ff) mtfsfi\. 6,13
+.*: (ff 00 d1 0c|0c d1 00 ff) mtfsfi 6,13
+.*: (ff 01 d1 0d|0d d1 01 ff) mtfsfi\. 6,13,1
+.*: (ff 01 d1 0c|0c d1 01 ff) mtfsfi 6,13,1
+.*: (7d 40 01 24|24 01 40 7d) mtmsr r10
+.*: (7d 40 01 24|24 01 40 7d) mtmsr r10
+.*: (7d 41 01 24|24 01 41 7d) mtmsr r10,1
+.*: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3
+.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
+.*: (7d 4a 3b a6|a6 3b 4a 7d) mtspr 234,r10
+.*: (7e 95 b0 93|93 b0 95 7e) mulhd\. r20,r21,r22
+.*: (7e 95 b0 92|92 b0 95 7e) mulhd r20,r21,r22
+.*: (7e 95 b0 13|13 b0 95 7e) mulhdu\. r20,r21,r22
+.*: (7e 95 b0 12|12 b0 95 7e) mulhdu r20,r21,r22
+.*: (7e 95 b0 97|97 b0 95 7e) mulhw\. r20,r21,r22
+.*: (7e 95 b0 96|96 b0 95 7e) mulhw r20,r21,r22
+.*: (7e 95 b0 17|17 b0 95 7e) mulhwu\. r20,r21,r22
+.*: (7e 95 b0 16|16 b0 95 7e) mulhwu r20,r21,r22
+.*: (7e 95 b1 d3|d3 b1 95 7e) mulld\. r20,r21,r22
+.*: (7e 95 b1 d2|d2 b1 95 7e) mulld r20,r21,r22
+.*: (7e 95 b5 d3|d3 b5 95 7e) mulldo\. r20,r21,r22
+.*: (7e 95 b5 d2|d2 b5 95 7e) mulldo r20,r21,r22
+.*: (1e 95 00 64|64 00 95 1e) mulli r20,r21,100
+.*: (1e 95 ff 9c|9c ff 95 1e) mulli r20,r21,-100
+.*: (7e 95 b1 d7|d7 b1 95 7e) mullw\. r20,r21,r22
+.*: (7e 95 b1 d6|d6 b1 95 7e) mullw r20,r21,r22
+.*: (7e 95 b5 d7|d7 b5 95 7e) mullwo\. r20,r21,r22
+.*: (7e 95 b5 d6|d6 b5 95 7e) mullwo r20,r21,r22
+.*: (7e b4 b3 b9|b9 b3 b4 7e) nand\. r20,r21,r22
+.*: (7e b4 b3 b8|b8 b3 b4 7e) nand r20,r21,r22
+.*: (7e 95 00 d1|d1 00 95 7e) neg\. r20,r21
+.*: (7e 95 00 d0|d0 00 95 7e) neg r20,r21
+.*: (7e 95 04 d1|d1 04 95 7e) nego\. r20,r21
+.*: (7e 95 04 d0|d0 04 95 7e) nego r20,r21
+.*: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22
+.*: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22
+.*: (7e b4 b3 79|79 b3 b4 7e) or\. r20,r21,r22
+.*: (7e b4 b3 78|78 b3 b4 7e) or r20,r21,r22
+.*: (7e b4 b3 39|39 b3 b4 7e) orc\. r20,r21,r22
+.*: (7e b4 b3 38|38 b3 b4 7e) orc r20,r21,r22
+.*: (62 b4 10 00|00 10 b4 62) ori r20,r21,4096
+.*: (66 b4 10 00|00 10 b4 66) oris r20,r21,4096
+.*: (7d 6a 00 f4|f4 00 6a 7d) popcntb r10,r11
+.*: (7d 6a 03 f4|f4 03 6a 7d) popcntd r10,r11
+.*: (7d 6a 02 f4|f4 02 6a 7d) popcntw r10,r11
+.*: (7d 6a 01 74|74 01 6a 7d) prtyd r10,r11
+.*: (7d 6a 01 34|34 01 6a 7d) prtyw r10,r11
+.*: (4c 00 00 66|66 00 00 4c) rfci
+.*: (4c 00 00 cc|cc 00 00 4c) rfgi
+.*: (4c 00 00 64|64 00 00 4c) rfi
+.*: (4c 00 00 4c|4c 00 00 4c) rfmci
+.*: (79 6a 67 f1|f1 67 6a 79) rldcl\. r10,r11,r12,63
+.*: (79 6a 67 f0|f0 67 6a 79) rldcl r10,r11,r12,63
+.*: (79 6a 67 f3|f3 67 6a 79) rldcr\. r10,r11,r12,63
+.*: (79 6a 67 f2|f2 67 6a 79) rldcr r10,r11,r12,63
+.*: (79 6a bf e9|e9 bf 6a 79) rldic\. r10,r11,23,63
+.*: (79 6a bf e8|e8 bf 6a 79) rldic r10,r11,23,63
+.*: (79 6a bf e1|e1 bf 6a 79) rldicl\. r10,r11,23,63
+.*: (79 6a bf e0|e0 bf 6a 79) rldicl r10,r11,23,63
+.*: (79 6a bf e5|e5 bf 6a 79) rldicr\. r10,r11,23,63
+.*: (79 6a bf e4|e4 bf 6a 79) rldicr r10,r11,23,63
+.*: (79 6a bf ed|ed bf 6a 79) rldimi\. r10,r11,23,63
+.*: (79 6a bf ec|ec bf 6a 79) rldimi r10,r11,23,63
+.*: (51 6a b8 3f|3f b8 6a 51) rlwimi\. r10,r11,23,0,31
+.*: (51 6a b8 3e|3e b8 6a 51) rlwimi r10,r11,23,0,31
+.*: (55 6a b8 3f|3f b8 6a 55) rotlwi\. r10,r11,23
+.*: (55 6a b8 3e|3e b8 6a 55) rotlwi r10,r11,23
+.*: (5d 6a b8 3f|3f b8 6a 5d) rotlw\. r10,r11,r23
+.*: (5d 6a b8 3e|3e b8 6a 5d) rotlw r10,r11,r23
+.*: (44 00 00 02|02 00 00 44) sc
+.*: (44 00 0c 82|82 0c 00 44) sc 100
+.*: (7d 6a 60 37|37 60 6a 7d) sld\. r10,r11,r12
+.*: (7d 6a 60 36|36 60 6a 7d) sld r10,r11,r12
+.*: (7d 6a 60 31|31 60 6a 7d) slw\. r10,r11,r12
+.*: (7d 6a 60 30|30 60 6a 7d) slw r10,r11,r12
+.*: (7d 6a 66 35|35 66 6a 7d) srad\. r10,r11,r12
+.*: (7d 6a 66 34|34 66 6a 7d) srad r10,r11,r12
+.*: (7d 6a fe 77|77 fe 6a 7d) sradi\. r10,r11,63
+.*: (7d 6a fe 76|76 fe 6a 7d) sradi r10,r11,63
+.*: (7d 6a 66 31|31 66 6a 7d) sraw\. r10,r11,r12
+.*: (7d 6a 66 30|30 66 6a 7d) sraw r10,r11,r12
+.*: (7d 6a fe 71|71 fe 6a 7d) srawi\. r10,r11,31
+.*: (7d 6a fe 70|70 fe 6a 7d) srawi r10,r11,31
+.*: (7d 6a 64 37|37 64 6a 7d) srd\. r10,r11,r12
+.*: (7d 6a 64 36|36 64 6a 7d) srd r10,r11,r12
+.*: (7d 6a 64 31|31 64 6a 7d) srw\. r10,r11,r12
+.*: (7d 6a 64 30|30 64 6a 7d) srw r10,r11,r12
+.*: (99 4b ff ff|ff ff 4b 99) stb r10,-1\(r11\)
+.*: (99 4b 00 01|01 00 4b 99) stb r10,1\(r11\)
+.*: (7d 4b 61 be|be 61 4b 7d) stbepx r10,r11,r12
+.*: (9d 4b ff ff|ff ff 4b 9d) stbu r10,-1\(r11\)
+.*: (9d 4b 00 01|01 00 4b 9d) stbu r10,1\(r11\)
+.*: (7d 4b 61 ee|ee 61 4b 7d) stbux r10,r11,r12
+.*: (7d 4b 61 ae|ae 61 4b 7d) stbx r10,r11,r12
+.*: (f9 4b ff f8|f8 ff 4b f9) std r10,-8\(r11\)
+.*: (f9 4b 00 08|08 00 4b f9) std r10,8\(r11\)
+.*: (7d 4b 65 28|28 65 4b 7d) stdbrx r10,r11,r12
+.*: (7d 4b 61 ad|ad 61 4b 7d) stdcx\. r10,r11,r12
+.*: (7d 4b 61 3a|3a 61 4b 7d) stdepx r10,r11,r12
+.*: (f9 4b ff f9|f9 ff 4b f9) stdu r10,-8\(r11\)
+.*: (f9 4b 00 09|09 00 4b f9) stdu r10,8\(r11\)
+.*: (7d 4b 61 6a|6a 61 4b 7d) stdux r10,r11,r12
+.*: (7d 4b 61 2a|2a 61 4b 7d) stdx r10,r11,r12
+.*: (da 8a ff f8|f8 ff 8a da) stfd f20,-8\(r10\)
+.*: (da 8a 00 08|08 00 8a da) stfd f20,8\(r10\)
+.*: (7e 8a 5d be|be 5d 8a 7e) stfdepx f20,r10,r11
+.*: (de 8a ff f8|f8 ff 8a de) stfdu f20,-8\(r10\)
+.*: (de 8a 00 08|08 00 8a de) stfdu f20,8\(r10\)
+.*: (7e 8a 5d ee|ee 5d 8a 7e) stfdux f20,r10,r11
+.*: (7e 8a 5d ae|ae 5d 8a 7e) stfdx f20,r10,r11
+.*: (7e 8a 5f ae|ae 5f 8a 7e) stfiwx f20,r10,r11
+.*: (d2 8a ff fc|fc ff 8a d2) stfs f20,-4\(r10\)
+.*: (d2 8a 00 04|04 00 8a d2) stfs f20,4\(r10\)
+.*: (d6 8a ff fc|fc ff 8a d6) stfsu f20,-4\(r10\)
+.*: (d6 8a 00 04|04 00 8a d6) stfsu f20,4\(r10\)
+.*: (7e 8a 5d 6e|6e 5d 8a 7e) stfsux f20,r10,r11
+.*: (7e 8a 5d 2e|2e 5d 8a 7e) stfsx f20,r10,r11
+.*: (b1 4b ff fe|fe ff 4b b1) sth r10,-2\(r11\)
+.*: (b1 4b 00 02|02 00 4b b1) sth r10,2\(r11\)
+.*: (b1 4b ff fc|fc ff 4b b1) sth r10,-4\(r11\)
+.*: (b1 4b 00 04|04 00 4b b1) sth r10,4\(r11\)
+.*: (7d 4b 67 2c|2c 67 4b 7d) sthbrx r10,r11,r12
+.*: (7d 4b 63 3e|3e 63 4b 7d) sthepx r10,r11,r12
+.*: (b5 4b ff fe|fe ff 4b b5) sthu r10,-2\(r11\)
+.*: (b5 4b 00 02|02 00 4b b5) sthu r10,2\(r11\)
+.*: (7d 4b 63 6e|6e 63 4b 7d) sthux r10,r11,r12
+.*: (7d 4b 63 2e|2e 63 4b 7d) sthx r10,r11,r12
+.*: (7d 4b 65 2c|2c 65 4b 7d) stwbrx r10,r11,r12
+.*: (7d 4b 61 2d|2d 61 4b 7d) stwcx\. r10,r11,r12
+.*: (7d 4b 61 3e|3e 61 4b 7d) stwepx r10,r11,r12
+.*: (95 4b ff fc|fc ff 4b 95) stwu r10,-4\(r11\)
+.*: (95 4b 00 04|04 00 4b 95) stwu r10,4\(r11\)
+.*: (7d 4b 61 6e|6e 61 4b 7d) stwux r10,r11,r12
+.*: (7d 4b 61 2e|2e 61 4b 7d) stwx r10,r11,r12
+.*: (7e 95 b0 51|51 b0 95 7e) subf\. r20,r21,r22
+.*: (7e 95 b0 50|50 b0 95 7e) subf r20,r21,r22
+.*: (7e 95 b0 11|11 b0 95 7e) subfc\. r20,r21,r22
+.*: (7e 95 b0 10|10 b0 95 7e) subfc r20,r21,r22
+.*: (7e 95 b4 11|11 b4 95 7e) subfco\. r20,r21,r22
+.*: (7e 95 b4 10|10 b4 95 7e) subfco r20,r21,r22
+.*: (7e 95 b1 11|11 b1 95 7e) subfe\. r20,r21,r22
+.*: (7e 95 b1 10|10 b1 95 7e) subfe r20,r21,r22
+.*: (7e 95 b5 11|11 b5 95 7e) subfeo\. r20,r21,r22
+.*: (7e 95 b5 10|10 b5 95 7e) subfeo r20,r21,r22
+.*: (22 95 00 64|64 00 95 22) subfic r20,r21,100
+.*: (22 95 ff 9c|9c ff 95 22) subfic r20,r21,-100
+.*: (7e 95 01 d1|d1 01 95 7e) subfme\. r20,r21
+.*: (7e 95 01 d0|d0 01 95 7e) subfme r20,r21
+.*: (7e 95 05 d1|d1 05 95 7e) subfmeo\. r20,r21
+.*: (7e 95 05 d0|d0 05 95 7e) subfmeo r20,r21
+.*: (7e 95 b4 51|51 b4 95 7e) subfo\. r20,r21,r22
+.*: (7e 95 b4 50|50 b4 95 7e) subfo r20,r21,r22
+.*: (7e 95 01 91|91 01 95 7e) subfze\. r20,r21
+.*: (7e 95 01 90|90 01 95 7e) subfze r20,r21
+.*: (7e 95 05 91|91 05 95 7e) subfzeo\. r20,r21
+.*: (7e 95 05 90|90 05 95 7e) subfzeo r20,r21
+.*: (7c 00 04 ac|ac 04 00 7c) hwsync
+.*: (7c 00 04 ac|ac 04 00 7c) hwsync
+.*: (7c 00 04 ac|ac 04 00 7c) hwsync
+.*: (7c 20 04 ac|ac 04 20 7c) lwsync
+.*: (7c aa 58 88|88 58 aa 7c) tdlge r10,r11
+.*: (08 aa 00 64|64 00 aa 08) tdlgei r10,100
+.*: (08 aa ff 9c|9c ff aa 08) tdlgei r10,-100
+.*: (7c 6a 58 24|24 58 6a 7c) tlbilxva r10,r11
+.*: (7c 0a 5e 24|24 5e 0a 7c) tlbivax r10,r11
+.*: (7c 00 07 64|64 07 00 7c) tlbre
+.*: (7d 4b 3f 64|64 3f 4b 7d) tlbre r10,r11,7
+.*: (7c 0a 5e a5|a5 5e 0a 7c) tlbsrx\. r10,r11
+.*: (7d 4b 67 25|25 67 4b 7d) tlbsx\. r10,r11,r12
+.*: (7d 4b 67 24|24 67 4b 7d) tlbsx r10,r11,r12
+.*: (7c 00 04 6c|6c 04 00 7c) tlbsync
+.*: (7c 00 07 a4|a4 07 00 7c) tlbwe
+.*: (7d 4b 3f a4|a4 3f 4b 7d) tlbwe r10,r11,7
+.*: (7c aa 58 08|08 58 aa 7c) twlge r10,r11
+.*: (0c aa 00 64|64 00 aa 0c) twlgei r10,100
+.*: (0c aa ff 9c|9c ff aa 0c) twlgei r10,-100
+.*: (7c 00 00 7c|7c 00 00 7c) wait
+.*: (7c 00 00 7c|7c 00 00 7c) wait
+.*: (7c 20 00 7c|7c 00 20 7c) waitrsv
+.*: (7c 40 00 7c|7c 00 40 7c) waitimpl
+.*: (7c 40 00 7c|7c 00 40 7c) waitimpl
+.*: (7c 20 00 7c|7c 00 20 7c) waitrsv
+.*: (7c 00 01 6c|6c 01 00 7c) wchkall
+.*: (7c 00 01 6c|6c 01 00 7c) wchkall
+.*: (7d 80 01 6c|6c 01 80 7d) wchkall cr3
+.*: (7c 2a 5f 4c|4c 5f 2a 7c) wclr 1,r10,r11
+.*: (7c 20 07 4c|4c 07 20 7c) wclrall 1
+.*: (7c 4a 5f 4c|4c 5f 4a 7c) wclrone r10,r11
+.*: (7d 40 01 06|06 01 40 7d) wrtee r10
+.*: (7c 00 81 46|46 81 00 7c) wrteei 1
+.*: (7d 6a 62 79|79 62 6a 7d) xor\. r10,r11,r12
+.*: (7d 6a 62 78|78 62 6a 7d) xor r10,r11,r12
+.*: (69 6a 10 00|00 10 6a 69) xori r10,r11,4096
+.*: (6d 6a 10 00|00 10 6a 6d) xoris r10,r11,4096
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/a2.s fred/binutils-2.35.1/gas/testsuite/gas/ppc/a2.s
--- binutils-2.35.1/gas/testsuite/gas/ppc/a2.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/a2.s 2020-11-25 14:37:47.000000000 +0000
@@ -295,10 +295,6 @@ start:
lhzu 10,2(11)
lhzux 10,11,12
lhzx 10,11,12
- lmw 20,16(10)
- lswi 10,11,1
- lswi 12,11,32
- lswx 10,11,12
lwa 10,-4(11)
lwa 10,4(11)
lwarx 10,11,12,0
@@ -486,10 +482,6 @@ start:
sthu 10,2(11)
sthux 10,11,12
sthx 10,11,12
- stmw 20,16(10)
- stswi 10,11,1
- stswi 10,11,32
- stswx 10,11,12
stwbrx 10,11,12
stwcx. 10,11,12
stwepx 10,11,12
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/int128.d fred/binutils-2.35.1/gas/testsuite/gas/ppc/int128.d
--- binutils-2.35.1/gas/testsuite/gas/ppc/int128.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/int128.d 2020-11-25 14:37:47.000000000 +0000
@@ -20,7 +20,7 @@ Disassembly of section \.text:
.*: (13 9d f7 0b|0b f7 9d 13) vmodsq v28,v29,v30
.*: (13 e0 0e 0b|0b 0e e0 13) vmoduq v31,v0,v1
.*: (10 5b 1e 02|02 1e 5b 10) vextsd2q v2,v3
-.*: (10 04 29 01|01 29 04 10) vcmpuq v4,v5
+.*: (10 04 29 01|01 29 04 10) vcmpuq cr0,v4,v5
.*: (10 86 39 41|41 39 86 10) vcmpsq cr1,v6,v7
.*: (11 09 51 c7|c7 51 09 11) vcmpequq v8,v9,v10
.*: (11 6c 6d c7|c7 6d 6c 11) vcmpequq. v11,v12,v13
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/int128.s fred/binutils-2.35.1/gas/testsuite/gas/ppc/int128.s
--- binutils-2.35.1/gas/testsuite/gas/ppc/int128.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/int128.s 2020-11-25 14:37:47.000000000 +0000
@@ -12,7 +12,7 @@ _start:
vmodsq 28,29,30
vmoduq 31,0,1
vextsd2q 2,3
- vcmpuq 4,5
+ vcmpuq 0,4,5
vcmpsq 1,6,7
vcmpequq 8,9,10
vcmpequq. 11,12,13
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/power8.d fred/binutils-2.35.1/gas/testsuite/gas/ppc/power8.d
--- binutils-2.35.1/gas/testsuite/gas/ppc/power8.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/power8.d 2020-11-25 14:37:47.000000000 +0000
@@ -7,151 +7,151 @@
Disassembly of section \.text:
0+00 <power8>:
- 0: (7c 05 07 1d|1d 07 05 7c) tabort\. r5
- 4: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16
- 8: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10
- c: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13
- 10: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5
- 14: (7c 00 05 1d|1d 05 00 7c) tbegin\.
- 18: (7f 80 05 9c|9c 05 80 7f) tcheck cr7
- 1c: (7c 00 05 5d|5d 05 00 7c) tend\.
- 20: (7c 00 05 5d|5d 05 00 7c) tend\.
- 24: (7e 00 05 5d|5d 05 00 7e) tendall\.
- 28: (7e 00 05 5d|5d 05 00 7e) tendall\.
- 2c: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24
- 30: (7c 00 07 dd|dd 07 00 7c) trechkpt\.
- 34: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
- 38: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
- 3c: (7c 20 05 dd|dd 05 20 7c) tresume\.
- 40: (7c 20 05 dd|dd 05 20 7c) tresume\.
- 44: (60 42 00 00|00 00 42 60) ori r2,r2,0
- 48: (60 00 00 00|00 00 00 60) nop
- 4c: (60 42 00 00|00 00 42 60) ori r2,r2,0
- 50: (4c 00 01 24|24 01 00 4c) rfebb 0
- 54: (4c 00 09 24|24 09 00 4c) rfebb
- 58: (4c 00 09 24|24 09 00 4c) rfebb
- 5c: (4d d5 04 60|60 04 d5 4d) bgttar- cr5
- 60: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1
- 64: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3
- 68: (4c e2 04 61|61 04 e2 4c) bnetarl\+
- 6c: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1
- 70: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2
- 74: (7c 00 00 3c|3c 00 00 7c) waitasec
- 78: (7c 00 41 1c|1c 41 00 7c) msgsndp r8
- 7c: (7c 20 01 26|26 01 20 7c) mtsle 1
- 80: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27
- 84: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12
- 88: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7
- 8c: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11
- 90: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11
- 94: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6
- 98: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16
- 9c: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7
- a0: (7c 00 03 5c|5c 03 00 7c) clrbhrb
- a4: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23
- a8: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4
- ac: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2
- b0: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19
- b4: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29
- b8: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13
- bc: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26
- c0: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28
- c4: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1
- c8: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1
- cc: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11
- d0: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30
- d4: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13
- d8: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4
- dc: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4
- e0: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21
- e4: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19
- e8: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15
- ec: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2
- f0: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9
- f4: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11
- f8: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11
- fc: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1
- 100: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12
- 104: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1
- 108: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16
- 10c: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20
- 110: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29
- 114: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13
- 118: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18
- 11c: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22
- 120: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7
- 124: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22
- 128: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13
- 12c: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16
- 130: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5
- 134: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31
- 138: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27
- 13c: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23
- 140: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9
- 144: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27
- 148: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24
- 14c: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13
- 150: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7
- 154: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0
- 158: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26
- 15c: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6
- 160: (13 95 76 84|84 76 95 13) veqv v28,v21,v14
- 164: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19
- 168: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10
- 16c: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14
- 170: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13
- 174: (11 c0 87 02|02 87 c0 11) vclzb v14,v16
- 178: (12 80 df 03|03 df 80 12) vpopcntb v20,v27
- 17c: (13 80 5f 42|42 5f 80 13) vclzh v28,v11
- 180: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9
- 184: (13 60 ff 82|82 ff 60 13) vclzw v27,v31
- 188: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19
- 18c: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29
- 190: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22
- 194: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29
- 198: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27
- 19c: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
- 1a0: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
- 1a4: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
- 1a8: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
- 1ac: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
- 1b0: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
- 1b4: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
- 1b8: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
- 1bc: (7e 0b 01 67|67 01 0b 7e) mtvsrd vs48,r11
- 1c0: (7f f7 01 a7|a7 01 f7 7f) mtvrwa v31,r23
- 1c4: (7e 1a 01 e6|e6 01 1a 7e) mtfprwz f16,r26
- 1c8: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
- 1cc: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
- 1d0: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
- 1d4: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
- 1d8: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
- 1dc: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
- 1e0: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
- 1e4: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
- 1e8: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
- 1ec: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
- 1f0: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
- 1f4: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
- 1f8: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
- 1fc: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
- 200: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
- 204: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
- 208: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
- 20c: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
- 210: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
- 214: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
- 218: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
- 21c: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
- 220: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
- 224: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
- 228: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
- 22c: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
- 230: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
- 234: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
- 238: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
- 23c: (7c 00 71 9c|9c 71 00 7c) msgsnd r14
- 240: (7c 00 b9 dc|dc b9 00 7c) msgclr r23
+.*: (7c 05 07 1d|1d 07 05 7c) tabort\. r5
+.*: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16
+.*: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10
+.*: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13
+.*: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5
+.*: (7c 00 05 1d|1d 05 00 7c) tbegin\.
+.*: (7f 80 05 9c|9c 05 80 7f) tcheck cr7
+.*: (7c 00 05 5d|5d 05 00 7c) tend\.
+.*: (7c 00 05 5d|5d 05 00 7c) tend\.
+.*: (7e 00 05 5d|5d 05 00 7e) tendall\.
+.*: (7e 00 05 5d|5d 05 00 7e) tendall\.
+.*: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24
+.*: (7c 00 07 dd|dd 07 00 7c) trechkpt\.
+.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
+.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
+.*: (7c 20 05 dd|dd 05 20 7c) tresume\.
+.*: (7c 20 05 dd|dd 05 20 7c) tresume\.
+.*: (60 42 00 00|00 00 42 60) ori r2,r2,0
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 42 00 00|00 00 42 60) ori r2,r2,0
+.*: (4c 00 01 24|24 01 00 4c) rfebb 0
+.*: (4c 00 09 24|24 09 00 4c) rfebb
+.*: (4c 00 09 24|24 09 00 4c) rfebb
+.*: (4d d5 04 60|60 04 d5 4d) bgttar- cr5
+.*: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1
+.*: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3
+.*: (4c e2 04 61|61 04 e2 4c) bnetarl\+
+.*: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1
+.*: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2
+.*: (7c 00 00 3c|3c 00 00 7c) waitasec
+.*: (7c 00 41 1c|1c 41 00 7c) msgsndp r8
+.*: (7c 20 01 26|26 01 20 7c) mtsle 1
+.*: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27
+.*: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12
+.*: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7
+.*: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11
+.*: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11
+.*: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6
+.*: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16
+.*: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7
+.*: (7c 00 03 5c|5c 03 00 7c) clrbhrb
+.*: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23
+.*: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4
+.*: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2
+.*: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19
+.*: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29
+.*: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13
+.*: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26
+.*: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28
+.*: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1
+.*: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1
+.*: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11
+.*: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30
+.*: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13
+.*: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4
+.*: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4
+.*: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21
+.*: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19
+.*: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15
+.*: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2
+.*: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9
+.*: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11
+.*: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11
+.*: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1
+.*: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12
+.*: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1
+.*: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16
+.*: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20
+.*: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29
+.*: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13
+.*: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18
+.*: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22
+.*: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7
+.*: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22
+.*: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13
+.*: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16
+.*: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5
+.*: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31
+.*: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27
+.*: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23
+.*: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9
+.*: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27
+.*: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24
+.*: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13
+.*: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7
+.*: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0
+.*: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26
+.*: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6
+.*: (13 95 76 84|84 76 95 13) veqv v28,v21,v14
+.*: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19
+.*: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10
+.*: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14
+.*: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13
+.*: (11 c0 87 02|02 87 c0 11) vclzb v14,v16
+.*: (12 80 df 03|03 df 80 12) vpopcntb v20,v27
+.*: (13 80 5f 42|42 5f 80 13) vclzh v28,v11
+.*: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9
+.*: (13 60 ff 82|82 ff 60 13) vclzw v27,v31
+.*: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19
+.*: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29
+.*: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22
+.*: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29
+.*: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27
+.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
+.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
+.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
+.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
+.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62)
+.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12)
+.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
+.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
+.*: (7e 0b 01 67|67 01 0b 7e) (mtvrd v16,r11|mtvsrd vs48,r11)
+.*: (7f f7 01 a7|a7 01 f7 7f) (mtvrwa v31,r23|mtvsrwa vs63,r23)
+.*: (7e 1a 01 e6|e6 01 1a 7e) (mtfprwz f16,r26|mtvsrwz vs16,r26)
+.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
+.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
+.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
+.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
+.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
+.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
+.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
+.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
+.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
+.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
+.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
+.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
+.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
+.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
+.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
+.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
+.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
+.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
+.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
+.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
+.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
+.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
+.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
+.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
+.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
+.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
+.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
+.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
+.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
+.*: (7c 00 71 9c|9c 71 00 7c) msgsnd r14
+.*: (7c 00 b9 dc|dc b9 00 7c) msgclr r23
.*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5
.*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5
.*: (7d 54 36 98|98 36 54 7d) lxvd2x vs10,r20,r6
@@ -310,4 +310,6 @@ Disassembly of section \.text:
.*: (4d 89 04 61|61 04 89 4d) bgttarl cr2
.*: (4d 89 04 61|61 04 89 4d) bgttarl cr2
.*: (4d 89 1c 61|61 1c 89 4d) bctarl 12,4\*cr2\+gt,3
+.*: (7f 5a d3 78|78 d3 5a 7f) miso
+.*: (7f 5a d3 78|78 d3 5a 7f) miso
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/power8.s fred/binutils-2.35.1/gas/testsuite/gas/ppc/power8.s
--- binutils-2.35.1/gas/testsuite/gas/ppc/power8.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/power8.s 2020-11-25 14:37:47.000000000 +0000
@@ -302,3 +302,5 @@ power8:
bctarl 0b01100,4*cr2+gt
bctarl 0b01100,4*cr2+gt,0
bctarl 0b01100,4*cr2+gt,3
+ or 26,26,26
+ miso
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/power9.d fred/binutils-2.35.1/gas/testsuite/gas/ppc/power9.d
--- binutils-2.35.1/gas/testsuite/gas/ppc/power9.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/power9.d 2020-11-25 14:37:47.000000000 +0000
@@ -399,4 +399,8 @@ Disassembly of section \.text:
.*: (7c 20 20 ac|ac 20 20 7c) dcbfl 0,r4
.*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5
.*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5
+.*: (63 ff 00 00|00 00 ff 63) exser
+.*: (63 ff 00 00|00 00 ff 63) exser
+.*: (7c 00 18 9c|9c 18 00 7c) msgsndu r3
+.*: (7c 00 d8 dc|dc d8 00 7c) msgclru r27
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/power9.s fred/binutils-2.35.1/gas/testsuite/gas/ppc/power9.s
--- binutils-2.35.1/gas/testsuite/gas/ppc/power9.s 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/power9.s 2020-11-25 14:37:47.000000000 +0000
@@ -390,3 +390,7 @@ power9:
dcbf 0,4,1
dcbflp 0,5
dcbf 0,5,3
+ ori 31,31,0
+ exser
+ msgsndu 3
+ msgclru 27
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/ppc.exp fred/binutils-2.35.1/gas/testsuite/gas/ppc/ppc.exp
--- binutils-2.35.1/gas/testsuite/gas/ppc/ppc.exp 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/ppc.exp 2020-11-25 14:37:47.000000000 +0000
@@ -76,6 +76,8 @@ if { [istarget powerpc64*-*-*] || [istar
run_dump_test "common"
run_dump_test "476"
run_dump_test "a2"
+run_dump_test "be"
+run_dump_test "le_error"
run_dump_test "pr21303"
run_dump_test "vle"
run_dump_test "vle-reloc"
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/vsx2.d fred/binutils-2.35.1/gas/testsuite/gas/ppc/vsx2.d
--- binutils-2.35.1/gas/testsuite/gas/ppc/vsx2.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/vsx2.d 2020-11-25 14:37:47.000000000 +0000
@@ -7,59 +7,59 @@
Disassembly of section \.text:
0+00 <vsx2>:
- 0: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
- 4: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
- 8: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
- c: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
- 10: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30
- 14: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30
- 18: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
- 1c: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
- 20: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
- 24: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
- 28: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12
- 2c: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12
- 30: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
- 34: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
- 38: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28
- 3c: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28
- 40: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29
- 44: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29
- 48: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22
- 4c: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22
- 50: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23
- 54: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23
- 58: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27
- 5c: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27
- 60: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28
- 64: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28
- 68: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
- 6c: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
- 70: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
- 74: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
- 78: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
- 7c: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
- 80: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
- 84: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
- 88: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
- 8c: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
- 90: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
- 94: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
- 98: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
- 9c: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
- a0: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
- a4: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
- a8: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
- ac: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
- b0: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
- b4: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
- b8: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
- bc: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
- c0: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
- c4: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
- c8: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
- cc: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
- d0: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
- d4: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
- d8: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
+.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
+.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
+.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
+.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
+.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30)
+.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30)
+.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62)
+.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62)
+.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12)
+.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12)
+.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44)
+.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44)
+.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
+.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
+.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28)
+.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28)
+.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29)
+.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29)
+.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22)
+.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22)
+.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23)
+.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23)
+.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27)
+.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27)
+.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28)
+.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28)
+.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
+.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
+.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
+.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
+.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
+.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
+.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
+.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
+.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
+.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
+.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
+.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
+.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
+.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
+.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
+.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
+.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
+.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
+.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
+.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
+.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
+.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
+.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
+.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
+.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
+.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
+.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
+.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
+.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
#pass
diff -rup binutils-2.35.1/gas/testsuite/gas/ppc/xvtlsbb.d fred/binutils-2.35.1/gas/testsuite/gas/ppc/xvtlsbb.d
--- binutils-2.35.1/gas/testsuite/gas/ppc/xvtlsbb.d 2020-07-24 10:12:19.000000000 +0100
+++ fred/binutils-2.35.1/gas/testsuite/gas/ppc/xvtlsbb.d 2020-11-25 14:37:47.000000000 +0000
@@ -7,7 +7,7 @@
Disassembly of section \.text:
0+0 <_start>:
-.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb vs63
+.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb cr0,vs63
.*: (f0 82 07 6c|6c 07 82 f0) xvtlsbb cr1,vs0
.*: (f1 02 f7 6e|6e f7 02 f1) xvtlsbb cr2,vs62
.*: (f1 82 0f 6c|6c 0f 82 f1) xvtlsbb cr3,vs1
diff -rup binutils-2.35.1/gold/options.cc fred/binutils-2.35.1/gold/options.cc
--- binutils-2.35.1/gold/options.cc 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/gold/options.cc 2020-11-25 14:37:54.000000000 +0000
@@ -465,6 +465,14 @@ General_options::parse_plugin_opt(const
}
void
+General_options::parse_no_power10_stubs(const char*, const char*,
+ Command_line*)
+{
+ this->set_power10_stubs("no");
+ this->set_user_set_power10_stubs();
+}
+
+void
General_options::parse_R(const char* option, const char* arg,
Command_line* cmdline)
{
@@ -1183,6 +1191,27 @@ General_options::finalize()
this->set_start_stop_visibility_enum(elfcpp::STV_PROTECTED);
}
+ // Parse the --power10-stubs argument.
+ if (!this->user_set_power10_stubs())
+ {
+ // --power10-stubs without an arg is equivalent to --power10-stubs=yes
+ // but not specifying --power10-stubs at all should be equivalent to
+ // --power10-stubs=auto. This doesn't fit into the notion of
+ // "default_value", used both as a static initializer and to provide
+ // a missing optional arg. Fix it here.
+ this->set_power10_stubs("auto");
+ this->set_power10_stubs_enum(POWER10_STUBS_AUTO);
+ }
+ else
+ {
+ if (strcmp(this->power10_stubs(), "auto") == 0)
+ this->set_power10_stubs_enum(POWER10_STUBS_AUTO);
+ else if (strcmp(this->power10_stubs(), "no") == 0)
+ this->set_power10_stubs_enum(POWER10_STUBS_NO);
+ else if (strcmp(this->power10_stubs(), "yes") == 0)
+ this->set_power10_stubs_enum(POWER10_STUBS_YES);
+ }
+
// -M is equivalent to "-Map -".
if (this->print_map() && !this->user_set_Map())
{
diff -rup binutils-2.35.1/gold/options.h fred/binutils-2.35.1/gold/options.h
--- binutils-2.35.1/gold/options.h 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/gold/options.h 2020-11-25 14:37:54.000000000 +0000
@@ -481,9 +481,9 @@ struct Struct_special : public Struct_va
// After helparg__ should come an initializer list, like
// {"foo", "bar", "baz"}
#define DEFINE_enum(varname__, dashes__, shortname__, default_value__, \
- helpstring__, helparg__, ...) \
+ helpstring__, helparg__, optional_arg__, ...) \
DEFINE_var(varname__, dashes__, shortname__, default_value__, \
- default_value__, helpstring__, helparg__, false, \
+ default_value__, helpstring__, helparg__, optional_arg__, \
const char*, const char*, parse_choices_##varname__, false) \
private: \
static void parse_choices_##varname__(const char* option_name, \
@@ -703,7 +703,7 @@ class General_options
N_("Use DT_NEEDED for all shared libraries"));
DEFINE_enum(assert, options::ONE_DASH, '\0', NULL,
- N_("Ignored"), N_("[ignored]"),
+ N_("Ignored"), N_("[ignored]"), false,
{"definitions", "nodefinitions", "nosymbolic", "pure-text"});
// b
@@ -761,7 +761,7 @@ class General_options
DEFINE_enum(compress_debug_sections, options::TWO_DASHES, '\0', "none",
N_("Compress .debug_* sections in the output file"),
- ("[none,zlib,zlib-gnu,zlib-gabi]"),
+ ("[none,zlib,zlib-gnu,zlib-gabi]"), false,
{"none", "zlib", "zlib-gnu", "zlib-gabi"});
DEFINE_bool(copy_dt_needed_entries, options::TWO_DASHES, '\0', false,
@@ -934,7 +934,7 @@ class General_options
N_("FRACTION"));
DEFINE_enum(hash_style, options::TWO_DASHES, '\0', DEFAULT_HASH_STYLE,
- N_("Dynamic hash style"), N_("[sysv,gnu,both]"),
+ N_("Dynamic hash style"), N_("[sysv,gnu,both]"), false,
{"sysv", "gnu", "both"});
// i
@@ -946,7 +946,7 @@ class General_options
N_("Identical Code Folding. "
"\'--icf=safe\' Folds ctors, dtors and functions whose"
" pointers are definitely not taken"),
- ("[none,all,safe]"),
+ ("[none,all,safe]"), false,
{"none", "all", "safe"});
DEFINE_uint(icf_iterations, options::TWO_DASHES , '\0', 0,
@@ -1086,7 +1086,7 @@ class General_options
DEFINE_enum(orphan_handling, options::TWO_DASHES, '\0', "place",
N_("Orphan section handling"), N_("[place,discard,warn,error]"),
- {"place", "discard", "warn", "error"});
+ false, {"place", "discard", "warn", "error"});
// p
@@ -1141,6 +1141,12 @@ class General_options
N_("Use posix_fallocate to reserve space in the output file"),
N_("Use fallocate or ftruncate to reserve space"));
+ DEFINE_enum(power10_stubs, options::TWO_DASHES, '\0', "yes",
+ N_("(PowerPC64 only) stubs use power10 insns"),
+ N_("[=auto,no,yes]"), true, {"auto", "no", "yes"});
+ DEFINE_special(no_power10_stubs, options::TWO_DASHES, '\0',
+ N_("(PowerPC64 only) stubs do not use power10 insns"), NULL);
+
DEFINE_bool(preread_archive_symbols, options::TWO_DASHES, '\0', false,
N_("Preread archive symbols when multi-threaded"), NULL);
@@ -1236,7 +1242,7 @@ class General_options
DEFINE_enum(sort_section, options::TWO_DASHES, '\0', "none",
N_("Sort sections by name. \'--no-text-reorder\'"
" will override \'--sort-section=name\' for .text"),
- N_("[none,name]"),
+ N_("[none,name]"), false,
{"none", "name"});
DEFINE_uint(spare_dynamic_tags, options::TWO_DASHES, '\0', 5,
@@ -1254,7 +1260,7 @@ class General_options
"output sections"),
N_("(PowerPC only) Each output section has its own stubs"));
- DEFINE_uint(split_stack_adjust_size, options::TWO_DASHES, '\0', 0x4000,
+ DEFINE_uint(split_stack_adjust_size, options::TWO_DASHES, '\0', 0x100000,
N_("Stack size when -fsplit-stack function calls non-split"),
N_("SIZE"));
@@ -1287,7 +1293,7 @@ class General_options
NULL);
DEFINE_enum(target2, options::TWO_DASHES, '\0', NULL,
N_("(ARM only) Set R_ARM_TARGET2 relocation type"),
- N_("[rel, abs, got-rel"),
+ N_("[rel, abs, got-rel"), false,
{"rel", "abs", "got-rel"});
DEFINE_bool(text_reorder, options::TWO_DASHES, '\0', true,
@@ -1344,7 +1350,7 @@ class General_options
DEFINE_enum(unresolved_symbols, options::TWO_DASHES, '\0', NULL,
N_("How to handle unresolved symbols"),
("ignore-all,report-all,ignore-in-object-files,"
- "ignore-in-shared-libs"),
+ "ignore-in-shared-libs"), false,
{"ignore-all", "report-all", "ignore-in-object-files",
"ignore-in-shared-libs"});
@@ -1507,7 +1513,7 @@ class General_options
DEFINE_enum(start_stop_visibility, options::DASH_Z, '\0', "protected",
N_("ELF symbol visibility for synthesized "
"__start_* and __stop_* symbols"),
- ("[default,internal,hidden,protected]"),
+ ("[default,internal,hidden,protected]"), false,
{"default", "internal", "hidden", "protected"});
DEFINE_bool(text, options::DASH_Z, '\0', false,
N_("Do not permit relocations in read-only segments"),
@@ -1763,6 +1769,20 @@ class General_options
start_stop_visibility_enum() const
{ return this->start_stop_visibility_enum_; }
+ enum Power10_stubs
+ {
+ // Use Power10 insns on @notoc calls/branches, non-Power10 elsewhere.
+ POWER10_STUBS_AUTO,
+ // Don't use Power10 insns
+ POWER10_STUBS_NO,
+ // Always use Power10 insns
+ POWER10_STUBS_YES
+ };
+
+ Power10_stubs
+ power10_stubs_enum() const
+ { return this->power10_stubs_enum_; }
+
private:
// Don't copy this structure.
General_options(const General_options&);
@@ -1826,6 +1846,10 @@ class General_options
set_start_stop_visibility_enum(elfcpp::STV value)
{ this->start_stop_visibility_enum_ = value; }
+ void
+ set_power10_stubs_enum(Power10_stubs value)
+ { this->power10_stubs_enum_ = value; }
+
// These are called by finalize() to set up the search-path correctly.
void
add_to_library_path_with_sysroot(const std::string& arg)
@@ -1895,6 +1919,8 @@ class General_options
Orphan_handling orphan_handling_enum_;
// Symbol visibility for __start_* / __stop_* magic symbols.
elfcpp::STV start_stop_visibility_enum_;
+ // Power10 stubs option
+ Power10_stubs power10_stubs_enum_;
};
// The position-dependent options. We use this to store the state of
diff -rup binutils-2.35.1/gold/powerpc.cc fred/binutils-2.35.1/gold/powerpc.cc
--- binutils-2.35.1/gold/powerpc.cc 2020-09-11 09:19:10.000000000 +0100
+++ fred/binutils-2.35.1/gold/powerpc.cc 2020-11-25 14:37:54.000000000 +0000
@@ -647,10 +647,9 @@ class Target_powerpc : public Sized_targ
glink_(NULL), rela_dyn_(NULL), copy_relocs_(),
tlsld_got_offset_(-1U),
stub_tables_(), branch_lookup_table_(), branch_info_(), tocsave_loc_(),
- power10_stubs_(false), plt_thread_safe_(false), plt_localentry0_(false),
+ power10_relocs_(false), plt_thread_safe_(false), plt_localentry0_(false),
plt_localentry0_init_(false), has_localentry0_(false),
- has_tls_get_addr_opt_(false),
- tprel_opt_(parameters->options().tls_optimize()),
+ has_tls_get_addr_opt_(false), no_tprel_opt_(false),
relax_failed_(false), relax_fail_count_(0),
stub_group_size_(0), savres_section_(0),
tls_get_addr_(NULL), tls_get_addr_opt_(NULL),
@@ -1079,14 +1078,25 @@ class Target_powerpc : public Sized_targ
sym->set_dynsym_index(-1U);
}
+ void
+ set_power10_relocs()
+ {
+ this->power10_relocs_ = true;
+ }
+
bool
power10_stubs() const
- { return this->power10_stubs_; }
+ {
+ return (this->power10_relocs_
+ && (parameters->options().power10_stubs_enum()
+ != General_options::POWER10_STUBS_NO));
+ }
- void
- set_power10_stubs()
+ bool
+ power10_stubs_auto() const
{
- this->power10_stubs_ = true;
+ return (parameters->options().power10_stubs_enum()
+ == General_options::POWER10_STUBS_AUTO);
}
bool
@@ -1097,6 +1107,10 @@ class Target_powerpc : public Sized_targ
plt_localentry0() const
{ return this->plt_localentry0_; }
+ bool
+ has_localentry0() const
+ { return this->has_localentry0_; }
+
void
set_has_localentry0()
{
@@ -1139,11 +1153,11 @@ class Target_powerpc : public Sized_targ
bool
tprel_opt() const
- { return this->tprel_opt_; }
+ { return !this->no_tprel_opt_ && parameters->options().tls_optimize(); }
void
- set_tprel_opt(bool val)
- { this->tprel_opt_ = val; }
+ set_no_tprel_opt()
+ { this->no_tprel_opt_ = true; }
// Remember any symbols seen with non-zero localentry, even those
// not providing a definition
@@ -1696,13 +1710,13 @@ class Target_powerpc : public Sized_targ
Branches branch_info_;
Tocsave_loc tocsave_loc_;
- bool power10_stubs_;
+ bool power10_relocs_;
bool plt_thread_safe_;
bool plt_localentry0_;
bool plt_localentry0_init_;
bool has_localentry0_;
bool has_tls_get_addr_opt_;
- bool tprel_opt_;
+ bool no_tprel_opt_;
bool relax_failed_;
int relax_fail_count_;
@@ -1869,6 +1883,19 @@ is_plt16_reloc(unsigned int r_type)
|| (size == 64 && r_type == elfcpp::R_PPC64_PLT16_LO_DS));
}
+// GOT_TYPE_STANDARD (ie. not TLS) GOT relocs
+inline bool
+is_got_reloc(unsigned int r_type)
+{
+ return (r_type == elfcpp::R_POWERPC_GOT16
+ || r_type == elfcpp::R_POWERPC_GOT16_LO
+ || r_type == elfcpp::R_POWERPC_GOT16_HI
+ || r_type == elfcpp::R_POWERPC_GOT16_HA
+ || r_type == elfcpp::R_PPC64_GOT16_DS
+ || r_type == elfcpp::R_PPC64_GOT16_LO_DS
+ || r_type == elfcpp::R_PPC64_GOT_PCREL34);
+}
+
// If INSN is an opcode that may be used with an @tls operand, return
// the transformed insn for TLS optimisation, otherwise return 0. If
// REG is non-zero only match an insn with RB or RA equal to REG.
@@ -2739,8 +2766,6 @@ Powerpc_relobj<size, big_endian>::do_rel
if (this->local_has_plt_offset(i))
{
Address value = this->local_symbol_value(i, 0);
- if (size == 64)
- value += ppc64_local_entry_offset(i);
size_t off = this->local_plt_offset(i);
elfcpp::Swap<size, big_endian>::writeval(oview + off, value);
modified = true;
@@ -3511,6 +3536,7 @@ Target_powerpc<size, big_endian>::Branch
from += (this->object_->output_section(this->shndx_)->address()
+ this->offset_);
Address to;
+ unsigned int other;
if (gsym != NULL)
{
switch (gsym->source())
@@ -3538,8 +3564,7 @@ Target_powerpc<size, big_endian>::Branch
to = symtab->compute_final_value<size>(gsym, &status);
if (status != Symbol_table::CFVS_OK)
return true;
- if (size == 64)
- to += this->object_->ppc64_local_entry_offset(gsym);
+ other = gsym->nonvis() >> 3;
}
else
{
@@ -3556,8 +3581,7 @@ Target_powerpc<size, big_endian>::Branch
|| !symval.has_output_value())
return true;
to = symval.value(this->object_, 0);
- if (size == 64)
- to += this->object_->ppc64_local_entry_offset(this->r_sym_);
+ other = this->object_->st_other(this->r_sym_) >> 5;
}
if (!(size == 32 && this->r_type_ == elfcpp::R_PPC_PLTREL24))
to += this->addend_;
@@ -3570,7 +3594,11 @@ Target_powerpc<size, big_endian>::Branch
&to, &dest_shndx))
return true;
}
- Address delta = to - from;
+ unsigned int local_ent = 0;
+ if (size == 64
+ && this->r_type_ != elfcpp::R_PPC64_REL24_NOTOC)
+ local_ent = elfcpp::ppc64_decode_local_entry(other);
+ Address delta = to + local_ent - from;
if (delta + max_branch_offset >= 2 * max_branch_offset
|| (size == 64
&& this->r_type_ == elfcpp::R_PPC64_REL24_NOTOC
@@ -3592,7 +3620,7 @@ Target_powerpc<size, big_endian>::Branch
&& gsym->output_data() == target->savres_section());
ok = stub_table->add_long_branch_entry(this->object_,
this->r_type_,
- from, to, save_res);
+ from, to, other, save_res);
}
}
if (!ok)
@@ -4181,6 +4209,7 @@ static const uint32_t cmpwi_11_0 = 0x2c0
static const uint32_t cror_15_15_15 = 0x4def7b82;
static const uint32_t cror_31_31_31 = 0x4ffffb82;
static const uint32_t ld_0_1 = 0xe8010000;
+static const uint32_t ld_0_11 = 0xe80b0000;
static const uint32_t ld_0_12 = 0xe80c0000;
static const uint32_t ld_2_1 = 0xe8410000;
static const uint32_t ld_2_2 = 0xe8420000;
@@ -4563,9 +4592,9 @@ static const unsigned char glink_eh_fram
0, 0, 0, 0, // Replaced with offset to .glink.
0, 0, 0, 0, // Replaced with size of .glink.
0, // Augmentation size.
- elfcpp::DW_CFA_advance_loc + 1,
+ elfcpp::DW_CFA_advance_loc + 2,
elfcpp::DW_CFA_register, 65, 12,
- elfcpp::DW_CFA_advance_loc + 5,
+ elfcpp::DW_CFA_advance_loc + 4,
elfcpp::DW_CFA_restore_extended, 65
};
@@ -4575,9 +4604,20 @@ static const unsigned char glink_eh_fram
0, 0, 0, 0, // Replaced with offset to .glink.
0, 0, 0, 0, // Replaced with size of .glink.
0, // Augmentation size.
- elfcpp::DW_CFA_advance_loc + 1,
+ elfcpp::DW_CFA_advance_loc + 2,
+ elfcpp::DW_CFA_register, 65, 0,
+ elfcpp::DW_CFA_advance_loc + 2,
+ elfcpp::DW_CFA_restore_extended, 65
+};
+
+static const unsigned char glink_eh_frame_fde_64v2_localentry0[] =
+{
+ 0, 0, 0, 0, // Replaced with offset to .glink.
+ 0, 0, 0, 0, // Replaced with size of .glink.
+ 0, // Augmentation size.
+ elfcpp::DW_CFA_advance_loc + 3,
elfcpp::DW_CFA_register, 65, 0,
- elfcpp::DW_CFA_advance_loc + 7,
+ elfcpp::DW_CFA_advance_loc + 2,
elfcpp::DW_CFA_restore_extended, 65
};
@@ -4631,26 +4671,33 @@ class Stub_table : public Output_relaxed
struct Plt_stub_ent
{
Plt_stub_ent(unsigned int off, unsigned int indx)
- : off_(off), indx_(indx), iter_(0), notoc_(0), r2save_(0), localentry0_(0)
+ : off_(off), indx_(indx), iter_(0), notoc_(0), toc_(0),
+ r2save_(0), localentry0_(0), tocoff_(0)
{ }
unsigned int off_;
- unsigned int indx_ : 28;
+ unsigned int indx_;
unsigned int iter_ : 1;
unsigned int notoc_ : 1;
+ unsigned int toc_ : 1;
unsigned int r2save_ : 1;
unsigned int localentry0_ : 1;
+ unsigned int tocoff_ : 8;
};
struct Branch_stub_ent
{
Branch_stub_ent(unsigned int off, bool notoc, bool save_res)
- : off_(off), iter_(false), notoc_(notoc), save_res_(save_res)
+ : off_(off), iter_(0), notoc_(notoc), toc_(0), save_res_(save_res),
+ other_(0), tocoff_(0)
{ }
unsigned int off_;
- bool iter_;
- bool notoc_;
- bool save_res_;
+ unsigned int iter_ : 1;
+ unsigned int notoc_ : 1;
+ unsigned int toc_ : 1;
+ unsigned int save_res_ : 1;
+ unsigned int other_ : 3;
+ unsigned int tocoff_ : 8;
};
typedef typename elfcpp::Elf_types<size>::Elf_Addr Address;
static const Address invalid_address = static_cast<Address>(0) - 1;
@@ -4716,7 +4763,7 @@ class Stub_table : public Output_relaxed
// Add a long branch stub.
bool
add_long_branch_entry(const Powerpc_relobj<size, big_endian>*,
- unsigned int, Address, Address, bool);
+ unsigned int, Address, Address, unsigned int, bool);
const Branch_stub_ent*
find_long_branch_entry(const Powerpc_relobj<size, big_endian>*,
@@ -4898,7 +4945,7 @@ class Stub_table : public Output_relaxed
// Size of a given plt call stub.
unsigned int
- plt_call_size(typename Plt_stub_entries::const_iterator p) const;
+ plt_call_size(typename Plt_stub_entries::iterator p) const;
unsigned int
plt_call_align(unsigned int bytes) const
@@ -4909,16 +4956,14 @@ class Stub_table : public Output_relaxed
// Return long branch stub size.
unsigned int
- branch_stub_size(typename Branch_stub_entries::const_iterator p,
+ branch_stub_size(typename Branch_stub_entries::iterator p,
bool* need_lt);
- bool
- build_tls_opt_head(unsigned char** pp,
- typename Plt_stub_entries::const_iterator cs);
+ void
+ build_tls_opt_head(unsigned char** pp, bool save_lr);
- bool
- build_tls_opt_tail(unsigned char* p,
- typename Plt_stub_entries::const_iterator cs);
+ void
+ build_tls_opt_tail(unsigned char* p);
void
plt_error(const Plt_stub_key& p);
@@ -5083,15 +5128,22 @@ Stub_table<size, big_endian>::add_plt_ca
if (r_type == elfcpp::R_PPC64_REL24_NOTOC)
{
if (!p.second && !p.first->second.notoc_
- && !this->targ_->power10_stubs())
+ && (!this->targ_->power10_stubs()
+ || this->targ_->power10_stubs_auto()))
this->need_resize_ = true;
p.first->second.notoc_ = 1;
}
- else if (!tocsave && !p.first->second.localentry0_)
+ else
{
- if (!p.second && !p.first->second.r2save_)
+ if (!p.second && !p.first->second.toc_)
this->need_resize_ = true;
- p.first->second.r2save_ = 1;
+ p.first->second.toc_ = 1;
+ if (!tocsave && !p.first->second.localentry0_)
+ {
+ if (!p.second && !p.first->second.r2save_)
+ this->need_resize_ = true;
+ p.first->second.r2save_ = 1;
+ }
}
}
if (p.second || (this->resizing_ && !p.first->second.iter_))
@@ -5134,15 +5186,22 @@ Stub_table<size, big_endian>::add_plt_ca
if (r_type == elfcpp::R_PPC64_REL24_NOTOC)
{
if (!p.second && !p.first->second.notoc_
- && !this->targ_->power10_stubs())
+ && (!this->targ_->power10_stubs()
+ || this->targ_->power10_stubs_auto()))
this->need_resize_ = true;
p.first->second.notoc_ = 1;
}
- else if (!tocsave && !p.first->second.localentry0_)
+ else
{
- if (!p.second && !p.first->second.r2save_)
+ if (!p.second && !p.first->second.toc_)
this->need_resize_ = true;
- p.first->second.r2save_ = 1;
+ p.first->second.toc_ = 1;
+ if (!tocsave && !p.first->second.localentry0_)
+ {
+ if (!p.second && !p.first->second.r2save_)
+ this->need_resize_ = true;
+ p.first->second.r2save_ = 1;
+ }
}
}
if (p.second || (this->resizing_ && !p.first->second.iter_))
@@ -5224,6 +5283,7 @@ Stub_table<size, big_endian>::add_long_b
unsigned int r_type,
Address from,
Address to,
+ unsigned int other,
bool save_res)
{
Branch_stub_key key(object, to);
@@ -5231,11 +5291,20 @@ Stub_table<size, big_endian>::add_long_b
Branch_stub_ent ent(this->branch_size_, notoc, save_res);
std::pair<typename Branch_stub_entries::iterator, bool> p
= this->long_branch_stubs_.insert(std::make_pair(key, ent));
- if (notoc && !p.first->second.notoc_)
+ if (notoc)
{
- this->need_resize_ = true;
+ if (!p.second && !p.first->second.notoc_)
+ this->need_resize_ = true;
p.first->second.notoc_ = true;
}
+ else
+ {
+ if (!p.second && !p.first->second.toc_)
+ this->need_resize_ = true;
+ p.first->second.toc_ = true;
+ }
+ if (p.first->second.other_ == 0)
+ p.first->second.other_ = other;
gold_assert(save_res == p.first->second.save_res_);
if (p.second || (this->resizing_ && !p.first->second.iter_))
{
@@ -5330,7 +5399,7 @@ Stub_table<size, big_endian>::add_eh_fra
if (!this->targ_->has_glink())
return;
- typedef typename Plt_stub_entries::const_iterator plt_iter;
+ typedef typename Plt_stub_entries::iterator plt_iter;
std::vector<plt_iter> calls;
if (!this->plt_call_stubs_.empty())
for (plt_iter cs = this->plt_call_stubs_.begin();
@@ -5491,7 +5560,8 @@ class Output_data_glink : public Output_
{
if (size == 64)
return (8
- + (this->targ_->abiversion() < 2 ? 11 * 4 : 14 * 4));
+ + (this->targ_->abiversion() < 2 ? 11 * 4
+ : this->targ_->has_localentry0() ? 14 * 4 : 13 * 4));
return 16 * 4;
}
@@ -5534,6 +5604,12 @@ Output_data_glink<size, big_endian>::add
sizeof (Eh_cie<64>::eh_frame_cie),
glink_eh_frame_fde_64v1,
sizeof (glink_eh_frame_fde_64v1));
+ else if (this->targ_->has_localentry0())
+ layout->add_eh_frame_for_plt(this,
+ Eh_cie<64>::eh_frame_cie,
+ sizeof (Eh_cie<64>::eh_frame_cie),
+ glink_eh_frame_fde_64v2_localentry0,
+ sizeof (glink_eh_frame_fde_64v2));
else
layout->add_eh_frame_for_plt(this,
Eh_cie<64>::eh_frame_cie,
@@ -5632,7 +5708,7 @@ Stub_table<size, big_endian>::define_stu
// output .symtab ordering depends on the order in which symbols
// are added to the linker symtab. We want reproducible output
// so must sort the call stub symbols.
- typedef typename Plt_stub_entries::const_iterator plt_iter;
+ typedef typename Plt_stub_entries::iterator plt_iter;
std::vector<plt_iter> sorted;
sorted.resize(this->plt_call_stubs_.size());
@@ -5676,7 +5752,7 @@ Stub_table<size, big_endian>::define_stu
}
}
- typedef typename Branch_stub_entries::const_iterator branch_iter;
+ typedef typename Branch_stub_entries::iterator branch_iter;
for (branch_iter bs = this->long_branch_stubs_.begin();
bs != this->long_branch_stubs_.end();
++bs)
@@ -5698,88 +5774,72 @@ Stub_table<size, big_endian>::define_stu
// Emit the start of a __tls_get_addr_opt plt call stub.
template<int size, bool big_endian>
-bool
-Stub_table<size, big_endian>::build_tls_opt_head(
- unsigned char** pp,
- typename Plt_stub_entries::const_iterator cs)
+void
+Stub_table<size, big_endian>::build_tls_opt_head(unsigned char** pp,
+ bool save_lr)
{
- if (this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ unsigned char* p = *pp;
+ if (size == 64)
{
- unsigned char* p = *pp;
- if (size == 64)
- {
- write_insn<big_endian>(p, ld_11_3 + 0);
- p += 4;
- write_insn<big_endian>(p, ld_12_3 + 8);
- p += 4;
- write_insn<big_endian>(p, mr_0_3);
- p += 4;
- write_insn<big_endian>(p, cmpdi_11_0);
- p += 4;
- write_insn<big_endian>(p, add_3_12_13);
- p += 4;
- write_insn<big_endian>(p, beqlr);
- p += 4;
- write_insn<big_endian>(p, mr_3_0);
- p += 4;
- if (cs->second.r2save_ && !cs->second.localentry0_)
- {
- write_insn<big_endian>(p, mflr_11);
- p += 4;
- write_insn<big_endian>(p, (std_11_1 + this->targ_->stk_linker()));
- p += 4;
- }
- }
- else
+ write_insn<big_endian>(p, ld_11_3 + 0);
+ p += 4;
+ write_insn<big_endian>(p, ld_12_3 + 8);
+ p += 4;
+ write_insn<big_endian>(p, mr_0_3);
+ p += 4;
+ write_insn<big_endian>(p, cmpdi_11_0);
+ p += 4;
+ write_insn<big_endian>(p, add_3_12_13);
+ p += 4;
+ write_insn<big_endian>(p, beqlr);
+ p += 4;
+ write_insn<big_endian>(p, mr_3_0);
+ p += 4;
+ if (save_lr)
{
- write_insn<big_endian>(p, lwz_11_3 + 0);
- p += 4;
- write_insn<big_endian>(p, lwz_12_3 + 4);
- p += 4;
- write_insn<big_endian>(p, mr_0_3);
- p += 4;
- write_insn<big_endian>(p, cmpwi_11_0);
- p += 4;
- write_insn<big_endian>(p, add_3_12_2);
- p += 4;
- write_insn<big_endian>(p, beqlr);
+ write_insn<big_endian>(p, mflr_11);
p += 4;
- write_insn<big_endian>(p, mr_3_0);
- p += 4;
- write_insn<big_endian>(p, nop);
+ write_insn<big_endian>(p, (std_11_1 + this->targ_->stk_linker()));
p += 4;
}
- *pp = p;
- return true;
}
- return false;
-}
-
-// Emit the tail of a __tls_get_addr_opt plt call stub.
-
-template<int size, bool big_endian>
-bool
-Stub_table<size, big_endian>::build_tls_opt_tail(
- unsigned char* p,
- typename Plt_stub_entries::const_iterator cs)
-{
- if (size == 64
- && cs->second.r2save_
- && !cs->second.localentry0_
- && this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ else
{
- write_insn<big_endian>(p, bctrl);
+ write_insn<big_endian>(p, lwz_11_3 + 0);
p += 4;
- write_insn<big_endian>(p, ld_2_1 + this->targ_->stk_toc());
+ write_insn<big_endian>(p, lwz_12_3 + 4);
p += 4;
- write_insn<big_endian>(p, ld_11_1 + this->targ_->stk_linker());
+ write_insn<big_endian>(p, mr_0_3);
p += 4;
- write_insn<big_endian>(p, mtlr_11);
+ write_insn<big_endian>(p, cmpwi_11_0);
+ p += 4;
+ write_insn<big_endian>(p, add_3_12_2);
+ p += 4;
+ write_insn<big_endian>(p, beqlr);
+ p += 4;
+ write_insn<big_endian>(p, mr_3_0);
+ p += 4;
+ write_insn<big_endian>(p, nop);
p += 4;
- write_insn<big_endian>(p, blr);
- return true;
}
- return false;
+ *pp = p;
+}
+
+// Emit the tail of a __tls_get_addr_opt plt call stub.
+
+template<int size, bool big_endian>
+void
+Stub_table<size, big_endian>::build_tls_opt_tail(unsigned char* p)
+{
+ write_insn<big_endian>(p, bctrl);
+ p += 4;
+ write_insn<big_endian>(p, ld_2_1 + this->targ_->stk_toc());
+ p += 4;
+ write_insn<big_endian>(p, ld_11_1 + this->targ_->stk_linker());
+ p += 4;
+ write_insn<big_endian>(p, mtlr_11);
+ p += 4;
+ write_insn<big_endian>(p, blr);
}
// Emit pc-relative plt call stub code.
@@ -5949,7 +6009,7 @@ build_notoc_offset(unsigned char* p, uin
template<int size, bool big_endian>
unsigned int
Stub_table<size, big_endian>::plt_call_size(
- typename Plt_stub_entries::const_iterator p) const
+ typename Plt_stub_entries::iterator p) const
{
if (size == 32)
{
@@ -5961,77 +6021,122 @@ Stub_table<size, big_endian>::plt_call_s
const Output_data_plt_powerpc<size, big_endian>* plt;
uint64_t plt_addr = this->plt_off(p, &plt);
plt_addr += plt->address();
- unsigned int bytes = 0;
- const Symbol* gsym = p->first.sym_;
- if (this->targ_->is_tls_get_addr_opt(gsym))
+ if (this->targ_->power10_stubs()
+ && this->targ_->power10_stubs_auto())
{
- if (p->second.r2save_ && !p->second.localentry0_)
- bytes = 13 * 4;
- else
- bytes = 7 * 4;
+ unsigned int bytes = 0;
+ if (p->second.notoc_)
+ {
+ if (this->targ_->is_tls_get_addr_opt(p->first.sym_))
+ bytes = 7 * 4;
+ uint64_t from = this->stub_address() + p->second.off_ + bytes;
+ uint64_t odd = from & 4;
+ uint64_t off = plt_addr - from;
+ if (off - odd + (1ULL << 33) < 1ULL << 34)
+ bytes += odd + 4 * 4;
+ else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32)
+ bytes += 7 * 4;
+ else
+ bytes += 8 * 4;
+ bytes = this->plt_call_align(bytes);
+ }
+ unsigned int tail = 0;
+ if (p->second.toc_)
+ {
+ p->second.tocoff_ = bytes;
+ if (this->targ_->is_tls_get_addr_opt(p->first.sym_))
+ {
+ bytes += 7 * 4;
+ if (p->second.r2save_ && !p->second.localentry0_)
+ {
+ bytes += 2 * 4;
+ tail = 4 * 4;
+ }
+ }
+ if (p->second.r2save_)
+ bytes += 4;
+ uint64_t got_addr
+ = this->targ_->got_section()->output_section()->address();
+ const Powerpc_relobj<size, big_endian>* ppcobj = static_cast
+ <const Powerpc_relobj<size, big_endian>*>(p->first.object_);
+ got_addr += ppcobj->toc_base_offset();
+ uint64_t off = plt_addr - got_addr;
+ bytes += 3 * 4 + 4 * (ha(off) != 0);
+ }
+ return bytes + tail;
}
-
- if (p->second.r2save_)
- bytes += 4;
-
- if (this->targ_->power10_stubs())
+ else
{
- uint64_t from = this->stub_address() + p->second.off_ + bytes;
- if (bytes > 8 * 4)
- from -= 4 * 4;
- uint64_t odd = from & 4;
- uint64_t off = plt_addr - from;
- if (off - odd + (1ULL << 33) < 1ULL << 34)
- bytes += odd + 4 * 4;
- else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32)
- bytes += 7 * 4;
- else
- bytes += 8 * 4;
- return bytes;
- }
+ unsigned int bytes = 0;
+ unsigned int tail = 0;
+ if (this->targ_->is_tls_get_addr_opt(p->first.sym_))
+ {
+ bytes = 7 * 4;
+ if (p->second.r2save_ && !p->second.localentry0_)
+ {
+ bytes = 9 * 4;
+ tail = 4 * 4;
+ }
+ }
- if (p->second.notoc_)
- {
- uint64_t from = this->stub_address() + p->second.off_ + bytes + 2 * 4;
- if (bytes > 32)
- from -= 4 * 4;
- uint64_t off = plt_addr - from;
- if (off + 0x8000 < 0x10000)
- bytes += 7 * 4;
- else if (off + 0x80008000ULL < 0x100000000ULL)
- bytes += 8 * 4;
- else
+ if (p->second.r2save_)
+ bytes += 4;
+
+ if (this->targ_->power10_stubs())
{
- bytes += 8 * 4;
- if (off + 0x800000000000ULL >= 0x1000000000000ULL
- && ((off >> 32) & 0xffff) != 0)
- bytes += 4;
- if (((off >> 32) & 0xffffffffULL) != 0)
- bytes += 4;
- if (hi(off) != 0)
- bytes += 4;
- if (l(off) != 0)
- bytes += 4;
+ uint64_t from = this->stub_address() + p->second.off_ + bytes;
+ uint64_t odd = from & 4;
+ uint64_t off = plt_addr - from;
+ if (off - odd + (1ULL << 33) < 1ULL << 34)
+ bytes += odd + 4 * 4;
+ else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32)
+ bytes += 7 * 4;
+ else
+ bytes += 8 * 4;
+ return bytes + tail;
}
- return bytes;
- }
- uint64_t got_addr = this->targ_->got_section()->output_section()->address();
- const Powerpc_relobj<size, big_endian>* ppcobj = static_cast
- <const Powerpc_relobj<size, big_endian>*>(p->first.object_);
- got_addr += ppcobj->toc_base_offset();
- uint64_t off = plt_addr - got_addr;
- bytes += 3 * 4 + 4 * (ha(off) != 0);
- if (this->targ_->abiversion() < 2)
- {
- bool static_chain = parameters->options().plt_static_chain();
- bool thread_safe = this->targ_->plt_thread_safe();
- bytes += (4
- + 4 * static_chain
- + 8 * thread_safe
- + 4 * (ha(off + 8 + 8 * static_chain) != ha(off)));
+ if (p->second.notoc_)
+ {
+ uint64_t from = this->stub_address() + p->second.off_ + bytes + 2 * 4;
+ uint64_t off = plt_addr - from;
+ if (off + 0x8000 < 0x10000)
+ bytes += 7 * 4;
+ else if (off + 0x80008000ULL < 0x100000000ULL)
+ bytes += 8 * 4;
+ else
+ {
+ bytes += 8 * 4;
+ if (off + 0x800000000000ULL >= 0x1000000000000ULL
+ && ((off >> 32) & 0xffff) != 0)
+ bytes += 4;
+ if (((off >> 32) & 0xffffffffULL) != 0)
+ bytes += 4;
+ if (hi(off) != 0)
+ bytes += 4;
+ if (l(off) != 0)
+ bytes += 4;
+ }
+ return bytes + tail;
+ }
+
+ uint64_t got_addr = this->targ_->got_section()->output_section()->address();
+ const Powerpc_relobj<size, big_endian>* ppcobj = static_cast
+ <const Powerpc_relobj<size, big_endian>*>(p->first.object_);
+ got_addr += ppcobj->toc_base_offset();
+ uint64_t off = plt_addr - got_addr;
+ bytes += 3 * 4 + 4 * (ha(off) != 0);
+ if (this->targ_->abiversion() < 2)
+ {
+ bool static_chain = parameters->options().plt_static_chain();
+ bool thread_safe = this->targ_->plt_thread_safe();
+ bytes += (4
+ + 4 * static_chain
+ + 8 * thread_safe
+ + 4 * (ha(off + 8 + 8 * static_chain) != ha(off)));
+ }
+ return bytes + tail;
}
- return bytes;
}
// Return long branch stub size.
@@ -6039,7 +6144,7 @@ Stub_table<size, big_endian>::plt_call_s
template<int size, bool big_endian>
unsigned int
Stub_table<size, big_endian>::branch_stub_size(
- typename Branch_stub_entries::const_iterator p,
+ typename Branch_stub_entries::iterator p,
bool* need_lt)
{
Address loc = this->stub_address() + this->last_plt_size_ + p->second.off_;
@@ -6053,46 +6158,57 @@ Stub_table<size, big_endian>::branch_stu
}
uint64_t off = p->first.dest_ - loc;
+ unsigned int bytes = 0;
if (p->second.notoc_)
{
if (this->targ_->power10_stubs())
{
Address odd = loc & 4;
if (off + (1 << 25) < 2 << 25)
- return odd + 12;
- if (off - odd + (1ULL << 33) < 1ULL << 34)
- return odd + 16;
- if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32)
- return 28;
- return 32;
- }
- off -= 8;
- if (off + 0x8000 < 0x10000)
- return 24;
- if (off + 0x80008000ULL < 0x100000000ULL)
- {
- if (off + 24 + (1 << 25) < 2 << 25)
- return 28;
- return 32;
- }
- unsigned int bytes = 32;
- if (off + 0x800000000000ULL >= 0x1000000000000ULL
- && ((off >> 32) & 0xffff) != 0)
- bytes += 4;
- if (((off >> 32) & 0xffffffffULL) != 0)
- bytes += 4;
- if (hi(off) != 0)
- bytes += 4;
- if (l(off) != 0)
- bytes += 4;
- return bytes;
+ bytes = odd + 12;
+ else if (off - odd + (1ULL << 33) < 1ULL << 34)
+ bytes = odd + 16;
+ else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32)
+ bytes = 28;
+ else
+ bytes = 32;
+ if (!(p->second.toc_ && this->targ_->power10_stubs_auto()))
+ return bytes;
+ p->second.tocoff_ = bytes;
+ }
+ else
+ {
+ off -= 8;
+ if (off + 0x8000 < 0x10000)
+ return 24;
+ if (off + 0x80008000ULL < 0x100000000ULL)
+ {
+ if (off + 24 + (1 << 25) < 2 << 25)
+ return 28;
+ return 32;
+ }
+
+ bytes = 32;
+ if (off + 0x800000000000ULL >= 0x1000000000000ULL
+ && ((off >> 32) & 0xffff) != 0)
+ bytes += 4;
+ if (((off >> 32) & 0xffffffffULL) != 0)
+ bytes += 4;
+ if (hi(off) != 0)
+ bytes += 4;
+ if (l(off) != 0)
+ bytes += 4;
+ return bytes;
+ }
}
+ off += elfcpp::ppc64_decode_local_entry(p->second.other_);
if (off + (1 << 25) < 2 << 25)
- return 4;
- if (!this->targ_->power10_stubs())
+ return bytes + 4;
+ if (!this->targ_->power10_stubs()
+ || (p->second.toc_ && this->targ_->power10_stubs_auto()))
*need_lt = true;
- return 16;
+ return bytes + 16;
}
template<int size, bool big_endian>
@@ -6128,6 +6244,10 @@ Stub_table<size, big_endian>::do_write(O
if (size == 64
&& this->targ_->power10_stubs())
{
+ const Output_data_got_powerpc<size, big_endian>* got
+ = this->targ_->got_section();
+ Address got_os_addr = got->output_section()->address();
+
if (!this->plt_call_stubs_.empty())
{
// Write out plt call stubs.
@@ -6137,22 +6257,94 @@ Stub_table<size, big_endian>::do_write(O
++cs)
{
p = oview + cs->second.off_;
- this->build_tls_opt_head(&p, cs);
- if (cs->second.r2save_)
- {
- write_insn<big_endian>(p, std_2_1 + this->targ_->stk_toc());
- p += 4;
- }
const Output_data_plt_powerpc<size, big_endian>* plt;
Address pltoff = this->plt_off(cs, &plt);
Address plt_addr = pltoff + plt->address();
- Address from = this->stub_address() + (p - oview);
- Address delta = plt_addr - from;
- p = build_power10_offset<big_endian>(p, delta, from & 4, true);
- write_insn<big_endian>(p, mtctr_12);
- p += 4;
- if (!this->build_tls_opt_tail(p, cs))
- write_insn<big_endian>(p, bctr);
+ if (this->targ_->power10_stubs_auto())
+ {
+ if (cs->second.notoc_)
+ {
+ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ this->build_tls_opt_head(&p, false);
+ Address from = this->stub_address() + (p - oview);
+ Address delta = plt_addr - from;
+ p = build_power10_offset<big_endian>(p, delta, from & 4,
+ true);
+ write_insn<big_endian>(p, mtctr_12);
+ p += 4;
+ write_insn<big_endian>(p, bctr);
+ p += 4;
+ p = oview + this->plt_call_align(p - oview);
+ }
+ if (cs->second.toc_)
+ {
+ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ {
+ bool save_lr
+ = cs->second.r2save_ && !cs->second.localentry0_;
+ this->build_tls_opt_head(&p, save_lr);
+ }
+ const Powerpc_relobj<size, big_endian>* ppcobj
+ = static_cast<const Powerpc_relobj<size, big_endian>*>(
+ cs->first.object_);
+ Address got_addr = got_os_addr + ppcobj->toc_base_offset();
+ Address off = plt_addr - got_addr;
+
+ if (off + 0x80008000 > 0xffffffff || (off & 7) != 0)
+ this->plt_error(cs->first);
+
+ if (cs->second.r2save_)
+ {
+ write_insn<big_endian>(p, std_2_1 + this->targ_->stk_toc());
+ p += 4;
+ }
+ if (ha(off) != 0)
+ {
+ write_insn<big_endian>(p, addis_12_2 + ha(off));
+ p += 4;
+ write_insn<big_endian>(p, ld_12_12 + l(off));
+ p += 4;
+ }
+ else
+ {
+ write_insn<big_endian>(p, ld_12_2 + l(off));
+ p += 4;
+ }
+ write_insn<big_endian>(p, mtctr_12);
+ p += 4;
+ if (cs->second.r2save_
+ && !cs->second.localentry0_
+ && this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ this->build_tls_opt_tail(p);
+ else
+ write_insn<big_endian>(p, bctr);
+ }
+ }
+ else
+ {
+ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ {
+ bool save_lr
+ = cs->second.r2save_ && !cs->second.localentry0_;
+ this->build_tls_opt_head(&p, save_lr);
+ }
+ if (cs->second.r2save_)
+ {
+ write_insn<big_endian>(p, std_2_1 + this->targ_->stk_toc());
+ p += 4;
+ }
+ Address from = this->stub_address() + (p - oview);
+ Address delta = plt_addr - from;
+ p = build_power10_offset<big_endian>(p, delta, from & 4, true);
+ write_insn<big_endian>(p, mtctr_12);
+ p += 4;
+ if (cs->second.r2save_
+ && !cs->second.localentry0_
+ && this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ this->build_tls_opt_tail(p);
+ else
+ write_insn<big_endian>(p, bctr);
+ }
}
}
@@ -6168,19 +6360,79 @@ Stub_table<size, big_endian>::do_write(O
p = oview + off;
Address loc = this->stub_address() + off;
Address delta = bs->first.dest_ - loc;
- if (bs->second.notoc_ || delta + (1 << 25) >= 2 << 25)
+ if (this->targ_->power10_stubs_auto())
{
- unsigned char* startp = p;
- p = build_power10_offset<big_endian>(p, delta, loc & 4, false);
- delta -= p - startp;
+ if (bs->second.notoc_)
+ {
+ unsigned char* startp = p;
+ p = build_power10_offset<big_endian>(p, delta,
+ loc & 4, false);
+ delta -= p - startp;
+ startp = p;
+ if (delta + (1 << 25) < 2 << 25)
+ write_insn<big_endian>(p, b | (delta & 0x3fffffc));
+ else
+ {
+ write_insn<big_endian>(p, mtctr_12);
+ p += 4;
+ write_insn<big_endian>(p, bctr);
+ }
+ p += 4;
+ delta -= p - startp;
+ }
+ if (bs->second.toc_)
+ {
+ delta += elfcpp::ppc64_decode_local_entry(bs->second.other_);
+ if (delta + (1 << 25) >= 2 << 25)
+ {
+ Address brlt_addr
+ = this->targ_->find_branch_lookup_table(bs->first.dest_);
+ gold_assert(brlt_addr != invalid_address);
+ brlt_addr += this->targ_->brlt_section()->address();
+ Address got_addr = got_os_addr + bs->first.toc_base_off_;
+ Address brltoff = brlt_addr - got_addr;
+ if (ha(brltoff) == 0)
+ {
+ write_insn<big_endian>(p, ld_12_2 + l(brltoff));
+ p += 4;
+ }
+ else
+ {
+ write_insn<big_endian>(p, addis_12_2 + ha(brltoff));
+ p += 4;
+ write_insn<big_endian>(p, ld_12_12 + l(brltoff));
+ p += 4;
+ }
+ }
+ if (delta + (1 << 25) < 2 << 25)
+ write_insn<big_endian>(p, b | (delta & 0x3fffffc));
+ else
+ {
+ write_insn<big_endian>(p, mtctr_12);
+ p += 4;
+ write_insn<big_endian>(p, bctr);
+ }
+ }
}
- if (delta + (1 << 25) < 2 << 25)
- write_insn<big_endian>(p, b | (delta & 0x3fffffc));
else
{
- write_insn<big_endian>(p, mtctr_12);
- p += 4;
- write_insn<big_endian>(p, bctr);
+ if (!bs->second.notoc_)
+ delta += elfcpp::ppc64_decode_local_entry(bs->second.other_);
+ if (bs->second.notoc_ || delta + (1 << 25) >= 2 << 25)
+ {
+ unsigned char* startp = p;
+ p = build_power10_offset<big_endian>(p, delta,
+ loc & 4, false);
+ delta -= p - startp;
+ }
+ if (delta + (1 << 25) < 2 << 25)
+ write_insn<big_endian>(p, b | (delta & 0x3fffffc));
+ else
+ {
+ write_insn<big_endian>(p, mtctr_12);
+ p += 4;
+ write_insn<big_endian>(p, bctr);
+ }
}
}
}
@@ -6204,7 +6456,11 @@ Stub_table<size, big_endian>::do_write(O
Address plt_addr = pltoff + plt->address();
p = oview + cs->second.off_;
- this->build_tls_opt_head(&p, cs);
+ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ {
+ bool save_lr = cs->second.r2save_ && !cs->second.localentry0_;
+ this->build_tls_opt_head(&p, save_lr);
+ }
if (cs->second.r2save_)
{
write_insn<big_endian>(p, std_2_1 + this->targ_->stk_toc());
@@ -6241,7 +6497,11 @@ Stub_table<size, big_endian>::do_write(O
}
write_insn<big_endian>(p, mtctr_12);
p += 4;
- if (!this->build_tls_opt_tail(p, cs))
+ if (cs->second.r2save_
+ && !cs->second.localentry0_
+ && this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ this->build_tls_opt_tail(p);
+ else
write_insn<big_endian>(p, bctr);
}
}
@@ -6292,8 +6552,12 @@ Stub_table<size, big_endian>::do_write(O
}
p = oview + cs->second.off_;
- if (this->build_tls_opt_head(&p, cs))
- use_fake_dep = thread_safe;
+ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ {
+ bool save_lr = cs->second.r2save_ && !cs->second.localentry0_;
+ this->build_tls_opt_head(&p, save_lr);
+ use_fake_dep = thread_safe;
+ }
if (cs->second.r2save_)
{
write_insn<big_endian>(p, std_2_1 + this->targ_->stk_toc());
@@ -6355,8 +6619,10 @@ Stub_table<size, big_endian>::do_write(O
write_insn<big_endian>(p, ld_2_2 + l(off + 8));
p += 4;
}
- if (this->build_tls_opt_tail(p, cs))
- ;
+ if (cs->second.r2save_
+ && !cs->second.localentry0_
+ && this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ this->build_tls_opt_tail(p);
else if (thread_safe && !use_fake_dep)
{
write_insn<big_endian>(p, cmpldi_2_0);
@@ -6382,6 +6648,8 @@ Stub_table<size, big_endian>::do_write(O
p = oview + off;
Address loc = this->stub_address() + off;
Address delta = bs->first.dest_ - loc;
+ if (!bs->second.notoc_)
+ delta += elfcpp::ppc64_decode_local_entry(bs->second.other_);
if (bs->second.notoc_)
{
unsigned char* startp = p;
@@ -6437,7 +6705,8 @@ Stub_table<size, big_endian>::do_write(O
plt_addr += plt->address();
p = oview + cs->second.off_;
- this->build_tls_opt_head(&p, cs);
+ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_))
+ this->build_tls_opt_head(&p, false);
if (parameters->options().output_is_position_independent())
{
Address got_addr;
@@ -6577,15 +6846,25 @@ Output_data_glink<size, big_endian>::do_
}
else
{
+ if (this->targ_->has_localentry0())
+ {
+ write_insn<big_endian>(p, std_2_1 + 24), p += 4;
+ }
write_insn<big_endian>(p, mflr_0), p += 4;
write_insn<big_endian>(p, bcl_20_31), p += 4;
write_insn<big_endian>(p, mflr_11), p += 4;
- write_insn<big_endian>(p, std_2_1 + 24), p += 4;
- write_insn<big_endian>(p, ld_2_11 + l(-16)), p += 4;
write_insn<big_endian>(p, mtlr_0), p += 4;
+ if (this->targ_->has_localentry0())
+ {
+ write_insn<big_endian>(p, ld_0_11 + l(-20)), p += 4;
+ }
+ else
+ {
+ write_insn<big_endian>(p, ld_0_11 + l(-16)), p += 4;
+ }
write_insn<big_endian>(p, sub_12_12_11), p += 4;
- write_insn<big_endian>(p, add_11_2_11), p += 4;
- write_insn<big_endian>(p, addi_0_12 + l(-48)), p += 4;
+ write_insn<big_endian>(p, add_11_0_11), p += 4;
+ write_insn<big_endian>(p, addi_0_12 + l(-44)), p += 4;
write_insn<big_endian>(p, ld_12_11 + 0), p += 4;
write_insn<big_endian>(p, srdi_0_0_2), p += 4;
write_insn<big_endian>(p, mtctr_12), p += 4;
@@ -8191,7 +8470,7 @@ Target_powerpc<size, big_endian>::Scan::
uint32_t insn = elfcpp::Swap<32, big_endian>::readval(view + off);
if ((insn & ((0x3fu << 26) | 0x1f << 16))
!= ((15u << 26) | ((size == 32 ? 2 : 13) << 16)))
- target->set_tprel_opt(false);
+ target->set_no_tprel_opt();
}
}
break;
@@ -8206,7 +8485,7 @@ Target_powerpc<size, big_endian>::Scan::
break;
// Fall through.
case elfcpp::R_POWERPC_TPREL16_HI:
- target->set_tprel_opt(false);
+ target->set_no_tprel_opt();
break;
default:
break;
@@ -8230,7 +8509,7 @@ Target_powerpc<size, big_endian>::Scan::
case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
- target->set_power10_stubs();
+ target->set_power10_relocs();
break;
default:
break;
@@ -8988,7 +9267,7 @@ Target_powerpc<size, big_endian>::Scan::
uint32_t insn = elfcpp::Swap<32, big_endian>::readval(view + off);
if ((insn & ((0x3fu << 26) | 0x1f << 16))
!= ((15u << 26) | ((size == 32 ? 2 : 13) << 16)))
- target->set_tprel_opt(false);
+ target->set_no_tprel_opt();
}
}
break;
@@ -9003,7 +9282,7 @@ Target_powerpc<size, big_endian>::Scan::
break;
// Fall through.
case elfcpp::R_POWERPC_TPREL16_HI:
- target->set_tprel_opt(false);
+ target->set_no_tprel_opt();
break;
default:
break;
@@ -9027,7 +9306,7 @@ Target_powerpc<size, big_endian>::Scan::
case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
- target->set_power10_stubs();
+ target->set_power10_relocs();
break;
default:
break;
@@ -9369,6 +9648,13 @@ Target_powerpc<size, big_endian>::scan_r
needs_special_offset_handling,
local_symbol_count,
plocal_symbols);
+
+ if (this->plt_localentry0_ && this->power10_relocs_)
+ {
+ gold_warning(_("--plt-localentry is incompatible with "
+ "power10 pc-relative code"));
+ this->plt_localentry0_ = false;
+ }
}
// Functor class for processing the global symbol table.
@@ -10118,6 +10404,7 @@ Target_powerpc<size, big_endian>::Reloca
? gsym->use_plt_offset(Scan::get_reference_flags(r_type, target))
: object->local_has_plt_offset(r_sym));
if (has_plt_offset
+ && !is_got_reloc(r_type)
&& !is_plt16_reloc<size>(r_type)
&& r_type != elfcpp::R_PPC64_PLT_PCREL34
&& r_type != elfcpp::R_PPC64_PLT_PCREL34_NOTOC
@@ -10176,18 +10463,28 @@ Target_powerpc<size, big_endian>::Reloca
elfcpp::Shdr<size, big_endian> shdr(relinfo->reloc_shdr);
size_t reloc_count = shdr.get_sh_size() / reloc_size;
if (size == 64
+ && r_type != elfcpp::R_PPC64_REL24_NOTOC)
+ value += ent->tocoff_;
+ if (size == 64
&& ent->r2save_
- && r_type == elfcpp::R_PPC64_REL24_NOTOC)
- value += 4;
- else if (size == 64
- && ent->r2save_
- && relnum < reloc_count - 1)
+ && !(gsym != NULL
+ && target->is_tls_get_addr_opt(gsym)))
{
- Reltype next_rela(preloc + reloc_size);
- if (elfcpp::elf_r_type<size>(next_rela.get_r_info())
- == elfcpp::R_PPC64_TOCSAVE
- && next_rela.get_r_offset() == rela.get_r_offset() + 4)
- value += 4;
+ if (r_type == elfcpp::R_PPC64_REL24_NOTOC)
+ {
+ if (!(target->power10_stubs()
+ && target->power10_stubs_auto()))
+ value += 4;
+ }
+ else if (relnum < reloc_count - 1)
+ {
+ Reltype next_rela(preloc + reloc_size);
+ if (elfcpp::elf_r_type<size>(next_rela.get_r_info())
+ == elfcpp::R_PPC64_TOCSAVE
+ && (next_rela.get_r_offset()
+ == rela.get_r_offset() + 4))
+ value += 4;
+ }
}
localentry0 = ent->localentry0_;
has_stub_value = true;
@@ -10250,13 +10547,7 @@ Target_powerpc<size, big_endian>::Reloca
elfcpp::Swap<32, big_endian>::writeval(iview + 1, pnop & 0xffffffff);
r_type = elfcpp::R_POWERPC_NONE;
}
- else if (r_type == elfcpp::R_POWERPC_GOT16
- || r_type == elfcpp::R_POWERPC_GOT16_LO
- || r_type == elfcpp::R_POWERPC_GOT16_HI
- || r_type == elfcpp::R_POWERPC_GOT16_HA
- || r_type == elfcpp::R_PPC64_GOT16_DS
- || r_type == elfcpp::R_PPC64_GOT16_LO_DS
- || r_type == elfcpp::R_PPC64_GOT_PCREL34)
+ else if (is_got_reloc(r_type))
{
if (gsym != NULL)
{
@@ -10758,14 +11049,15 @@ Target_powerpc<size, big_endian>::Reloca
|| r_type == elfcpp::R_POWERPC_PLT16_HA)))
addend = rela.get_r_addend();
value = psymval->value(object, addend);
+ unsigned int local_ent = 0;
if (size == 64 && is_branch_reloc<size>(r_type))
{
if (target->abiversion() >= 2)
{
if (gsym != NULL)
- value += object->ppc64_local_entry_offset(gsym);
+ local_ent = object->ppc64_local_entry_offset(gsym);
else
- value += object->ppc64_local_entry_offset(r_sym);
+ local_ent = object->ppc64_local_entry_offset(r_sym);
}
else
{
@@ -10774,9 +11066,9 @@ Target_powerpc<size, big_endian>::Reloca
&value, &dest_shndx);
}
}
- Address max_branch_offset = max_branch_delta<size>(r_type);
- if (max_branch_offset != 0
- && (value - address + max_branch_offset >= 2 * max_branch_offset
+ Address max_branch = max_branch_delta<size>(r_type);
+ if (max_branch != 0
+ && (value + local_ent - address + max_branch >= 2 * max_branch
|| (size == 64
&& r_type == elfcpp::R_PPC64_REL24_NOTOC
&& (gsym != NULL
@@ -10795,12 +11087,20 @@ Target_powerpc<size, big_endian>::Reloca
value = (value - target->savres_section()->address()
+ stub_table->branch_size());
else
- value = (stub_table->stub_address() + stub_table->plt_size()
- + ent->off_);
+ {
+ value = (stub_table->stub_address()
+ + stub_table->plt_size()
+ + ent->off_);
+ if (size == 64
+ && r_type != elfcpp::R_PPC64_REL24_NOTOC)
+ value += ent->tocoff_;
+ }
has_stub_value = true;
}
}
}
+ if (!has_stub_value)
+ value += local_ent;
}
switch (r_type)
diff -rup binutils-2.35.1/gold/testsuite/split_i386.sh fred/binutils-2.35.1/gold/testsuite/split_i386.sh
--- binutils-2.35.1/gold/testsuite/split_i386.sh 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/gold/testsuite/split_i386.sh 2020-11-25 14:37:54.000000000 +0000
@@ -45,7 +45,7 @@ match 'lea.*-0x200\(%esp\),' split_i386_
match 'stc' split_i386_2.stdout
match 'call.*__morestack_non_split>?$' split_i386_2.stdout
nomatch 'call.*__morestack>?$' split_i386_2.stdout
-match 'lea.*-0x4200\(%esp\),' split_i386_2.stdout
+match 'lea.*-0x100200\(%esp\),' split_i386_2.stdout
match 'failed to match' split_i386_3.stdout
diff -rup binutils-2.35.1/gold/testsuite/split_x32.sh fred/binutils-2.35.1/gold/testsuite/split_x32.sh
--- binutils-2.35.1/gold/testsuite/split_x32.sh 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/gold/testsuite/split_x32.sh 2020-11-25 14:37:54.000000000 +0000
@@ -44,9 +44,9 @@ match 'callq.*__morestack>?$' split_x32_
match 'lea.*-0x200\(%rsp\),' split_x32_1.stdout
match 'stc' split_x32_2.stdout
-match 'callq.*__morestack_non_split>?$' split_x32_2.stdout
-nomatch 'callq.*__morestack>?$' split_x32_2.stdout
-match 'lea.*-0x4200\(%rsp\),' split_x32_2.stdout
+match 'call.*__morestack_non_split>?$' split_x32_2.stdout
+nomatch 'call.*__morestack>?$' split_x32_2.stdout
+match 'lea.*-0x100200\(%rsp\),' split_x32_2.stdout
match 'failed to match' split_x32_3.stdout
diff -rup binutils-2.35.1/gold/testsuite/split_x86_64.sh fred/binutils-2.35.1/gold/testsuite/split_x86_64.sh
--- binutils-2.35.1/gold/testsuite/split_x86_64.sh 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/gold/testsuite/split_x86_64.sh 2020-11-25 14:37:54.000000000 +0000
@@ -43,9 +43,9 @@ match 'callq.*__morestack>?$' split_x86_
match 'lea.*-0x200\(%rsp\),' split_x86_64_1.stdout
match 'stc' split_x86_64_2.stdout
-match 'callq.*__morestack_non_split>?$' split_x86_64_2.stdout
-nomatch 'callq.*__morestack>?$' split_x86_64_2.stdout
-match 'lea.*-0x4200\(%rsp\),' split_x86_64_2.stdout
+match 'call.*__morestack_non_split>?$' split_x86_64_2.stdout
+nomatch 'call.*__morestack>?$' split_x86_64_2.stdout
+match 'lea.*-0x100200\(%rsp\),' split_x86_64_2.stdout
match 'failed to match' split_x86_64_3.stdout
diff -rup binutils-2.35.1/include/dwarf2.def fred/binutils-2.35.1/include/dwarf2.def
--- binutils-2.35.1/include/dwarf2.def 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/include/dwarf2.def 2020-11-25 14:37:55.000000000 +0000
@@ -805,3 +805,14 @@ DW_IDX (DW_IDX_hi_user, 0x3fff)
DW_IDX (DW_IDX_GNU_internal, 0x2000)
DW_IDX (DW_IDX_GNU_external, 0x2001)
DW_END_IDX
+
+/* DWARF5 Unit type header encodings */
+DW_FIRST_UT (DW_UT_compile, 0x01)
+DW_UT (DW_UT_type, 0x02)
+DW_UT (DW_UT_partial, 0x03)
+DW_UT (DW_UT_skeleton, 0x04)
+DW_UT (DW_UT_split_compile, 0x05)
+DW_UT (DW_UT_split_type, 0x06)
+DW_UT (DW_UT_lo_user, 0x80)
+DW_UT (DW_UT_hi_user, 0xff)
+DW_END_UT
diff -rup binutils-2.35.1/include/dwarf2.h fred/binutils-2.35.1/include/dwarf2.h
--- binutils-2.35.1/include/dwarf2.h 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/include/dwarf2.h 2020-11-25 14:37:55.000000000 +0000
@@ -55,6 +55,7 @@
#define DW_CFA_DUP(name, value) , name = value
#define DW_IDX(name, value) , name = value
#define DW_IDX_DUP(name, value) , name = value
+#define DW_UT(name, value) , name = value
#define DW_FIRST_TAG(name, value) enum dwarf_tag { \
name = value
@@ -77,6 +78,9 @@
#define DW_FIRST_IDX(name, value) enum dwarf_name_index_attribute { \
name = value
#define DW_END_IDX };
+#define DW_FIRST_UT(name, value) enum dwarf_unit_type { \
+ name = value
+#define DW_END_UT };
#include "dwarf2.def"
@@ -94,6 +98,8 @@
#undef DW_END_CFA
#undef DW_FIRST_IDX
#undef DW_END_IDX
+#undef DW_FIRST_UT
+#undef DW_END_UT
#undef DW_TAG
#undef DW_TAG_DUP
@@ -108,6 +114,7 @@
#undef DW_CFA_DUP
#undef DW_IDX
#undef DW_IDX_DUP
+#undef DW_UT
/* Flag that tells whether entry has a child or not. */
#define DW_children_no 0
@@ -450,19 +457,6 @@ enum dwarf_range_list_entry
DW_RLE_start_end = 0x06,
DW_RLE_start_length = 0x07
};
-
-/* Unit types in unit_type unit header field. */
-enum dwarf_unit_type
- {
- DW_UT_compile = 0x01,
- DW_UT_type = 0x02,
- DW_UT_partial = 0x03,
- DW_UT_skeleton = 0x04,
- DW_UT_split_compile = 0x05,
- DW_UT_split_type = 0x06,
- DW_UT_lo_user = 0x80,
- DW_UT_hi_user = 0xff
- };
/* @@@ For use with GNU frame unwind information. */
@@ -534,6 +528,10 @@ extern const char *get_DW_CFA_name (unsi
recognized. */
extern const char *get_DW_IDX_name (unsigned int idx);
+/* Return the name of a DW_UT_ constant, or NULL if the value is not
+ recognized. */
+extern const char *get_DW_UT_name (unsigned int ut);
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff -rup binutils-2.35.1/ld/emultempl/ppc64elf.em fred/binutils-2.35.1/ld/emultempl/ppc64elf.em
--- binutils-2.35.1/ld/emultempl/ppc64elf.em 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/emultempl/ppc64elf.em 2020-11-25 14:38:05.000000000 +0000
@@ -32,13 +32,15 @@ fragment <<EOF
static asection *ppc_add_stub_section (const char *, asection *);
static void ppc_layout_sections_again (void);
+static void ppc_edit (void);
static struct ppc64_elf_params params = { NULL,
&ppc_add_stub_section,
&ppc_layout_sections_again,
+ &ppc_edit,
1, -1, -1, 0,
${DEFAULT_PLT_STATIC_CHAIN-0}, -1, 5,
- -1, -1, 0, -1, -1, 0};
+ -1, -1, 0, 0, -1, -1, 0};
/* Fake input file for stubs. */
static lang_input_statement_type *stub_file;
@@ -294,7 +296,19 @@ ppc_before_allocation (void)
einfo (_("%X%P: inline PLT: %E\n"));
}
- if (ppc64_elf_tls_setup (&link_info)
+ if (!ppc64_elf_tls_setup (&link_info))
+ einfo (_("%X%P: TLS problem %E\n"));
+ }
+
+ gld${EMULATION_NAME}_before_allocation ();
+}
+
+static void
+ppc_edit (void)
+{
+ if (stub_file != NULL)
+ {
+ if (elf_hash_table (&link_info)->tls_sec != NULL
&& !no_tls_opt)
{
/* Size the sections. This is premature, but we want to know the
@@ -323,8 +337,6 @@ ppc_before_allocation (void)
sort_toc_sections (&toc_os->children, NULL, NULL);
}
}
-
- gld${EMULATION_NAME}_before_allocation ();
}
struct hook_stub_info
@@ -686,6 +698,7 @@ enum ppc64_opt
OPTION_NO_PLT_LOCALENTRY,
OPTION_POWER10_STUBS,
OPTION_NO_POWER10_STUBS,
+ OPTION_NO_PCREL_OPT,
OPTION_STUBSYMS,
OPTION_NO_STUBSYMS,
OPTION_SAVRES,
@@ -717,6 +730,7 @@ PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST
{ "plt-localentry", optional_argument, NULL, OPTION_PLT_LOCALENTRY },
{ "no-plt-localentry", no_argument, NULL, OPTION_NO_PLT_LOCALENTRY },
{ "power10-stubs", optional_argument, NULL, OPTION_POWER10_STUBS },
+ { "no-pcrel-optimize", no_argument, NULL, OPTION_NO_PCREL_OPT },
{ "no-power10-stubs", no_argument, NULL, OPTION_NO_POWER10_STUBS },
{ "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS },
{ "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS },
@@ -776,6 +790,9 @@ PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_
--power10-stubs [=auto] Use Power10 PLT call stubs (default auto)\n"
));
fprintf (file, _("\
+ --no-pcrel-optimize Don'\''t perform R_PPC64_PCREL_OPT optimization\n"
+ ));
+ fprintf (file, _("\
--no-power10-stubs Don'\''t use Power10 PLT call stubs\n"
));
fprintf (file, _("\
@@ -909,6 +926,10 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LI
params.power10_stubs = 0;
break;
+ case OPTION_NO_PCREL_OPT:
+ params.no_pcrel_opt = 1;
+ break;
+
case OPTION_STUBSYMS:
params.emit_stub_syms = 1;
break;
@@ -985,6 +1006,7 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LI
params.no_multi_toc = 1;
no_toc_sort = 1;
params.plt_static_chain = 1;
+ params.no_pcrel_opt = 1;
return FALSE;
'
diff -rup binutils-2.35.1/ld/ldelf.c fred/binutils-2.35.1/ld/ldelf.c
--- binutils-2.35.1/ld/ldelf.c 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/ldelf.c 2020-11-25 14:38:05.000000000 +0000
@@ -1589,6 +1589,8 @@ ldelf_before_allocation (char *audit, ch
(char *) &ehdr_start->u + sizeof ehdr_start->u.def.next,
sizeof ehdr_start_save_u);
ehdr_start->type = bfd_link_hash_defined;
+ /* It will be converted to section-relative later. */
+ ehdr_start->rel_from_abs = 1;
ehdr_start->u.def.section = bfd_abs_section_ptr;
ehdr_start->u.def.value = 0;
}
diff -rup binutils-2.35.1/ld/testsuite/ld-i386/i386.exp fred/binutils-2.35.1/ld/testsuite/ld-i386/i386.exp
--- binutils-2.35.1/ld/testsuite/ld-i386/i386.exp 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-i386/i386.exp 2020-11-25 14:38:12.000000000 +0000
@@ -470,6 +470,10 @@ run_dump_test "pr24322b"
run_dump_test "align-branch-1"
run_dump_test "pr26018"
run_dump_test "pr26263"
+run_dump_test "pr26711-1"
+run_dump_test "pr26711-2"
+run_dump_test "pr26711-3"
+run_dump_test "pr26869"
if { !([istarget "i?86-*-linux*"]
|| [istarget "i?86-*-gnu*"]
diff -rup binutils-2.35.1/ld/testsuite/ld-i386/property-3.r fred/binutils-2.35.1/ld/testsuite/ld-i386/property-3.r
--- binutils-2.35.1/ld/testsuite/ld-i386/property-3.r 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-i386/property-3.r 2020-11-25 14:38:12.000000000 +0000
@@ -3,5 +3,6 @@ Displaying notes found in: .note.gnu.pro
[ ]+Owner[ ]+Data size[ ]+Description
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x800000
+#...
x86 ISA needed: CMOV, SSE
#pass
diff -rup binutils-2.35.1/ld/testsuite/ld-i386/property-4.r fred/binutils-2.35.1/ld/testsuite/ld-i386/property-4.r
--- binutils-2.35.1/ld/testsuite/ld-i386/property-4.r 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-i386/property-4.r 2020-11-25 14:38:12.000000000 +0000
@@ -3,5 +3,6 @@ Displaying notes found in: .note.gnu.pro
[ ]+Owner[ ]+Data size[ ]+Description
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x800000
+#...
x86 ISA needed: CMOV, SSE, SSE3
#pass
diff -rup binutils-2.35.1/ld/testsuite/ld-i386/property-5.r fred/binutils-2.35.1/ld/testsuite/ld-i386/property-5.r
--- binutils-2.35.1/ld/testsuite/ld-i386/property-5.r 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-i386/property-5.r 2020-11-25 14:38:12.000000000 +0000
@@ -3,5 +3,6 @@ Displaying notes found in: .note.gnu.pro
[ ]+Owner[ ]+Data size[ ]+Description
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x900000
+#...
x86 ISA needed: CMOV, SSE, SSE3
#pass
diff -rup binutils-2.35.1/ld/testsuite/ld-powerpc/elfv2so.d fred/binutils-2.35.1/ld/testsuite/ld-powerpc/elfv2so.d
--- binutils-2.35.1/ld/testsuite/ld-powerpc/elfv2so.d 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-powerpc/elfv2so.d 2020-11-25 14:38:13.000000000 +0000
@@ -74,12 +74,11 @@ Disassembly of section \.text:
.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
.*: (42 9f 00 05|05 00 9f 42) bcl .*
.*: (7d 68 02 a6|a6 02 68 7d) mflr r11
-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
+.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\)
.*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12
-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11
-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48
+.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
+.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44
.*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
.*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
@@ -87,16 +86,16 @@ Disassembly of section \.text:
.*: (4e 80 04 20|20 04 80 4e) bctr
.* <f5@plt>:
-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve>
.* <f3@plt>:
-.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
.* <f2@plt>:
-.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve>
.* <f4@plt>:
-.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve>
.* <f1@plt>:
-.*: (4b ff ff b8|b8 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve>
diff -rup binutils-2.35.1/ld/testsuite/ld-powerpc/notoc2.d fred/binutils-2.35.1/ld/testsuite/ld-powerpc/notoc2.d
--- binutils-2.35.1/ld/testsuite/ld-powerpc/notoc2.d 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-powerpc/notoc2.d 2020-11-25 14:38:13.000000000 +0000
@@ -22,8 +22,8 @@ Disassembly of section \.text:
.*: (39 80 ff ff|ff ff 80 39)
.*: (06 10 00 00|00 00 10 06) pla r12,0
.*: (39 80 00 00|00 00 80 39)
-.*: (06 10 00 00|00 00 10 06) pla r3,92
-.*: (38 60 00 5c|5c 00 60 38)
+.*: (06 10 00 00|00 00 10 06) pla r3,88
+.*: (38 60 00 58|58 00 60 38)
.*: (4b ff ff 99|99 ff ff 4b) bl .* <.*\.plt_call\.puts>
.*: (60 00 00 00|00 00 00 60) nop
#pass
diff -rup binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc.wf fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc.wf
--- binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc.wf 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc.wf 2020-11-25 14:38:13.000000000 +0000
@@ -38,9 +38,9 @@ Contents of the \.eh_frame section:
DW_CFA_nop
0+4c 0+14 0+50 FDE cie=0+ pc=0+2f8\.\.0+32c
- DW_CFA_advance_loc: 4 to 0+2fc
+ DW_CFA_advance_loc: 8 to 0+300
DW_CFA_register: r65 in r12
- DW_CFA_advance_loc: 20 to 0+310
+ DW_CFA_advance_loc: 16 to 0+310
DW_CFA_restore_extended: r65
0+64 0+10 0+68 FDE cie=0+ pc=0+2e0\.\.0+2ec
diff -rup binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.d fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.d
--- binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.d 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.d 2020-11-25 14:38:13.000000000 +0000
@@ -53,12 +53,11 @@ Disassembly of section \.text:
.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
.*: (42 9f 00 05|05 00 9f 42) bcl .*
.*: (7d 68 02 a6|a6 02 68 7d) mflr r11
-.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
+.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\)
.*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12
-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11
-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48
+.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
+.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44
.*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
.*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
@@ -66,4 +65,4 @@ Disassembly of section \.text:
.*: (4e 80 04 20|20 04 80 4e) bctr
.* <__tls_get_addr_opt@plt>:
-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve>
diff -rup binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.wf fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.wf
--- binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.wf 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.wf 2020-11-25 14:38:13.000000000 +0000
@@ -37,10 +37,10 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+354
- DW_CFA_advance_loc: 4 to 0+31c
+0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+350
+ DW_CFA_advance_loc: 8 to 0+320
DW_CFA_register: r65 in r0
- DW_CFA_advance_loc: 28 to 0+338
+ DW_CFA_advance_loc: 8 to 0+328
DW_CFA_restore_extended: r65
0+64 0+10 0+68 FDE cie=0+ pc=0+300\.\.0+30c
diff -rup binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.d fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.d
--- binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.d 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.d 2020-11-25 14:38:13.000000000 +0000
@@ -49,12 +49,11 @@ Disassembly of section \.text:
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
.*: (05 00 9f 42|42 9f 00 05) bcl .*
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\)
.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
+.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\)
.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12
-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11
-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48
+.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11
+.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44
.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\)
.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
@@ -62,7 +61,7 @@ Disassembly of section \.text:
.*: (20 04 80 4e|4e 80 04 20) bctr
.* <__tls_get_addr_opt@plt>:
-.* (c8 ff ff 4b|4b ff ff c8) b .*
+.* (cc ff ff 4b|4b ff ff cc) b .*
.* <aaaaa@plt>:
-.*: (c4 ff ff 4b|4b ff ff c4) b .*
+.*: (c8 ff ff 4b|4b ff ff c8) b .*
diff -rup binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.wf fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.wf
--- binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.wf 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.wf 2020-11-25 14:38:13.000000000 +0000
@@ -16,9 +16,9 @@ Contents of the \.eh_frame section:
DW_CFA_restore_extended: r65
0+2c 0+14 0+30 FDE cie=0+ pc=.*
- DW_CFA_advance_loc: 4 to .*
+ DW_CFA_advance_loc: 8 to .*
DW_CFA_register: r65 in r0
- DW_CFA_advance_loc: 28 to .*
+ DW_CFA_advance_loc: 8 to .*
DW_CFA_restore_extended: r65
0+44 0+10 0+48 FDE cie=0+ pc=.*
diff -rup binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.d fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.d
--- binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.d 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.d 2020-11-25 14:38:13.000000000 +0000
@@ -67,12 +67,11 @@ Disassembly of section \.text:
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
.*: (05 00 9f 42|42 9f 00 05) bcl .*
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\)
.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
+.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\)
.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12
-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11
-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48
+.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11
+.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44
.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\)
.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
@@ -80,7 +79,7 @@ Disassembly of section \.text:
.*: (20 04 80 4e|4e 80 04 20) bctr
.* <__tls_get_addr_opt@plt>:
-.* (c8 ff ff 4b|4b ff ff c8) b .*
+.* (cc ff ff 4b|4b ff ff cc) b .*
.* <aaaaa@plt>:
-.*: (c4 ff ff 4b|4b ff ff c4) b .*
+.*: (c8 ff ff 4b|4b ff ff c8) b .*
diff -rup binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.wf fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.wf
--- binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.wf 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.wf 2020-11-25 14:38:13.000000000 +0000
@@ -38,9 +38,9 @@ Contents of the \.eh_frame section:
DW_CFA_nop
0+4c 0+14 0+50 FDE cie=0+ pc=.*
- DW_CFA_advance_loc: 4 to .*
+ DW_CFA_advance_loc: 8 to .*
DW_CFA_register: r65 in r0
- DW_CFA_advance_loc: 28 to .*
+ DW_CFA_advance_loc: 8 to .*
DW_CFA_restore_extended: r65
0+64 0+10 0+68 FDE cie=0+ pc=.*
diff -rup binutils-2.35.1/ld/testsuite/ld-x86-64/property-3.r fred/binutils-2.35.1/ld/testsuite/ld-x86-64/property-3.r
--- binutils-2.35.1/ld/testsuite/ld-x86-64/property-3.r 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-x86-64/property-3.r 2020-11-25 14:38:13.000000000 +0000
@@ -3,5 +3,6 @@ Displaying notes found in: .note.gnu.pro
[ ]+Owner[ ]+Data size[ ]+Description
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x800000
+#...
x86 ISA needed: CMOV, SSE
#pass
diff -rup binutils-2.35.1/ld/testsuite/ld-x86-64/property-4.r fred/binutils-2.35.1/ld/testsuite/ld-x86-64/property-4.r
--- binutils-2.35.1/ld/testsuite/ld-x86-64/property-4.r 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-x86-64/property-4.r 2020-11-25 14:38:13.000000000 +0000
@@ -3,5 +3,6 @@ Displaying notes found in: .note.gnu.pro
[ ]+Owner[ ]+Data size[ ]+Description
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x800000
+#...
x86 ISA needed: CMOV, SSE, SSE3
#pass
diff -rup binutils-2.35.1/ld/testsuite/ld-x86-64/property-5.r fred/binutils-2.35.1/ld/testsuite/ld-x86-64/property-5.r
--- binutils-2.35.1/ld/testsuite/ld-x86-64/property-5.r 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-x86-64/property-5.r 2020-11-25 14:38:13.000000000 +0000
@@ -3,5 +3,6 @@ Displaying notes found in: .note.gnu.pro
[ ]+Owner[ ]+Data size[ ]+Description
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x900000
+#...
x86 ISA needed: CMOV, SSE, SSE3
#pass
diff -rup binutils-2.35.1/ld/testsuite/ld-x86-64/x86-64.exp fred/binutils-2.35.1/ld/testsuite/ld-x86-64/x86-64.exp
--- binutils-2.35.1/ld/testsuite/ld-x86-64/x86-64.exp 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/ld/testsuite/ld-x86-64/x86-64.exp 2020-11-25 14:38:14.000000000 +0000
@@ -432,6 +432,12 @@ run_dump_test "pr25416-3"
run_dump_test "pr25416-4"
run_dump_test "pr26018"
run_dump_test "pr26263"
+run_dump_test "pr26711-1"
+run_dump_test "pr26711-1-x32"
+run_dump_test "pr26711-2"
+run_dump_test "pr26711-2-x32"
+run_dump_test "pr26711-3"
+run_dump_test "pr26711-3-x32"
if ![istarget "x86_64-*-linux*"] {
return
diff -rup binutils-2.35.1/libiberty/ChangeLog fred/binutils-2.35.1/libiberty/ChangeLog
--- binutils-2.35.1/libiberty/ChangeLog 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/libiberty/ChangeLog 2020-11-25 14:38:14.000000000 +0000
@@ -1,3 +1,12 @@
+2020-11-15 Mark Wielaard <mark@klomp.org>
+
+ Backport from the mainline:
+ 2020-09-23 Mark Wielaard <mark@klomp.org>
+
+ Sync with GCC
+ * dwarfnames.c (get_DW_UT_name): Define using DW_UT_FIRST, DW_UT
+ and DW_UT_END.
+
2020-06-23 Nick Alcock <nick.alcock@oracle.com>
* bsearch_r.c: New file.
diff -rup binutils-2.35.1/libiberty/dwarfnames.c fred/binutils-2.35.1/libiberty/dwarfnames.c
--- binutils-2.35.1/libiberty/dwarfnames.c 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/libiberty/dwarfnames.c 2020-11-25 14:38:14.000000000 +0000
@@ -64,6 +64,11 @@ Boston, MA 02110-1301, USA. */
switch (idx) { \
DW_IDX (name, value)
#define DW_END_IDX } return 0; }
+#define DW_FIRST_UT(name, value) \
+ const char *get_DW_UT_name (unsigned int ut) { \
+ switch (ut) { \
+ DW_UT (name, value)
+#define DW_END_UT } return 0; }
#define DW_TAG(name, value) case name: return # name ;
#define DW_TAG_DUP(name, value)
@@ -78,6 +83,7 @@ Boston, MA 02110-1301, USA. */
#define DW_CFA_DUP(name, value)
#define DW_IDX(name, value) case name: return # name ;
#define DW_IDX_DUP(name, value)
+#define DW_UT(name, value) case name: return # name ;
#include "dwarf2.def"
@@ -95,6 +101,7 @@ Boston, MA 02110-1301, USA. */
#undef DW_END_CFA
#undef DW_FIRST_IDX
#undef DW_END_IDX
+#undef DW_END_UT
#undef DW_TAG
#undef DW_TAG_DUP
diff -rup binutils-2.35.1/md5.sum fred/binutils-2.35.1/md5.sum
--- binutils-2.35.1/md5.sum 2020-09-19 11:40:50.000000000 +0100
+++ fred/binutils-2.35.1/md5.sum 2020-11-25 14:40:36.000000000 +0000
@@ -49,7 +49,7 @@ d12089e756f4c1ed6e246474dbe05f6d bfd/do
8ecd223de1a7cea63375ef737faf1b9e bfd/doc/Makefile.in
065a5c588b90b2d96cc010c90d4f3ffb bfd/doc/opncls.texi
d41d8cd98f00b204e9800998ecf8427e bfd/doc/elfcode.texi
-1732861e8eeda2900e068be234408439 bfd/doc/bfd.info
+32e069284d5475ed9f18a86432e70a14 bfd/doc/bfd.info
4635778e69bcb490e44389e420542276 bfd/doc/syms.texi
a11231531c5c3cd6e7babf06426a657e bfd/doc/ChangeLog-9103
9a6e644c9e94d7b18073f5cc6ef4395a bfd/doc/header.sed
@@ -68,7 +68,7 @@ e67d8b07516154c4ddbee2e3bab3d75e bfd/do
32e807d8eab3afa2507095fe17ec73b3 bfd/doc/section.texi
84a99eb217f66a88f8897fbca35b0d10 bfd/doc/mmo.texi
930173859dab35d4c1c03efd5ddb18e3 bfd/doc/format.texi
-c9de9232d9175b113870d0ac5ebe31aa bfd/doc/bfdver.texi
+3cc46b417bd1d9eb18b04fab1273a142 bfd/doc/bfdver.texi
0b9681af947fd0895c1aad2ccdead74c bfd/doc/linker.texi
d01f9e76a9c61f8ab1515177eda30283 bfd/doc/chew.c
fceb179f1a1bc85df44ec0ae3b917c1c bfd/doc/archive.texi
@@ -281,7 +281,7 @@ b21c979f62d62f954f612b63ee99dae5 bfd/bf
8f7b5397a7bb5d502a9997e19d244cea bfd/ChangeLog-2014
5c0d4dd3f80060bd1e76014828bfc16c bfd/rs6000-core.c
1e35ed78a9fdbfb07a6d94d2b441e202 bfd/pei-arm-wince.c
-631b35075890f152d1671bb88d463a47 bfd/ChangeLog
+971f01cd469cf08d10c6bad4e5974961 bfd/ChangeLog
0ae280b39a62a17fb743514ae78c95a8 bfd/coff-ppc.c
620a95a90035b8e4334f6f8691cdab88 bfd/elf32-frv.c
ac26580e531a7b18a8653d0cba189b49 bfd/xtensa-modules.c
@@ -308,7 +308,7 @@ a919bc62dc52ab557832759934e090c4 bfd/co
d3d4930147919f0140883106171bf2e0 bfd/cpu-pj.c
408ef1462276b75d3708877103c85eb8 bfd/.gitignore
4dddcd4a5a764871f8856f04ac280447 bfd/cpu-mcore.c
-f7c24616d8c2be965900a22003db3fb8 bfd/elf64-ppc.c
+2b58c74bb224f5c5281fa7ac70fe3fe3 bfd/elf64-ppc.c
6921b6426a2273950ad87d34b1e3da64 bfd/elf32-h8300.c
b79d8726ad40d63367c0869bf0a173ab bfd/elf32-lm32.c
c00a335bf5927add5a9a82eaf1aa6ed5 bfd/elf64-mmix.c
@@ -325,45 +325,45 @@ d45630a9128a8b95d448a21ab42bfefb bfd/co
00cc8a8822a249e656345b2941fabc31 bfd/xcofflink.h
a7fe983ac68020d4103c7fa7d625de4f bfd/merge.c
4f683b032796acd7247220b18f5242e9 bfd/MAINTAINERS
-c03f87e1a341e4bae4bf2deff5577e0d bfd/elf64-ppc.h
-c4019a694f03cae81694f9c1c595e750 bfd/po/ja.gmo
+d162f4c687e1bf3e45c4e49d532dbb7f bfd/elf64-ppc.h
+5be26b66a180601b8d01ca75a7462819 bfd/po/ja.gmo
4314f7dc707bdd16e1a3aa6318d52f8a bfd/po/rw.po
fa54ff2e8e918caa819a972852d5d58d bfd/po/uk.po
01bab36c3c598ef18490b72808da5bf6 bfd/po/pt.po
-6098b3430f49cbbe6b289f2879ff4295 bfd/po/sr.gmo
+1f541d88c9a5a9ab162fd68d3187537a bfd/po/sr.gmo
e19bb962d689621ffdc549c064bda359 bfd/po/hr.po
2e501eae8e2775bc3326ff506e6ff5b7 bfd/po/ru.po
8ec07791735823e26b823098b97db3ba bfd/po/Make-in
-b93e7a254347a0c9d0aec92f503f82fe bfd/po/hr.gmo
+84dbf6e05a5a8d4b7b1b82b45673213e bfd/po/hr.gmo
c7515f4b454a1fa630412fa279a3164a bfd/po/id.po
-c4291d2c48fdf616cf5a219bc8dfc79b bfd/po/sv.gmo
+92b363dde95573bd774c4d075a370d6b bfd/po/sv.gmo
59c606011b4035b5cf62d5182cb78201 bfd/po/fr.po
e92e0c0fdb85a3e07602d6d891f3c9f4 bfd/po/fi.po
-b35e9bdbf39377a1385504db7784d3f3 bfd/po/da.gmo
+e0ea6f92a4d3cff0ba82611c66ba1eb9 bfd/po/da.gmo
14a6e4ab40cca6e5e4e8844ed1f38f75 bfd/po/bfd.pot
-d94efcf27579278ba3dc959774e52b70 bfd/po/ro.gmo
-1631cbf3c6f4d4a6171d8853ab4731bf bfd/po/fr.gmo
-64efa75ee23e3602dfd95d68b441ae72 bfd/po/es.gmo
+58395b2a0e2f3bb78dc6d29a4a138113 bfd/po/ro.gmo
+09fb9f7d1bc0af455e675be7c3205d23 bfd/po/fr.gmo
+829c286919c3e58f6d3310fb79252b0b bfd/po/es.gmo
880a5b6d5856b7090209e3c2059ab6a4 bfd/po/SRC-POTFILES.in
4d37138c8d35849276f5939f27ee211f bfd/po/BLD-POTFILES.in
81570d19a349cd683436f77a9c8d13cc bfd/po/tr.po
-929c427c3c2c7206201bfe2b978d1f4e bfd/po/pt.gmo
+4b07a1755c5b1ffa7ffb3920329b9676 bfd/po/pt.gmo
4301533a9f9af510a6519c49094063fe bfd/po/es.po
-17d1078d2cab7c86c24428861d07debc bfd/po/ru.gmo
+efeb1686a8060a17b757200b10433713 bfd/po/ru.gmo
707a2271e7ae77dc322e9f2977002b3e bfd/po/zh_CN.po
063bd370058e0656621e835f75f8d0af bfd/po/sv.po
440d5018fb62b30ff5a819137633e364 bfd/po/ro.po
db9dd4a0b20b67e4ef912c9fd4cda91b bfd/po/vi.po
-6640519b8e1477c4c621e3524c8e320e bfd/po/zh_CN.gmo
-c47c7a53f52ded3368c3bd458b8b7d20 bfd/po/tr.gmo
+e60690926d6036874d5976fb892c5c66 bfd/po/zh_CN.gmo
+0dded802a6d91787da60e29fbb989423 bfd/po/tr.gmo
0df7e50992986ea8a85eb6baa50bd279 bfd/po/da.po
-3df30e1e39753152d11d44cb2c965da7 bfd/po/vi.gmo
+ab504851491bbb4522d5616ffa37b6ac bfd/po/vi.gmo
74cb3712e1e8c26eda36a992fefc023f bfd/po/ja.po
f3eef30966ed07605f9fb1d870994247 bfd/po/sr.po
-ed0372f4ddff71fb0e948338cc9d8559 bfd/po/id.gmo
-0ac8b8067067b849aeb810162fa751fa bfd/po/fi.gmo
-e15c998ffa3537ef5f5c5ed225c18279 bfd/po/rw.gmo
-39b1f8159becb3f344c6f465bb1a90ef bfd/po/uk.gmo
+7787d97a62c88c4e64020db70de14831 bfd/po/id.gmo
+27da1f0a8b3615124fe7f2fbdf8e7576 bfd/po/fi.gmo
+3238e488b33e9d3a61c9e1de199d3f21 bfd/po/rw.gmo
+1c86ec269e042f6e633fee9101616d7b bfd/po/uk.gmo
74d318e6c9031a036336396ca55c2f94 bfd/sysdep.h
e30d31e2f7d2dd02acd540d16092f10e bfd/elf-vxworks.c
53357a9b87dd158b90cf790c316fd438 bfd/targmatch.sed
@@ -387,7 +387,7 @@ bf2d5c4fdc87152491491ca57d9cd9f6 bfd/cp
63cee58ce36c8c6ee13db9a793283dab bfd/pe-x86_64.c
5cdaf80ddb15463873ce74db1d8de3c3 bfd/cpu-iq2000.c
a731b51928032dbaedfd0a07e7911de1 bfd/ecofflink.c
-32f673b9912f23f8f169870860a880ac bfd/elfxx-x86.c
+904f992aa15872764c32812a7c52b82e bfd/elfxx-x86.c
f3448e3780145b5a929cd51003702096 bfd/format.c
1f1d4395e65db3e5a8172510108c07fc bfd/cpu-dlx.c
50d9bd8d00e1988a3098aff9a05611a9 bfd/ppcboot.c
@@ -398,13 +398,13 @@ e79a330a15698ebb169fabb216e79c69 bfd/el
01cb19ee1e561d16867576f1a2df7371 bfd/ChangeLog-2019
8a86b1f6c2c976f095834686abe62d6a bfd/elf32-sh.c
b15df15dae52aa50e18d288aa71439f3 bfd/cpu-arc.c
-4e44da7e0159ad4d76903a0ee5654738 bfd/version.h
+d498aad43e56c27ef133a485d40d0c94 bfd/version.h
139261f84ac4b4777184511e1f46b129 bfd/cpu-nds32.c
8dc5aeb0b08140c406ff2d793517c060 bfd/elf32-arm.c
8e4f7bf28f096370e504ffd54cfa2c88 bfd/cpu-or1k.c
4f8249f21b279414d5bd4f3523fe879d bfd/elf-attrs.c
bbbe3efaa4a09a228bca1920f579fbaf bfd/Makefile.am
-86bbe6f9cdfe71ff65d35665439f50b0 bfd/development.sh
+cf939453b9f0946162f9fea9d9b21ed6 bfd/development.sh
ec44634fc4d286c2f1f62e4f5f389b28 bfd/elfxx-mips.c
24a910ef275dfe5a3e448941769b57e9 bfd/hppabsd-core.c
f07b547b8a7126d40be9b20682dd2d9a bfd/elf32-arm.h
@@ -515,7 +515,7 @@ f49d7385c4a0a957c0b0efca8a740b8d bfd/el
60405f6c9c517aec9ef1bee7c063eee3 bfd/elf32-sparc.c
2e32803c97feaa5d1841e3d628f017ad bfd/cpu-pdp11.c
fbe1741fa4f99e8df34cd3d44d6b6c07 bfd/pc532-mach.c
-36c02509856b2a1d33ac50af49229d97 bfd/dwarf2.c
+de34b3d1ffe56453c28f6c7a219d019e bfd/dwarf2.c
2beb32b071e84e8f66bfbed4e7e2f076 bfd/i386msdos.c
92cad294f8003d7641aae98c2a79477b bfd/elf-linker-x86.h
6a65ceb48b34a21900db602d1fd1ad30 bfd/elf-nacl.h
@@ -548,29 +548,29 @@ bb8e0633e9e073a6899ace1b7f29853e binuti
70d39762308205274ccd7964fe0d7887 binutils/windres.c
7520b7c9d5552f2329cb83c9d03936ff binutils/rcparse.y
28e12eab90e0b79afcc6533cf575ab38 binutils/objcopy.c
-577b1cb2ec5a1081ffc86f110c5a3a72 binutils/doc/elfedit.1
-6423ae8bd74903a9068ae3f76f8a53a6 binutils/doc/objdump.1
-80a3a944f539aea707d904c032c5203d binutils/doc/c++filt.1
-9e0df0192b9e964196a57887dcb4604a binutils/doc/dlltool.1
+59982f16d440aacec173411282d75702 binutils/doc/elfedit.1
+6085edee5a66344785bda3620b16dd7b binutils/doc/objdump.1
+109c4f812174198dbd30e1e9909840a5 binutils/doc/c++filt.1
+a5503f8cd0d94325c9d06e63ea37fd7f binutils/doc/dlltool.1
072910d553f79906db69fa7c0e956bba binutils/doc/fdl.texi
6e46201b338464eedfe8a48352cd6154 binutils/doc/Makefile.in
-4c9860b1a4b5c5cb08b7b088a19d900e binutils/doc/windmc.1
+34f6417d467981f4591e2f6a09ee74ae binutils/doc/windmc.1
ece25e000ad2d0c14d1f42546884a7c2 binutils/doc/ctf.options.texi
-bf01c6363cee338e45b065f5deb5d214 binutils/doc/windres.1
-e7fced7b9ec0a0f113f5c833319cbb14 binutils/doc/binutils.info
-5d11d2b8fd35ce89674b917968c3c971 binutils/doc/ar.1
-381ae708c14f2d65ddf7a1aacf8fc453 binutils/doc/strings.1
-b2b33828aa03c985dd0ab0a7c86c8115 binutils/doc/ranlib.1
-f73fa7a0e7334fd3ff386b3ecefc5da4 binutils/doc/cxxfilt.man
-7279281cfb85ebdb9628cf82e43a4b02 binutils/doc/size.1
+06457b4533de4b032dcea1a844f76652 binutils/doc/windres.1
+de6bc03c99784329b6a70745c757fd51 binutils/doc/binutils.info
+a4e4e6b4b30b0e16b947e162735b5a18 binutils/doc/ar.1
+e124e79724d4ec0a0e8c38e51d3f09c0 binutils/doc/strings.1
+10fba11bd5ce78764a7c9a0118756b6d binutils/doc/ranlib.1
+202beb71ac7ab9d6dbdcc92f45106447 binutils/doc/cxxfilt.man
+b4007c5361331549d5f39c180e981f98 binutils/doc/size.1
df8d1239fd79b3a1ae7dec03bed867e6 binutils/doc/binutils.texi
ab620229ecbac004c9ae21fa72bb9174 binutils/doc/Makefile.am
-b5a6e37518f73d9d1e702d81a9a9630b binutils/doc/nm.1
-51f6a0af55072edc7bd1fc9a0d27f02a binutils/doc/addr2line.1
+fa6c63577c55ee005ade13ecbcb5f4ce binutils/doc/nm.1
+7d8c1ca43aa8d20abdcd66f71375204b binutils/doc/addr2line.1
ed3fba7d5d6004d73589dce36ef0ac5d binutils/doc/debug.options.texi
-788073630065b2ad94990dca1b2c99d1 binutils/doc/objcopy.1
-f62e31ad263342fb0c791897ee190ccf binutils/doc/readelf.1
-76708ee156f9bdb69192bd5ae221e853 binutils/doc/strip.1
+836fc7b23c6353ce9f40aa50689509c3 binutils/doc/objcopy.1
+89aeb1a99f8eec811196d5707351711c binutils/doc/readelf.1
+607ea2b942b583a03bb0050de50f19ce binutils/doc/strip.1
fd98930deadd4b8bb2bf20924379fd06 binutils/maybe-strip.c
7eb542599a0e75f28f7ac0c7832ec377 binutils/maybe-ranlib.c
cec602aa7e8925e06a658a3060d42c1b binutils/dep-in.sed
@@ -587,14 +587,14 @@ af265e948dab6b60dfa3d8965b5cc4fb binuti
1d4a2cc8591172ff0885e7ec748618e9 binutils/deflex.c
f4806cb0d9ab955f5424565396a06227 binutils/unwind-ia64.c
7bb26fe65eb83fe83cd3e051a6cbf192 binutils/budbg.h
-b4c7516471c5b7db9a5c2d29e84d8fea binutils/readelf.c
+006664443d1983a196e229d3045dd495 binutils/readelf.c
4dd4f6db448208624501492aaaa8ab38 binutils/ChangeLog-0203
722bca08c2dbe3335e73c37baf88dd17 binutils/configure.com
b69ac95c338b86a08f25ee898c7cc7a4 binutils/ar.c
9795f6d5f345111725ca75c060048683 binutils/elfedit.c
b78241984e0ecd85c2b64830df4c1ac7 binutils/winduni.c
6e7aa58a273fd387649ff520828db294 binutils/windres.h
-0e8e18ae319c9d58a9c0d43ca0b60ca7 binutils/mcparse.c
+fc005e530d120da26e310592e4234999 binutils/mcparse.c
27c5edb4c8f28c1e5ce680ecac6b78ce binutils/syslex_wrap.c
9c44885be8d8185729ba6b7e881a195a binutils/objdump.h
98af242e7090e2d4dca91e66d7d17e5a binutils/configure
@@ -624,9 +624,9 @@ b2e8d70c0c37962459c50f29ce6b9b85 binuti
74db9cc9994ada7aedd808bb1b557562 binutils/emul_aix.c
9607c99b2cc38f0c5b37c037449ab001 binutils/binemul.h
a5bd2fda981f1c341aa4723ea0bb7430 binutils/ChangeLog-2014
-4fc0c429ebf6ca4a0db667147d4f95f4 binutils/ChangeLog
+ef7fd87f7f9a16b47ec4e4891ea2577f binutils/ChangeLog
81f74beea5680160602e72f1bbbbf124 binutils/ChangeLog-2007
-b3317782e008d83297d95e1c3e1aef6d binutils/sysinfo.h
+2a0ee027afbe9cf58cfa30e6f90b3ea3 binutils/sysinfo.h
263e0ab4e30561aafb3f2e25a9d1d809 binutils/resbin.c
b583add834431cc44b5c67fac2c4d00e binutils/.gitignore
056322425e9c65f084b74eb3ed872cd7 binutils/ChangeLog-2016
@@ -636,56 +636,56 @@ bd3e8623ab04acb8402bb78d9a315289 binuti
1d0817c53fe63734eef5c4d4cde4cdb9 binutils/dlltool.c
d94adb49274237435ace5b181eb90577 binutils/objdump.c
0d6f8b380bda80a0df1a587a79990ecd binutils/MAINTAINERS
-186cd06d2adda90d35d5be562ccd7da6 binutils/po/ja.gmo
+4d04128be92f233b3c32afc365b08106 binutils/po/ja.gmo
983ad2a28db3de55195aeb8680aff682 binutils/po/rw.po
a52519e317c45724a51e081179d3e521 binutils/po/uk.po
4dd9bff50d2888f1ef536bf5c8c5621c binutils/po/it.po
a4be6f5c911091b0bc7aaa7af27fc677 binutils/po/pt.po
-93757dc903601f7738b696d242ecfc1a binutils/po/sr.gmo
+f7814c76bb9baa9e355519b2f63bbe63 binutils/po/sr.gmo
634c33feed2dc9f83ce459ff0b0f5048 binutils/po/hr.po
417ec3c5333cdff82f48ebe9503a14bc binutils/po/ru.po
4438b95a4344144658f227bc2fd6865f binutils/po/Make-in
-58222a5e48cce1e874b36f7bf0f6acbe binutils/po/hr.gmo
+ae1d0c3aa2dd1f6a274e7b8a126edec6 binutils/po/hr.gmo
686ac3bb430bd42e5d93ea5e55ba4b84 binutils/po/id.po
-8c6d82747294550465c0ca4c2a1c24f3 binutils/po/sv.gmo
+c8bf5d5b12aa58faaff69d2c3a56d1c1 binutils/po/sv.gmo
b348b88d2c650a0876183058593f1a10 binutils/po/binutils.pot
0b033dfa32116abfe4f0d197eda3a9db binutils/po/fr.po
30cd4e294c6a4eca76adb7471423f920 binutils/po/zh_TW.po
c46e1a34c8c6f01ef12991a49a5dfc88 binutils/po/fi.po
-90ff17c11d14805aecc1af8b58e2ba7e binutils/po/da.gmo
-5fb5eb218117d98344ea7681e7cfdfcd binutils/po/ro.gmo
-b3ef11d1e15f60b6726438f933661fae binutils/po/zh_TW.gmo
-a9c6e8347b3454a86eecc33f8141efd6 binutils/po/fr.gmo
-ec23acf43ce5bb40dd4376c83f4cd639 binutils/po/sk.gmo
+faa4320755b89f1464370e6a4e35d33f binutils/po/da.gmo
+68e27b0b0489642440947a0ccee94407 binutils/po/ro.gmo
+9782f7a3f719dff076818197b3c08f8b binutils/po/zh_TW.gmo
+7fed04b8820f0666dc9fdb3ff24b3b04 binutils/po/fr.gmo
+6b331db396c007b1080b6ec20d8266ea binutils/po/sk.gmo
6c4c3dffb0d8ea881ca8052980c11688 binutils/po/POTFILES.in
-c04b6d081e6a3d72b8c55eaba7a23139 binutils/po/es.gmo
+2e8135fe781051400821ccde74c9b586 binutils/po/es.gmo
0b00611becfeda2eb73fa936e9ee844b binutils/po/tr.po
-b4484bdcea1b762a8d65eb7a78b8404e binutils/po/pt.gmo
+ac1a09190d23b11c7a2b4f2057250b28 binutils/po/pt.gmo
bf982649dad79583e36042d4464afbec binutils/po/es.po
1ca7ae6a67ebe6758df04084901c3879 binutils/po/sk.po
-37f3e5ffaa4080403227113998fec7f5 binutils/po/ru.gmo
+e57691630acda93afb93984de2c62a1b binutils/po/ru.gmo
548d6b187264825e3164e2e805fdc495 binutils/po/zh_CN.po
94c75ce158a50821caf43921e4210893 binutils/po/sv.po
-88604a3a8c25970615074f95f7bcebcc binutils/po/bg.gmo
+b48f64f5e0e652d29a85a76639ca7628 binutils/po/bg.gmo
d7eafbe0ac75d514bb2f1f06d49a46b9 binutils/po/ca.po
cb9d497be79788b6a9d86519b27f0740 binutils/po/ro.po
71751b7c19354033927dd5cc0a846ce1 binutils/po/vi.po
-763150e6529398f9712177659a7f79b0 binutils/po/zh_CN.gmo
-6792c4c39624630611f7fd5ea7e380d9 binutils/po/tr.gmo
+ad061d3e974caf6bea6f7a50022b6ced binutils/po/zh_CN.gmo
+2973983f6a78f905cc917f10bceaa1ec binutils/po/tr.gmo
402bf740ac7b127ea9d9ee38cdde6048 binutils/po/da.po
-cc1cc8491ddb4dbedb8ba7b7e2b30425 binutils/po/ca.gmo
-0cb7f5b9788b737fe1cef25d1bd7bffb binutils/po/it.gmo
-72e6cedf6d0c43d854a232d7eb01ea22 binutils/po/vi.gmo
+6f244f74f1f99ccc62ff8662a4e560e9 binutils/po/ca.gmo
+d44f9c879189c7867a4303fbf8599e4d binutils/po/it.gmo
+f08a24966ab6cfe475c818cffa65d061 binutils/po/vi.gmo
c2897ad2d8fbaa18f6326267c8f9f012 binutils/po/bg.po
110599acfb3d5e2ab27e2ca4d67293b2 binutils/po/ja.po
9d9fb1a014da7dd817f789f0dada2fc1 binutils/po/sr.po
-b679497b5e036ff25ab79ead2c6f7bb7 binutils/po/id.gmo
-b9ce7a2ff6ea38633ef48599473a42b8 binutils/po/fi.gmo
-574d299b75e61be9de2b50beda9a138a binutils/po/rw.gmo
-f6e23daea5b99afa9c4714dc97bf35e3 binutils/po/uk.gmo
+8f6551bacd00e603caceb2d019fd053c binutils/po/id.gmo
+86672ed6d386afa4dbf18172c47e55e8 binutils/po/fi.gmo
+46f8d6531f6b59d702f6e3f121387cb8 binutils/po/rw.gmo
+abae6561360671da11232fed68b9004a binutils/po/uk.gmo
8ea125ea159a54a27f72f5cc1b2d7eaf binutils/sysdep.h
74dc92b55cb859b48b3a0b820a7d1088 binutils/od-macho.c
-0ebee93791976fdc26e3937c6e2eb750 binutils/rcparse.c
+810a8d9e06e031077a13afaf2b7aba12 binutils/rcparse.c
4c32e4e3e1eb21d4707d7143a9d6253f binutils/arlex.c
d49e51790624ee47da3da222902865d2 binutils/prdbg.c
098bf16d44bcf26d0f3575b14c666edc binutils/syslex.c
@@ -907,7 +907,7 @@ aeaf1497f45c5bc3a770a4b66da07aa0 binuti
7190c5c0a85c55584f19290d0ebeca9f binutils/testsuite/binutils-all/remove-relocs-08.d
fb277b3ae83d69880e62b21b89dd9ea6 binutils/testsuite/binutils-all/pr26160.dwp.bz2
1d96cb4b074018ab36084fd8fd15ba60 binutils/testsuite/binutils-all/group-6.d
-ed4ed18cf76838b8850ab0a965180bc8 binutils/testsuite/binutils-all/dw5.W
+7e499619c27c828e97110132e180c939 binutils/testsuite/binutils-all/dw5.W
d91ecc8b2ba6965842cf206d8144c3e1 binutils/testsuite/binutils-all/hppa/freg.s
72764cc830e4e01ee9406281eab93969 binutils/testsuite/binutils-all/hppa/objdump.exp
8e5c9079f46f332db8bbe679b64c878b binutils/testsuite/binutils-all/hppa/addendbug.s
@@ -966,7 +966,7 @@ b965b7172b99a74d32803b165e72bde5 binuti
bb964b923ff47fb47d58f74927120d8d binutils/testsuite/binutils-all/x86-64/ibt.d
b12f29209d85ee87b16c1ea911d358f9 binutils/testsuite/binutils-all/x86-64/pr21231a.s
efbff9bd8ca2ed489e011ab1a4ead1ff binutils/testsuite/binutils-all/x86-64/ibt-x32.d
-a8b4f9fc705fd01861b55a3fde53b479 binutils/testsuite/binutils-all/x86-64/x86-64.exp
+6cc659eeb08ad313b7981bf258d35fe5 binutils/testsuite/binutils-all/x86-64/x86-64.exp
17490625f3c9194d05e01a2a49eb1c24 binutils/testsuite/binutils-all/x86-64/shstk.s
26e8c726574ca7c27295b95bb100f8ba binutils/testsuite/binutils-all/x86-64/pr23494b.s
3bb58eec4ae7e0bbea1d4c2cbfcd811f binutils/testsuite/binutils-all/x86-64/pr23494e-x32.d
@@ -975,6 +975,7 @@ a73b38bd54eda6b5dd6d18cc9735e3d1 binuti
bf80891dbbb50b6f75720def7c9ea2c0 binutils/testsuite/binutils-all/x86-64/pr23494a-x32.d
6e1daacf44906764445efa5a40cfd89a binutils/testsuite/binutils-all/x86-64/pr23494a.s
b74857751e61745e2a6e2d2ad9623b41 binutils/testsuite/binutils-all/x86-64/empty.d
+fb277b3ae83d69880e62b21b89dd9ea6 binutils/testsuite/binutils-all/x86-64/pr26808.dwp.bz2
21e7a71f6ea97ec88fcf11c557d92393 binutils/testsuite/binutils-all/x86-64/pr23494c-x32.d
94a8aaf7aa28ba0fabaf3edd5a04b7fc binutils/testsuite/binutils-all/x86-64/pr21231b.d
d21d3ee45ae633b4d6d4f9fe2646da28 binutils/testsuite/binutils-all/x86-64/pr23494b-x32.d
@@ -988,6 +989,7 @@ c48fe6e6ba1f75b0d1135088943b7c0e binuti
d188ecc684708929e15751940abce4ff binutils/testsuite/binutils-all/x86-64/pr23494d-x32.d
a0d3caba44bd9aa7bd07025e2c799b07 binutils/testsuite/binutils-all/x86-64/compressed-1a.d
c47003a15742b4879472f5bed8ffb530 binutils/testsuite/binutils-all/x86-64/pr23494a.d
+3d58b6c0241a16993a7e7f2e1e6966d4 binutils/testsuite/binutils-all/x86-64/pr26808.dump
bbf1d9c7617f35e4e831f247514cc946 binutils/testsuite/binutils-all/x86-64/pr21231b.s
c4c316578d940e90c34d18fd6084b52e binutils/testsuite/binutils-all/x86-64/pr23494c.d
5b9686bb57a2b76585708e70d28b5706 binutils/testsuite/binutils-all/x86-64/empty-x32.d
@@ -1137,7 +1139,7 @@ d41d8cd98f00b204e9800998ecf8427e binuti
92c42c1dd7d9cf476496ecf76442f216 binutils/testsuite/binutils-all/pr26112.o.bz2
7043daad3006d23ac1b2718b624df374 binutils/testsuite/binutils-all/strip-10.d
0483f0e2f7f5bb565ab5a47506d9ef98 binutils/testsuite/binutils-all/cxxfilt.exp
-6b281dd900e053bf226dd50530fcd198 binutils/testsuite/binutils-all/dwarf-attributes.W
+9f926377eb4e94be971701fcc79cd92e binutils/testsuite/binutils-all/dwarf-attributes.W
bb2476b8d18058db2a178ea61c50d4b4 binutils/testsuite/binutils-all/pr19547.c
e36dde2922c493422341c9d5ee07b6ef binutils/testsuite/binutils-all/group-6.s
8a6214b0181ec4a73a402e359daf9034 binutils/testsuite/binutils-all/copytest.s
@@ -1161,9 +1163,9 @@ bc92bbb251f116df5c1190b423f87b70 binuti
45169d51be32d65706d7524a35b56a04 binutils/testsuite/ChangeLog-1215
bf0ea0640752ce55976e88633c107ad4 binutils/testsuite/ChangeLog-9303
7779fe8954505ef8ef89098b15fa7e78 binutils/emul_vanilla.c
-8afeef4b7ab482266658e292297ac0fe binutils/dwarf.c
-4bb796e237a246c0ebb031f5d05e46d2 binutils/defparse.h
-73cd0da87569a91dac596ec6c645c70c binutils/mcparse.h
+2531993591269b9ff27aea59e487af02 binutils/dwarf.c
+58b27a7af7f846e8f380200aaefcd77f binutils/defparse.h
+739a18767805f98027e022dabf72294d binutils/mcparse.h
ab51c221a30bcc7852b4507f5fcbc6bc binutils/syslex.l
168de50c2518c247172888657685b237 binutils/ChangeLog-2019
e3346b0a6170844db3923ffbc0f60d6e binutils/is-strip.c
@@ -1178,7 +1180,7 @@ f2787034243454189e968d9020d6ed21 binuti
09d7d1d96313e23a18687924c5c9c0b5 binutils/strings.c
9f4fd5c98c4c74790fcdc199fec1d2ac binutils/debug.h
4d3c37042f71ad368800311f624c6e85 binutils/stabs.c
-af43ad7cca85ec700641942e0999a505 binutils/rcparse.h
+6b37ef1a64b8a82f83d92b47a4474f88 binutils/rcparse.h
1ded054093de910d9786c62bc4fe8cc6 binutils/stamp-h.in
8d8dec85c95f53aa37b0d072cd7b2d18 binutils/arparse.y
78ad8f876ee9f38094242d22975024dd binutils/README
@@ -1195,8 +1197,8 @@ b31314081b88b15ab4cc9466bca4897a binuti
afe137178d38202953a705e2ada53497 binutils/mclex.c
c93e0fc3705db6cb3f228cbceed5ccf0 binutils/windmc.c
d0c07c36019028be14a79202b0cc1e10 binutils/not-ranlib.c
-67fd7d6ede3e0355aaed530bbd477d79 binutils/arparse.h
-fdb0c016e7c942818a39611047727d24 binutils/arparse.c
+5797ef0ce0ff2ec4fb9cef393d715b5a binutils/arparse.h
+332a754c52bf7df013605c7ce26741be binutils/arparse.c
1552ccacb4372931a480c687c220da41 binutils/od-elf32_avr.c
297866da96316fa83c128406745fa6e9 binutils/rename.c
33f36b9627a3805d522ec97b58a2bbcd binutils/NEWS
@@ -1209,8 +1211,8 @@ b3779dd97d057fe75136b9df0fb75218 binuti
c23acdb46ec8a2c600160835b1c7d858 binutils/defparse.y
5f7af231d9ff88f0bc687eda9cd24e98 binutils/ChangeLog-2006
357f991c42deead68fd26d62c7b50f7e binutils/coffgrok.c
-8595fbbb67de468a1eca742b8aa43331 binutils/sysinfo.c
-838fd4762b0e7f34dc1eb1b49d35b036 binutils/defparse.c
+68d12e097806907103b1441da35c0ab9 binutils/sysinfo.c
+432b1ab521fadd280064148fc3ebc7e3 binutils/defparse.c
500b9244caa7a7ab23ece1db37efa76d compile
e32906a3177f3b368bcd56f9e86a620c config/inttypes-pri.m4
612f740b46be9896cc7c4c14c03b5c4e config/mt-sde
@@ -1375,14 +1377,14 @@ eed39a6c83a0f350dfcf61c0c709249d cpu/fr
b069580bb18b8056bda3e816b144946b elfcpp/s390.h
da5ffa974c4076e2630933acbfa47540 elfcpp/tilegx.h
f4150289298e3ee2a8e88a8aaf914c6b elfcpp/ChangeLog-2017
-6ec0f6c5d0611299af38e15b29e9c22d elfcpp/ChangeLog
+fee36e7cb1ee5feb353bbd106835326f elfcpp/ChangeLog
32c2421a9cf0c70c6bf92e11d3f2772c elfcpp/i386.h
8e7942097a4f092f856f23b00b530426 elfcpp/ChangeLog-2016
67f37d8b639a626019e8fda2a7b24280 elfcpp/ChangeLog-2019
59c9001e9fc4519443e0f6ef7fdab6aa elfcpp/elfcpp_internal.h
8cb05e66a622b505e89dbca49abc52ae elfcpp/x86_64.h
efd3312aae953b098f9c608e01aba412 elfcpp/README
-0c58656072e547f25a4d5b9e92605be7 elfcpp/dwarf.h
+0f5459cf2ad81618f528b41985bd56a3 elfcpp/dwarf.h
55ef4482037ec0bf95e978ed856163cc elfcpp/ChangeLog-2018
5bc9fd3238efa15ec8dc1b6ee5f440b8 elfcpp/elfcpp.h
06459ea1bcfc10ed8b273600c39573ca elfcpp/elfcpp_file.h
@@ -1394,7 +1396,7 @@ efd3312aae953b098f9c608e01aba412 elfcpp
eaac0cdd8ac2b8c31194798a65896321 etc/Makefile.in
4efa33cb728b66212af816a01e13d389 etc/ChangeLog
48803ea66a5aa68af0c6f226395ddb42 etc/configure.in
-e07c730ccb4e8f8aa2a7f70894e7cebb gas/itbl-parse.h
+a23f7dfc772c95e4b913f0689422e459 gas/itbl-parse.h
4d66333cf67411cdf72c877260e32494 gas/itbl-ops.c
0dab8bd3852957a6955b28d42179a880 gas/ecoff.c
365117e834c8bfb83ed025b270aaf4d0 gas/expr.c
@@ -1410,7 +1412,7 @@ f5079fd454b40033e689a3b9aa51de3d gas/do
004872abc44a6ba29837a5c3ef6f119e gas/doc/c-cr16.texi
cd8225068dc98bc36d91ea607b5d6fa4 gas/doc/all.texi
32297dabffa8f5a3cfeb8332036d3f53 gas/doc/c-microblaze.texi
-a201d7976ae682d38c76f6c9bfa56a8c gas/doc/c-arm.texi
+e74aa02fb0a2843a8c5a533f153c2d3d gas/doc/c-arm.texi
d545849a6c4ac7e66d13120b903934a8 gas/doc/c-vax.texi
ddf0b4dc6758ed5749976e75c0c5d090 gas/doc/c-m32r.texi
27b2e92d73974b22ddc791fdcd07810a gas/doc/c-rx.texi
@@ -1436,7 +1438,7 @@ d08a2ca4dba2ffbbc39ce64f47a73eaa gas/do
032ba9612a3ba821c593ad908c1e3954 gas/doc/c-ns32k.texi
8fe1f50b805a13233bc435eee4bb0fd4 gas/doc/c-z8k.texi
4c063d9616b6e09c65538f34a15856e6 gas/doc/c-tilegx.texi
-3b48b8970d8f85dfa671f87f2b203e92 gas/doc/as.1
+94035ab6dec9845541b4b0de0441dc41 gas/doc/as.1
56ca3d78e4eaa13e9cf9b86e2b4e2d3d gas/doc/c-cris.texi
992647b41df77390518a4d31dfd3fb69 gas/doc/c-pj.texi
f4593f53845c85cdbae0b302ee61f853 gas/doc/c-xgate.texi
@@ -1450,7 +1452,7 @@ ac5c3dcab453321f45cfde7457ce94fa gas/do
cd17540ee99679aeb1e0057904320554 gas/doc/c-alpha.texi
5b4ea5dbb79dd41ee144b8c1130f53d9 gas/doc/c-z80.texi
e2ea5bf28ebee458be1616ea1abf1449 gas/doc/c-pru.texi
-81495b1ccdf495c203bf0107ee6c3673 gas/doc/as.info
+4a3aef6c52fe64139bbc444f351806a5 gas/doc/as.info
65a6e44031693a9ed862119bbc033a27 gas/doc/c-visium.texi
25ceac69670d6090e2df939b27a32727 gas/doc/c-s390.texi
fdce41a9df48afb9dac7fbfa48b5398b gas/doc/c-mt.texi
@@ -1459,7 +1461,7 @@ d194759e2334bb87cde60aff68f9270e gas/do
b74cc68feec84c819054560a42534ad2 gas/doc/c-or1k.texi
cfe1879ee8da5bcd7720a65486acbfb1 gas/doc/c-xtensa.texi
79944c6528b1da612666e0fd145ccc59 gas/doc/c-metag.texi
-b85d1fdc8677fe8266d8b90d00ee898a gas/doc/c-aarch64.texi
+2ba341e274e9d750c9124808eef0beee gas/doc/c-aarch64.texi
cd8225068dc98bc36d91ea607b5d6fa4 gas/doc/asconfig.texi
78432571448f6c807c86d9ac08c09d23 gas/doc/c-d30v.texi
2ae6d5a42db2289165d939a860ae5cc5 gas/doc/c-i386.texi
@@ -1473,10 +1475,10 @@ fc4edcfa433cd831cb19a2fd990fc8a1 gas/do
3e124a3b9d1cd7d6005a13a1d3ba4e1a gas/flonum-copy.c
01eb0568b9dd9d6c895a2a6ce976faa2 gas/hash.h
57ceb0529619f2fad757f61ddb98c0b9 gas/emul.h
-08b666e2f6cddf6e90febeb7d8617c08 gas/rl78-parse.h
+419c35f216afccaf7a95f0013ab92b78 gas/rl78-parse.h
dbea40b82d6c91ea62f18dc527b31a6a gas/itbl-lex.l
f2b5e2e589544ba614b907daed41600d gas/itbl-parse.y
-dc9ee874db8b0a1ded65b9d05cedf89d gas/itbl-parse.c
+459cf5d188a8bfd21be1cec6c56536cd gas/itbl-parse.c
f50eceed50514d40ef7a08ca2166e7b7 gas/makefile.vms
453efb26cfc42c358866e007bf966a2d gas/ChangeLog-2008
d32239bcb673463ab874e80d47fae504 gas/COPYING
@@ -1489,12 +1491,12 @@ e804d1dd3f2da531bdaa1d34df072daf gas/wr
049cc6bd7fdf32fee2c4359cb1f43817 gas/itbl-lex.c
f1ca5c5da2255df11f9ff2e72840dd98 gas/CONTRIBUTORS
3e1cb714a3280bde9f1a8aeb6becd4ee gas/macro.c
-1f51a756ec0500143628ac367a7b2aba gas/rl78-parse.c
+c60c75c9522fbf23c32e9827e0861115 gas/rl78-parse.c
efa00be218d044fb28e6c9147b85c63a gas/frags.c
bba211c420ad3256dff78d7b5e840dd8 gas/bfin-lex.c
0b843d36c3ab4084d85ab886463d9da6 gas/depend.c
f56cca756cd8d6c99afc4f8d8443b842 gas/sb.h
-728064e5ef9a3a16e216db45d66692f4 gas/bfin-parse.c
+8b23a97ecc93885cb4bdf156318fb517 gas/bfin-parse.c
be7051b818a2e49d3545f9cdd51b14bc gas/configure
da9fbfd7ecabc4ef023a26c015d5d0e1 gas/ChangeLog-2011
b90f61e8af5fe0b96a30dcf17b5346d8 gas/obj.h
@@ -1508,10 +1510,10 @@ c534d8e319454e3e11e5bdbafab66775 gas/Ch
17a19f3766a8741b96689b1c6bd6e474 gas/ChangeLog-9899
a1de7b852e1f5c4494e9dde175689dc4 gas/debug.c
8526d3f350a34bd1413618497346bdf0 gas/read.c
-6ae65aab6612ba06c02f4217ddabff75 gas/dwarf2dbg.c
+6ffbabc709daa49860ff5e7eadcfa34d gas/dwarf2dbg.c
7b9233dcc235d4ffed1af18314aa37c4 gas/Makefile.in
d8af5f629a8d1c18bef3579ba12a975a gas/input-file.h
-5dd4a8b94d242124f5acde4ebec690c3 gas/rx-parse.h
+eb84305fbb918809bfcd307727cc8168 gas/rx-parse.h
50c2cf6648f39da8ac596dd3374a3103 gas/ChangeLog-9697
311831b942393f3447cf36735568d050 gas/output-file.h
ec0acab83b3befa6f0d1d2caa8326230 gas/asintl.h
@@ -1519,11 +1521,11 @@ ec0acab83b3befa6f0d1d2caa8326230 gas/as
81cbaa3ff6e6038dd35a130191e0a2e4 gas/bignum.h
d0fa9f6f575c300dbd20ce4d36ab0b6c gas/ChangeLog-9295
cba211c6e65e333bd2fc8bfdb986e3c0 gas/ChangeLog-2014
-55a220a9c15716a2b5a68b91b24d4fc0 gas/ChangeLog
+5451cdee60d057464af751e515459867 gas/ChangeLog
d4dc91ce0173990d41130c7970c68214 gas/ChangeLog-2007
9a1294b8181876b5cfc1fa32773afeba gas/config/te-go32.h
d19ddb11e495a0013361478100ee3d89 gas/config/tc-msp430.h
-d25df0d33f242acb9fc1f499f4d1bc8a gas/config/tc-i386.c
+6244a545b9ee311c2f02c7c0d9a73176 gas/config/tc-i386.c
72e02ea9799ce87196c7270168e4b2f2 gas/config/tc-ns32k.c
1ce722f76dd40ef4e3ff54639f498490 gas/config/obj-coff-seh.c
3092faf1ed231931a6356ab05609cac4 gas/config/tc-tic6x.c
@@ -1550,7 +1552,7 @@ c81c7d6389dd510114238bf4c4414bf8 gas/co
ab1590248c7bcfa93276603f019ea421 gas/config/vax-inst.h
3b37a73e63f2b898e70c4ef1db091443 gas/config/tc-i386-intel.c
7646590421ecfc86135d54f1dd1c6d0b gas/config/te-generic.h
-fb97b8aaada20fec287c6c0d7ec5040a gas/config/tc-ppc.c
+edb899a546fdd26b80abc1765e7012dd gas/config/tc-ppc.c
deca78961af1439bcebd723eedeb0055 gas/config/atof-vax.c
02b33dd47074537cb87d67beba4030ad gas/config/e-i386coff.c
fcc0ce4075b2070d00d8658fe4f9f3ce gas/config/tc-sparc.c
@@ -1596,7 +1598,7 @@ fc6bf0306a0edc4aeaa948f2209a154f gas/co
e82cb21045a376e5658f8326160c1c1e gas/config/te-csky_abiv1.h
faf0a5614b81d67780df9a668b1164af gas/config/obj-som.h
baabc627b45d672b97abeb91e7d70290 gas/config/tc-pj.c
-8a3c7ab30c8d41141f2f5b4da2f5c689 gas/config/tc-arm.c
+b17d00ae6f5437e18e0fb645c4748132 gas/config/tc-arm.c
0b1de19b9f54e7aa185781f45b369f06 gas/config/tc-tic4x.c
b34aaf4efc20b985585253380a6f2998 gas/config/obj-evax.c
5fd0be0c9e9e02c9a9cfd34d265b2359 gas/config/te-lynx.h
@@ -1604,7 +1606,7 @@ b34aaf4efc20b985585253380a6f2998 gas/co
30a29bf56cbca1a012e1a3c7d226dd5d gas/config/tc-v850.h
ef4ab58111e777fb6f2d138f426f8054 gas/config/tc-spu.c
20d03bdd368423ccb171ed253c355116 gas/config/tc-mn10300.h
-5403ad16a92e754a26a33d4c792ecdf0 gas/config/tc-aarch64.c
+94e67ad34ad778cebfdaa623a646b8fd gas/config/tc-aarch64.c
343c11ed022f43029ab5386d59ea02c2 gas/config/tc-pdp11.c
9b352ac84168c39f95dfb121fbb4ab39 gas/config/tc-hppa.h
b2494e05bccb31fbb4d9ff0e5f97984d gas/config/tc-mcore.h
@@ -1765,35 +1767,35 @@ f31d4c8107ed2c8362b338d061dfbfc0 gas/Ch
830acff75ab64cce9f1e4d80c337bc9a gas/frags.h
c9c5c064a5aca247818ea533d586610a gas/write.h
abe9186aa2b65b000546c8158085dda8 gas/MAINTAINERS
-c16b37056f1c21542b96dcd21793648a gas/po/ja.gmo
+cb2c3bc170dff26a5e6dd54f1cdda674 gas/po/ja.gmo
ecfefd4ef9c04f3bd2e486e73cc878db gas/po/rw.po
06fc488a9a62c85abfce729e76087cdf gas/po/uk.po
cda6eaa34886a36828de8e3125a2daa9 gas/po/gas.pot
c55f7dc22a89b1801c0643fb57acc56e gas/po/ru.po
4438b95a4344144658f227bc2fd6865f gas/po/Make-in
a423bc8e7ad0cd65075bf2d02c5489f3 gas/po/id.po
-37b70f456e739968cbe404a4e62f2cc7 gas/po/sv.gmo
+6dcfcf37241fc8a1f778823296077872 gas/po/sv.gmo
c3570b475c624391e84903a52b1d84e6 gas/po/fr.po
b6f755c4f422786669e9a537d026839d gas/po/fi.po
-9f6b211c477db23676f07e8523446dc4 gas/po/fr.gmo
+1f9479282ea6ed6b3a69870ccbce7783 gas/po/fr.gmo
263702a8b43ca88207364322de002013 gas/po/POTFILES.in
-27b868a16efc71b47aa11c13caffba05 gas/po/es.gmo
+53a30bde3d0eaec02bdd8f60352dffc1 gas/po/es.gmo
500c0589d1e9792fa3ed93b44a2bcc38 gas/po/tr.po
1065383f59b49c7f18fe7d22b8134a6f gas/po/es.po
-fba0daf8038e64c2ccc2e7e9077f4602 gas/po/ru.gmo
+11b030fba72943cff263e37fe50df3a4 gas/po/ru.gmo
e8c548ee4d5f6b9a5cd6212359c38926 gas/po/zh_CN.po
a99cebdd932dfcb71ced344b13b9250c gas/po/sv.po
-4fcf5ebf03f06ef0e726d1fc8a95a8c0 gas/po/zh_CN.gmo
-d753ac1595c48fc2380c5837eca0f1bd gas/po/tr.gmo
+94ba369fb02f9323f30dbf628c3a89a1 gas/po/zh_CN.gmo
+268c5730abcb913f5b0b5438744e040f gas/po/tr.gmo
bbb7a74712101fd9a38bbebd15a3e219 gas/po/ja.po
-6ae02d09f082dcfee441c953764c8ae7 gas/po/id.gmo
-0b88d1de88bc447bae2d554aa5b7094c gas/po/fi.gmo
-3e890a0b3ab0fdf3474873d5627b21f4 gas/po/rw.gmo
-1389f821dcfa112612a1c0cc6214855e gas/po/uk.gmo
+ff54dee8b8ad1738932875c812828fd1 gas/po/id.gmo
+9f4afdc6b89624eeec67c8289c5cae45 gas/po/fi.gmo
+56207976a7d4d8d86e6ea14d8bbc64c4 gas/po/rw.gmo
+c9566657a125662a8e366dd05cd12d51 gas/po/uk.gmo
eda67849d846299781a40ae29eab9a7d gas/dw2gencfi.c
ae2f57545b6c7ce4a91fb749513ac6a1 gas/gdbinit.in
24355282dde559ca65cd0e83bb77d7d9 gas/configure.tgt
-7c7c3e6e3a7669ef374d9aea5b235870 gas/rx-parse.c
+f2cd27a76933bfc460dad43468cf12fd gas/rx-parse.c
d669a0b71b5e695f0cadc7801c2af32f gas/remap.c
5725f8e58e03bd6026f3e2721e1db22e gas/testsuite/lib/doboth
aad4965bf0067bf9fb71acc19f7877d4 gas/testsuite/lib/dostriptest
@@ -1914,7 +1916,7 @@ dfb4ddccf0f2e18e9d768b5b367de607 gas/te
1430edc46a12ca363eafb2d0ea6f94b1 gas/testsuite/gas/i386/x86-64-sse-noavx.d
833f164bd60a9f7c4db8ccf2b0bf711b gas/testsuite/gas/i386/sub.s
037a982a9866a71bffadd1cb8870e467 gas/testsuite/gas/i386/intel-intel.d
-ff4aa65f1d7ec184096e4b0953fc204e gas/testsuite/gas/i386/x86-64-movdir.d
+6ca8e373b2750fdb58aec19449a27e78 gas/testsuite/gas/i386/x86-64-movdir.d
71a7f25f253d301099ab3390c6be43a8 gas/testsuite/gas/i386/avx512f-opts.s
b66b458374927f587de8154fba02388a gas/testsuite/gas/i386/sib.s
f33adff4ea784a3ff651cece893d0fcc gas/testsuite/gas/i386/x86-64-avx512vnni.d
@@ -2046,7 +2048,8 @@ de0e3c5e1ca51d636ff85a74ff68dce8 gas/te
139d225422978f9482993c9618fd7771 gas/testsuite/gas/i386/opcode-intel.d
a7240a2530308c3081d3c7bf0e69373e gas/testsuite/gas/i386/align-branch-4b.d
4a2400eb7c770c68b6ce13d083f4f9c7 gas/testsuite/gas/i386/evex.s
-69993712e46d3b2a43c1913352983df5 gas/testsuite/gas/i386/evex-no-scale-64.d
+5ffe27691cb23e1ae7a24410643cf701 gas/testsuite/gas/i386/dwarf5-line-1.s
+c2f3708be75765a444eb9f60b3e2d412 gas/testsuite/gas/i386/evex-no-scale-64.d
cd3ffcd4ddb3a6b7513cd8c9a10aa4d2 gas/testsuite/gas/i386/property-3.d
66d58ce78097a5cfe79ef4c6e235e361 gas/testsuite/gas/i386/string-ok.d
beb347373f542e66bff26cd182389897 gas/testsuite/gas/i386/optimize-3.s
@@ -2085,7 +2088,7 @@ e4b76af1ea9407ab6065adb42a4bec22 gas/te
44145eef9a6621dc55ddcc2e390e3fe9 gas/testsuite/gas/i386/x86-64-opcode-bad.d
f29f9513a28ef8d696ca0af8cc813957 gas/testsuite/gas/i386/xmmword.s
d2dc5aa7066ee9f6edcf0eedcfb6da93 gas/testsuite/gas/i386/arch-10-prefetchw.d
-2e9f48a2ad5b4f83939469336dc56541 gas/testsuite/gas/i386/x86-64-enqcmd.s
+50113a3c758d86782cf7fb9c08857bc5 gas/testsuite/gas/i386/x86-64-enqcmd.s
0f21416e489dae757bb03a5039e498d7 gas/testsuite/gas/i386/note.s
f64e2e3eb041710088b2617351597ed1 gas/testsuite/gas/i386/nop-5.s
c6c586624b1ee4e083a21165381faee7 gas/testsuite/gas/i386/noreg16.s
@@ -2123,7 +2126,7 @@ b83a2a0dbc42d7719c1f3773e5ece505 gas/te
d31e3c7bba73a74cc501402dfef3dc36 gas/testsuite/gas/i386/mixed-mode-reloc64.d
459f6ab7a20572ce7bdf1640f7a6d6e6 gas/testsuite/gas/i386/avx512f_vl-wig1.d
a9200dd240e905e5dc74412527dc53b5 gas/testsuite/gas/i386/nops-5-i686.d
-b220126976f2a62df218bcb12a4e936a gas/testsuite/gas/i386/enqcmd-intel.d
+c0e33dab8414e93d37cd5916a1a496fc gas/testsuite/gas/i386/enqcmd-intel.d
12f4d57eb3aeae85595763edafcbf4c4 gas/testsuite/gas/i386/x86-64-opcode-inval.s
3bd5653695ef596e217e4e329f9ea8a8 gas/testsuite/gas/i386/x86-64-cet.d
d862c5bae3dc447ab40558f2bad4e6af gas/testsuite/gas/i386/x86-64-avx512f.d
@@ -2162,6 +2165,7 @@ ae2e0be16100f21dd7ca822d5d462e4a gas/te
c34551101e7ece3349e3242ee99fd65d gas/testsuite/gas/i386/noreg32.d
7fb60c5abc1ef97894fe2d2f00c4298e gas/testsuite/gas/i386/x86-64-vex-lig-2.s
40d683aa3ff76710f84cae0515965bf8 gas/testsuite/gas/i386/lfence-indbr.s
+20fd289b12267b5af566534036bb3de3 gas/testsuite/gas/i386/enqcmd-16bit.d
54446b50504fde224122eaf7b8d14541 gas/testsuite/gas/i386/nops-2-i386.d
d30362e560f958fcb8809cd0f852b5aa gas/testsuite/gas/i386/avx512f.d
6f2ae67812fe7716eb0da2c0ae3d12e0 gas/testsuite/gas/i386/size-4.s
@@ -2262,7 +2266,7 @@ c10822c38c0829d874e2ab8397c27c4c gas/te
20903d8325b815f0461390b937a9ba02 gas/testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.l
e8537191267ee9bfbbac049f1cf49850 gas/testsuite/gas/i386/x86-64-movsxd-intel64-intel.d
077c9a5674131e1096ac5283e74a3657 gas/testsuite/gas/i386/avx512dq_vl.s
-0c6a6683f23887d5dcebe5f8a3f3b309 gas/testsuite/gas/i386/x86-64-enqcmd-intel.d
+518f653784399cd7f70138d1ac299b87 gas/testsuite/gas/i386/x86-64-enqcmd-intel.d
09eb75575fe2158c1634100977167f15 gas/testsuite/gas/i386/x86-64-bmi2-intel.d
a21bb60d13f0f586b34c2d33c22942bb gas/testsuite/gas/i386/svme.d
2a069b87359bb962df261b870b939b15 gas/testsuite/gas/i386/pcrel.s
@@ -2281,6 +2285,7 @@ ff4d903a42033b26ae8adf16af7ebb3b gas/te
9e14a1b044d5ab4cadce1af8beaff84e gas/testsuite/gas/i386/x86-64-sib.s
b428f159989c04423fe126d08b109759 gas/testsuite/gas/i386/avx-scalar.d
91156d4794530a60c72bd58f418a39b9 gas/testsuite/gas/i386/ptwrite-intel.d
+5ef74e9d0cd31064ebe11e125941b276 gas/testsuite/gas/i386/movdir-16bit.d
5313e418221d24e63c58d95f87510bee gas/testsuite/gas/i386/x86-64-avx2.d
c040d1a38dd8dbe09d00e99590d09b77 gas/testsuite/gas/i386/relax-5.d
1238c946aafa982187b0aba967587e9e gas/testsuite/gas/i386/nosse-2.s
@@ -2452,7 +2457,7 @@ f6d03c31b8442742692d009caea2c832 gas/te
e053ce2a4cdd8ee9106171c595313633 gas/testsuite/gas/i386/x86-64-avx512cd_vl.d
870989709e8bb3e3f83ba82b0fee20de gas/testsuite/gas/i386/x86-64-branch-2.s
91d2ea9440a46cb062ca127ae0892e9a gas/testsuite/gas/i386/noavx512-1.l
-a4b9a994f86ba83d2608409b21be58aa gas/testsuite/gas/i386/movdir-intel.d
+008eb1a6ea316799dcca86bd8a7533e2 gas/testsuite/gas/i386/movdir-intel.d
eef344a4086f99e8fc8e5d09cc7701d6 gas/testsuite/gas/i386/relax-4.d
8c09cea912742744d023e341487caa2c gas/testsuite/gas/i386/x86-64-mem-intel.d
f23e19801029674bf12d2a6cb9473fa0 gas/testsuite/gas/i386/x86-64-stack-intel.d
@@ -2546,7 +2551,7 @@ a749d582613f8a30e046056af23c8d0f gas/te
a00783a8cf658b9312271f4d4c7fcd38 gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d
0ee50a168a2106487dbe41247ad13f1d gas/testsuite/gas/i386/general.l
28b97c827f91c80baf7d00777a8723cc gas/testsuite/gas/i386/x86-64-avx512bw-wig1.d
-6ef9d88cbf9120b4dbaf49f88da361da gas/testsuite/gas/i386/x86-64-movdir.s
+efacf0df27602969a3f70d22a83cb2db gas/testsuite/gas/i386/x86-64-movdir.s
fdb142aa76fad022fa423552cde40462 gas/testsuite/gas/i386/lock-1.d
b8f4c55f5234aeb290314b2d83edd0a3 gas/testsuite/gas/i386/ssse3.d
703186c0d9c0bbf351d366ed39f40e89 gas/testsuite/gas/i386/x86-64-avx512f_vl-wig1.d
@@ -2557,8 +2562,10 @@ c211c30a2ca8c8af5dfb9de9ed947b54 gas/te
2477eea02aae21936004f49c6e7397a9 gas/testsuite/gas/i386/x86-64-evex-lig.s
5926795552df7942d593482625c9c50b gas/testsuite/gas/i386/mem.s
05e5126338040a91e74a5ce32698e9aa gas/testsuite/gas/i386/x86-64-avx-swap-intel.d
+3337314e288e296442bd51081df51bb8 gas/testsuite/gas/i386/dwarf4-line-1.s
f5eae70842a215bcac877e124765f9b8 gas/testsuite/gas/i386/disp-intel.d
4df00207aeb59f9a46cd8994185f16be gas/testsuite/gas/i386/x86-64-avx512bitalg_vl.d
+0575292aa0881a472e54b873b8495e6f gas/testsuite/gas/i386/enqcmd-16bit.s
47d65759513743b58ec56ac196b4c2db gas/testsuite/gas/i386/intel-movs16.d
1a64bceae866e85ed78b56b761c06a19 gas/testsuite/gas/i386/inval-crc32.s
4c86fa86ac8e8915b23af2c545683496 gas/testsuite/gas/i386/x86-64-avx512er-intel.d
@@ -2597,7 +2604,7 @@ b30460dcec9e423df1500a870857ca5f gas/te
92cd61eda5799892991427cc0f8fcc5b gas/testsuite/gas/i386/nosse-1.l
0a00a1e66acff8f1b016e51f460f8e13 gas/testsuite/gas/i386/vpclmulqdq.d
6e92c68ea77f3f3ce82c87474d239f1f gas/testsuite/gas/i386/x86-64-evex-lig512.d
-4f5a8462d7b59f64c0d3cf02578d3a83 gas/testsuite/gas/i386/x86-64-addr32-intel.d
+36a5e6eb568422e9e61eb0e3f6d8ec7b gas/testsuite/gas/i386/x86-64-addr32-intel.d
69fdc5ef997d508b41b2b0da29a6c89c gas/testsuite/gas/i386/x86-64-sysenter-mixed.d
5cb521fedc5a696fabc191fa6617d805 gas/testsuite/gas/i386/x86-64-inval-rep.s
7d037c6a498297bb98d6f7a7b686831b gas/testsuite/gas/i386/x86-64-notrackbad.l
@@ -2641,7 +2648,7 @@ dc96f4df9f17bccb91cffef32e98bed8 gas/te
405da6b812afca00da4b06d848463a12 gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig.s
1af0d380ed1563adbd60e53ea72ec07a gas/testsuite/gas/i386/vgather-check.d
098a5f3776f41beb0c854382502002d9 gas/testsuite/gas/i386/nosse-5.s
-965486cb1c9c58871355f9eed9c478c2 gas/testsuite/gas/i386/i386.exp
+3f45f57bbed47103b2130745cbb89384 gas/testsuite/gas/i386/i386.exp
92ee399bdc1231440c87f3bd035eef57 gas/testsuite/gas/i386/waitpkg.s
1eb96aabc3d1172ecee1c818483d0caf gas/testsuite/gas/i386/immed64.s
68de695bac60c5f7cce4c9980049663f gas/testsuite/gas/i386/nops-1-i386.d
@@ -2654,7 +2661,7 @@ f5c2950078d64dec53bdcc74469819ee gas/te
908bdffcf04087bb53d54486dbb8b742 gas/testsuite/gas/i386/x86-64-tbm.d
2c6b752faa6d31fd1e4f1e37d70413d1 gas/testsuite/gas/i386/x86-64-vmx.d
a2bd1287be60ae925923e128c5fe40b1 gas/testsuite/gas/i386/x86-64-mwaitx.s
-546ac81d2c660f3ae128a0c0676da1fe gas/testsuite/gas/i386/x86-64-movdir-intel.d
+f77afed1ba6d083791b88ab608dd077f gas/testsuite/gas/i386/x86-64-movdir-intel.d
762170aa766e1898a409b691ffbe1738 gas/testsuite/gas/i386/nops-4.d
8239469ac77bbb039844b146f5b5dddd gas/testsuite/gas/i386/avx512vl-ambig.l
a2b4be01be260e759dc8d4059dce61cf gas/testsuite/gas/i386/x86-64-inval-ept.l
@@ -2742,6 +2749,7 @@ de0b47c822c18ad27533a8f30cdea190 gas/te
a3f17309f76f5cc6c71e593d19e8236b gas/testsuite/gas/i386/stN.l
29b902b0e65b5880650d7b28295341d1 gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
a1a83f19df8c47932fcf764c0c123be6 gas/testsuite/gas/i386/pseudos.s
+12f66b51cb77cee9e8822a443218a54c gas/testsuite/gas/i386/dwarf5-line-1.d
0154083d83fde516c822d2b71aa1cded gas/testsuite/gas/i386/avx512vl_vaes-wig1-intel.d
04f5ee2e72d57c658273418b581c213c gas/testsuite/gas/i386/x86-64-size-inval-1.s
a1abd3f647477950a288b838c69d1a32 gas/testsuite/gas/i386/x86-64-clwb.s
@@ -2808,7 +2816,7 @@ c643432a697f1eaca5b6c2f04d9f2f59 gas/te
28bbb19963a9f7f45e93c2c272b50fbe gas/testsuite/gas/i386/x86-64-sib-intel.d
9aa138dc4bc96aab0f1f7b47999e1726 gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d
8ce5c9c0e81d86671d1df8bbbff297e3 gas/testsuite/gas/i386/x86-64-vp2intersect-intel.d
-c0e5704faaa8991aec6f130b0cc0084e gas/testsuite/gas/i386/enqcmd.d
+65337930a50a1466c01377f40ab95d52 gas/testsuite/gas/i386/enqcmd.d
e2a5b5920f2ec4a871fd8dcacdd9a274 gas/testsuite/gas/i386/x86-64-avx512f-rcigrd-intel.d
8ce11aeb67d3ed972d5eb3c90e5e94f4 gas/testsuite/gas/i386/intel16.s
e8124a58d1a7711303acdf3497a0d0ee gas/testsuite/gas/i386/avx512f-rcigrz-intel.d
@@ -2862,6 +2870,7 @@ d79a2206a21c07deff6669a6cedb55ff gas/te
c5ef0349c39952d2cb48ed6b7e866602 gas/testsuite/gas/i386/x86-64-avx-scalar.d
3ceafcdfdb4e5b068fe87b4ff1dde542 gas/testsuite/gas/i386/omit-lock-no.d
4b6488b1095158a2199be1d381bbe170 gas/testsuite/gas/i386/rdpid.d
+ef95660a79640eda8f729f97834bd97e gas/testsuite/gas/i386/dwarf5-line-2.d
bcace8334bdab66ce39b660e19c4b800 gas/testsuite/gas/i386/optimize-3.d
0d0cc5b2d6b7c0d2946e51354a0b4fa3 gas/testsuite/gas/i386/clflushopt-intel.d
403de65ac2cc88cb9bf67aa7ed2115a5 gas/testsuite/gas/i386/x86-64-avx512vnni_vl.d
@@ -2926,6 +2935,7 @@ acd2c375477f632c61effc326355b0c9 gas/te
bb6a0e9ffcc1b7b608131bb2c950cdbb gas/testsuite/gas/i386/x86-64-lock-1-intel.d
55b36af4509c78bd4fe27dcd906a7057 gas/testsuite/gas/i386/x86-64-mpx-inval-1.l
e3f8369e2b62c2e731f3dd732dbf2980 gas/testsuite/gas/i386/x86-64-tbm.s
+324571c1b85260d2a79935683bdc67b3 gas/testsuite/gas/i386/dwarf5-line-3.s
9b97e61e9f96d57bcb27b6f76fab79dd gas/testsuite/gas/i386/x86-64-avx512bw-wig1-intel.d
ef8e11829cc8bdd4cd334422d062e32e gas/testsuite/gas/i386/align-branch-2c.d
b6cdcc6ff1a9d8624251e8bf0867dd96 gas/testsuite/gas/i386/x86-64-relax-4.d
@@ -2984,6 +2994,7 @@ e27152d79db72548bf3b3c1674b7d077 gas/te
429dea44e45d9a9809c3e247ef6cefe2 gas/testsuite/gas/i386/clwb.d
45ac38e370dc3430b5379fa70b255919 gas/testsuite/gas/i386/fpu-bad.d
901e888fb0f8849218d4e8c2ef75264f gas/testsuite/gas/i386/optimize-2.d
+e2adbf418c4ce53536e0a1bdddb7694b gas/testsuite/gas/i386/dwarf4-line-1.d
1b58ec1fff190cd70b86ec472e1fa87b gas/testsuite/gas/i386/xop32reg.d
896b54b9ab0a9ea541d5fc9b4b82438b gas/testsuite/gas/i386/x86-64-aes-intel.d
1032228937b3c89c054aaa3d57409641 gas/testsuite/gas/i386/x86-64-disp-intel.d
@@ -3020,7 +3031,7 @@ ee94105cd70b0ed6f7675b53e33268a5 gas/te
eb56b4f882f15fa40765604abe8e4b58 gas/testsuite/gas/i386/avx512_bf16_vl-inval.s
eda053f74ea771ea9199a06491cc23d8 gas/testsuite/gas/i386/cet.d
09cc1da73d2902b633780cb2cb0bd14d gas/testsuite/gas/i386/nop-2.s
-890423069a66db84f9fd2777503d4d37 gas/testsuite/gas/i386/x86-64-addr32.d
+1c3d5125306ac3a72597cb873d2da557 gas/testsuite/gas/i386/x86-64-addr32.d
0c804ba116de81860c5b4592ac701919 gas/testsuite/gas/i386/ifunc-2.l
b5bfffcc84282d76d21d6845f603872e gas/testsuite/gas/i386/x86-64-avx512vnni-intel.d
8ea40f295e215df66b50da6004c15aed gas/testsuite/gas/i386/clzero.s
@@ -3254,7 +3265,7 @@ fd4af19a4e33a0d1e23d7827913a0565 gas/te
53465d928999cc4cc3533466a6cefb86 gas/testsuite/gas/i386/x86-64-align-branch-1e.d
dfaa1687d6f098c81770f69001630490 gas/testsuite/gas/i386/x86-64-optimize-7.s
00d8f39164080016611494920824e001 gas/testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig1-intel.d
-bb0055b7cbbae51dc6377f7861428397 gas/testsuite/gas/i386/movdir.d
+09e1ae574d503ef7f2e638cd91e4f94c gas/testsuite/gas/i386/movdir.d
7e5e384f1b32b26958f8af641023a2c6 gas/testsuite/gas/i386/fma4.d
07b286547600a1436c95b6bd593728d2 gas/testsuite/gas/i386/x86-64-avx512er-rcig.s
b82675e46ad27cc7822c6d6d0a48e496 gas/testsuite/gas/i386/x86-64-inval-avx.l
@@ -3398,6 +3409,7 @@ dd5c556919ef2c377a504fa4d999a8a6 gas/te
298779399b17b78f52c1fdcf886b46a1 gas/testsuite/gas/i386/relax-1.s
c487d81152a6244d9afbd943d54e17af gas/testsuite/gas/i386/pconfig.d
a6bacecf044190936cfb406731bf227a gas/testsuite/gas/i386/avx512bw_vl.s
+76d01594874415fba69dd689acabb101 gas/testsuite/gas/i386/dwarf5-line-2.s
cf6a07896b465b225e73b2aaff43902d gas/testsuite/gas/i386/x86-64-inval-avx512vl.s
5c901832eabe7617704f91183f902ec5 gas/testsuite/gas/i386/nop-3.d
6ca25f25d906ca4e1f42a524d56dedbb gas/testsuite/gas/i386/addr16.d
@@ -3407,7 +3419,7 @@ cf6a07896b465b225e73b2aaff43902d gas/te
3255e1590ff3274d05e980a665daa0c8 gas/testsuite/gas/i386/x86-64-adx.s
d0c61cdbe5298df06a55875a8352b1ae gas/testsuite/gas/i386/lfence-ret-a.d
d9eb45c96277185cfd702373486435a9 gas/testsuite/gas/i386/notrackbad.s
-087227121a8bde00f628dbdcae6c04c4 gas/testsuite/gas/i386/x86-64-enqcmd.d
+138406556b86326eb23b058ce18e1a9a gas/testsuite/gas/i386/x86-64-enqcmd.d
b518d2eb2658745af0bf58cbd295eec9 gas/testsuite/gas/i386/gotpc.s
2f8009f2123256311d7ce760f77e32e2 gas/testsuite/gas/i386/sha.d
df6c0e61c63d23fcee1cdad842f93dcb gas/testsuite/gas/i386/x86-64-io-suffix.d
@@ -3600,6 +3612,7 @@ f3a65bfb96cf2c53b942568fed2c1c75 gas/te
8b405a013662d35dc4e8859c710ee57c gas/testsuite/gas/i386/x86-64-avx512dq_vl.d
637458fa091411540e7f9fa913daaaca gas/testsuite/gas/i386/x86-64-default-suffix.d
5c1b9124898c4b986a1001adfdbc3a51 gas/testsuite/gas/i386/x86-64-rdrnd.d
+a0604d4222ca0c1ff2d6e20e63844061 gas/testsuite/gas/i386/movdir-16bit.s
4214e00df5eec94b3fb7eedba768fd85 gas/testsuite/gas/i386/x86-64-arch-2.d
bdb8e80da88c3562c17a0f251328106b gas/testsuite/gas/i386/x86-64-segovr.d
cfbacb867fc23e46eb5cc453b29e996e gas/testsuite/gas/i386/287.d
@@ -3608,6 +3621,7 @@ cfbacb867fc23e46eb5cc453b29e996e gas/te
d0f3db368e6ac72b79080f6e30fa501a gas/testsuite/gas/i386/x86-64-sse3.d
809c6f65d78807372193c3881983f416 gas/testsuite/gas/i386/x86-64-align-branch-2c.d
04fe6f49281f9ae5e4b0d2bdc772859e gas/testsuite/gas/i386/x86-64-enqcmd-inval.l
+f18ee892663af415210493751b90df4f gas/testsuite/gas/i386/dwarf5-line-3.d
a2d345a18dbfc8c9cb3daf64e704c300 gas/testsuite/gas/i386/size-2.d
1580fe12e20d1689255d1db78f2db5ea gas/testsuite/gas/i386/x86-64-avx512ifma.d
6699e2223eb722cd8fc0ee51d34fecba gas/testsuite/gas/i386/avx-wig.d
@@ -3671,7 +3685,7 @@ eab82109da44b6db29387bb3d32d1c2f gas/te
8dc4e34c9b1fe8d7582db1437973c356 gas/testsuite/gas/i386/x86-64-segment.l
982560db9563085ba922e9a3c15687bc gas/testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig1-intel.d
a3d50b175a9a22971c5fb45ab327dba2 gas/testsuite/gas/i386/x86-64-avx-scalar.s
-c65a0ca9f47a71e88a0c5c8553bf3078 gas/testsuite/gas/i386/movdir.s
+99b8a04c9666934afdbf018216f9e616 gas/testsuite/gas/i386/movdir.s
7197034ef3ee35dbff5befbe3e7799a8 gas/testsuite/gas/i386/x86-64-reg.s
eeb535ee0eb552cd1393f1d490501ab0 gas/testsuite/gas/i386/relax-5.s
b8e138ff0e83f2909ba08f237cb8e28a gas/testsuite/gas/i386/unspec64.l
@@ -3686,7 +3700,7 @@ eeeac89ab5bf0d301ab89af243853978 gas/te
ff220a9aad690c64b192ee1eab0f2244 gas/testsuite/gas/i386/xmmhi32.s
f830c9fcaeabde0dc0c174abfa1ea7dd gas/testsuite/gas/i386/align-branch-1e.d
c1bb857224d18d13a7d774254f5c836e gas/testsuite/gas/i386/localpic.s
-a5483c38b333831615d7a564fc1496f2 gas/testsuite/gas/i386/enqcmd.s
+21a81a79f8c89266cc579cdeb0c43494 gas/testsuite/gas/i386/enqcmd.s
465d5295cd6b3591fb63f77189f84b7e gas/testsuite/gas/i386/arch-10-bdver2.d
486ab6970a2c1e0bfe90f61c1abe7ea3 gas/testsuite/gas/i386/x86-64-pseudos-bad.s
ab961d062b9e42924d1ce445461acdbc gas/testsuite/gas/i386/smx.s
@@ -4445,7 +4459,7 @@ f96c6ef9cb2e1718e696c7c2a7894dc7 gas/te
c76a9dc737c0e74cd65ce2918ab2cf1d gas/testsuite/gas/elf/elf.exp
3ffd88c55a6075e35a6dd44e54d65538 gas/testsuite/gas/elf/section16b.d
4e0cecedecf31818ef0d9697bdf9caf1 gas/testsuite/gas/elf/section0.d
-30685cb2077a5fb8fe61fa0c5ac8b0e2 gas/testsuite/gas/elf/dwarf-5-cu.d
+5f926e2fd811083c52c5aed6962653c0 gas/testsuite/gas/elf/dwarf-5-cu.d
75f93f3a529c0f29408c2dddbbb254ff gas/testsuite/gas/elf/dwarf2-1.d
146271a346446f9a841e6bdb17a77f8a gas/testsuite/gas/elf/section15.s
7f1fa869c82de46d061db14327f2f92f gas/testsuite/gas/elf/section17.d
@@ -5674,7 +5688,7 @@ fd3bd8c4162aeaa991ae379d1e80a144 gas/te
1b5c5cc6d5de0f5e8227b23e0ad86339 gas/testsuite/gas/aarch64/bfloat16.d
e087517d04006185f0773ce544b4ba6d gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
88d0b5df8ba39f25bc7a83df2b9f1283 gas/testsuite/gas/aarch64/sve-dup.d
-401477659df8b5530552772a19ffd965 gas/testsuite/gas/aarch64/system.s
+5fd6692d06edc0c16c8972ae0ec4d724 gas/testsuite/gas/aarch64/system.s
97a92c9b6edd65fc0aa3f541645f3f30 gas/testsuite/gas/aarch64/illegal-sve2.l
36196b4971b92fa5b8041b29351392ff gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
402be6bd18c09beea98c462a3af610d8 gas/testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d
@@ -5733,7 +5747,7 @@ b71859fc8bab0fe357e770bdc00fb9cc gas/te
5ba31b78011fd875f5b2dec6fbd8d0f1 gas/testsuite/gas/aarch64/undefined_advsimd_armv8_3.s
b9d4b8afc080dab4c12683130acc52b1 gas/testsuite/gas/aarch64/mapping_6.d
f2bf0808be790b1e70e98e857ca0a102 gas/testsuite/gas/aarch64/i8mm.d
-8d60f21a7be321b8c8e0b3115f54ad0b gas/testsuite/gas/aarch64/system.d
+af8dcfd6542c29947c8ad435d87f4bfe gas/testsuite/gas/aarch64/system.d
c25fc94aebadd6f8cae2d67bf6873fc6 gas/testsuite/gas/aarch64/illegal-crypto-nofp.d
5b1f625ea3c76b4ff79492ceca4c8629 gas/testsuite/gas/aarch64/verbose-error.s
a4de2c2033d3c963564446022a10be4e gas/testsuite/gas/aarch64/sve-movprfx_22.s
@@ -9228,7 +9242,7 @@ b334f15354ebeffb3acba502cc1dae67 gas/te
0bc8c01b9137eb5e637ed1d4c6ee5e3e gas/testsuite/gas/ppc/xcoff-br16-2.d
313f5d9613a204036abe7728f4e0a81f gas/testsuite/gas/ppc/e6500.s
52c2f10e54b1b94b494715da3c2a71f2 gas/testsuite/gas/ppc/test1elf.asm
-412bf1f1f461a8a3a5c9ae44b9170c11 gas/testsuite/gas/ppc/476.s
+01a7da9db11b4059a5c0dd41598b6b4f gas/testsuite/gas/ppc/476.s
a2229dad823c2fff839662835b3f1440 gas/testsuite/gas/ppc/ppc750ps.s
2e7cf08f39a8f93eae434cfaa76d4478 gas/testsuite/gas/ppc/prefix-reloc.d
bf7138b0bd2200fe6b4cafbc46e44d43 gas/testsuite/gas/ppc/prefix-align.d
@@ -9263,7 +9277,7 @@ f40ead4882a3b0477c72b16942540c20 gas/te
3afce79c83e5563787ad48c49cb7bad9 gas/testsuite/gas/ppc/common.d
58828bd5095ede1e0fecf5af35914d4c gas/testsuite/gas/ppc/altivec2.s
5f620ed105babe239107fc41ad0d8a23 gas/testsuite/gas/ppc/e5500_nop.s
-4a5b414fe8649a5d03efc42d7c1f735a gas/testsuite/gas/ppc/power8.s
+c1ccf8a127b5e1bd46b728b530c89434 gas/testsuite/gas/ppc/power8.s
69b9dc5b20503079be857e83ad7e6d24 gas/testsuite/gas/ppc/test1elf32.s
e967e474a62c98234917b965893efb5b gas/testsuite/gas/ppc/regnames.d
278393ce5d7715428b33dec80a5fe84d gas/testsuite/gas/ppc/bcy.d
@@ -9272,9 +9286,10 @@ ddc10efbeb242570e5555a2391298f61 gas/te
d64db4c655440c10d9a45b972794e4f5 gas/testsuite/gas/ppc/byte_rev.s
b09f6e7ab2e1416379f9512d1abe3afc gas/testsuite/gas/ppc/simpshft.s
b4f0d227d877d8544b3534c27e142b88 gas/testsuite/gas/ppc/vsx.d
-713276fe36cbb059aea8f67764e5ce2e gas/testsuite/gas/ppc/a2.s
+014ca139c220e720af1548fa099f402e gas/testsuite/gas/ppc/a2.s
8e6f1a1808fb5a70e7658bbcf0adcdf5 gas/testsuite/gas/ppc/vle-simple-2.d
9126ebdec705b53a59e810a128cea065 gas/testsuite/gas/ppc/spe2-checks.s
+9e261d29a5fe4aa35f4bba048f7767c7 gas/testsuite/gas/ppc/be.s
1f3ca01c9d7afa8a580c73ee371fee03 gas/testsuite/gas/ppc/xcoff-ref-1.l
82af549e714fd1c02225bebe05eab23d gas/testsuite/gas/ppc/e500-ill.s
87d11cb66e10ea7d6a07293cb45e8799 gas/testsuite/gas/ppc/altivec_xcoff64.s
@@ -9291,6 +9306,7 @@ ab3c6a1d0aca76e63d73bb4d7eb80035 gas/te
7c72de3078c3749698c21ede5afd9f0a gas/testsuite/gas/ppc/prefix-align.s
5ad9be7f8dfb14e3364f158aca1842f0 gas/testsuite/gas/ppc/power7.s
5254d1fc440f434a46e97eb96b2735c1 gas/testsuite/gas/ppc/astest.s
+d8c49b589e7a480b280b5653b3ba503b gas/testsuite/gas/ppc/le_error.l
bbd192748bceb61aacf40f50e0691333 gas/testsuite/gas/ppc/pr21303.d
8e884141661fddd367c49211824ec4dc gas/testsuite/gas/ppc/xcoff-branch-1-64.d
afc3d3ec2754e8dc184c562e4de77a4a gas/testsuite/gas/ppc/reloc.d
@@ -9312,7 +9328,7 @@ a5e3b2da72f048b69bd0bb8905d824c3 gas/te
45cbc6c02dc1f7e4e355b75dcb312f8e gas/testsuite/gas/ppc/common.s
5469fabf8c12dbd0dc2c48ef7af1a7c7 gas/testsuite/gas/ppc/groupnop.s
25f7266b7d2018e3d6ada872b8781bec gas/testsuite/gas/ppc/altivec_and_spe.s
-b1754bca903aba171dfc6a85f5d50cbd gas/testsuite/gas/ppc/power8.d
+8c81ed0f7862b2189318f565092a3586 gas/testsuite/gas/ppc/power8.d
e8401e493c9b7d28d214fff4dbfc8b60 gas/testsuite/gas/ppc/altivec.s
28664cd25f2c76688bf150c9823261e5 gas/testsuite/gas/ppc/altivec3.s
df485ed9c47f6fccff94a01bacc22411 gas/testsuite/gas/ppc/bcaterr.d
@@ -9332,7 +9348,7 @@ aa463e442fe9faf027cd46460213d6fb gas/te
1ba8fbbed3c4e9237919b0410da989ae gas/testsuite/gas/ppc/altivec_and_spe.d
96d7df781d760c97e64217431d61a05e gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d
f89d00a5249e47eef16bd7449185a9dc gas/testsuite/gas/ppc/booke_xcoff.d
-8d83ce45c5a4405eb70d16f4abe30e9f gas/testsuite/gas/ppc/power9.d
+6e762619305ec2257f725c83482d8f1d gas/testsuite/gas/ppc/power9.d
c79bc49c8460fd5c1f869bffdb70b173 gas/testsuite/gas/ppc/bcaterr.l
08ea62f057fad4130ab4496b10773187 gas/testsuite/gas/ppc/xcoff-branch-1-32.d
487b3873f50969a2defd99503835df58 gas/testsuite/gas/ppc/astest64.d
@@ -9348,7 +9364,7 @@ f358db9d5f8df65182e53f5e34f10ee8 gas/te
9a8c8131d1ed55f1cd6b12d65d85cbd6 gas/testsuite/gas/ppc/e500mc64_nop.s
679686746eeffb584f428b319e1d60e7 gas/testsuite/gas/ppc/astest2.s
2fb3d64dd59daa93b0ccdd8a092b8344 gas/testsuite/gas/ppc/efs2.d
-8ec5202cb52a915df9b1a5c24bf9ed2f gas/testsuite/gas/ppc/vsx2.d
+13c5b4cb28f10b1120ef84982c4fd579 gas/testsuite/gas/ppc/vsx2.d
1af7c90e3bbbe344f72c9ba13ad8be12 gas/testsuite/gas/ppc/vec_mul.s
a8240bfed727928d2807049c9432de5c gas/testsuite/gas/ppc/xcoff-br16-2.s
44d86f3f3dbf083a5e2f8795bbc98fb2 gas/testsuite/gas/ppc/vle.s
@@ -9357,7 +9373,7 @@ a8240bfed727928d2807049c9432de5c gas/te
6708e9b702505d523b2a0f86841ed249 gas/testsuite/gas/ppc/spe2.s
3f42c228b5a1e4914eff729232eed634 gas/testsuite/gas/ppc/lsp-checks.s
3d767321b9e50d84dcbb59167e75c42e gas/testsuite/gas/ppc/vle-simple-4.d
-b7e6305d59445d34285002c1fb925093 gas/testsuite/gas/ppc/476.d
+dac171512e1b7b09c3b5bfc3b485e3f2 gas/testsuite/gas/ppc/476.d
3cd1bdcebfa5fd8add0e1fdd32106623 gas/testsuite/gas/ppc/power4.s
d710606b6763281691a79f7b1bae1486 gas/testsuite/gas/ppc/astest.d
ac5681bad739dbc93a0593b34dd4e884 gas/testsuite/gas/ppc/xcoff-dwsect-1.s
@@ -9368,7 +9384,7 @@ ac5681bad739dbc93a0593b34dd4e884 gas/te
b136c48de02880f92600e15502079cbd gas/testsuite/gas/ppc/range.l
12d6a1b05ea97886acb3e42bf2a7722f gas/testsuite/gas/ppc/bcyerr.l
b60a4ad89a80b60d95fc5d73ec5e02d9 gas/testsuite/gas/ppc/textalign-xcoff-001.s
-c4472739523abfd8dca34ff1d0e8de72 gas/testsuite/gas/ppc/int128.s
+3e3c0b135fd7904fedc2223410727651 gas/testsuite/gas/ppc/int128.s
61faf5b217455918b14b543f1d6d642f gas/testsuite/gas/ppc/e6500_nop.s
bf0744f167cd9419b967bc7f3e907638 gas/testsuite/gas/ppc/textalign-xcoff-001.d
46c07d63c1cbfab24da7d862cc56b1b7 gas/testsuite/gas/ppc/maskmanip.d
@@ -9383,7 +9399,7 @@ ec0623cb663732f36358fbfc76e174f9 gas/te
1144f1624f81b2bf57bc44af8e76f9bb gas/testsuite/gas/ppc/align.s
f7edad06d6721b1f05659701f3bfd5c5 gas/testsuite/gas/ppc/maskmanip.s
e5b68c5d62c9b873836ab2b5914a6bcb gas/testsuite/gas/ppc/bitmanip.d
-fea0246300d6d5a09f588eaea8534c5e gas/testsuite/gas/ppc/int128.d
+471634fc8d9be8f2b178282990d2bb31 gas/testsuite/gas/ppc/int128.d
bb9de98f6a7a3a2135831e275de417de gas/testsuite/gas/ppc/power10.d
d93ef7c4104ba26cf3552e3f315284cb gas/testsuite/gas/ppc/genpcv.s
b318f99332cc8875eeb2b1e63205efa4 gas/testsuite/gas/ppc/regnames.s
@@ -9391,8 +9407,10 @@ c0d53b6f5764c02ff1c15fcb01488c01 gas/te
dfff95bd30a9a013c984d1618468692d gas/testsuite/gas/ppc/e500.d
7329943f7950c2a637c220ef978a90f4 gas/testsuite/gas/ppc/vle-simple-6.s
db560f88366d3c0e44c52d438bf7fa47 gas/testsuite/gas/ppc/range64.s
+b6f38e4ea0a5e76403ad5708f0db43d4 gas/testsuite/gas/ppc/le_error.d
0ed23778cebfa8a0bbfb30ffc0a522ff gas/testsuite/gas/ppc/e500mc.d
73b242f9a893260498fb7ebfe95b29be gas/testsuite/gas/ppc/spe_ambiguous.d
+f65560134d74e4e2264944409292ffe0 gas/testsuite/gas/ppc/be.d
8a65cf6b0d6124cc27bf4f4a4fdddfe9 gas/testsuite/gas/ppc/vle-simple-2.s
b0f0a0f307149b00c01eb907197dd91e gas/testsuite/gas/ppc/textalign-xcoff-002.d
e2ca5089c4db50f97a3bec4e6f71854f gas/testsuite/gas/ppc/reloc.s
@@ -9401,7 +9419,7 @@ e2ca5089c4db50f97a3bec4e6f71854f gas/te
e0297246354a3c5ce5e78cf020659edb gas/testsuite/gas/ppc/astest2_64.d
c1e4082e3ac5809eacd7ed9c0ef739f8 gas/testsuite/gas/ppc/prefix-reloc.s
438fcd6b72fbbeb485cb651020c2873e gas/testsuite/gas/ppc/prefix-pcrel.s
-7b407eb0008f8c5883f3f3c92334e98b gas/testsuite/gas/ppc/a2.d
+5957957fc02e0b1856d0c033e8a836f0 gas/testsuite/gas/ppc/a2.d
5f6c3990213c5b7953ce091a7a2ca6b1 gas/testsuite/gas/ppc/vsx4.s
a7e80760d77bce51c54e0c9100d6e2b3 gas/testsuite/gas/ppc/astest2.d
e7de1e4b2ba2575938af0721d219d58e gas/testsuite/gas/ppc/titan.d
@@ -9423,12 +9441,12 @@ f65e14408c5f185e7d55e76590af9d56 gas/te
161bb49cf4496c607050a7ae2f80cf12 gas/testsuite/gas/ppc/bc.s
6b5dede6da756c49ce5fc9127d0a6510 gas/testsuite/gas/ppc/test1xcoff.asm
7feeec962fcd47d8b0e24a247be8c14e gas/testsuite/gas/ppc/vsx.s
-54ce172f5a61e420d427ee92a947be47 gas/testsuite/gas/ppc/xvtlsbb.d
+599156290ace623297010d5941f8fe72 gas/testsuite/gas/ppc/xvtlsbb.d
2e4afc4cb29128299e92bcd08687553c gas/testsuite/gas/ppc/vle-simple-4.s
-76cfad5d841232730b8429d465c68a46 gas/testsuite/gas/ppc/ppc.exp
+1548284e219a5badd6cf5740cfdb9f60 gas/testsuite/gas/ppc/ppc.exp
c2ca34845ded1c005f7a23bc5aa5af11 gas/testsuite/gas/ppc/misalign.d
da0fa7d28b8702829b77b9f2faf2e244 gas/testsuite/gas/ppc/bcat.d
-53da3a66b6eaa223b5cea2f9df2234ea gas/testsuite/gas/ppc/power9.s
+bfe96f13f18c73d629f885f45051b4c6 gas/testsuite/gas/ppc/power9.s
d93ead8a31f67112e4f73830342273d0 gas/testsuite/gas/ppc/htm.d
c8557b4b40ce9690c81d77b9502a959c gas/testsuite/gas/vax/flonum.d
b5281ff49f97d0836ede49ab60f0b84e gas/testsuite/gas/vax/quad_elf.s
@@ -10781,6 +10799,7 @@ ff20d70ac9dd37fdad40fb2f511300f4 gas/te
bed48359d27d45c02fd03907deeb7917 gas/testsuite/gas/arm/sp-pc-validations-bad-t.s
08bc39a3a53206754122135bacf2e2a4 gas/testsuite/gas/arm/mve-vqdmull.d
4cbd6120461f4c5f0788a1dfc11fac84 gas/testsuite/gas/arm/note-march-armv2.d
+1c186abc3c4c2fc35c0a8dfdd1757bb6 gas/testsuite/gas/arm/mve-vldr-vstr-bad.d
458a135955b2a3b6c22d94df307154ef gas/testsuite/gas/arm/armv8_1-m-bf-rel.s
4802575d22ba6a0f11af97d729d13487 gas/testsuite/gas/arm/blx-bl-convert.s
adcf406e5288a7ea8ddefee188e2343c gas/testsuite/gas/arm/mve-veor-bad.s
@@ -10844,6 +10863,7 @@ ea584b89abc24ada51ced872f90af05d gas/te
b7bd6720c516ae3ad3d789ea7af8244c gas/testsuite/gas/arm/mve-vadc-bad.d
9a6fa12ed030e85078ea708f978159f9 gas/testsuite/gas/arm/unpredictable.s
ad99c92d4dece22ad25a32f0f1f78fa1 gas/testsuite/gas/arm/mve-vddup-bad.l
+13e4a1f131aab9a9789f32f62944f986 gas/testsuite/gas/arm/mve-vldr-vstr-bad.s
edb7b00d5f6bfe8c12de50b7e54ed2d8 gas/testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s
7f02fa55199751240e558106e3659881 gas/testsuite/gas/arm/armv8_1-m-bf-bad.d
dd529d795ccef177d56651b92a514165 gas/testsuite/gas/arm/v8_1m-mve.d
@@ -11483,6 +11503,7 @@ ff2a7bf25ee0dc8c82fe6c5d6d001e15 gas/te
4d1fd8cc3c1c026563f41c1d14199e96 gas/testsuite/gas/arm/cmdline-bad-arch.d
0306eb195176f01ae8e183426f85b11d gas/testsuite/gas/arm/mve-vmov-bad-1.l
c3ebfa86cf715a1440fd370d210fcdb6 gas/testsuite/gas/arm/mve-vqdmull-bad.d
+d019098133c23d4f6a3da7a1890d499d gas/testsuite/gas/arm/pr26858.d
f1cc7be0aaea8f6d7926b4288d9e96cc gas/testsuite/gas/arm/arm.exp
6b640bf52ba879d867c7f18dcd1c22c6 gas/testsuite/gas/arm/armv8-ar-barrier.s
793e9588d044f6b38d86fff098dbccc6 gas/testsuite/gas/arm/ld-sp-warn.s
@@ -11703,6 +11724,7 @@ bef0f733aa2ebe8d5a78972bdbdb723e gas/te
f3efd02f5baeafb3c041bb8684fb0bd0 gas/testsuite/gas/arm/dfb.s
171e9e4bfd5e7cf6437e63599624fc94 gas/testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d
417be5ca4ee7c570e34e4490873e7b75 gas/testsuite/gas/arm/armv1.l
+5ec0006616858a1e3be7c5d859b925de gas/testsuite/gas/arm/mve-vldr-vstr-bad.l
862c3087383dfd4279783ebaaf220e93 gas/testsuite/gas/arm/vldconst.d
7952a043afb3f072d57fb4c26aad77a3 gas/testsuite/gas/arm/branch-reloc.d
fad17d80b95ff5a7d784d1ce0231ed5b gas/testsuite/gas/arm/neon-vmov-bad.l
@@ -12056,6 +12078,7 @@ ba904cc4640eadf5581acf7b64f2df16 gas/te
a1e53a73c778b85b8c56e3dc205ccc23 gas/testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.d
42cf9770de566b73176f044a10e1521c gas/testsuite/gas/arm/cpu-arm1136j-s.d
dd53426f8d834ee1a0c2be239141cfca gas/testsuite/gas/arm/mve-vqshl-bad.d
+3053aeb16e3fe5bc085066fd325816bd gas/testsuite/gas/arm/pr26858.s
8d63a3ff50c169a10cb14fea3bb20088 gas/testsuite/gas/arm/undefined-insn.s
6c90d9bd654e7acf70a4479f8ac7d82a gas/testsuite/gas/arm/cpu-fa606te.d
a24e1db08e35323e4bc5c9f3b2865dea gas/testsuite/gas/arm/tcompat2.s
@@ -13130,7 +13153,7 @@ d2da9287ff389ddf7925fae5e8ce27a3 gas/Ch
96aeb2d8b75822cf073f3c5747f54b0a gas/configure.ac
ea5e0357485632eeb3ed046b0d43c68d gas/itbl-ops.h
bc77badd5219273bbe54e73f10e35400 gas/listing.h
-4efef7a3f8d453bf8ec7175deeb09110 gas/m68k-parse.c
+f84a8a6b03bf72eb1275fe1cec45cfa5 gas/m68k-parse.c
83f85888224d3ff05784d76897e6ade7 gas/messages.c
5f6e59f87d8f74e748eabdb6d41b1647 gas/stabs.c
b3996e5678ccd04d817d5b75c674eb04 gas/cond.c
@@ -13147,7 +13170,7 @@ ead5745a0de496fe2b2835747e689917 gas/Ch
1bb1ccb94b60500cd1f32f15ecaf0e6d gas/as.c
0e664d128aae523c5421c50225dab762 gas/bit_fix.h
5629611ddb1156ac050bbc4117501313 gas/flonum-mult.c
-cf5ff98b5d1ce42b43b8254d10c3e4ab gas/bfin-parse.h
+c37a9c59d771ce8b5b6e757e7d0257da gas/bfin-parse.h
e8e68950f71bc0e526e8f4762b537ff4 gas/NEWS
907b9d83a9667721523820381274ea03 gas/ChangeLog-2015
fb89cbded3fff625ab1895a25837eb15 gas/emul-target.h
@@ -13181,7 +13204,7 @@ f9b8adfb280a7acafe14682f50c27adf gold/s
4b96a6e447e978333ba63cbd35793090 gold/fileread.h
022b5df30a36069791e66d9c3ee75576 gold/mips.cc
bc423ceb8189fdb0d9fbd25fba6deefe gold/pread.c
-b4bbbc686fb86949932861a8f53d7b9e gold/options.cc
+be15b99870c6f76c1d2705780afbc697 gold/options.cc
687b4f50d831982e9168afde2b226cf9 gold/aarch64-reloc-property.h
b1806a63703e0e1ded5331ffde4f4e19 gold/arm-reloc.def
7ea9beb08e66b1e4e6cab34399dfdafb gold/icf.cc
@@ -13191,14 +13214,14 @@ b1806a63703e0e1ded5331ffde4f4e19 gold/a
35ce5d6377add5949a963d54ca2ee077 gold/arm.cc
0ed4af443cc3297ba90e4e2e7a531b85 gold/gdb-index.h
b63295b182d85cff6625726fd282f7e6 gold/dirsearch.h
-7bc4f9d5689a90913e4d63e931e612e2 gold/options.h
+a4ec070942fd8e45d2e8e9481c8e1394 gold/options.h
647328fccd7df5d94c2f3a08c48c2b6b gold/compressed_output.h
cee0fbfc208667c2f1020c73134c587f gold/x86_64.cc
aa22d0f4dc5b700c249dd8ad14e0664a gold/incremental.h
371ffcb42025c80b18253879f4189a4e gold/mapfile.cc
48049fe668574d3b760b8eed9cd7c725 gold/dwp.cc
063f80321eb6b4c65dc5073112a1abe2 gold/ChangeLog-0815
-0f3e31cf4eb8beebe9c45fccba7e7267 gold/powerpc.cc
+7d06272388820171230a3ba54d38f69f gold/powerpc.cc
3f61a21ae36638c8adf41746fc7a49eb gold/workqueue.h
e67713fb66e1d7065ef9a192c0d70904 gold/gc.h
45ad5da123022485960036d3a8e0562c gold/nacl.h
@@ -13220,15 +13243,15 @@ bf9c2a5d89c8c65382368d82256acaed gold/f
aad8134151e7137b5af3dd49d5778b1c gold/Makefile.in
5ce5d04b68f324c1d41eb701ef517508 gold/parameters.cc
34fa2b213f0d6403136b11c9a5c06bac gold/i386.cc
-4caa5b4fb233fa75e4f6cd45e8be791d gold/yyscript.h
+da5e83df8214199fa7c301235b1ac29d gold/yyscript.h
62bbe5d503c021e5bae60c7eb61e5878 gold/target.cc
eac12c65de47d947eaec16d8972406f4 gold/gold.h
83a8cba0fa4dee23cdc783b66e65f386 gold/mapfile.h
e6357d99ab0c570431cba4a3d5e4ed2d gold/stringpool.h
8e853071287e2227d57ed20206c61496 gold/copy-relocs.cc
fa7ac7f00083c7cccb97fd2f5d2ed455 gold/workqueue-threads.cc
-5052fbaba23dfd1c1f83978b81e7bc7a gold/ChangeLog
-50b3eaf655560434e9fb301178645bcf gold/yyscript.c
+79f4aa68e5eedb0a07190ab7ededf399 gold/ChangeLog
+a773f5b144c3aef68601ea6b67307405 gold/yyscript.c
5c27d571b668ad803e9e1be03d01904b gold/dwp.h
5d269143f00027b391169994aa0b677e gold/symtab.h
9dc53739bd66ed923d6aab774d2fbf9b gold/TODO
@@ -13242,38 +13265,38 @@ a128cfb27a065a87e02e96c5fcca5324 gold/C
96f022780963cba6da2dca0aee202b2d gold/binary.h
f2462e94cc1dec36ddd59f05c380fe1c gold/stringpool.cc
e989edd63f9e7cb246233b264a80887d gold/config.in
-7caa1cb215303330997d83e8d7dd464e gold/po/ja.gmo
+1fdfc810c544574fbfe9dcc95f5e7204 gold/po/ja.gmo
bd42e9b55c2352fd78441fe16eef7871 gold/po/uk.po
49ada08dbd886463c71c01338fd6dae0 gold/po/it.po
5456eeb720ff2c91aee9243f353ba96a gold/po/gold.pot
-6da942574248c13add15e0dc0b84eb49 gold/po/sr.gmo
+71db7fb3a0efb8aaf98e0b6390da5d28 gold/po/sr.gmo
b78d13fcefd3959c229ba45a446f61b0 gold/po/Make-in
97d8cd453d0e9878496499858df8674b gold/po/id.po
-bb186492d4980540e6d9955a7666baba gold/po/sv.gmo
+7005570f1219828dc93110a02c3beba0 gold/po/sv.gmo
639260651103ab96fe17c977acb491ee gold/po/fr.po
c55f24f55da269f77d645a7ecb8226b5 gold/po/fi.po
-476032255aa6ed22dd49b9db83a020bc gold/po/fr.gmo
+a44c84cc459d39b1840b6bbd37e9305e gold/po/fr.gmo
d86ff23f552c6fe827b482e094dceaa9 gold/po/POTFILES.in
-b0f67df1e570fc263860a402a901d4a0 gold/po/es.gmo
+198a6344577f0bb46a47259ef5e56c29 gold/po/es.gmo
440ecab1a803bf97b8f99f3922de54dd gold/po/es.po
5b73941887e846f5caf725189b985794 gold/po/zh_CN.po
c9636d3647ca30cf06b642fefa8ba716 gold/po/sv.po
e0826941edfa9073335731b5c2e409e5 gold/po/vi.po
-be90bbff90417e9ea89b48c51aaf5e71 gold/po/zh_CN.gmo
-8076141e94ebf4c8e3b9b3665b56eec7 gold/po/it.gmo
-6ef1d0383d66682b64918fa7c20861f2 gold/po/vi.gmo
+29fca2c6253b7330624581528d0d24fa gold/po/zh_CN.gmo
+2d5102c03ddded24b06177b079bcf5d0 gold/po/it.gmo
+2d7c5731e14a902a1b8962b0628eb748 gold/po/vi.gmo
ea2eafb4246eccbaeed2799b24bd3762 gold/po/ja.po
81fb0ae0c0b2f295343089f67f8f16ac gold/po/sr.po
-fd0eca34c8b979145ccd744c6e2b1baa gold/po/id.gmo
-14a814242cd5cccf5c0e2a1617b08cba gold/po/fi.gmo
-ed720d8dff79e365c556ab7a41f80c97 gold/po/uk.gmo
+8275f3d8d0495abc013e0f4c47431894 gold/po/id.gmo
+b4cfa27f36c898309ba1fd5aa3e25a63 gold/po/fi.gmo
+5b9611e097c66fde6bb5f5af36b1f3f2 gold/po/uk.gmo
97278cdbf3a9d3b73d4405ef6f09cbc3 gold/cref.h
ffb161f6d3f66b60d6a2f3db4578c5a1 gold/attributes.cc
dc38e31f8d88dfc101820a59c8d7d890 gold/layout.cc
017fb7cd2c991fac27cb5f660ecc55f5 gold/configure.tgt
f92a0f3ada9f5c478c36b4ec41393113 gold/reloc-types.h
e59a6183c5fcd6a58b46d99d06859f4c gold/script.h
-a35203649465fdf3df2055fcdd23d28f gold/testsuite/split_x86_64.sh
+cb2d821ac04edf190898546f1ee7a7c9 gold/testsuite/split_x86_64.sh
eab49865278f511552f0937bfd8752b0 gold/testsuite/arm_cortex_a8_b_cond.s
c1529212f95bddb1d49c13967b3605cf gold/testsuite/weak_alias_test_main.cc
3016ab93f6a91dd14af2164659bc198f gold/testsuite/script_test_1.t
@@ -13314,7 +13337,7 @@ db6ee45d78f8e4e03f54bcfa642978a0 gold/t
6186ea5b9bdeb2dde93a89311b848203 gold/testsuite/split_s390.sh
1e64070e2a03e450213a3dde2692ef39 gold/testsuite/gc_orphan_section_test.sh
29e2697b11c48991cbbbbc2440147ad9 gold/testsuite/icf_safe_so_test.cc
-fb5c262d251a38aafc89119e7c031ffe gold/testsuite/split_i386.sh
+e9f098ea17fc505e60f36ccc25f8eca4 gold/testsuite/split_i386.sh
70d904019b7a25eac9ce02562f3bfe17 gold/testsuite/weak_as_needed_b.script
106a34f5aa9382bf39908c3f72b18d01 gold/testsuite/script_test_7.sh
ed57a00ebd236a5950828bca1783b4cc gold/testsuite/hidden_test_main.c
@@ -13383,7 +13406,7 @@ f67205103ab4ed24d22d1ee8600ab7a8 gold/t
6a081b688f9360785480f965512cf5cc gold/testsuite/script_test_8.sh
bb4f90d0b4ff3ed5e0226ebeb1d5dc41 gold/testsuite/ver_test_1.cc
9876c7b2d3fccec100015214263805d6 gold/testsuite/protected_main_1.cc
-afab896b2a212be04ef9aba3c4c9449f gold/testsuite/split_x32.sh
+0d9cbe592aa40d4a79179e16a37a5f5a gold/testsuite/split_x32.sh
089f214ad380a2bb8129f66bce4811a2 gold/testsuite/plugin_common_test_1.c
ebf9914c2f7f2894a253c3c365748770 gold/testsuite/x86_64_indirect_call_to_direct1.s
d28eabe2127dbba804c187d6835fa6d5 gold/testsuite/arm_target_lazy_init.s
@@ -13914,55 +13937,55 @@ b0ae07c1305af47e096e94800f8d49d1 gprof/
b167dc5dcf583c07feecea0f8003e647 gprof/.gdbinit
10619ec279c9e89fbde46536f3431e54 gprof/ChangeLog-2016
abe9186aa2b65b000546c8158085dda8 gprof/MAINTAINERS
-779ef571ddbcd8e5203ca03b7160013c gprof/po/ja.gmo
+38faa7b68d8893deb39574fe8280bdde gprof/po/ja.gmo
d324bc814fd81a744f853d48ca2f8807 gprof/po/rw.po
a418c1f1cd1c4f34e09e68cdea0682a5 gprof/po/uk.po
-696810b20eadba501b58d410ebb22df5 gprof/po/hu.gmo
+85dcca740a79b0b2d635312f6ca5c915 gprof/po/hu.gmo
8681cd7c4b7c6286d94c4f59bb1283d7 gprof/po/it.po
-bcf6e9be091142d13e4d3c15a81e058f gprof/po/sr.gmo
+aa740577a92919cd8a3beba2fe596e78 gprof/po/sr.gmo
a803c87910084bd31a2ff2d5a1713d64 gprof/po/ga.po
-d0e2ae336c6989276b35ee8c4c712b94 gprof/po/de.gmo
+42744678bb0f1633ddc257ac424e8937 gprof/po/de.gmo
073f4d03d9533fb204101adc3da53055 gprof/po/gprof.pot
3200b107137800779c99ef43efe89299 gprof/po/ru.po
-47cc1e53113f8257863e47fdc5b30386 gprof/po/nl.gmo
+c989cd7c316f6036b6fe1884ac790809 gprof/po/nl.gmo
76a3843b3608ac0340556b64abdb7c12 gprof/po/Make-in
bd6b67a82f39671135e22d6b82af9b92 gprof/po/id.po
-a6291e224a38571aa90c4c094842e80b gprof/po/sv.gmo
+1de73cd51f5c85f383a196043f2555bf gprof/po/sv.gmo
6fd4220f5559ef54bd65740dbaf027b4 gprof/po/ms.po
c35bc1d7a1a56abfb6a2319930948b93 gprof/po/fr.po
48d7f2e1a249fbed35a60d20a0d6bdd2 gprof/po/fi.po
-2b87c1764ec1b58eb944b222ba52e9a4 gprof/po/da.gmo
-3ffc0700fc323f64fa8388e6bb2d5ab0 gprof/po/ro.gmo
+37ad193eafc61b534e91b1fca1c58f13 gprof/po/da.gmo
+7067294c3f05a0c8863c12e55c14b6c6 gprof/po/ro.gmo
9adf99ac0f499cd27ce0a09092542aa1 gprof/po/eo.po
9cc0cd02def71f5e6ef2945c0fdb5d2d gprof/po/pt_BR.po
a52935eb8e1e266d36fbf5db73269510 gprof/po/de.po
-6de65c9491f6ff746010b4ce8bca6fa5 gprof/po/fr.gmo
+a3abd851ac7f132ac19f7c4f6e39e85c gprof/po/fr.gmo
ff9ad8b646b729cd31973c88491601d3 gprof/po/POTFILES.in
-faabeb1347fa5ecabd42b782555fd64b gprof/po/es.gmo
+7dd110af00a945c0d7f9d88bf15b1f3a gprof/po/es.gmo
158d2b631f9135e470167dfc1657f4b2 gprof/po/nl.po
ab0c92d1e477f4bc4626d7acb175af4d gprof/po/tr.po
-35a0e0044d0163d108f773f3c4073b29 gprof/po/ga.gmo
+9c032753b1c72281437a22234a7535d0 gprof/po/ga.gmo
93c0dba80444cad97217f531b8c5128b gprof/po/es.po
-bbde5be6e86cd0bf3314a1ad9f9e007f gprof/po/ms.gmo
-396f10f2b25e447de4461644e28d2303 gprof/po/ru.gmo
+cdecd7e02d2cf6fd3f92ad96bc7f4556 gprof/po/ms.gmo
+b9495a2ba103e7168f8eba42d86d3173 gprof/po/ru.gmo
33b09ef08160aef7145f0e81c508b5a9 gprof/po/sv.po
-cf06bbad904fef556c0f56e5c937c80f gprof/po/bg.gmo
+aa2c1f2f3a7f53640b1ff634f0debd3c gprof/po/bg.gmo
64b52a63f7385f504f5450407366b816 gprof/po/ro.po
9f800bb7aceaae09bddf270ae4effd11 gprof/po/vi.po
-eab385bedc0e7b3e407ce6bf88f513c6 gprof/po/tr.gmo
+9848a4ccec5c474a73e46094c48fbce9 gprof/po/tr.gmo
1b89a8120a0b39b02e8ecf8d8d016495 gprof/po/hu.po
0810a10420813c84f28cccc3237cde38 gprof/po/da.po
-5b9214ada7105c4c6ea33f1a74578ea6 gprof/po/it.gmo
-f57af95b75e5f852d97fd5d30896e44b gprof/po/vi.gmo
-a31b942d64a13c261af290be03e40a60 gprof/po/pt_BR.gmo
+4d51d5415442587064587da37f3de0ab gprof/po/it.gmo
+8e8e2c4c30e1ae5dbf68c8bd6860ae6f gprof/po/vi.gmo
+4b1bfec4264e352513a88073af8a2830 gprof/po/pt_BR.gmo
70aa3573bf03d4ec58c45b966e7c1a00 gprof/po/bg.po
1e0c699b16bf864298283191829e7aca gprof/po/ja.po
917f1270a68e00ff104adec000e4c1c0 gprof/po/sr.po
-3c60a40abe1663bc8577f7151c3bca6f gprof/po/eo.gmo
-bb33db615cee1741b18687c034874c6a gprof/po/id.gmo
-673bbd828790810dd775f6a08ac7aa6d gprof/po/fi.gmo
-6caef4d7466f584c8a1833f08dda3a5d gprof/po/rw.gmo
-691984b24c4d9880ebcccece1a1928e4 gprof/po/uk.gmo
+9ffe0fa30893d51ae23531da62da2a32 gprof/po/eo.gmo
+843c3d9276c55352d0f9bb835dca0f36 gprof/po/id.gmo
+71e5789d191525d9de45dcf38878516f gprof/po/fi.gmo
+cf26513cb17c498da2b2598c200a8d3e gprof/po/rw.gmo
+2990b7640e7e23817753263a424fafb9 gprof/po/uk.gmo
980f47afbec5cac62db09df93b4ab6f3 gprof/cg_print.h
490841b632df4cec81bed7991bb4b000 gprof/cg_dfn.h
b9244f926c41795d3ee901d0a7ff783f gprof/flat_bl.c
@@ -13978,7 +14001,7 @@ f6a3f0884b4107faf0b7000f6236e4db gprof/
e7283b10d84f049416abdf4da00e4783 gprof/bbconv.pl
7d36670d64d7d95b8a9394f0025afcb1 gprof/ChangeLog-9203
29b40bd7500168d526bc25ec5223a027 gprof/hist.h
-2ae96cc39d6dd66ca71eb87e640d8faa gprof/gprof.info
+c1b9cc589e9289e94d63be844a7aa0e0 gprof/gprof.info
1ded054093de910d9786c62bc4fe8cc6 gprof/stamp-h.in
970d15eb993afcb69d0fddcbc6f90ca6 gprof/basic_blocks.c
7aade8a3440bb525f96e103158aa0ccd gprof/README
@@ -13991,7 +14014,7 @@ d77c6e9f87800c3a154de2eedaa81b73 gprof/
fdcc8f993702b54ca52dce4953a60655 gprof/cg_arcs.c
48d48d193408b10c5927a6b85911690a gprof/ChangeLog-2018
8aac881f089c8822f5b6e28a86039aca gprof/ChangeLog-2010
-dccc080520376f9493fda2b87c2f9cec gprof/gprof.1
+8abdd85ecd171924d116c52b2973766f gprof/gprof.1
35f9a3e59f13953e67adb299ce102e99 gprof/ChangeLog-2015
a1584a3c9028aacd13ba40bc4f7b03a3 gprof/utils.h
745ff1b458c66a2bdcc3d275761355c9 gprof/config.texi
@@ -14118,7 +14141,7 @@ ebea4fe7aa69a6072cacebe4e6575024 includ
a126860582100dd97b0464c8382b6f36 include/som/reloc.h
c8de48c3d7a8de69489757d4a947bb9e include/som/ChangeLog-1015
dcb1773a033208d8841e7aeb934766f1 include/timeval-utils.h
-0e084a502d5e186cb4f3941f7fadd350 include/dwarf2.h
+2e53eb7cf97414eaada073f148118b5b include/dwarf2.h
62073819d982d28def6d77eaf8875e99 include/leb128.h
ce77417f7a6b815c8b1fd23964e17ea3 include/aout/hppa.h
d0265b9508ff19ed532ad141a490e877 include/aout/hp.h
@@ -14132,7 +14155,7 @@ d648b1263fe90f97b6f56398612f81e5 includ
8d8aa9eeec25b25da4bfafcc670162b3 include/aout/ChangeLog-9115
b21cf2ec557184abd01d41430bf27416 include/aout/stab.def
d32239bcb673463ab874e80d47fae504 include/COPYING3
-b05cfda2c49e29a91fad150f68d53b32 include/ChangeLog
+9956b5428ecd1cd3eed3befcb5badf68 include/ChangeLog
f0cdd5fb48621662ecc1681d6fc43ab9 include/dis-asm.h
bbcb9f48c2a005e0ae11abf31e419627 include/hp-symtab.h
41879305404d3b06773b10ab3fa44539 include/ChangeLog-9103
@@ -14213,7 +14236,7 @@ f930341d18cd2a1f436f172e816e833e includ
b9071821fd18dce5b86816d8eae210b5 include/gdb/sim-sh.h
a50c053cf83562cdd0f22ec5090f3f22 include/gdb/callback.h
bc5050da821be6e9ab7fd0731dc9cfdd include/gdb/sim-aarch64.h
-4edf065770486b1b7a5d19a727fb9483 include/dwarf2.def
+d7e15a47bb20b43ff9781a375d19450e include/dwarf2.def
50e100c98a7470f850101e4e6430496b include/sha1.h
9ed0881b1f6e0779c56e231138e18869 include/cgen/basic-ops.h
fe90cf258655934a38ca1b2356c3bad8 include/cgen/bitset.h
@@ -14423,7 +14446,7 @@ fc53ffc3e25b9391b452e238dda80f53 ld/emu
9fec4f088a9658fa3daaa8b16c0dabe9 ld/emultempl/elf-x86.em
25d18fdb63ffcad410d0380aecf0b61d ld/emultempl/README
1c5d0b42defa7b7840d04583ad5e5f40 ld/emultempl/spuelf.em
-2c70898692270594aa9ea25779b591eb ld/emultempl/ppc64elf.em
+c8a63d6a74cd0516bc769472cb43f86b ld/emultempl/ppc64elf.em
6de549c407c5de84c6bacda8f60f59fa ld/emultempl/riscvelf.em
c9f25408ae67ee31b42e684d940f1416 ld/emultempl/ticoff.em
e28937827a75cbecfa8a403a99b09061 ld/emultempl/elf-generic.em
@@ -14456,7 +14479,7 @@ e2db490aaf4ab5bd273fbdf607ca70f3 ld/pep
b4ea35b18cd631b1a84c4d66b5fbf17f ld/ChangeLog-0001
1af0967e3955a6689b9ae9469e89054e ld/ldexp.h
21738d1e57a5141cbdacebdd917d2a86 ld/testplug4.c
-e68df390bafe8a495d072ab1e0dfa40e ld/ldgram.h
+1a77dc1c48e901c0a011104265b20ad5 ld/ldgram.h
cb83c58e2db10afdd1e6f57b2ab02d1a ld/ChangeLog-0203
52e0360f28b8ea9eb88d512c6c106c43 ld/ld.h
3556a9e9c8d12c48a4fdb5f867351624 ld/ldmisc.h
@@ -14470,13 +14493,13 @@ dc2b83e6245120a4c1608e939b4a99b5 ld/ldv
67fe5cbb43d1eaf0acf2b0b0f51a64a2 ld/lexsup.c
f264e32e04e4052058edc449dc29b054 ld/configure
dc2d5ed03d6fffab2a51a0a756205881 ld/ChangeLog-2011
-34fd25381295478e92bc5100e9ed2999 ld/ldgram.c
+5c7d00a4ca5d8f095fd7c1bfd5c0c5cf ld/ldgram.c
ac84674bd3ec2f716f04644b72ceb568 ld/ChangeLog-2009
ab0fe311032294b952da80585b8b90e7 ld/fdl.texi
f4be0f01d8cb3cf02227a654acea1f26 ld/aclocal.m4
c9b12ed202af750ca8d9fa48b6efa963 ld/ldmain.c
ecd5454c7242d9f083003a2ca244d1c9 ld/deffile.h
-074bcbfc05b9f2cfbd5ae95312f07c0e ld/ld.1
+432ab2db12389f6aac0fee1594181987 ld/ld.1
537064eef449bf7b709d0656d3b2df9d ld/ChangeLog-2017
59217f22ee78753701ad3d51e4e0b0e2 ld/ChangeLog-9899
d743da872ddb6a4cc1cd5c367f2f8dfd ld/ldmisc.c
@@ -14484,12 +14507,12 @@ d743da872ddb6a4cc1cd5c367f2f8dfd ld/ldm
af4a32e889f1c8ef6388777faf504de0 ld/genscrba.sh
8601875cbc504132fbc86f9812be3b40 ld/ldbuildid.h
5879a97d6b285d29ef28381666db90ac ld/pe-dll.h
-d6fa19d36248f9b0e8421c997ff4f947 ld/deffilep.h
+2fcbecca64e2a16bdf6615bbcc9cad58 ld/deffilep.h
f37482f68e67b8c53e30ee5bb7d80788 ld/ChangeLog-2014
-48a3ac95a93ebfd9f29e142c901fd0e8 ld/ChangeLog
+afdeda11de64c40857a14e0aee419c10 ld/ChangeLog
2dcdec47a460e0200552a6bf23015dd7 ld/ChangeLog-2007
01627b664c7e61ab5dc202bb72913e0a ld/TODO
-9af086f12c0785a11d1c23b14446f176 ld/deffilep.c
+8d0b2fb6054ee621b3ffe5d0e3caa72c ld/deffilep.c
da73aad6396daa6072d443c12133ee0f ld/.gitignore
88fd2f9d01dc19f269bdca34b78bf190 ld/testplug2.c
11ae42f92445895faaf3bab1643dd7e7 ld/ldwrite.h
@@ -14497,48 +14520,48 @@ da73aad6396daa6072d443c12133ee0f ld/.gi
905b76ac557237a098d3beabacfa490a ld/config.in
4f683b032796acd7247220b18f5242e9 ld/MAINTAINERS
d97ae0b64bf61d279650e5d324318a43 ld/ldelf.h
-5649404d409e55103d6d836ffb213115 ld/po/ja.gmo
+709d4f1c430222fbe110d5942e885434 ld/po/ja.gmo
47f3bb6752a2360e505e16799a15d617 ld/po/uk.po
ddca831708ab614c176c407295dc8718 ld/po/it.po
-565e862b6e9490da903f4f0327bfb9f0 ld/po/sr.gmo
+697a6d7ea7641c9068a78c3b7b3b3498 ld/po/sr.gmo
76808e90c50bdc960355a5bbc633ece2 ld/po/ga.po
-019f1e5a823132b2fec968cfeb25d085 ld/po/de.gmo
+3ea8949fae591e0dfdf1c9def503d94e ld/po/de.gmo
f0a2305fde45fbb7b6f004acb65c2100 ld/po/ru.po
aabbcad997cb1b62c235ee3f466e0d71 ld/po/Make-in
dddaf916d4d6771dccb1772ea72967bb ld/po/id.po
-650e58538722b296856df53d3fb23a19 ld/po/sv.gmo
+f80448ca6933ffca08d242c3fa669981 ld/po/sv.gmo
13e72f9d834478e398b471127c09b00d ld/po/ld.pot
c7b081a67214b64486622241dd1b6a57 ld/po/fr.po
501023066526f511b03befadedc08b5d ld/po/zh_TW.po
5157da0b4e36c8f075d80ad612e14dc8 ld/po/fi.po
-0a64b6be22df8da37be3722774a71346 ld/po/da.gmo
+24dd69962bb95d4a9d01f5358fa84243 ld/po/da.gmo
033252866ebc10891863f09dfc23fa76 ld/po/pt_BR.po
-70711e4f28756861f3e3d101fad56600 ld/po/zh_TW.gmo
+1b3f92ab8b2874975229f20649f30cf1 ld/po/zh_TW.gmo
ecb903c9a332f2bdc20d610db9cfeada ld/po/de.po
-efe129845d74f7f7bc7f80cf9f929b90 ld/po/fr.gmo
-e1ffb00e86307abbfb35064f3ae7c1ad ld/po/es.gmo
+38a2d114fcb6455da8c93e46c9388413 ld/po/fr.gmo
+e0e6846c6a0416373f739507bf351857 ld/po/es.gmo
a1cea3aa157d181980cc5287929ca373 ld/po/SRC-POTFILES.in
fda23c07cd84833d38f85a52205b33b7 ld/po/BLD-POTFILES.in
d0ed07ceae7d5a1e24bffab138e8d87a ld/po/tr.po
-9de2b7e7eaba20a2b22c91d744471b6f ld/po/ga.gmo
+914b2898e7d4852dd89a3b71b5b81447 ld/po/ga.gmo
d9378bebd2aae3886d6839160d5f9577 ld/po/es.po
-0ebc6082fffb2cbaa16febfc87b900e6 ld/po/ru.gmo
+d0a0256c00bb399c4dc09b32ba8f0128 ld/po/ru.gmo
3f0fa64944eb91e2d39dd38ae994c42f ld/po/zh_CN.po
7c3f31a2afdf691579d5d39976003255 ld/po/sv.po
-cc3f55ac9ab50ebcbbc6c6f0ef85493d ld/po/bg.gmo
+e91eee9703c0c11948d00ab4f1d62468 ld/po/bg.gmo
2f16bbd03d864146d2321b16d44fddbe ld/po/vi.po
-1d546d1e27523b1a55b7580d52298318 ld/po/zh_CN.gmo
-50a49653b96224aedd90221e3e4e4e15 ld/po/tr.gmo
+3e5ea929744545acf0f450f475202725 ld/po/zh_CN.gmo
+f2622efad02dc94f994f32a06b16d1c6 ld/po/tr.gmo
8fbbfc6b92c235533090fe4362886399 ld/po/da.po
-dad5bd1e12674d48e178450acc3a53f0 ld/po/it.gmo
-fdd8f03c99edc24c71425bc8715f4beb ld/po/vi.gmo
-3b116ecf44fbf8036e03614379fec8b3 ld/po/pt_BR.gmo
+0cbdcb4959ed849025b12112c911a2c0 ld/po/it.gmo
+141a3a9bed0942909494ae67451c7b9a ld/po/vi.gmo
+811ae3079bdff37f65066a9cf04659a5 ld/po/pt_BR.gmo
1f01c37f49fe8232eac6d7cba69f5dfb ld/po/bg.po
a846e092e1949919866df2fc7aa70974 ld/po/ja.po
2f082e5fdc803a56cd35b60cfb21c099 ld/po/sr.po
-45227c4dcdf41fe389236ea8bf2dcb72 ld/po/id.gmo
-c5d2e1d5c16ace5e9a0f1af13c71e6d1 ld/po/fi.gmo
-2a71d67ac6ab1ed499f1ca820f226552 ld/po/uk.gmo
+c5169d44264f466f2b3669991da73b0e ld/po/id.gmo
+32f1e2f33b5c08a3ef7fd10e91f47950 ld/po/fi.gmo
+a2a1deb94ba5aa7b65067573fc973f78 ld/po/uk.gmo
18912267e9bd292f80b832e33b6d66ec ld/sysdep.h
1903f8caa7e43619ea9a1da5caae262b ld/configure.tgt
3f7d50c17851cfe9950e7800985afc09 ld/ldwrite.c
@@ -17859,7 +17882,7 @@ d9665b4d01878353ed82a9a9f65bd4d6 ld/tes
fdaf994b2d3ebcedc72a9af413b8fc00 ld/testsuite/ld-powerpc/tlsdesc.s
3857919e47dd829ed09d10b7e95ebd0f ld/testsuite/ld-powerpc/ppc476-shared.lnk
eae90335b934883174ffcb7075304fe0 ld/testsuite/ld-powerpc/tlsexe32no.d
-2221887e28dfb6f2b9d32e24b4a40ce1 ld/testsuite/ld-powerpc/tlsopt5.d
+d473889dee716533f4d6d719945d7d11 ld/testsuite/ld-powerpc/tlsopt5.d
a352b6b7bbeb8ffbfa429512fa97f22d ld/testsuite/ld-powerpc/tlstocso.t
b33f85b9adcc3beb02ccd352c9763e79 ld/testsuite/ld-powerpc/tlsso32.t
183c6381d996d5542d6460c80e0342a8 ld/testsuite/ld-powerpc/tlsno.d
@@ -17887,7 +17910,7 @@ fb7e959e27d0729bfa5e91a3d4c082a7 ld/tes
ccae0b5ade0f69de00e983cb7e34a762 ld/testsuite/ld-powerpc/tlstocso.g
519a83f6661f4e92b4f1cd2404e97f90 ld/testsuite/ld-powerpc/apuinfo-nul.s
a45bfbc7ed40f4d7c8e08bbd5e694922 ld/testsuite/ld-powerpc/notoc3.d
-27ed0d7b9f6a134088c3f729e46d991b ld/testsuite/ld-powerpc/elfv2so.d
+cad70a0bd3857afa4d97204b5f08dce6 ld/testsuite/ld-powerpc/elfv2so.d
fed89963c6094ee31776b29c918d6a24 ld/testsuite/ld-powerpc/relbrlt.s
b6ea6463608234d456d35f3cc9c372a9 ld/testsuite/ld-powerpc/tocopt2.s
f5680debd0ba406286990ffa16cbb481 ld/testsuite/ld-powerpc/relocsort.s
@@ -17909,7 +17932,7 @@ cb66c732360a0e5c19be21538f028089 ld/tes
a78cf83e5427170c21b55ba4a1106454 ld/testsuite/ld-powerpc/aix-glink-2a.ex
123061df52af683bb91dcb4a84c3d83c ld/testsuite/ld-powerpc/aix-weak-3-64.dd
100faa6f6f0ece8bc22cf9942604bdcf ld/testsuite/ld-powerpc/attr-gnu-4-10.d
-e8b89716ead8ddb541ac3368f06de664 ld/testsuite/ld-powerpc/tlsopt5.wf
+eaeff6718f279792e36306894b9af2a2 ld/testsuite/ld-powerpc/tlsopt5.wf
6ca383d78ef4168f9d1ae127c7ba751c ld/testsuite/ld-powerpc/tocopt5.s
5709dbb8cfaf695ab6e93c167ab6de30 ld/testsuite/ld-powerpc/apuinfo-vle.rd
e0e797cffd8e7a6332ce998ea84bd3c6 ld/testsuite/ld-powerpc/vle-reloc-def-1.s
@@ -17932,7 +17955,7 @@ d3b07384d113edec49eaa6238ad5ff00 ld/tes
4e61b65b073284b8374f66dd17e9ac43 ld/testsuite/ld-powerpc/relaxrl.d
c519be98d68f3a272ce7e17d1d025a31 ld/testsuite/ld-powerpc/tls.d
7620104bad7a2b27971dbddb20280fcf ld/testsuite/ld-powerpc/defsym.s
-27167e1a98bef6e6a93adbfa97399ea1 ld/testsuite/ld-powerpc/tlsopt6.wf
+fdbc9fd2459f6631ab4aaa4448acc669 ld/testsuite/ld-powerpc/tlsopt6.wf
546d5841cc5a13b01ea4e1d47f3bdc25 ld/testsuite/ld-powerpc/vle-multiseg-6b.s
8f65a3b55c41075af46b20b6cb3beceb ld/testsuite/ld-powerpc/plt1.d
d87e9f79c37daa3295d7d4bd17fdf2b6 ld/testsuite/ld-powerpc/tlstocso.d
@@ -17964,7 +17987,7 @@ b79171d8be5d847a9c5640044a63d929 ld/tes
995efaf46f9360c2de42cc707df57cbe ld/testsuite/ld-powerpc/aix-ref-1-32.od
b11b5807e7a6fa381d608f06a71e0bb1 ld/testsuite/ld-powerpc/sdadyn.s
d175fb5ebf6d91d3b1a27c75d35025ed ld/testsuite/ld-powerpc/vle-multiseg-1.ld
-38aa03810fff957e57418d629e3ce3c0 ld/testsuite/ld-powerpc/tlsdesc2.d
+af9a2fd6ad977981238c1288fa454933 ld/testsuite/ld-powerpc/tlsdesc2.d
cb270bf337b981b81c1481dd8cfd485c ld/testsuite/ld-powerpc/aix-core-sec-1.hd
49caafb69f40b8a577be43f820053636 ld/testsuite/ld-powerpc/non-contiguous-powerpc64.d
dd65a441f5f793c81ffbd7e0534afc5e ld/testsuite/ld-powerpc/dotsym3.d
@@ -18002,7 +18025,7 @@ aaab138c73a56e0d51a845129e531690 ld/tes
8fadef018683c2f15d139339ffcac574 ld/testsuite/ld-powerpc/notoc3.wf
8acd8ea8c67e5be3946058ca30146544 ld/testsuite/ld-powerpc/aix-weak-1-rel.nd
374aa6a557b88260efd096cf5efb9daf ld/testsuite/ld-powerpc/aix-weak-3a.s
-df8a19d1dc602702029c582ffe1620a0 ld/testsuite/ld-powerpc/notoc2.d
+61e880275c117c395e46db7e067c6288 ld/testsuite/ld-powerpc/notoc2.d
ad9d2b5d73dfd934a9f3b3496d13bba3 ld/testsuite/ld-powerpc/ambiguousv1b.d
f4eb5269aff1f1e2c3a66d6ce975f819 ld/testsuite/ld-powerpc/ext.d
a0959eef8181dbee1a8059045e431ddd ld/testsuite/ld-powerpc/powerpc.exp
@@ -18076,7 +18099,7 @@ a5493cd07fc73ebfaa18aca44b813d9a ld/tes
cf7a65950ea5277d63c47063e3419409 ld/testsuite/ld-powerpc/tlsno.g
c4fb672b12a30041fe72cdf7cc9c21b5 ld/testsuite/ld-powerpc/powerpc-64-export-class.xd
90e311a4e119e7d08bf05bc2d00e07f1 ld/testsuite/ld-powerpc/tocnovar.d
-700b8f805b304fe498d16d0f21fadee6 ld/testsuite/ld-powerpc/tlsopt6.d
+bfa0c9a1cacf0fc8237671185e990944 ld/testsuite/ld-powerpc/tlsopt6.d
b50df70b35e6fb46cc508111031d68df ld/testsuite/ld-powerpc/tlsdll.s
4750c765b98ac834cc9c1b4174b54bfe ld/testsuite/ld-powerpc/tlsdll_32.s
28194ee58721b06c5d73c7cf30d23dec ld/testsuite/ld-powerpc/relax.d
@@ -18086,7 +18109,7 @@ d0ee6fa6b995898c87e85a7bd2930f84 ld/tes
e5c3514810db821e5e91d793100a6844 ld/testsuite/ld-powerpc/non-contiguous-powerpc.ld
e351e17c0cf530ec3b31fa6a8dccd294 ld/testsuite/ld-powerpc/export-class.exp
4237df48b26069a7f09cc9c38b10844e ld/testsuite/ld-powerpc/aix-toc-1-32.dd
-cad26f3c1bca5dcd610f843924fd83f9 ld/testsuite/ld-powerpc/tlsdesc.wf
+bc74d6aa89a28b15c2f43f0513136ece ld/testsuite/ld-powerpc/tlsdesc.wf
4f54509ed276d07de0aaf4e369c4187a ld/testsuite/ld-powerpc/vle-multiseg-6.ld
865a609d25ae921a90e55a8694faecdd ld/testsuite/ld-powerpc/aix-lineno-1.txt
9fd2efd79e26dd704a262391abfbd37c ld/testsuite/ld-powerpc/aix-abs-reloc-1.im
@@ -18164,7 +18187,7 @@ d3c9a419b5e0dfe645f6cb581879d7e6 ld/tes
748dbeb15f66cfd60128c9ac65a2a55a ld/testsuite/ld-powerpc/aix-weak-2c.nd
5918d3170fd91d138640e5fe9e016f7e ld/testsuite/ld-powerpc/aix-glink-1.ex
b47146af1a449575aa5f1dc04f7a3cd1 ld/testsuite/ld-powerpc/aix-export-1-full.dd
-8a570ffd865d270d0f31a3bf9b6fb0b9 ld/testsuite/ld-powerpc/tlsdesc2.wf
+c22ff0351ef91f4d77814f832af91e3d ld/testsuite/ld-powerpc/tlsdesc2.wf
9847eb1d47ed49e5b41f025760592bc5 ld/testsuite/ld-powerpc/tlsexenors.r
53652025c67e058e17ee2f5b68f62577 ld/testsuite/ld-powerpc/reloc.s
218a7083014093b0da1ec318e619b074 ld/testsuite/ld-powerpc/tlsopt1.s
@@ -20118,6 +20141,7 @@ d9175c5aca72e80d5d0658a075e95b67 ld/tes
0068391443de89b45246238d498c1fe0 ld/testsuite/ld-x86-64/pr19175.d
3bf401a827e886fca415b1f170087c7b ld/testsuite/ld-x86-64/tls.exp
a40f7aba3e070b5c9f979abd5dae4420 ld/testsuite/ld-x86-64/tls-ld1.S
+672ba6dfa584f01d5854a7dd743f4ac9 ld/testsuite/ld-x86-64/pr26711-2.d
73db577c07079cb22cd17cef6f58ccf4 ld/testsuite/ld-x86-64/no-plt-1b.rd
2938afd6c0980a9477fdc6033b3bfad4 ld/testsuite/ld-x86-64/pr19539.t
fe643bf810a7f5f4775e9f4fa0b21f2e ld/testsuite/ld-x86-64/pr19609-6.s
@@ -20234,9 +20258,9 @@ a28eb51c239d35150e9847f653c88ad0 ld/tes
a7f14cfdb1dcfdaa9c4b69488d4ef6bf ld/testsuite/ld-x86-64/pr24721.d
2d95976a3e217d50d71ac6620bb1bf13 ld/testsuite/ld-x86-64/pr20830.s
9d4826b472b420d03ec07e6642c1608a ld/testsuite/ld-x86-64/load1c.d
-def923170610fc1cb91815dbbe14cf67 ld/testsuite/ld-x86-64/property-3.r
+937f6daa0d6886f614ffa225a6503133 ld/testsuite/ld-x86-64/property-3.r
ba27b1cddc76e57ac01282f87133a8c2 ld/testsuite/ld-x86-64/property-x86-4a.d
-75a2383466907203a84d45d2a4b4a61a ld/testsuite/ld-x86-64/x86-64.exp
+e64550d6723a29378b2c8ed0475f81fc ld/testsuite/ld-x86-64/x86-64.exp
6a4babcc074e9c5cbc182892cd9ec99a ld/testsuite/ld-x86-64/tlsbindesc.sd
9b3116f94d6239d75f6670771ff38f80 ld/testsuite/ld-x86-64/pr19636-2h.d
fcc014aa298a185b3e0d7c79cb02515b ld/testsuite/ld-x86-64/pr18900c.c
@@ -20245,7 +20269,7 @@ f9117653fa0de99fc05abcc0eaf0bd58 ld/tes
4536be93b70709a7fb05b1cdbd0835f5 ld/testsuite/ld-x86-64/pr19636-1e.d
3854a14dddcd0cccb63327647db618f9 ld/testsuite/ld-x86-64/tlsgd9.s
8d45d88edb169c63b9cde50875f663fa ld/testsuite/ld-x86-64/copyreloc-lib.c
-85c606d50a6d2b65e2cc1fb7c18f3585 ld/testsuite/ld-x86-64/property-4.r
+1739ddae1d37693f7dcae486ce88847d ld/testsuite/ld-x86-64/property-4.r
e5bceeea7613b8d9c157210660cadcb1 ld/testsuite/ld-x86-64/tlsie3.d
b2e2be1d95860c3b4b08e4a68c5c7cd2 ld/testsuite/ld-x86-64/no-plt-1c.dd
6e219f6ed3d425933d2bda4b9159e35f ld/testsuite/ld-x86-64/pr23372f.s
@@ -20259,6 +20283,7 @@ a6a8eb73290596aa027a8ec596189f29 ld/tes
6a3c89acc0efcd9deb696826c3f07db2 ld/testsuite/ld-x86-64/property-x86-5a.s
898fe0d28f6857c383e8adcd9c65e438 ld/testsuite/ld-x86-64/tlspic.dd
2d4b4a3cfc83821ce017dadedb160ff2 ld/testsuite/ld-x86-64/property-x86-cet3b.d
+d221f615ecc94f766b731b8c13fda15d ld/testsuite/ld-x86-64/pr26711-3.d
aef8fa1c89a722690f2ecf4e8aaba01d ld/testsuite/ld-x86-64/pr19175.s
6ad69407205b1009d043a3740f09b143 ld/testsuite/ld-x86-64/pr12718.d
7161501105959be64be4d6810784436b ld/testsuite/ld-x86-64/pr19609-2c.d
@@ -20393,7 +20418,7 @@ d80ec7cc946f8a32f238d28da7336933 ld/tes
59bd2a154367c9bdaa33b43b8127ddd4 ld/testsuite/ld-x86-64/property-x86-cet3a.d
496fd1a1f131249131bd4fb7e8337ca6 ld/testsuite/ld-x86-64/lea1h.d
f5569686ca0c5ad0ac96424dc63fd5f9 ld/testsuite/ld-x86-64/protected7.s
-2e5a4d2fc7328ee6ead08390b7438fbd ld/testsuite/ld-x86-64/property-5.r
+f3a5d3aa3047dd461baab4ae159c282e ld/testsuite/ld-x86-64/property-5.r
5275a46fd93b3c5cfd209d23a2747bd4 ld/testsuite/ld-x86-64/property-no-copy.S
4358331beb4e42afb63e916bdef1cd3b ld/testsuite/ld-x86-64/property-x86-5.d
2bf1b084796dc25d224d575ab458900b ld/testsuite/ld-x86-64/gotpcrel1d.S
@@ -20558,6 +20583,7 @@ f2eec97b9af638c925d4f5a7eb8604c7 ld/tes
e9ab46d66af4070be7c2e3480418c950 ld/testsuite/ld-x86-64/pr23486b.s
a2a410581fa9b0812cb8bf313c72cec1 ld/testsuite/ld-x86-64/align-branch-1.d
4188969906171c0e1f069624be84b762 ld/testsuite/ld-x86-64/mpx1c.rd
+cbabf560d14318b4311249a0b86af2b7 ld/testsuite/ld-x86-64/pr26711-1-x32.d
c393ef4b0a813e1c9bdfb422c19d176d ld/testsuite/ld-x86-64/tlspie2c.d
400cfdf7cc6e65e74a95e5ecef20fe46 ld/testsuite/ld-x86-64/pr20253-1j.d
dd6c4c5423bc3836346aab14df0b5419 ld/testsuite/ld-x86-64/pr23372d.d
@@ -20570,6 +20596,7 @@ e2f08ab60db28304daeae42ad919d1f5 ld/tes
f89617445e5c509600ca74dd12577397 ld/testsuite/ld-x86-64/plt.s
0cd540d75c98b4a8d5b4fe06e4ea3720 ld/testsuite/ld-x86-64/pr20253-1.s
5bd7f1106eb754fa60bf7c141db76aa8 ld/testsuite/ld-x86-64/pr19636-2c.d
+acfdf5492dd0d316ff015fcb2413e48f ld/testsuite/ld-x86-64/pr26711-2-x32.d
4188969906171c0e1f069624be84b762 ld/testsuite/ld-x86-64/mpx2a.rd
86983dbba838659fbfb4cbdfdb7c0324 ld/testsuite/ld-x86-64/tlspie1.s
8ce18bd44b3a9f276cd9cd80965650f3 ld/testsuite/ld-x86-64/pr19784c.c
@@ -20699,6 +20726,7 @@ c69b421c689e572c76f6063db501af9d ld/tes
044e55f08c519af7769757900e6f7f75 ld/testsuite/ld-x86-64/property-1a.r
24994c28b7c840d524f8c853a2fa7bff ld/testsuite/ld-x86-64/pr18176.s
fb3673f1e87f12300c62149504d1d5c6 ld/testsuite/ld-x86-64/pr23486a.s
+e319b1a3e44d1e3dd71b06d9b0e5cc2e ld/testsuite/ld-x86-64/pr26711-3-x32.d
c70a0e110d9207f9054e30143a5638ba ld/testsuite/ld-x86-64/property-x86-shstk2-x32.d
7080a1e97e7d1681e5a1e9da28ccc65e ld/testsuite/ld-x86-64/tlsie1.dd
5552fbc10a6a35623dc34733aae081f9 ld/testsuite/ld-x86-64/lea1a.d
@@ -20748,9 +20776,11 @@ f67e2f8f98f24d7e2e82c99bbc590805 ld/tes
1eccb618d95e721641240b74ed62c642 ld/testsuite/ld-x86-64/ia32-1.d
874bac252033f5d2e082954902385444 ld/testsuite/ld-x86-64/pr18815.s
1f9a94a9cfa9c9c9a47e82e564694114 ld/testsuite/ld-x86-64/pr23372c.d
+3e4cb347bc9e5b04f8e46aa82606d5c0 ld/testsuite/ld-x86-64/pr26711-1.d
21104172f0d83fab6d3f27b04857f112 ld/testsuite/ld-x86-64/tlsdesc.pd
092551c720d9237b2142c771156f85bc ld/testsuite/ld-x86-64/split-by-file2.s
af608ebdb9d7b220212318f0308723ad ld/testsuite/ld-x86-64/bnd-plt-1.d
+bf16c1fa16fefe63f097213859f3572f ld/testsuite/ld-x86-64/pr26711.s
6e01781f925609bb0cbf9950444aeea6 ld/testsuite/ld-x86-64/pr25416-3.s
42fbc1989f2aedaf714a703311b996f3 ld/testsuite/ld-x86-64/pr20253-2b.S
7a3750eaf2750784eaee64659eada40e ld/testsuite/ld-x86-64/ia32-3.d
@@ -22111,6 +22141,7 @@ f1c77b700705334ba881aacb565021e8 ld/tes
8c4801ff70808f8dafaec24d9085dbb2 ld/testsuite/ld-i386/property-x86-empty.s
fbd1ad758d6421e87677adff7c6f874a ld/testsuite/ld-i386/tlspic2.rd
8377d7a7055acee71697a1787cee770d ld/testsuite/ld-i386/property-6a.c
+1f0150312e0524ca038d9c65ce3cc8af ld/testsuite/ld-i386/pr26869.d
2758da88c5ad71a80c1fda01e0c2d415 ld/testsuite/ld-i386/plt-main1.c
a0008682cc2494ebe07d6cd4bf4d9a01 ld/testsuite/ld-i386/protected6a.d
64b6361a5383c255316478aa2a524f01 ld/testsuite/ld-i386/plt-main4.c
@@ -22140,6 +22171,7 @@ dc0a05383f59ac1cac7770c08a4df1bc ld/tes
ab7a71ba927c9f1c1688f7c79d87b3f1 ld/testsuite/ld-i386/tls-ld1.S
6c8132b31d76a2534f28aa37107d6ce2 ld/testsuite/ld-i386/got1b.c
8a7d276cd3303f692b21f2ab5d40f3b7 ld/testsuite/ld-i386/pr19636-4.s
+12e9151a83f44dba6d967499ce82beda ld/testsuite/ld-i386/pr26711-2.d
a0f3284062d2ecad28ae82ee5eba6e0b ld/testsuite/ld-i386/no-plt-1b.rd
2938afd6c0980a9477fdc6033b3bfad4 ld/testsuite/ld-i386/pr19539.t
bb3d4ff0fc0e3af315453bc50a102bf2 ld/testsuite/ld-i386/tlsgd4.d
@@ -22215,13 +22247,13 @@ adf3d3417bacbbbbd44af52a3a9d1879 ld/tes
51cf92616340cd638748f0f817061922 ld/testsuite/ld-i386/pr20244-4a.d
4215e8b1b6b2d2ff606fd3b4b97b32d2 ld/testsuite/ld-i386/mov1b.d
dae2a41c47b52d598ae9d39c9322be58 ld/testsuite/ld-i386/pr20830.s
-def923170610fc1cb91815dbbe14cf67 ld/testsuite/ld-i386/property-3.r
+937f6daa0d6886f614ffa225a6503133 ld/testsuite/ld-i386/property-3.r
40c7b3d9d3cb4099d7112b2d1d90dba1 ld/testsuite/ld-i386/property-x86-4a.d
e03c204939e1491698c9c1113df7c224 ld/testsuite/ld-i386/tlsbindesc.sd
fcc014aa298a185b3e0d7c79cb02515b ld/testsuite/ld-i386/pr18900c.c
9a76857e115b6f6ed4654047fadfd0f4 ld/testsuite/ld-i386/pr19636-1e.d
8d45d88edb169c63b9cde50875f663fa ld/testsuite/ld-i386/copyreloc-lib.c
-85c606d50a6d2b65e2cc1fb7c18f3585 ld/testsuite/ld-i386/property-4.r
+1739ddae1d37693f7dcae486ce88847d ld/testsuite/ld-i386/property-4.r
2ebeb06b9e469679c1137f8dd88648e5 ld/testsuite/ld-i386/tlsie3.d
ba5ad774be690e362ab6ea0fbd13fdb8 ld/testsuite/ld-i386/no-plt-1c.dd
8374b35f68412379bade5bfa6ce108b2 ld/testsuite/ld-i386/dummy.s
@@ -22231,6 +22263,7 @@ fbfd82c1904aafdc454c9b25164bf59e ld/tes
a7349003880697259340d64a45824e81 ld/testsuite/ld-i386/pr19636-3d.d
8429c7bf2ca7750c8a36d9396b8885ee ld/testsuite/ld-i386/tlspic.dd
eb11b4ca625f95d8e4b78be8c07d3cec ld/testsuite/ld-i386/property-x86-cet3b.d
+548eb70eee34107e4be340ab1b163f36 ld/testsuite/ld-i386/pr26711-3.d
14592c0e93294d76ec4d68c8d0b5bab3 ld/testsuite/ld-i386/pr19175.s
d78c5aedeb6ff3492edc6643fed456bc ld/testsuite/ld-i386/pr12718.d
41b2930fb0e645070c66b878b9affd92 ld/testsuite/ld-i386/pr19609-2c.d
@@ -22295,7 +22328,7 @@ d3e5ca870e218a1b1dcb656e0bfaa3ce ld/tes
d2111de90708836dd985ebf2fab9c0c6 ld/testsuite/ld-i386/mov2.s
1f67324497808c3a0ca2f85867fa7e0e ld/testsuite/ld-i386/pr17306b.s
04071b12b009bcd5f62fa0bc21cc086a ld/testsuite/ld-i386/no-plt-1e.rd
-a8bb85844d6cc228cb97bc66c496ade2 ld/testsuite/ld-i386/i386.exp
+d29abc0536d9f5f8c3bde2f3ec6dc256 ld/testsuite/ld-i386/i386.exp
757d20a2f3d062fd7a67bd3c98e67785 ld/testsuite/ld-i386/pltgot-2.d
dabd961c76ee8fbe5a666f217e83e1a5 ld/testsuite/ld-i386/property-unsorted-2.S
7bb563a68c73c04c063145ef521edde3 ld/testsuite/ld-i386/tlsbin.dd
@@ -22330,7 +22363,7 @@ c270ac563d86329f5e235a20678b44fd ld/tes
5ddb99810569a153d2019e1d012ffcdf ld/testsuite/ld-i386/got1a.S
4e71cb709472d7ae3a1798c1a1043c70 ld/testsuite/ld-i386/tlspie3b.d
77c39750e93b7e520944a4bf4c4a4024 ld/testsuite/ld-i386/protected7.s
-2e5a4d2fc7328ee6ead08390b7438fbd ld/testsuite/ld-i386/property-5.r
+f3a5d3aa3047dd461baab4ae159c282e ld/testsuite/ld-i386/property-5.r
e6677dab6b4d38bb7f178f66ee6f25ad ld/testsuite/ld-i386/property-no-copy.S
6eccc1365d24adc8e881ed57bb5a8c81 ld/testsuite/ld-i386/property-x86-5.d
42bef54559629b445513f8ffbbf445b9 ld/testsuite/ld-i386/pr14215.s
@@ -22364,6 +22397,7 @@ c8879832168a7e3fbb8185e3f668a4ff ld/tes
d9d64e8ca2b43c851eacaa021767eafa ld/testsuite/ld-i386/hidden3.s
170e9fecd69212c4af449953b33a1ccf ld/testsuite/ld-i386/branch1.d
94b6da333cef7b619c459007a7afbbe5 ld/testsuite/ld-i386/vxworks1.s
+6e8ed01bedfff10c21373150fc343b27 ld/testsuite/ld-i386/pr26869.s
2ccc12d6f3696c2a95493b08c1977e60 ld/testsuite/ld-i386/ibt-plt-3b.d
2fe2e197be7e56b420325c0aa5ab9c00 ld/testsuite/ld-i386/pr19636-2d.d
4d55687220a930ac78d5153b16fa70ad ld/testsuite/ld-i386/pcrel8.d
@@ -22556,6 +22590,7 @@ d3eff844704a8f8a868fb0e221cba03f ld/tes
4b385578f91c4d3a011c1b67e781f755 ld/testsuite/ld-i386/tlspic1.s
857f54992ae18beb28f93df6dfe279dc ld/testsuite/ld-i386/pr18815.s
0022848406081d37758eca781e8ffd47 ld/testsuite/ld-i386/pr23372c.d
+5812e22bfe8cbff07d998c6677c39df8 ld/testsuite/ld-i386/pr26711-1.d
c1db7937bfb9ff0288b35fec7a4b2913 ld/testsuite/ld-i386/call2.d
b420e4e82afdcf08ae21c5ecd2386ca7 ld/testsuite/ld-i386/pr20253-2b.S
da2a7c7506cc11a212853cbca1eebb96 ld/testsuite/ld-i386/pr21884.d
@@ -23459,13 +23494,13 @@ edbd3ce7f8ec12fac8c8f76869c472e6 ld/Cha
c7576fd1283c729f0b36c6047115e56e ld/ldfile.c
d875a4625b4f8aa6808c1b871fc647a5 ld/pe-dll.c
829c3ef5ba9d3f4bd0eaa6239e7b7ef4 ld/NEWS
-b7acac6142684a37be27755f10e85cd9 ld/ld.info
+c710f895fdb2e66f73e4853d459ced78 ld/ld.info
a130b17d748d55878825a1060eb688f0 ld/ChangeLog-2015
248ce0b33616bb1205b224df6ff80705 ld/ldlex.l
f88d12991c76945bcd915181b9d95258 ld/ldgram.y
0f35271901865ad3ac182be33e27bc11 ld/ldmain.h
d7ce0242bbe79cc369b415f0241de880 ld/configdoc.texi
-d7cff08dba11d5a7bd965864423623f3 ld/ldelf.c
+5a171c03498a636c2e760c14ade7ea7d ld/ldelf.c
5dfd1b2c4d8997b2f947000e4eaf8d00 ld/ldint.texi
8d7a3563e742410eea837873dcad6b42 ld/elf-hints-local.h
b29fc2be266792b7f3d34bc6b710a81b ld/ChangeLog-2006
@@ -23582,7 +23617,7 @@ a707d2e5daa09d204d4441e8713048ca libibe
94f22680349b4ae73ad658495d2eb542 libiberty/random.c
65619c4e962d5590f7506a4dfa999af9 libiberty/regex.c
d72cecd2f491eb8759d5cb9807c4d5a3 libiberty/pex-one.c
-3b75f52525aa1117d1c4cf228cb171c3 libiberty/ChangeLog
+83c1eb8bd8fa47a5d876cc1fde42653a libiberty/ChangeLog
9f681e91439ac44c9df8e1b1deef33b5 libiberty/strdup.c
528cb7fe9ed2020f2ee12de85c28aa1c libiberty/objalloc.c
c90c2f09bdcbd65b4732a4be25a56d12 libiberty/memcpy.c
@@ -23647,7 +23682,7 @@ a49da50901109322fa446b9d34a94088 libibe
c68dbf7834af4281ebd84caa3fd54680 libiberty/README
8446e21ec9d2833ae495541e07e84069 libiberty/mempcpy.c
f3d66c0f81af1c1b4e2e0ea41b022716 libiberty/stack-limit.c
-b3f503d376697e199d60829e3b46e9f8 libiberty/dwarfnames.c
+ffd8a921387ca98f9d130e9e73cd6d3e libiberty/dwarfnames.c
2ecbb08e30f241584789d52913e58920 libiberty/bsearch_r.c
d550f4428dd2571dd6257b8b82d356fc libiberty/pex-unix.c
e2f3721273c7ef1ab0194aad78ffa3aa libiberty/strstr.c
@@ -23800,7 +23835,7 @@ aa3895af184ebb6d935b41fc89922e9e opcode
a5fa82e7bc64c887bf7deaee7ca5a8ea opcodes/m32r-desc.h
9b06963656051ef64d6be0e77d9fb6ed opcodes/iq2000-desc.h
e263970edd5e90c3aed3ce1c59d16a79 opcodes/m32r-opinst.c
-ffd21c01c165934d3a5a7a7205ca7b84 opcodes/i386-dis.c
+9db7b27843036dab64bc0444caa33e90 opcodes/i386-dis.c
5f8b9fdcd2550134a2b196ec646bfb7e opcodes/bpf-opc.c
20d54844aca06dbf0637ccca248e96e9 opcodes/ChangeLog-2017
753a0533d1493d8eb512218d1186dee1 opcodes/xstormy16-desc.h
@@ -23842,7 +23877,7 @@ f1fefb4bb6b09a3d30c8cf8e273c04b3 opcode
8203df8c8c15e7452fe0668da0315e3d opcodes/ia64-opc-b.c
0452aeba4e1f72482880701c82952aac opcodes/tic4x-dis.c
c5cefc6c55710567cc64c0a1a1100b9d opcodes/ChangeLog-2014
-bfb1e7f25b160fe4973def64d96c0b3c opcodes/ChangeLog
+5ff0f17359054997d6270c434b60de17 opcodes/ChangeLog
e266f9159d4b7e960a2f563864cd10ce opcodes/or1k-asm.c
c325a89b389599e79a63ff55e9e7aebc opcodes/ft32-dis.c
ae66c5fbea04c29db07e989f13f15025 opcodes/mt-dis.c
@@ -23871,41 +23906,41 @@ bc6252cb5d9adee258bc4c21f2f41548 opcode
abe9186aa2b65b000546c8158085dda8 opcodes/MAINTAINERS
9d1cae79a25126dc0896dc2e82b5a698 opcodes/po/uk.po
e4444c7716d7f33ae1586f3d19dc5de1 opcodes/po/it.po
-e294d2684e9d57a79fef7fe2b8875337 opcodes/po/sr.gmo
+e66456de97b5aafdd2e0d025a20c53e5 opcodes/po/sr.gmo
64163e7952ced31b2cf20dc47968a84e opcodes/po/ga.po
-98fac11518cc3c1a7eb9b465ff5a3c99 opcodes/po/de.gmo
-b2f69021ea41e08afb81acf033c7edf5 opcodes/po/nl.gmo
+79b08e088d990c640efad54c3788ef74 opcodes/po/de.gmo
+d54ddba4f1ecab20d57ff9452bba3076 opcodes/po/nl.gmo
4438b95a4344144658f227bc2fd6865f opcodes/po/Make-in
eac8a474e91112124bc872824d26de92 opcodes/po/id.po
-a413b86d85b007d3a867ac743037c14a opcodes/po/sv.gmo
+a8ee89dd661a7b12af6f36c870d4c4c0 opcodes/po/sv.gmo
cf932bb836eca328eebe2f5e4c065855 opcodes/po/fr.po
785cbecc7f597c1374b732ed3d23282f opcodes/po/fi.po
-9d1c427a5289a3666564f5409fdf16c9 opcodes/po/da.gmo
-4afa0ab75fd7849f29b445d8d8366b2d opcodes/po/ro.gmo
+060c0569db897d17ecc2f3c28415ba9d opcodes/po/da.gmo
+9fa87849e97f1e412646da4da3e2ded4 opcodes/po/ro.gmo
171ad044cdc6b2707b6094583bb59173 opcodes/po/pt_BR.po
6cab0da7ed0b3051e9f002e359fc8fb4 opcodes/po/de.po
-a0e89a22a96cdc0e97541e2e2886d08a opcodes/po/fr.gmo
+1561b68827f1e1fc6a5f480b34d64542 opcodes/po/fr.gmo
20ec221c41da2d5e1c3e5b97f7f0e18a opcodes/po/POTFILES.in
-a08858d306dd29266caea6fb0ea57591 opcodes/po/es.gmo
+40c276423529210775c75de444ad94f1 opcodes/po/es.gmo
28fa9a522cdf0eaf64347fa836e25d0c opcodes/po/nl.po
fcb127c8f57c6a38f36fe3eb53fe3d3f opcodes/po/tr.po
-9a5e613a9553966167850acd1dbf0f70 opcodes/po/ga.gmo
+3c5d7ac10fdc3b9c0fdf15d44512d163 opcodes/po/ga.gmo
38a6dd92d3fd8f1a2eb2334be22de713 opcodes/po/es.po
59287ccb744a860c9e54f5704505d11e opcodes/po/opcodes.pot
18fe115c401c0e1605b2f2e4db52219b opcodes/po/zh_CN.po
f4989e54cf95c741a994fdd722b541ee opcodes/po/sv.po
076be31a66a76e9a13089a58f2629d1f opcodes/po/ro.po
ac5bcf32b58e34029b5b004d5a8cd2c7 opcodes/po/vi.po
-f09eb1cbddec0ff16061a17e964d9e6e opcodes/po/zh_CN.gmo
-c7158f697e1199580a8d8946bf8af06d opcodes/po/tr.gmo
+7b57bd6a633669c3e550cfc665872a31 opcodes/po/zh_CN.gmo
+8582d98be0cbd4f13aacf73c5183c965 opcodes/po/tr.gmo
c32c7787ad8c899a3af5ec2e47518888 opcodes/po/da.po
-2100353c28cda8ddfc1e90989eabf44a opcodes/po/it.gmo
-93e89a462ca1c5f7ce29038a689f4749 opcodes/po/vi.gmo
-b5a06b091378eac0ab1297f7c4dc8c47 opcodes/po/pt_BR.gmo
+63cbcc9d5f4f1e1b5912755fd5e2d5cb opcodes/po/it.gmo
+54774a0f3f118df78dec815cdb50ca66 opcodes/po/vi.gmo
+f4cea170d318aa9757faade5a035318a opcodes/po/pt_BR.gmo
d8f7a299b95a0a3da8643c69829e025b opcodes/po/sr.po
-3dcb77f78dfd98bc8e4d9868b009debe opcodes/po/id.gmo
-4c931b889a393fc12e187bbaf1bd663a opcodes/po/fi.gmo
-ada3f3fa6fb15619c03f65ebb7d68f04 opcodes/po/uk.gmo
+d322f2267bd0813da989c4e0e189cbf0 opcodes/po/id.gmo
+acdfa8f12e84870793f907b8f963df90 opcodes/po/fi.gmo
+e5cdb2e3a54fbf2256ea5dadfc372055 opcodes/po/uk.gmo
48a769304e55eaeba3950b5697686e24 opcodes/ia64-dis.c
ca16d8a4b504a573594c9f75cb4fbcd5 opcodes/sysdep.h
75cb7f7a3fba79102efdd48bc1d936e8 opcodes/ia64-opc-f.c
@@ -24005,7 +24040,7 @@ b485b32d996d37afc89d2359c1d0c767 opcode
b4c54078c4debd6e9bd3703033bc7dbd opcodes/d10v-dis.c
23232c71137fb48f4c964575eb061942 opcodes/score-opc.h
52d3bc5e8206849119b615744c9dcc17 opcodes/tic54x-dis.c
-acb8289783fcf2bf697b87cbaa5b57c7 opcodes/ppc-opc.c
+93fff560337f9831e013adae309cc25b opcodes/ppc-opc.c
b2241084ce22b1be5fffaed5cd762739 opcodes/pj-dis.c
2dc169586e4d06c7c260f32cfde8e174 opcodes/cgen-dis.c
327cf11f5c08b578f3b0cdb7f3923280 opcodes/ia64-raw.tbl
diff -rup binutils-2.35.1/opcodes/ChangeLog fred/binutils-2.35.1/opcodes/ChangeLog
--- binutils-2.35.1/opcodes/ChangeLog 2020-09-19 11:35:50.000000000 +0100
+++ fred/binutils-2.35.1/opcodes/ChangeLog 2020-11-25 14:37:37.000000000 +0000
@@ -1,3 +1,31 @@
+2020-10-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26685
+ * i386-dis.c (mod_table): Replace Gv with Gdq on movdiri.
+
+2020-10-07 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (OP_E_memory): Revert previous change.
+
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ Apply from master
+ 2020-08-19 Alan Modra <amodra@gmail.com>
+ * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
+ vcmpuq and xvtlsbb.
+
+ 2020-08-10 Alan Modra <amodra@gmail.com>
+ * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
+ instructions.
+
+ 2020-08-10 Alan Modra <amodra@gmail.com>
+ * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
+ Enable icbt for power5, miso for power8.
+
+ 2020-08-10 Alan Modra <amodra@gmail.com>
+ * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
+ mtvsrd, and similarly for mfvsrd.
+
2020-09-19 Nick Clifton <nickc@redhat.com>
This is the 2.35.1 point release.
diff -rup binutils-2.35.1/opcodes/i386-dis.c fred/binutils-2.35.1/opcodes/i386-dis.c
--- binutils-2.35.1/opcodes/i386-dis.c 2020-07-24 10:12:20.000000000 +0100
+++ fred/binutils-2.35.1/opcodes/i386-dis.c 2020-11-25 14:37:37.000000000 +0000
@@ -10496,7 +10496,7 @@ static const struct dis386 mod_table[][2
},
{
/* MOD_0F38F9_PREFIX_0 */
- { "movdiri", { Ev, Gv }, PREFIX_OPCODE },
+ { "movdiri", { Ev, Gdq }, PREFIX_OPCODE },
},
{
/* MOD_62_32BIT */
@@ -14190,7 +14190,7 @@ OP_E_memory (int bytemode, int sizeflag)
/* Without base nor index registers, zero-extend the
lower 32-bit displacement to 64 bits. */
disp = (unsigned int) disp;
- needindex = scale;
+ needindex = 1;
}
needaddr32 = 1;
}
diff -rup binutils-2.35.1/opcodes/ppc-opc.c fred/binutils-2.35.1/opcodes/ppc-opc.c
--- binutils-2.35.1/opcodes/ppc-opc.c 2020-08-19 08:12:38.000000000 +0100
+++ fred/binutils-2.35.1/opcodes/ppc-opc.c 2020-11-25 14:37:37.000000000 +0000
@@ -4441,7 +4441,7 @@ const struct powerpc_opcode powerpc_opco
{"nmachhws", XO (4, 110,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
{"nmachhws.", XO (4, 110,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
{"vadduqm", VX (4, 256), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
-{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {OBF, VA, VB}},
+{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {BF, VA, VB}},
{"vmaxsb", VX (4, 258), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vslb", VX (4, 260), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vslq", VX (4, 261), VX_MASK, POWER10, 0, {VD, VA, VB}},
@@ -4459,7 +4459,7 @@ const struct powerpc_opcode powerpc_opco
{"macchwu", XO (4, 140,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
{"macchwu.", XO (4, 140,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
{"vaddcuq", VX (4, 320), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
-{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {OBF, VA, VB}},
+{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {BF, VA, VB}},
{"vmaxsh", VX (4, 322), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vslh", VX (4, 324), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vrlqnm", VX (4, 325), VX_MASK, POWER10, 0, {VD, VA, VB}},
@@ -6114,6 +6114,7 @@ const struct powerpc_opcode powerpc_opco
{"rlnm.", M(23,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}},
{"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE, {0}},
+{"exser", 0x63ff0000, 0xffffffff, POWER9, PPCVLE, {0}},
{"ori", OP(24), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
{"oril", OP(24), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
@@ -6236,7 +6237,7 @@ const struct powerpc_opcode powerpc_opco
{"ldx", X(31,21), X_MASK, PPC64, 0, {RT, RA0, RB}},
-{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0, {CT, RA0, RB}},
+{"icbt", X(31,22), X_MASK, POWER5|BOOKE|PPCE300, 0, {CT, RA0, RB}},
{"lwzx", X(31,23), X_MASK, PPCCOM, 0, {RT, RA0, RB}},
{"lx", X(31,23), X_MASK, PWRCOM, 0, {RT, RA, RB}},
@@ -6302,9 +6303,9 @@ const struct powerpc_opcode powerpc_opco
{"subf.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
{"sub.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RB, RA}},
-{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}},
{"mffprd", X(31,51), XX1RB_MASK|1, PPCVSX2, 0, {RA, FRS}},
{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, 0, {RA, VS}},
+{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}},
{"eratilx", X(31,51), X_MASK, PPCA2, 0, {ERAT_T, RA, RB}},
{"lbarx", X(31,52), XEH_MASK, POWER8|E6500, 0, {RT, RA0, RB, EH}},
@@ -6354,6 +6355,7 @@ const struct powerpc_opcode powerpc_opco
{"mulhw", XO(31,75,0,0), XO_MASK, PPC, 0, {RT, RA, RB}},
{"mulhw.", XO(31,75,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
+{"msgsndu", XRTRA(31,78,0,0), XRTRA_MASK, POWER9, 0, {RB}},
{"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}},
{"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}},
@@ -6387,6 +6389,7 @@ const struct powerpc_opcode powerpc_opco
{"lxvrdx", X(31,109), XX1_MASK, POWER10, 0, {XT6, RA0, RB}},
+{"msgclru", XRTRA(31,110,0,0), XRTRA_MASK, POWER9, 0, {RB}},
{"mvidsplt", X(31,110), X_MASK, E6500, 0, {VD, RA, RB}},
{"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}},
@@ -6489,9 +6492,9 @@ const struct powerpc_opcode powerpc_opco
{"mtmsrd", X(31,178), XRLARB_MASK, PPC64, 0, {RS, A_L}},
-{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}},
{"mtfprd", X(31,179), XX1RB_MASK|1, PPCVSX2, 0, {FRT, RA}},
{"mtvrd", X(31,179)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}},
+{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}},
{"eratre", X(31,179), X_MASK, PPCA2, 0, {RT, RA, WS}},
{"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}},
@@ -6738,11 +6741,13 @@ const struct powerpc_opcode powerpc_opco
{"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, 0, {RT}},
{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, 0, {RT}},
+{"mfudscr", XSPR(31,339, 3), XSPR_MASK, POWER9, 0, {RS}},
{"mfrtcu", XSPR(31,339, 4), XSPR_MASK, COM, TITAN, {RT}},
{"mfrtcl", XSPR(31,339, 5), XSPR_MASK, COM, TITAN, {RT}},
{"mfdec", XSPR(31,339, 6), XSPR_MASK, MFDEC1, 0, {RT}},
{"mflr", XSPR(31,339, 8), XSPR_MASK, COM, 0, {RT}},
{"mfctr", XSPR(31,339, 9), XSPR_MASK, COM, 0, {RT}},
+{"mfuamr", XSPR(31,339, 13), XSPR_MASK, POWER9, 0, {RS}},
{"mfdscr", XSPR(31,339, 17), XSPR_MASK, POWER6, 0, {RT}},
{"mftid", XSPR(31,339, 17), XSPR_MASK, POWER, 0, {RT}},
{"mfdsisr", XSPR(31,339, 18), XSPR_MASK, COM, TITAN, {RT}},
@@ -6753,9 +6758,12 @@ const struct powerpc_opcode powerpc_opco
{"mfsrr0", XSPR(31,339, 26), XSPR_MASK, COM, 0, {RT}},
{"mfsrr1", XSPR(31,339, 27), XSPR_MASK, COM, 0, {RT}},
{"mfcfar", XSPR(31,339, 28), XSPR_MASK, POWER6, 0, {RT}},
+{"mfamr", XSPR(31,339, 29), XSPR_MASK, POWER7, 0, {RS}},
+{"mfpidr", XSPR(31,339, 48), XSPR_MASK, POWER10, 0, {RS}},
{"mfpid", XSPR(31,339, 48), XSPR_MASK, BOOKE, 0, {RT}},
{"mfcsrr0", XSPR(31,339, 58), XSPR_MASK, BOOKE, 0, {RT}},
{"mfcsrr1", XSPR(31,339, 59), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfiamr", XSPR(31,339, 61), XSPR_MASK, POWER10, 0, {RS}},
{"mfdear", XSPR(31,339, 61), XSPR_MASK, BOOKE, 0, {RT}},
{"mfesr", XSPR(31,339, 62), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivpr", XSPR(31,339, 63), XSPR_MASK, BOOKE, 0, {RT}},
@@ -6769,16 +6777,28 @@ const struct powerpc_opcode powerpc_opco
{"mfcounta", XSPR(31,339,150), XSPR_MASK, PPC860, 0, {RT}},
{"mfcountb", XSPR(31,339,151), XSPR_MASK, PPC860, 0, {RT}},
{"mfcmpe", XSPR(31,339,152), XSPR_MASK, PPC860, 0, {RT}},
+{"mffscr", XSPR(31,339,153), XSPR_MASK, POWER10, 0, {RS}},
{"mfcmpf", XSPR(31,339,153), XSPR_MASK, PPC860, 0, {RT}},
{"mfcmpg", XSPR(31,339,154), XSPR_MASK, PPC860, 0, {RT}},
{"mfcmph", XSPR(31,339,155), XSPR_MASK, PPC860, 0, {RT}},
{"mflctrl1", XSPR(31,339,156), XSPR_MASK, PPC860, 0, {RT}},
+{"mfuamor", XSPR(31,339,157), XSPR_MASK, POWER7, 0, {RS}},
{"mflctrl2", XSPR(31,339,157), XSPR_MASK, PPC860, 0, {RT}},
{"mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, 0, {RT}},
+{"mfpspb", XSPR(31,339,159), XSPR_MASK, POWER10, 0, {RS}},
{"mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, 0, {RT}},
+{"mfdpdes", XSPR(31,339,176), XSPR_MASK, POWER10, 0, {RS}},
+{"mfdawr0", XSPR(31,339,180), XSPR_MASK, POWER10, 0, {RS}},
+{"mfdawr1", XSPR(31,339,181), XSPR_MASK, POWER10, 0, {RS}},
+{"mfrpr", XSPR(31,339,186), XSPR_MASK, POWER10, 0, {RS}},
+{"mfciabr", XSPR(31,339,187), XSPR_MASK, POWER10, 0, {RS}},
+{"mfdawrx0", XSPR(31,339,188), XSPR_MASK, POWER10, 0, {RS}},
+{"mfdawrx1", XSPR(31,339,189), XSPR_MASK, POWER10, 0, {RS}},
+{"mfhfscr", XSPR(31,339,190), XSPR_MASK, POWER10, 0, {RS}},
{"mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, 0, {RT}},
{"mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, 0, {RT}},
{"mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, 0, {RT, SPRG}},
+{"mfusprg3", XSPR(31,339,259), XSPR_MASK, POWER10, 0, {RT}},
{"mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
{"mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
{"mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
@@ -6794,20 +6814,37 @@ const struct powerpc_opcode powerpc_opco
{"mfear", XSPR(31,339,282), XSPR_MASK, PPC, TITAN, {RT}},
{"mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, 0, {RT}},
{"mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, 0, {RT}},
+{"mfhsprg0", XSPR(31,339,304), XSPR_MASK, POWER10, 0, {RS}},
{"mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhsprg1", XSPR(31,339,305), XSPR_MASK, POWER10, 0, {RS}},
+{"mfhdisr", XSPR(31,339,306), XSPR_MASK, POWER10, 0, {RS}},
+{"mfhdar", XSPR(31,339,307), XSPR_MASK, POWER10, 0, {RS}},
+{"mfspurr", XSPR(31,339,308), XSPR_MASK, POWER10, 0, {RS}},
{"mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfpurr", XSPR(31,339,309), XSPR_MASK, POWER10, 0, {RS}},
{"mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhdec", XSPR(31,339,310), XSPR_MASK, POWER10, 0, {RS}},
{"mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE, 0, {RT}},
{"mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhrmor", XSPR(31,339,313), XSPR_MASK, POWER10, 0, {RS}},
{"mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhsrr0", XSPR(31,339,314), XSPR_MASK, POWER10, 0, {RS}},
{"mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhsrr1", XSPR(31,339,315), XSPR_MASK, POWER10, 0, {RS}},
{"mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE, 0, {RT}},
{"mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE, 0, {RT}},
{"mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE, 0, {RT}},
+{"mflpcr", XSPR(31,339,318), XSPR_MASK, POWER10, 0, {RS}},
{"mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE, 0, {RT}},
+{"mflpidr", XSPR(31,339,319), XSPR_MASK, POWER10, 0, {RS}},
{"mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhmer", XSPR(31,339,336), XSPR_MASK, POWER7, 0, {RS}},
{"mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhmeer", XSPR(31,339,337), XSPR_MASK, POWER7, 0, {RS}},
+{"mfpcr", XSPR(31,339,338), XSPR_MASK, POWER10, 0, {RS}},
+{"mfheir", XSPR(31,339,339), XSPR_MASK, POWER10, 0, {RS}},
{"mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfamor", XSPR(31,339,349), XSPR_MASK, POWER7, 0, {RS}},
{"mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE, 0, {RT}},
@@ -6824,6 +6861,14 @@ const struct powerpc_opcode powerpc_opco
{"mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, 0, {RT}},
+{"mftir", XSPR(31,339,446), XSPR_MASK, POWER10, 0, {RS}},
+{"mfptcr", XSPR(31,339,464), XSPR_MASK, POWER10, 0, {RS}},
+{"mfuspgr0", XSPR(31,339,496), XSPR_MASK, POWER10, 0, {RS}},
+{"mfuspgr1", XSPR(31,339,497), XSPR_MASK, POWER10, 0, {RS}},
+{"mfurmor", XSPR(31,339,505), XSPR_MASK, POWER10, 0, {RS}},
+{"mfusrr0", XSPR(31,339,506), XSPR_MASK, POWER10, 0, {RS}},
+{"mfusrr1", XSPR(31,339,507), XSPR_MASK, POWER10, 0, {RS}},
+{"mfsmfctrl", XSPR(31,339,511), XSPR_MASK, POWER10, 0, {RS}},
{"mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, 0, {RT}},
{"mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, 0, {RT}},
{"mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, 0, {RT}},
@@ -6848,18 +6893,36 @@ const struct powerpc_opcode powerpc_opco
{"mfdpdr", XSPR(31,339,630), XSPR_MASK, PPC860, 0, {RT}},
{"mfdpir", XSPR(31,339,631), XSPR_MASK, PPC860, 0, {RT}},
{"mfimmr", XSPR(31,339,638), XSPR_MASK, PPC860, 0, {RT}},
+{"mfusier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}},
+{"mfsier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}},
+{"mfusier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}},
+{"mfsier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}},
+{"mfummcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}},
+{"mfmmcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}},
+{"mfusier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}},
+{"mfsier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}},
+{"mfummcra", XSPR(31,339,770), XSPR_MASK, POWER9, 0, {RS}},
+{"mfmmcra", XSPR(31,339,770), XSPR_MASK, POWER7, 0, {RS}},
{"mfupmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER7, 0, {RT}},
+{"mfummcr0", XSPR(31,339,779), XSPR_MASK, POWER9, 0, {RS}},
+{"mfmmcr0", XSPR(31,339,779), XSPR_MASK, POWER7, 0, {RS}},
+{"mfusiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}},
+{"mfsiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}},
+{"mfusdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}},
+{"mfsdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}},
+{"mfummcr1", XSPR(31,339,782), XSPR_MASK, POWER9, 0, {RS}},
+{"mfmmcr1", XSPR(31,339,782), XSPR_MASK, POWER7, 0, {RS}},
{"mfmi_ctr", XSPR(31,339,784), XSPR_MASK, PPC860, 0, {RT}},
{"mfmi_ap", XSPR(31,339,786), XSPR_MASK, PPC860, 0, {RT}},
{"mfmi_epn", XSPR(31,339,787), XSPR_MASK, PPC860, 0, {RT}},
@@ -6873,12 +6936,25 @@ const struct powerpc_opcode powerpc_opco
{"mfmd_twc", XSPR(31,339,797), XSPR_MASK, PPC860, 0, {RT}},
{"mfmd_rpn", XSPR(31,339,798), XSPR_MASK, PPC860, 0, {RT}},
{"mfm_tw", XSPR(31,339,799), XSPR_MASK, PPC860, 0, {RT}},
+{"mfbescrs", XSPR(31,339,800), XSPR_MASK, POWER9, 0, {RS}},
+{"mfbescrsu", XSPR(31,339,801), XSPR_MASK, POWER9, 0, {RS}},
+{"mfbescrr", XSPR(31,339,802), XSPR_MASK, POWER9, 0, {RS}},
+{"mfbescrru", XSPR(31,339,803), XSPR_MASK, POWER9, 0, {RS}},
+{"mfebbhr", XSPR(31,339,804), XSPR_MASK, POWER9, 0, {RS}},
+{"mfebbrr", XSPR(31,339,805), XSPR_MASK, POWER9, 0, {RS}},
+{"mfbescr", XSPR(31,339,806), XSPR_MASK, POWER9, 0, {RS}},
+{"mftar", XSPR(31,339,815), XSPR_MASK, POWER9, 0, {RS}},
+{"mfasdr", XSPR(31,339,816), XSPR_MASK, POWER10, 0, {RS}},
{"mfmi_dbcam", XSPR(31,339,816), XSPR_MASK, PPC860, 0, {RT}},
{"mfmi_dbram0", XSPR(31,339,817), XSPR_MASK, PPC860, 0, {RT}},
{"mfmi_dbram1", XSPR(31,339,818), XSPR_MASK, PPC860, 0, {RT}},
+{"mfpsscr", XSPR(31,339,823), XSPR_MASK, POWER10, 0, {RS}},
{"mfmd_dbcam", XSPR(31,339,824), XSPR_MASK, PPC860, 0, {RT}},
{"mfmd_dbram0", XSPR(31,339,825), XSPR_MASK, PPC860, 0, {RT}},
{"mfmd_dbram1", XSPR(31,339,826), XSPR_MASK, PPC860, 0, {RT}},
+{"mfic", XSPR(31,339,848), XSPR_MASK, POWER8, 0, {RS}},
+{"mfvtb", XSPR(31,339,849), XSPR_MASK, POWER8, 0, {RS}},
+{"mfhpsscr", XSPR(31,339,855), XSPR_MASK, POWER10, 0, {RS}},
{"mfivndx", XSPR(31,339,880), XSPR_MASK, TITAN, 0, {RT}},
{"mfdvndx", XSPR(31,339,881), XSPR_MASK, TITAN, 0, {RT}},
{"mfivlim", XSPR(31,339,882), XSPR_MASK, TITAN, 0, {RT}},
@@ -7051,14 +7127,15 @@ const struct powerpc_opcode powerpc_opco
{"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}},
-{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}},
-
-{"miso", 0x7f5ad378, 0xffffffff, E6500, 0, {0}},
-
-/* The "yield", "mdoio" and "mdoom" instructions are extended mnemonics for
- "or rX,rX,rX", with rX being r27, r29 and r30 respectively. */
+/* or 26,26,26 */
+{"miso", 0x7f5ad378, 0xffffffff, POWER8|E6500, 0, {0}},
+/* or 27,27,27 */
{"yield", 0x7f7bdb78, 0xffffffff, POWER7, 0, {0}},
+/* or 28,28,28 */
+{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}},
+/* or 29,29,29 */
{"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, 0, {0}},
+/* or 30,30,30 */
{"mdoom", 0x7fdef378, 0xffffffff, POWER7, 0, {0}},
{"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RSB}},
{"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}},
@@ -7124,8 +7201,10 @@ const struct powerpc_opcode powerpc_opco
{"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, 0, {RS}},
{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, 0, {RS}},
+{"mtudscr", XSPR(31,467, 3), XSPR_MASK, POWER9, 0, {RS}},
{"mtlr", XSPR(31,467, 8), XSPR_MASK, COM, 0, {RS}},
{"mtctr", XSPR(31,467, 9), XSPR_MASK, COM, 0, {RS}},
+{"mtuamr", XSPR(31,467, 13), XSPR_MASK, POWER9, 0, {RS}},
{"mtdscr", XSPR(31,467, 17), XSPR_MASK, POWER6, 0, {RS}},
{"mttid", XSPR(31,467, 17), XSPR_MASK, POWER, 0, {RS}},
{"mtdsisr", XSPR(31,467, 18), XSPR_MASK, COM, TITAN, {RS}},
@@ -7138,13 +7217,20 @@ const struct powerpc_opcode powerpc_opco
{"mtsrr0", XSPR(31,467, 26), XSPR_MASK, COM, 0, {RS}},
{"mtsrr1", XSPR(31,467, 27), XSPR_MASK, COM, 0, {RS}},
{"mtcfar", XSPR(31,467, 28), XSPR_MASK, POWER6, 0, {RS}},
+{"mtamr", XSPR(31,467, 29), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpidr", XSPR(31,467, 48), XSPR_MASK, POWER10, 0, {RS}},
{"mtpid", XSPR(31,467, 48), XSPR_MASK, BOOKE, 0, {RS}},
{"mtdecar", XSPR(31,467, 54), XSPR_MASK, BOOKE, 0, {RS}},
{"mtcsrr0", XSPR(31,467, 58), XSPR_MASK, BOOKE, 0, {RS}},
{"mtcsrr1", XSPR(31,467, 59), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtiamr", XSPR(31,467, 61), XSPR_MASK, POWER10, 0, {RS}},
{"mtdear", XSPR(31,467, 61), XSPR_MASK, BOOKE, 0, {RS}},
{"mtesr", XSPR(31,467, 62), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivpr", XSPR(31,467, 63), XSPR_MASK, BOOKE, 0, {RS}},
+{"mttfhar", XSPR(31,467,128), XSPR_MASK, POWER9, 0, {RS}},
+{"mttfiar", XSPR(31,467,129), XSPR_MASK, POWER9, 0, {RS}},
+{"mttexasr", XSPR(31,467,130), XSPR_MASK, POWER9, 0, {RS}},
+{"mttexasru", XSPR(31,467,131), XSPR_MASK, POWER9, 0, {RS}},
{"mtcmpa", XSPR(31,467,144), XSPR_MASK, PPC860, 0, {RS}},
{"mtcmpb", XSPR(31,467,145), XSPR_MASK, PPC860, 0, {RS}},
{"mtcmpc", XSPR(31,467,146), XSPR_MASK, PPC860, 0, {RS}},
@@ -7155,13 +7241,24 @@ const struct powerpc_opcode powerpc_opco
{"mtcountb", XSPR(31,467,151), XSPR_MASK, PPC860, 0, {RS}},
{"mtctrl", XSPR(31,467,152), XSPR_MASK, POWER4, 0, {RS}},
{"mtcmpe", XSPR(31,467,152), XSPR_MASK, PPC860, 0, {RS}},
+{"mtfscr", XSPR(31,467,153), XSPR_MASK, POWER10, 0, {RS}},
{"mtcmpf", XSPR(31,467,153), XSPR_MASK, PPC860, 0, {RS}},
{"mtcmpg", XSPR(31,467,154), XSPR_MASK, PPC860, 0, {RS}},
{"mtcmph", XSPR(31,467,155), XSPR_MASK, PPC860, 0, {RS}},
{"mtlctrl1", XSPR(31,467,156), XSPR_MASK, PPC860, 0, {RS}},
+{"mtuamor", XSPR(31,467,157), XSPR_MASK, POWER7, 0, {RS}},
{"mtlctrl2", XSPR(31,467,157), XSPR_MASK, PPC860, 0, {RS}},
{"mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, 0, {RS}},
+{"mtpspb", XSPR(31,467,159), XSPR_MASK, POWER10, 0, {RS}},
{"mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, 0, {RS}},
+{"mtdpdes", XSPR(31,467,176), XSPR_MASK, POWER10, 0, {RS}},
+{"mtdawr0", XSPR(31,467,180), XSPR_MASK, POWER10, 0, {RS}},
+{"mtdawr1", XSPR(31,467,181), XSPR_MASK, POWER10, 0, {RS}},
+{"mtrpr", XSPR(31,467,186), XSPR_MASK, POWER10, 0, {RS}},
+{"mtciabr", XSPR(31,467,187), XSPR_MASK, POWER10, 0, {RS}},
+{"mtdawrx0", XSPR(31,467,188), XSPR_MASK, POWER10, 0, {RS}},
+{"mtdawrx1", XSPR(31,467,189), XSPR_MASK, POWER10, 0, {RS}},
+{"mthfscr", XSPR(31,467,190), XSPR_MASK, POWER10, 0, {RS}},
{"mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, 0, {RS}},
{"mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, 0, {RS}},
{"mtsprg", XSPR(31,467,256), XSPRG_MASK, PPC, 0, {SPRG, RS}},
@@ -7177,20 +7274,38 @@ const struct powerpc_opcode powerpc_opco
{"mtear", XSPR(31,467,282), XSPR_MASK, PPC, TITAN, {RS}},
{"mttbl", XSPR(31,467,284), XSPR_MASK, PPC, 0, {RS}},
{"mttbu", XSPR(31,467,285), XSPR_MASK, PPC, 0, {RS}},
+{"mttbu40", XSPR(31,467,286), XSPR_MASK, POWER10, 0, {RS}},
+{"mthsprg0", XSPR(31,467,304), XSPR_MASK, POWER10, 0, {RS}},
{"mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthsprg1", XSPR(31,467,305), XSPR_MASK, POWER10, 0, {RS}},
+{"mthdisr", XSPR(31,467,306), XSPR_MASK, POWER10, 0, {RS}},
+{"mthdar", XSPR(31,467,307), XSPR_MASK, POWER10, 0, {RS}},
+{"mtspurr", XSPR(31,467,308), XSPR_MASK, POWER10, 0, {RS}},
{"mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtpurr", XSPR(31,467,309), XSPR_MASK, POWER10, 0, {RS}},
{"mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthdec", XSPR(31,467,310), XSPR_MASK, POWER10, 0, {RS}},
{"mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE, 0, {RS}},
{"mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthrmor", XSPR(31,467,313), XSPR_MASK, POWER10, 0, {RS}},
{"mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthsrr0", XSPR(31,467,314), XSPR_MASK, POWER10, 0, {RS}},
{"mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthsrr1", XSPR(31,467,315), XSPR_MASK, POWER10, 0, {RS}},
{"mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE, 0, {RS}},
{"mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE, 0, {RS}},
{"mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtlpcr", XSPR(31,467,318), XSPR_MASK, POWER10, 0, {RS}},
{"mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtlpidr", XSPR(31,467,319), XSPR_MASK, POWER10, 0, {RS}},
{"mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthmer", XSPR(31,467,336), XSPR_MASK, POWER7, 0, {RS}},
{"mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthmeer", XSPR(31,467,337), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpcr", XSPR(31,467,338), XSPR_MASK, POWER10, 0, {RS}},
+{"mtheir", XSPR(31,467,339), XSPR_MASK, POWER10, 0, {RS}},
{"mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtamor", XSPR(31,467,349), XSPR_MASK, POWER7, 0, {RS}},
{"mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE, 0, {RS}},
@@ -7207,6 +7322,13 @@ const struct powerpc_opcode powerpc_opco
{"mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtptcr", XSPR(31,467,464), XSPR_MASK, POWER10, 0, {RS}},
+{"mtuspgr0", XSPR(31,467,496), XSPR_MASK, POWER10, 0, {RS}},
+{"mtuspgr1", XSPR(31,467,497), XSPR_MASK, POWER10, 0, {RS}},
+{"mturmor", XSPR(31,467,505), XSPR_MASK, POWER10, 0, {RS}},
+{"mtusrr0", XSPR(31,467,506), XSPR_MASK, POWER10, 0, {RS}},
+{"mtusrr1", XSPR(31,467,507), XSPR_MASK, POWER10, 0, {RS}},
+{"mtsmfctrl", XSPR(31,467,511), XSPR_MASK, POWER10, 0, {RS}},
{"mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, 0, {RS}},
{"mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, 0, {RS}},
{"mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, 0, {RS}},
@@ -7221,12 +7343,44 @@ const struct powerpc_opcode powerpc_opco
{"mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI, 0, {RS}},
{"mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI, 0, {RS}},
{"mtmcsr", XSPR(31,467,572), XSPR_MASK, PPCRFMCI, 0, {RS}},
+{"mtsier2", XSPR(31,467,752), XSPR_MASK, POWER10, 0, {RS}},
+{"mtsier3", XSPR(31,467,753), XSPR_MASK, POWER10, 0, {RS}},
+{"mtmmcr3", XSPR(31,467,754), XSPR_MASK, POWER10, 0, {RS}},
+{"mtummcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}},
+{"mtmmcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}},
+{"mtummcra", XSPR(31,467,770), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc1", XSPR(31,467,771), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc2", XSPR(31,467,772), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc3", XSPR(31,467,773), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc4", XSPR(31,467,774), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc5", XSPR(31,467,775), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc6", XSPR(31,467,776), XSPR_MASK, POWER9, 0, {RS}},
+{"mtummcr0", XSPR(31,467,779), XSPR_MASK, POWER9, 0, {RS}},
+{"mtsier", XSPR(31,467,784), XSPR_MASK, POWER10, 0, {RS}},
+{"mtmmcra", XSPR(31,467,786), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc1", XSPR(31,467,787), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc2", XSPR(31,467,788), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc3", XSPR(31,467,789), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc4", XSPR(31,467,790), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc5", XSPR(31,467,791), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc6", XSPR(31,467,792), XSPR_MASK, POWER7, 0, {RS}},
+{"mtmmcr0", XSPR(31,467,795), XSPR_MASK, POWER7, 0, {RS}},
+{"mtsiar", XSPR(31,467,796), XSPR_MASK, POWER10, 0, {RS}},
+{"mtsdar", XSPR(31,467,797), XSPR_MASK, POWER10, 0, {RS}},
+{"mtmmcr1", XSPR(31,467,798), XSPR_MASK, POWER7, 0, {RS}},
+{"mtbescrs", XSPR(31,467,800), XSPR_MASK, POWER9, 0, {RS}},
+{"mtbescrsu", XSPR(31,467,801), XSPR_MASK, POWER9, 0, {RS}},
+{"mtbescrr", XSPR(31,467,802), XSPR_MASK, POWER9, 0, {RS}},
+{"mtbescrru", XSPR(31,467,803), XSPR_MASK, POWER9, 0, {RS}},
+{"mtebbhr", XSPR(31,467,804), XSPR_MASK, POWER9, 0, {RS}},
+{"mtebbrr", XSPR(31,467,805), XSPR_MASK, POWER9, 0, {RS}},
+{"mtbescr", XSPR(31,467,806), XSPR_MASK, POWER9, 0, {RS}},
+{"mttar", XSPR(31,467,815), XSPR_MASK, POWER9, 0, {RS}},
+{"mtasdr", XSPR(31,467,816), XSPR_MASK, POWER10, 0, {RS}},
+{"mtpsscr", XSPR(31,467,823), XSPR_MASK, POWER10, 0, {RS}},
+{"mtic", XSPR(31,467,848), XSPR_MASK, POWER8, 0, {RS}},
+{"mtvtb", XSPR(31,467,849), XSPR_MASK, POWER8, 0, {RS}},
+{"mthpsscr", XSPR(31,467,855), XSPR_MASK, POWER10, 0, {RS}},
{"mtivndx", XSPR(31,467,880), XSPR_MASK, TITAN, 0, {RS}},
{"mtdvndx", XSPR(31,467,881), XSPR_MASK, TITAN, 0, {RS}},
{"mtivlim", XSPR(31,467,882), XSPR_MASK, TITAN, 0, {RS}},
@@ -8301,7 +8455,7 @@ const struct powerpc_opcode powerpc_opco
{"xxgenpcvdm", X(60,949), XX1_MASK, POWER10, PPCVLE, {XT6, VB, UIMM}},
{"xvxexpdp", XX2VA(60,475,0),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
{"xvxsigdp", XX2VA(60,475,1),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
-{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {OBF, XB6}},
+{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {BF, XB6}},
{"xxbrh", XX2VA(60,475,7),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
{"xvxexpsp", XX2VA(60,475,8),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
{"xvxsigsp", XX2VA(60,475,9),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/movdir-16bit.d 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,21 @@
+#as: -I${srcdir}/$subdir
+#objdump: -dw -Mi8086
+#name: i386 16-bit MOVDIR[I,64B] insns
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+#pass
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-i386/pr26711-1.d 2020-11-25 14:38:12.000000000 +0000
@@ -0,0 +1,10 @@
+#source: ../ld-x86-64/pr26711.s
+#source: ../ld-x86-64/start.s
+#as: --32 -mx86-used-note=no
+#ld: -m elf_i386 -z ibt
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ ]+Owner[ ]+Data size[ ]+Description
+ GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
+ Properties: x86 feature: IBT
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-i386/pr26711-2.d 2020-11-25 14:38:12.000000000 +0000
@@ -0,0 +1,10 @@
+#source: ../ld-x86-64/pr26711.s
+#source: ../ld-x86-64/start.s
+#as: --32 -mx86-used-note=no
+#ld: -m elf_i386 -z shstk
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ ]+Owner[ ]+Data size[ ]+Description
+ GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
+ Properties: x86 feature: SHSTK
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-i386/pr26711-3.d 2020-11-25 14:38:12.000000000 +0000
@@ -0,0 +1,10 @@
+#source: ../ld-x86-64/pr26711.s
+#source: ../ld-x86-64/start.s
+#as: --32 -mx86-used-note=no
+#ld: -m elf_i386 -z ibt -z shstk
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ ]+Owner[ ]+Data size[ ]+Description
+ GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
+ Properties: x86 feature: IBT, SHSTK
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-i386/pr26869.d 2020-11-25 14:38:12.000000000 +0000
@@ -0,0 +1,14 @@
+#as: --32
+#ld: -shared -melf_i386
+#readelf: -r -s --wide
+
+Relocation section '.rel.dyn' at offset 0x[a-f0-9]+ contains 1 entry:
+ Offset Info Type Sym. Value Symbol's Name
+0+[a-f0-9]+ 00000008 R_386_RELATIVE
+
+#...
+Symbol table '.symtab' contains [0-9]+ entries:
+ Num: Value Size Type Bind Vis Ndx Name
+#...
+ +[a-f0-9]+: 00000000 0 NOTYPE LOCAL DEFAULT 1 __ehdr_start
+#pass
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-i386/pr26869.s 2020-11-25 14:38:12.000000000 +0000
@@ -0,0 +1,3 @@
+ .text
+foo:
+ pushl __ehdr_start@GOT(%ebx)
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-x86-64/pr26711-1-x32.d 2020-11-25 14:38:14.000000000 +0000
@@ -0,0 +1,10 @@
+#source: pr26711.s
+#source: start.s
+#as: --x32 -mx86-used-note=no
+#ld: -m elf32_x86_64 -z ibt
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ ]+Owner[ ]+Data size[ ]+Description
+ GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
+ Properties: x86 feature: IBT
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-x86-64/pr26711-1.d 2020-11-25 14:38:14.000000000 +0000
@@ -0,0 +1,10 @@
+#source: pr26711.s
+#source: start.s
+#as: --64 -defsym __64_bit__=1 -mx86-used-note=no
+#ld: -m elf_x86_64 -z ibt
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ ]+Owner[ ]+Data size[ ]+Description
+ GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
+ Properties: x86 feature: IBT
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-x86-64/pr26711-2-x32.d 2020-11-25 14:38:14.000000000 +0000
@@ -0,0 +1,10 @@
+#source: pr26711.s
+#source: start.s
+#as: --x32 -mx86-used-note=no
+#ld: -m elf32_x86_64 -z shstk
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ ]+Owner[ ]+Data size[ ]+Description
+ GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
+ Properties: x86 feature: SHSTK
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-x86-64/pr26711-2.d 2020-11-25 14:38:14.000000000 +0000
@@ -0,0 +1,10 @@
+#source: pr26711.s
+#source: start.s
+#as: --64 -defsym __64_bit__=1 -mx86-used-note=no
+#ld: -m elf_x86_64 -z shstk
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ ]+Owner[ ]+Data size[ ]+Description
+ GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
+ Properties: x86 feature: SHSTK
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-x86-64/pr26711-3-x32.d 2020-11-25 14:38:14.000000000 +0000
@@ -0,0 +1,10 @@
+#source: pr26711.s
+#source: start.s
+#as: --x32 -mx86-used-note=no
+#ld: -m elf32_x86_64 -z ibt -z shstk
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ ]+Owner[ ]+Data size[ ]+Description
+ GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
+ Properties: x86 feature: IBT, SHSTK
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-x86-64/pr26711-3.d 2020-11-25 14:38:14.000000000 +0000
@@ -0,0 +1,10 @@
+#source: pr26711.s
+#source: start.s
+#as: --64 -defsym __64_bit__=1 -mx86-used-note=no
+#ld: -m elf_x86_64 -z ibt -z shstk
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ ]+Owner[ ]+Data size[ ]+Description
+ GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
+ Properties: x86 feature: IBT, SHSTK
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/ld/testsuite/ld-x86-64/pr26711.s 2020-11-25 14:38:14.000000000 +0000
@@ -0,0 +1,33 @@
+ .section ".note.gnu.property", "a"
+.ifdef __64_bit__
+ .p2align 3
+.else
+ .p2align 2
+.endif
+ .long 1f - 0f /* name length */
+ .long 5f - 2f /* data length */
+ .long 5 /* note type */
+0: .asciz "GNU" /* vendor name */
+1:
+.ifdef __64_bit__
+ .p2align 3
+.else
+ .p2align 2
+.endif
+2: .long 0xc0001002 /* pr_type. */
+ .long 4f - 3f /* pr_datasz. */
+3:
+ .long 0x30
+4:
+.ifdef __64_bit__
+ .p2align 3
+.else
+ .p2align 2
+.endif
+5:
+
+ .text
+ .globl foo
+ .type foo, @function
+foo:
+ ret
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/binutils/testsuite/binutils-all/x86-64/pr26808.dump 2020-11-25 14:37:37.000000000 +0000
@@ -0,0 +1,1440 @@
+Contents of the .debug_info.dwo section:
+
+ Compilation Unit @ offset 0x0:
+ Length: 0x178 (32-bit)
+ Version: 4
+ Abbrev Offset: 0x0
+ Pointer Size: 8
+ Section contributions:
+ .debug_abbrev.dwo: 0x0 0x154
+ .debug_line.dwo: 0x0 0x40
+ .debug_loc.dwo: 0x0 0x0
+ .debug_str_offsets.dwo: 0x0 0x14
+ <0><b>: Abbrev Number: 12 (DW_TAG_compile_unit)
+ <c> DW_AT_producer : GNU C++ 4.7.x-google 20120720 (prerelease)
+ <37> DW_AT_language : 4 (C++)
+ <38> DW_AT_name : dwp_test_main.cc
+ <49> DW_AT_comp_dir : /home/ccoutant/opensource/binutils-git/binutils/gold/testsuite
+ <88> DW_AT_GNU_dwo_id : 0xe5ba51d95c9aebc8
+ <1><90>: Abbrev Number: 7 (DW_TAG_base_type)
+ <91> DW_AT_byte_size : 4
+ <92> DW_AT_encoding : 5 (signed)
+ <93> DW_AT_name : int
+ <1><97>: Abbrev Number: 7 (DW_TAG_base_type)
+ <98> DW_AT_byte_size : 1
+ <99> DW_AT_encoding : 2 (boolean)
+ <9a> DW_AT_name : bool
+ <1><9f>: Abbrev Number: 13 (DW_TAG_subprogram)
+ <a0> DW_AT_external : 1
+ <a0> DW_AT_name : main
+ <a5> DW_AT_decl_file : 1
+ <a6> DW_AT_decl_line : 30
+ <a7> DW_AT_type : <0x90>
+ <ab> DW_AT_low_pc : (addr_index: 0x0): <no .debug_addr section>
+ <ac> DW_AT_high_pc : 0x304
+ <b4> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <b6> DW_AT_GNU_all_tail_call_sites: 1
+ <b6> DW_AT_sibling : <0x11b>
+ <2><ba>: Abbrev Number: 14 (DW_TAG_lexical_block)
+ <bb> DW_AT_low_pc : (addr_index: 0x1): <no .debug_addr section>
+ <bc> DW_AT_high_pc : 0x2fa
+ <3><c4>: Abbrev Number: 15 (DW_TAG_variable)
+ <c5> DW_AT_name : c1
+ <c8> DW_AT_decl_file : 1
+ <c9> DW_AT_decl_line : 32
+ <ca> DW_AT_type : signature: 0xb5faa2a4b7a919c4
+ <d2> DW_AT_location : 2 byte block: 91 60 (DW_OP_fbreg: -32)
+ <3><d5>: Abbrev Number: 15 (DW_TAG_variable)
+ <d6> DW_AT_name : c2
+ <d9> DW_AT_decl_file : 1
+ <da> DW_AT_decl_line : 33
+ <db> DW_AT_type : signature: 0xab98c7bc886f5266
+ <e3> DW_AT_location : 2 byte block: 91 50 (DW_OP_fbreg: -48)
+ <3><e6>: Abbrev Number: 16 (DW_TAG_variable)
+ <e7> DW_AT_name : __PRETTY_FUNCTION__
+ <fb> DW_AT_type : <0x13f>
+ <ff> DW_AT_artificial : 1
+ <ff> DW_AT_location : 2 byte block: fb 2 (DW_OP_GNU_addr_index <0x2>)
+ <3><102>: Abbrev Number: 14 (DW_TAG_lexical_block)
+ <103> DW_AT_low_pc : (addr_index: 0x3): <no .debug_addr section>
+ <104> DW_AT_high_pc : 0x2f
+ <4><10c>: Abbrev Number: 17 (DW_TAG_variable)
+ <10d> DW_AT_name : i
+ <10f> DW_AT_decl_file : 1
+ <110> DW_AT_decl_line : 37
+ <111> DW_AT_type : <0x90>
+ <115> DW_AT_location : 2 byte block: 91 6c (DW_OP_fbreg: -20)
+ <4><118>: Abbrev Number: 0
+ <3><119>: Abbrev Number: 0
+ <2><11a>: Abbrev Number: 0
+ <1><11b>: Abbrev Number: 18 (DW_TAG_array_type)
+ <11c> DW_AT_type : <0x137>
+ <120> DW_AT_sibling : <0x12b>
+ <2><124>: Abbrev Number: 19 (DW_TAG_subrange_type)
+ <125> DW_AT_type : <0x12b>
+ <129> DW_AT_upper_bound : 10
+ <2><12a>: Abbrev Number: 0
+ <1><12b>: Abbrev Number: 7 (DW_TAG_base_type)
+ <12c> DW_AT_byte_size : 8
+ <12d> DW_AT_encoding : 7 (unsigned)
+ <12e> DW_AT_name : sizetype
+ <1><137>: Abbrev Number: 7 (DW_TAG_base_type)
+ <138> DW_AT_byte_size : 1
+ <139> DW_AT_encoding : 6 (signed char)
+ <13a> DW_AT_name : char
+ <1><13f>: Abbrev Number: 20 (DW_TAG_const_type)
+ <140> DW_AT_type : <0x11b>
+ <1><144>: Abbrev Number: 21 (DW_TAG_variable)
+ <145> DW_AT_name : c3
+ <148> DW_AT_decl_file : 2
+ <149> DW_AT_decl_line : 57
+ <14a> DW_AT_type : signature: 0xb534bdc1f01629bb
+ <152> DW_AT_external : 1
+ <152> DW_AT_declaration : 1
+ <1><152>: Abbrev Number: 22 (DW_TAG_variable)
+ <153> DW_AT_name : v3
+ <156> DW_AT_decl_file : 2
+ <157> DW_AT_decl_line : 60
+ <158> DW_AT_type : <0x90>
+ <15c> DW_AT_external : 1
+ <15c> DW_AT_declaration : 1
+ <1><15c>: Abbrev Number: 18 (DW_TAG_array_type)
+ <15d> DW_AT_type : <0x137>
+ <161> DW_AT_sibling : <0x167>
+ <2><165>: Abbrev Number: 23 (DW_TAG_subrange_type)
+ <2><166>: Abbrev Number: 0
+ <1><167>: Abbrev Number: 22 (DW_TAG_variable)
+ <168> DW_AT_name : v4
+ <16b> DW_AT_decl_file : 2
+ <16c> DW_AT_decl_line : 61
+ <16d> DW_AT_type : <0x15c>
+ <171> DW_AT_external : 1
+ <171> DW_AT_declaration : 1
+ <1><171>: Abbrev Number: 22 (DW_TAG_variable)
+ <172> DW_AT_name : v5
+ <175> DW_AT_decl_file : 2
+ <176> DW_AT_decl_line : 62
+ <177> DW_AT_type : <0x15c>
+ <17b> DW_AT_external : 1
+ <17b> DW_AT_declaration : 1
+ <1><17b>: Abbrev Number: 0
+ Compilation Unit @ offset 0x17c:
+ Length: 0x5af (32-bit)
+ Version: 4
+ Abbrev Offset: 0x0
+ Pointer Size: 8
+ Section contributions:
+ .debug_abbrev.dwo: 0x154 0x21d
+ .debug_line.dwo: 0x40 0x3d
+ .debug_loc.dwo: 0x0 0x0
+ .debug_str_offsets.dwo: 0x14 0x44
+ <0><187>: Abbrev Number: 12 (DW_TAG_compile_unit)
+ <188> DW_AT_producer : GNU C++ 4.7.x-google 20120720 (prerelease)
+ <1b3> DW_AT_language : 4 (C++)
+ <1b4> DW_AT_name : dwp_test_1.cc
+ <1c2> DW_AT_comp_dir : /home/ccoutant/opensource/binutils-git/binutils/gold/testsuite
+ <201> DW_AT_GNU_dwo_id : 0x52f9c6092fdc3727
+ <1><209>: Abbrev Number: 13 (DW_TAG_class_type)
+ <20a> DW_AT_name : C1
+ <20d> DW_AT_signature : signature: 0xb5faa2a4b7a919c4
+ <215> DW_AT_declaration : 1
+ <215> DW_AT_sibling : <0x242>
+ <2><219>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <21a> DW_AT_external : 1
+ <21a> DW_AT_name : (indexed string: 0x0): testcase1
+ <21b> DW_AT_decl_file : 1
+ <21c> DW_AT_decl_line : 28
+ <21d> DW_AT_linkage_name: (indexed string: 0xc): _ZN2C19testcase1Ev
+ <21e> DW_AT_type : <0x249>
+ <222> DW_AT_accessibility: 1 (public)
+ <223> DW_AT_declaration : 1
+ <2><223>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <224> DW_AT_external : 1
+ <224> DW_AT_name : (indexed string: 0x1): testcase2
+ <225> DW_AT_decl_file : 1
+ <226> DW_AT_decl_line : 31
+ <227> DW_AT_linkage_name: (indexed string: 0xd): _ZN2C19testcase2Ev
+ <228> DW_AT_type : <0x249>
+ <22c> DW_AT_accessibility: 1 (public)
+ <22d> DW_AT_declaration : 1
+ <2><22d>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <22e> DW_AT_external : 1
+ <22e> DW_AT_name : (indexed string: 0x4): testcase3
+ <22f> DW_AT_decl_file : 1
+ <230> DW_AT_decl_line : 32
+ <231> DW_AT_linkage_name: (indexed string: 0xe): _ZN2C19testcase3Ev
+ <232> DW_AT_type : <0x249>
+ <236> DW_AT_accessibility: 1 (public)
+ <237> DW_AT_declaration : 1
+ <2><237>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <238> DW_AT_external : 1
+ <238> DW_AT_name : (indexed string: 0xa): testcase4
+ <239> DW_AT_decl_file : 1
+ <23a> DW_AT_decl_line : 33
+ <23b> DW_AT_linkage_name: (indexed string: 0xf): _ZN2C19testcase4Ev
+ <23c> DW_AT_type : <0x249>
+ <240> DW_AT_accessibility: 1 (public)
+ <241> DW_AT_declaration : 1
+ <2><241>: Abbrev Number: 0
+ <1><242>: Abbrev Number: 7 (DW_TAG_base_type)
+ <243> DW_AT_byte_size : 4
+ <244> DW_AT_encoding : 5 (signed)
+ <245> DW_AT_name : int
+ <1><249>: Abbrev Number: 7 (DW_TAG_base_type)
+ <24a> DW_AT_byte_size : 1
+ <24b> DW_AT_encoding : 2 (boolean)
+ <24c> DW_AT_name : bool
+ <1><251>: Abbrev Number: 15 (DW_TAG_pointer_type)
+ <252> DW_AT_byte_size : 8
+ <253> DW_AT_type : signature: 0xb5faa2a4b7a919c4
+ <1><25b>: Abbrev Number: 13 (DW_TAG_class_type)
+ <25c> DW_AT_name : C2
+ <25f> DW_AT_signature : signature: 0xab98c7bc886f5266
+ <267> DW_AT_declaration : 1
+ <267> DW_AT_sibling : <0x294>
+ <2><26b>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <26c> DW_AT_external : 1
+ <26c> DW_AT_name : (indexed string: 0x0): testcase1
+ <26d> DW_AT_decl_file : 1
+ <26e> DW_AT_decl_line : 40
+ <26f> DW_AT_linkage_name: (indexed string: 0x7): _ZN2C29testcase1Ev
+ <270> DW_AT_type : <0x249>
+ <274> DW_AT_accessibility: 1 (public)
+ <275> DW_AT_declaration : 1
+ <2><275>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <276> DW_AT_external : 1
+ <276> DW_AT_name : (indexed string: 0x1): testcase2
+ <277> DW_AT_decl_file : 1
+ <278> DW_AT_decl_line : 41
+ <279> DW_AT_linkage_name: (indexed string: 0x8): _ZN2C29testcase2Ev
+ <27a> DW_AT_type : <0x249>
+ <27e> DW_AT_accessibility: 1 (public)
+ <27f> DW_AT_declaration : 1
+ <2><27f>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <280> DW_AT_external : 1
+ <280> DW_AT_name : (indexed string: 0x4): testcase3
+ <281> DW_AT_decl_file : 1
+ <282> DW_AT_decl_line : 42
+ <283> DW_AT_linkage_name: (indexed string: 0x9): _ZN2C29testcase3Ev
+ <284> DW_AT_type : <0x249>
+ <288> DW_AT_accessibility: 1 (public)
+ <289> DW_AT_declaration : 1
+ <2><289>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <28a> DW_AT_external : 1
+ <28a> DW_AT_name : (indexed string: 0xa): testcase4
+ <28b> DW_AT_decl_file : 1
+ <28c> DW_AT_decl_line : 43
+ <28d> DW_AT_linkage_name: (indexed string: 0xb): _ZN2C29testcase4Ev
+ <28e> DW_AT_type : <0x249>
+ <292> DW_AT_accessibility: 1 (public)
+ <293> DW_AT_declaration : 1
+ <2><293>: Abbrev Number: 0
+ <1><294>: Abbrev Number: 15 (DW_TAG_pointer_type)
+ <295> DW_AT_byte_size : 8
+ <296> DW_AT_type : signature: 0xab98c7bc886f5266
+ <1><29e>: Abbrev Number: 13 (DW_TAG_class_type)
+ <29f> DW_AT_name : C3
+ <2a2> DW_AT_signature : signature: 0xb534bdc1f01629bb
+ <2aa> DW_AT_declaration : 1
+ <2aa> DW_AT_sibling : <0x2cd>
+ <2><2ae>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <2af> DW_AT_external : 1
+ <2af> DW_AT_name : (indexed string: 0x0): testcase1
+ <2b0> DW_AT_decl_file : 1
+ <2b1> DW_AT_decl_line : 50
+ <2b2> DW_AT_linkage_name: (indexed string: 0x2): _ZN2C39testcase1Ev
+ <2b3> DW_AT_type : <0x249>
+ <2b7> DW_AT_accessibility: 1 (public)
+ <2b8> DW_AT_declaration : 1
+ <2><2b8>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <2b9> DW_AT_external : 1
+ <2b9> DW_AT_name : (indexed string: 0x1): testcase2
+ <2ba> DW_AT_decl_file : 1
+ <2bb> DW_AT_decl_line : 51
+ <2bc> DW_AT_linkage_name: (indexed string: 0x3): _ZN2C39testcase2Ev
+ <2bd> DW_AT_type : <0x249>
+ <2c1> DW_AT_accessibility: 1 (public)
+ <2c2> DW_AT_declaration : 1
+ <2><2c2>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <2c3> DW_AT_external : 1
+ <2c3> DW_AT_name : (indexed string: 0x4): testcase3
+ <2c4> DW_AT_decl_file : 1
+ <2c5> DW_AT_decl_line : 52
+ <2c6> DW_AT_linkage_name: (indexed string: 0x5): _ZN2C39testcase3Ev
+ <2c7> DW_AT_type : <0x249>
+ <2cb> DW_AT_accessibility: 1 (public)
+ <2cc> DW_AT_declaration : 1
+ <2><2cc>: Abbrev Number: 0
+ <1><2cd>: Abbrev Number: 15 (DW_TAG_pointer_type)
+ <2ce> DW_AT_byte_size : 8
+ <2cf> DW_AT_type : signature: 0xb534bdc1f01629bb
+ <1><2d7>: Abbrev Number: 16 (DW_TAG_subprogram)
+ <2d8> DW_AT_external : 1
+ <2d8> DW_AT_name : f13i
+ <2dd> DW_AT_decl_file : 1
+ <2de> DW_AT_decl_line : 70
+ <2df> DW_AT_linkage_name: _Z4f13iv
+ <2e8> DW_AT_low_pc : (addr_index: 0x0): <no .debug_addr section>
+ <2e9> DW_AT_high_pc : 0x6
+ <2f1> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <2f3> DW_AT_GNU_all_call_sites: 1
+ <1><2f3>: Abbrev Number: 17 (DW_TAG_subprogram)
+ <2f4> DW_AT_specification: <0x219>
+ <2f8> DW_AT_decl_file : 2
+ <2f9> DW_AT_decl_line : 30
+ <2fa> DW_AT_low_pc : (addr_index: 0x1): <no .debug_addr section>
+ <2fb> DW_AT_high_pc : 0x20
+ <303> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <305> DW_AT_object_pointer: <0x30d>
+ <309> DW_AT_GNU_all_tail_call_sites: 1
+ <309> DW_AT_sibling : <0x317>
+ <2><30d>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <30e> DW_AT_name : (indexed string: 0x10): this
+ <30f> DW_AT_type : <0x317>
+ <313> DW_AT_artificial : 1
+ <313> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><316>: Abbrev Number: 0
+ <1><317>: Abbrev Number: 19 (DW_TAG_const_type)
+ <318> DW_AT_type : <0x251>
+ <1><31c>: Abbrev Number: 20 (DW_TAG_subprogram)
+ <31d> DW_AT_specification: <0x223>
+ <321> DW_AT_decl_file : 2
+ <322> DW_AT_decl_line : 38
+ <323> DW_AT_low_pc : (addr_index: 0x2): <no .debug_addr section>
+ <324> DW_AT_high_pc : 0x18
+ <32c> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <32e> DW_AT_object_pointer: <0x336>
+ <332> DW_AT_GNU_all_call_sites: 1
+ <332> DW_AT_sibling : <0x340>
+ <2><336>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <337> DW_AT_name : (indexed string: 0x10): this
+ <338> DW_AT_type : <0x317>
+ <33c> DW_AT_artificial : 1
+ <33c> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><33f>: Abbrev Number: 0
+ <1><340>: Abbrev Number: 20 (DW_TAG_subprogram)
+ <341> DW_AT_specification: <0x22d>
+ <345> DW_AT_decl_file : 2
+ <346> DW_AT_decl_line : 46
+ <347> DW_AT_low_pc : (addr_index: 0x3): <no .debug_addr section>
+ <348> DW_AT_high_pc : 0x18
+ <350> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <352> DW_AT_object_pointer: <0x35a>
+ <356> DW_AT_GNU_all_call_sites: 1
+ <356> DW_AT_sibling : <0x364>
+ <2><35a>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <35b> DW_AT_name : (indexed string: 0x10): this
+ <35c> DW_AT_type : <0x317>
+ <360> DW_AT_artificial : 1
+ <360> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><363>: Abbrev Number: 0
+ <1><364>: Abbrev Number: 20 (DW_TAG_subprogram)
+ <365> DW_AT_specification: <0x237>
+ <369> DW_AT_decl_file : 2
+ <36a> DW_AT_decl_line : 54
+ <36b> DW_AT_low_pc : (addr_index: 0x4): <no .debug_addr section>
+ <36c> DW_AT_high_pc : 0x16
+ <374> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <376> DW_AT_object_pointer: <0x37e>
+ <37a> DW_AT_GNU_all_call_sites: 1
+ <37a> DW_AT_sibling : <0x388>
+ <2><37e>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <37f> DW_AT_name : (indexed string: 0x10): this
+ <380> DW_AT_type : <0x317>
+ <384> DW_AT_artificial : 1
+ <384> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><387>: Abbrev Number: 0
+ <1><388>: Abbrev Number: 20 (DW_TAG_subprogram)
+ <389> DW_AT_specification: <0x26b>
+ <38d> DW_AT_decl_file : 2
+ <38e> DW_AT_decl_line : 62
+ <38f> DW_AT_low_pc : (addr_index: 0x5): <no .debug_addr section>
+ <390> DW_AT_high_pc : 0x16
+ <398> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <39a> DW_AT_object_pointer: <0x3a2>
+ <39e> DW_AT_GNU_all_call_sites: 1
+ <39e> DW_AT_sibling : <0x3ac>
+ <2><3a2>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <3a3> DW_AT_name : (indexed string: 0x10): this
+ <3a4> DW_AT_type : <0x3ac>
+ <3a8> DW_AT_artificial : 1
+ <3a8> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><3ab>: Abbrev Number: 0
+ <1><3ac>: Abbrev Number: 19 (DW_TAG_const_type)
+ <3ad> DW_AT_type : <0x294>
+ <1><3b1>: Abbrev Number: 20 (DW_TAG_subprogram)
+ <3b2> DW_AT_specification: <0x275>
+ <3b6> DW_AT_decl_file : 2
+ <3b7> DW_AT_decl_line : 72
+ <3b8> DW_AT_low_pc : (addr_index: 0x6): <no .debug_addr section>
+ <3b9> DW_AT_high_pc : 0x1b
+ <3c1> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <3c3> DW_AT_object_pointer: <0x3cb>
+ <3c7> DW_AT_GNU_all_call_sites: 1
+ <3c7> DW_AT_sibling : <0x3d5>
+ <2><3cb>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <3cc> DW_AT_name : (indexed string: 0x10): this
+ <3cd> DW_AT_type : <0x3ac>
+ <3d1> DW_AT_artificial : 1
+ <3d1> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><3d4>: Abbrev Number: 0
+ <1><3d5>: Abbrev Number: 20 (DW_TAG_subprogram)
+ <3d6> DW_AT_specification: <0x27f>
+ <3da> DW_AT_decl_file : 2
+ <3db> DW_AT_decl_line : 82
+ <3dc> DW_AT_low_pc : (addr_index: 0x7): <no .debug_addr section>
+ <3dd> DW_AT_high_pc : 0x1b
+ <3e5> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <3e7> DW_AT_object_pointer: <0x3ef>
+ <3eb> DW_AT_GNU_all_call_sites: 1
+ <3eb> DW_AT_sibling : <0x3f9>
+ <2><3ef>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <3f0> DW_AT_name : (indexed string: 0x10): this
+ <3f1> DW_AT_type : <0x3ac>
+ <3f5> DW_AT_artificial : 1
+ <3f5> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><3f8>: Abbrev Number: 0
+ <1><3f9>: Abbrev Number: 20 (DW_TAG_subprogram)
+ <3fa> DW_AT_specification: <0x289>
+ <3fe> DW_AT_decl_file : 2
+ <3ff> DW_AT_decl_line : 92
+ <400> DW_AT_low_pc : (addr_index: 0x8): <no .debug_addr section>
+ <401> DW_AT_high_pc : 0x19
+ <409> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <40b> DW_AT_object_pointer: <0x413>
+ <40f> DW_AT_GNU_all_call_sites: 1
+ <40f> DW_AT_sibling : <0x41d>
+ <2><413>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <414> DW_AT_name : (indexed string: 0x10): this
+ <415> DW_AT_type : <0x3ac>
+ <419> DW_AT_artificial : 1
+ <419> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><41c>: Abbrev Number: 0
+ <1><41d>: Abbrev Number: 20 (DW_TAG_subprogram)
+ <41e> DW_AT_specification: <0x2ae>
+ <422> DW_AT_decl_file : 2
+ <423> DW_AT_decl_line : 102
+ <424> DW_AT_low_pc : (addr_index: 0x9): <no .debug_addr section>
+ <425> DW_AT_high_pc : 0x19
+ <42d> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <42f> DW_AT_object_pointer: <0x437>
+ <433> DW_AT_GNU_all_call_sites: 1
+ <433> DW_AT_sibling : <0x441>
+ <2><437>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <438> DW_AT_name : (indexed string: 0x10): this
+ <439> DW_AT_type : <0x441>
+ <43d> DW_AT_artificial : 1
+ <43d> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><440>: Abbrev Number: 0
+ <1><441>: Abbrev Number: 19 (DW_TAG_const_type)
+ <442> DW_AT_type : <0x2cd>
+ <1><446>: Abbrev Number: 17 (DW_TAG_subprogram)
+ <447> DW_AT_specification: <0x2b8>
+ <44b> DW_AT_decl_file : 2
+ <44c> DW_AT_decl_line : 112
+ <44d> DW_AT_low_pc : (addr_index: 0xa): <no .debug_addr section>
+ <44e> DW_AT_high_pc : 0x1f
+ <456> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <458> DW_AT_object_pointer: <0x460>
+ <45c> DW_AT_GNU_all_tail_call_sites: 1
+ <45c> DW_AT_sibling : <0x46a>
+ <2><460>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <461> DW_AT_name : (indexed string: 0x10): this
+ <462> DW_AT_type : <0x441>
+ <466> DW_AT_artificial : 1
+ <466> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><469>: Abbrev Number: 0
+ <1><46a>: Abbrev Number: 21 (DW_TAG_subprogram)
+ <46b> DW_AT_external : 1
+ <46b> DW_AT_name : f11a
+ <470> DW_AT_decl_file : 2
+ <471> DW_AT_decl_line : 120
+ <472> DW_AT_linkage_name: _Z4f11av
+ <47b> DW_AT_type : <0x242>
+ <47f> DW_AT_low_pc : (addr_index: 0xb): <no .debug_addr section>
+ <480> DW_AT_high_pc : 0xb
+ <488> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <48a> DW_AT_GNU_all_call_sites: 1
+ <1><48a>: Abbrev Number: 17 (DW_TAG_subprogram)
+ <48b> DW_AT_specification: <0x2c2>
+ <48f> DW_AT_decl_file : 2
+ <490> DW_AT_decl_line : 126
+ <491> DW_AT_low_pc : (addr_index: 0xc): <no .debug_addr section>
+ <492> DW_AT_high_pc : 0x20
+ <49a> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <49c> DW_AT_object_pointer: <0x4a4>
+ <4a0> DW_AT_GNU_all_tail_call_sites: 1
+ <4a0> DW_AT_sibling : <0x4ae>
+ <2><4a4>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <4a5> DW_AT_name : (indexed string: 0x10): this
+ <4a6> DW_AT_type : <0x441>
+ <4aa> DW_AT_artificial : 1
+ <4aa> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><4ad>: Abbrev Number: 0
+ <1><4ae>: Abbrev Number: 22 (DW_TAG_subprogram)
+ <4af> DW_AT_external : 1
+ <4af> DW_AT_name : t12
+ <4b3> DW_AT_decl_file : 2
+ <4b4> DW_AT_decl_line : 134
+ <4b5> DW_AT_linkage_name: _Z3t12v
+ <4bd> DW_AT_type : <0x249>
+ <4c1> DW_AT_low_pc : (addr_index: 0xd): <no .debug_addr section>
+ <4c2> DW_AT_high_pc : 0x19
+ <4ca> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <4cc> DW_AT_GNU_all_tail_call_sites: 1
+ <1><4cc>: Abbrev Number: 22 (DW_TAG_subprogram)
+ <4cd> DW_AT_external : 1
+ <4cd> DW_AT_name : t13
+ <4d1> DW_AT_decl_file : 2
+ <4d2> DW_AT_decl_line : 142
+ <4d3> DW_AT_linkage_name: _Z3t13v
+ <4db> DW_AT_type : <0x249>
+ <4df> DW_AT_low_pc : (addr_index: 0xe): <no .debug_addr section>
+ <4e0> DW_AT_high_pc : 0x14
+ <4e8> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <4ea> DW_AT_GNU_all_tail_call_sites: 1
+ <1><4ea>: Abbrev Number: 23 (DW_TAG_subprogram)
+ <4eb> DW_AT_external : 1
+ <4eb> DW_AT_name : t14
+ <4ef> DW_AT_decl_file : 2
+ <4f0> DW_AT_decl_line : 150
+ <4f1> DW_AT_linkage_name: _Z3t14v
+ <4f9> DW_AT_type : <0x249>
+ <4fd> DW_AT_low_pc : (addr_index: 0xf): <no .debug_addr section>
+ <4fe> DW_AT_high_pc : 0x61
+ <506> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <508> DW_AT_GNU_all_tail_call_sites: 1
+ <508> DW_AT_sibling : <0x532>
+ <2><50c>: Abbrev Number: 24 (DW_TAG_lexical_block)
+ <50d> DW_AT_low_pc : (addr_index: 0x10): <no .debug_addr section>
+ <50e> DW_AT_high_pc : 0x57
+ <3><516>: Abbrev Number: 25 (DW_TAG_variable)
+ <517> DW_AT_name : s1
+ <51a> DW_AT_decl_file : 2
+ <51b> DW_AT_decl_line : 152
+ <51c> DW_AT_type : <0x532>
+ <520> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <3><523>: Abbrev Number: 25 (DW_TAG_variable)
+ <524> DW_AT_name : s2
+ <527> DW_AT_decl_file : 2
+ <528> DW_AT_decl_line : 153
+ <529> DW_AT_type : <0x532>
+ <52d> DW_AT_location : 2 byte block: 91 60 (DW_OP_fbreg: -32)
+ <3><530>: Abbrev Number: 0
+ <2><531>: Abbrev Number: 0
+ <1><532>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <533> DW_AT_byte_size : 8
+ <534> DW_AT_type : <0x538>
+ <1><538>: Abbrev Number: 19 (DW_TAG_const_type)
+ <539> DW_AT_type : <0x53d>
+ <1><53d>: Abbrev Number: 7 (DW_TAG_base_type)
+ <53e> DW_AT_byte_size : 1
+ <53f> DW_AT_encoding : 6 (signed char)
+ <540> DW_AT_name : char
+ <1><545>: Abbrev Number: 23 (DW_TAG_subprogram)
+ <546> DW_AT_external : 1
+ <546> DW_AT_name : t15
+ <54a> DW_AT_decl_file : 2
+ <54b> DW_AT_decl_line : 163
+ <54c> DW_AT_linkage_name: _Z3t15v
+ <554> DW_AT_type : <0x249>
+ <558> DW_AT_low_pc : (addr_index: 0x11): <no .debug_addr section>
+ <559> DW_AT_high_pc : 0x5d
+ <561> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <563> DW_AT_GNU_all_tail_call_sites: 1
+ <563> DW_AT_sibling : <0x58d>
+ <2><567>: Abbrev Number: 24 (DW_TAG_lexical_block)
+ <568> DW_AT_low_pc : (addr_index: 0x12): <no .debug_addr section>
+ <569> DW_AT_high_pc : 0x53
+ <3><571>: Abbrev Number: 25 (DW_TAG_variable)
+ <572> DW_AT_name : s1
+ <575> DW_AT_decl_file : 2
+ <576> DW_AT_decl_line : 165
+ <577> DW_AT_type : <0x58d>
+ <57b> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <3><57e>: Abbrev Number: 25 (DW_TAG_variable)
+ <57f> DW_AT_name : s2
+ <582> DW_AT_decl_file : 2
+ <583> DW_AT_decl_line : 166
+ <584> DW_AT_type : <0x58d>
+ <588> DW_AT_location : 2 byte block: 91 60 (DW_OP_fbreg: -32)
+ <3><58b>: Abbrev Number: 0
+ <2><58c>: Abbrev Number: 0
+ <1><58d>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <58e> DW_AT_byte_size : 8
+ <58f> DW_AT_type : <0x593>
+ <1><593>: Abbrev Number: 19 (DW_TAG_const_type)
+ <594> DW_AT_type : <0x598>
+ <1><598>: Abbrev Number: 7 (DW_TAG_base_type)
+ <599> DW_AT_byte_size : 4
+ <59a> DW_AT_encoding : 5 (signed)
+ <59b> DW_AT_name : wchar_t
+ <1><5a3>: Abbrev Number: 22 (DW_TAG_subprogram)
+ <5a4> DW_AT_external : 1
+ <5a4> DW_AT_name : t16
+ <5a8> DW_AT_decl_file : 2
+ <5a9> DW_AT_decl_line : 176
+ <5aa> DW_AT_linkage_name: _Z3t16v
+ <5b2> DW_AT_type : <0x249>
+ <5b6> DW_AT_low_pc : (addr_index: 0x13): <no .debug_addr section>
+ <5b7> DW_AT_high_pc : 0x13
+ <5bf> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <5c1> DW_AT_GNU_all_tail_call_sites: 1
+ <1><5c1>: Abbrev Number: 26 (DW_TAG_subprogram)
+ <5c2> DW_AT_external : 1
+ <5c2> DW_AT_name : t17
+ <5c6> DW_AT_decl_file : 2
+ <5c7> DW_AT_decl_line : 184
+ <5c8> DW_AT_linkage_name: _Z3t17v
+ <5d0> DW_AT_type : <0x249>
+ <5d4> DW_AT_low_pc : (addr_index: 0x14): <no .debug_addr section>
+ <5d5> DW_AT_high_pc : 0x5f
+ <5dd> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <5df> DW_AT_GNU_all_call_sites: 1
+ <5df> DW_AT_sibling : <0x612>
+ <2><5e3>: Abbrev Number: 24 (DW_TAG_lexical_block)
+ <5e4> DW_AT_low_pc : (addr_index: 0x15): <no .debug_addr section>
+ <5e5> DW_AT_high_pc : 0x59
+ <3><5ed>: Abbrev Number: 25 (DW_TAG_variable)
+ <5ee> DW_AT_name : c
+ <5f0> DW_AT_decl_file : 2
+ <5f1> DW_AT_decl_line : 186
+ <5f2> DW_AT_type : <0x53d>
+ <5f6> DW_AT_location : 2 byte block: 91 6f (DW_OP_fbreg: -17)
+ <3><5f9>: Abbrev Number: 24 (DW_TAG_lexical_block)
+ <5fa> DW_AT_low_pc : (addr_index: 0x16): <no .debug_addr section>
+ <5fb> DW_AT_high_pc : 0x50
+ <4><603>: Abbrev Number: 25 (DW_TAG_variable)
+ <604> DW_AT_name : i
+ <606> DW_AT_decl_file : 2
+ <607> DW_AT_decl_line : 187
+ <608> DW_AT_type : <0x242>
+ <60c> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <4><60f>: Abbrev Number: 0
+ <3><610>: Abbrev Number: 0
+ <2><611>: Abbrev Number: 0
+ <1><612>: Abbrev Number: 23 (DW_TAG_subprogram)
+ <613> DW_AT_external : 1
+ <613> DW_AT_name : t18
+ <617> DW_AT_decl_file : 2
+ <618> DW_AT_decl_line : 199
+ <619> DW_AT_linkage_name: _Z3t18v
+ <621> DW_AT_type : <0x249>
+ <625> DW_AT_low_pc : (addr_index: 0x17): <no .debug_addr section>
+ <626> DW_AT_high_pc : 0x5f
+ <62e> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <630> DW_AT_GNU_all_tail_call_sites: 1
+ <630> DW_AT_sibling : <0x67a>
+ <2><634>: Abbrev Number: 24 (DW_TAG_lexical_block)
+ <635> DW_AT_low_pc : (addr_index: 0x18): <no .debug_addr section>
+ <636> DW_AT_high_pc : 0x55
+ <3><63e>: Abbrev Number: 25 (DW_TAG_variable)
+ <63f> DW_AT_name : c
+ <641> DW_AT_decl_file : 2
+ <642> DW_AT_decl_line : 201
+ <643> DW_AT_type : <0x53d>
+ <647> DW_AT_location : 2 byte block: 91 6f (DW_OP_fbreg: -17)
+ <3><64a>: Abbrev Number: 24 (DW_TAG_lexical_block)
+ <64b> DW_AT_low_pc : (addr_index: 0x19): <no .debug_addr section>
+ <64c> DW_AT_high_pc : 0x4c
+ <4><654>: Abbrev Number: 25 (DW_TAG_variable)
+ <655> DW_AT_name : i
+ <657> DW_AT_decl_file : 2
+ <658> DW_AT_decl_line : 202
+ <659> DW_AT_type : <0x242>
+ <65d> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <4><660>: Abbrev Number: 24 (DW_TAG_lexical_block)
+ <661> DW_AT_low_pc : (addr_index: 0x1a): <no .debug_addr section>
+ <662> DW_AT_high_pc : 0x34
+ <5><66a>: Abbrev Number: 25 (DW_TAG_variable)
+ <66b> DW_AT_name : s
+ <66d> DW_AT_decl_file : 2
+ <66e> DW_AT_decl_line : 204
+ <66f> DW_AT_type : <0x532>
+ <673> DW_AT_location : 2 byte block: 91 60 (DW_OP_fbreg: -32)
+ <5><676>: Abbrev Number: 0
+ <4><677>: Abbrev Number: 0
+ <3><678>: Abbrev Number: 0
+ <2><679>: Abbrev Number: 0
+ <1><67a>: Abbrev Number: 27 (DW_TAG_variable)
+ <67b> DW_AT_name : c3
+ <67e> DW_AT_decl_file : 1
+ <67f> DW_AT_decl_line : 57
+ <680> DW_AT_type : signature: 0xb534bdc1f01629bb
+ <688> DW_AT_external : 1
+ <688> DW_AT_declaration : 1
+ <1><688>: Abbrev Number: 28 (DW_TAG_variable)
+ <689> DW_AT_name : v2
+ <68c> DW_AT_decl_file : 1
+ <68d> DW_AT_decl_line : 59
+ <68e> DW_AT_type : <0x242>
+ <692> DW_AT_external : 1
+ <692> DW_AT_declaration : 1
+ <1><692>: Abbrev Number: 28 (DW_TAG_variable)
+ <693> DW_AT_name : v3
+ <696> DW_AT_decl_file : 1
+ <697> DW_AT_decl_line : 60
+ <698> DW_AT_type : <0x242>
+ <69c> DW_AT_external : 1
+ <69c> DW_AT_declaration : 1
+ <1><69c>: Abbrev Number: 29 (DW_TAG_array_type)
+ <69d> DW_AT_type : <0x53d>
+ <6a1> DW_AT_sibling : <0x6a7>
+ <2><6a5>: Abbrev Number: 30 (DW_TAG_subrange_type)
+ <2><6a6>: Abbrev Number: 0
+ <1><6a7>: Abbrev Number: 28 (DW_TAG_variable)
+ <6a8> DW_AT_name : v4
+ <6ab> DW_AT_decl_file : 1
+ <6ac> DW_AT_decl_line : 61
+ <6ad> DW_AT_type : <0x69c>
+ <6b1> DW_AT_external : 1
+ <6b1> DW_AT_declaration : 1
+ <1><6b1>: Abbrev Number: 28 (DW_TAG_variable)
+ <6b2> DW_AT_name : v5
+ <6b5> DW_AT_decl_file : 1
+ <6b6> DW_AT_decl_line : 62
+ <6b7> DW_AT_type : <0x69c>
+ <6bb> DW_AT_external : 1
+ <6bb> DW_AT_declaration : 1
+ <1><6bb>: Abbrev Number: 29 (DW_TAG_array_type)
+ <6bc> DW_AT_type : <0x532>
+ <6c0> DW_AT_sibling : <0x6c6>
+ <2><6c4>: Abbrev Number: 30 (DW_TAG_subrange_type)
+ <2><6c5>: Abbrev Number: 0
+ <1><6c6>: Abbrev Number: 28 (DW_TAG_variable)
+ <6c7> DW_AT_name : t17data
+ <6cf> DW_AT_decl_file : 1
+ <6d0> DW_AT_decl_line : 83
+ <6d1> DW_AT_type : <0x6bb>
+ <6d5> DW_AT_external : 1
+ <6d5> DW_AT_declaration : 1
+ <1><6d5>: Abbrev Number: 31 (DW_TAG_variable)
+ <6d6> DW_AT_name : p6
+ <6d9> DW_AT_decl_file : 2
+ <6da> DW_AT_decl_line : 69
+ <6db> DW_AT_type : <0x6e2>
+ <6df> DW_AT_external : 1
+ <6df> DW_AT_location : 2 byte block: fb 1b (DW_OP_GNU_addr_index <0x1b>)
+ <1><6e2>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <6e3> DW_AT_byte_size : 8
+ <6e4> DW_AT_type : <0x242>
+ <1><6e8>: Abbrev Number: 31 (DW_TAG_variable)
+ <6e9> DW_AT_name : p7
+ <6ec> DW_AT_decl_file : 2
+ <6ed> DW_AT_decl_line : 79
+ <6ee> DW_AT_type : <0x6e2>
+ <6f2> DW_AT_external : 1
+ <6f2> DW_AT_location : 2 byte block: fb 1c (DW_OP_GNU_addr_index <0x1c>)
+ <1><6f5>: Abbrev Number: 31 (DW_TAG_variable)
+ <6f6> DW_AT_name : p8
+ <6f9> DW_AT_decl_file : 2
+ <6fa> DW_AT_decl_line : 89
+ <6fb> DW_AT_type : <0x702>
+ <6ff> DW_AT_external : 1
+ <6ff> DW_AT_location : 2 byte block: fb 1d (DW_OP_GNU_addr_index <0x1d>)
+ <1><702>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <703> DW_AT_byte_size : 8
+ <704> DW_AT_type : <0x53d>
+ <1><708>: Abbrev Number: 31 (DW_TAG_variable)
+ <709> DW_AT_name : p9
+ <70c> DW_AT_decl_file : 2
+ <70d> DW_AT_decl_line : 99
+ <70e> DW_AT_type : <0x702>
+ <712> DW_AT_external : 1
+ <712> DW_AT_location : 2 byte block: fb 1e (DW_OP_GNU_addr_index <0x1e>)
+ <1><715>: Abbrev Number: 9 (DW_TAG_subroutine_type)
+ <716> DW_AT_type : <0x242>
+ <1><71a>: Abbrev Number: 31 (DW_TAG_variable)
+ <71b> DW_AT_name : pfn
+ <71f> DW_AT_decl_file : 2
+ <720> DW_AT_decl_line : 109
+ <721> DW_AT_type : <0x728>
+ <725> DW_AT_external : 1
+ <725> DW_AT_location : 2 byte block: fb 1f (DW_OP_GNU_addr_index <0x1f>)
+ <1><728>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <729> DW_AT_byte_size : 8
+ <72a> DW_AT_type : <0x715>
+ <1><72e>: Abbrev Number: 0
+ Compilation Unit @ offset 0x72f:
+ Length: 0xcb (32-bit)
+ Version: 4
+ Abbrev Offset: 0x0
+ Pointer Size: 8
+ Section contributions:
+ .debug_abbrev.dwo: 0x371 0xbd
+ .debug_line.dwo: 0x7d 0x3e
+ .debug_loc.dwo: 0x0 0x0
+ .debug_str_offsets.dwo: 0x0 0x0
+ <0><73a>: Abbrev Number: 10 (DW_TAG_compile_unit)
+ <73b> DW_AT_producer : GNU C++ 4.7.x-google 20120720 (prerelease)
+ <766> DW_AT_language : 4 (C++)
+ <767> DW_AT_name : dwp_test_1b.cc
+ <776> DW_AT_comp_dir : /home/ccoutant/opensource/binutils-git/binutils/gold/testsuite
+ <7b5> DW_AT_GNU_dwo_id : 0xbd6ec13ea247eff6
+ <1><7bd>: Abbrev Number: 7 (DW_TAG_base_type)
+ <7be> DW_AT_byte_size : 4
+ <7bf> DW_AT_encoding : 5 (signed)
+ <7c0> DW_AT_name : int
+ <1><7c4>: Abbrev Number: 7 (DW_TAG_base_type)
+ <7c5> DW_AT_byte_size : 1
+ <7c6> DW_AT_encoding : 2 (boolean)
+ <7c7> DW_AT_name : bool
+ <1><7cc>: Abbrev Number: 11 (DW_TAG_subprogram)
+ <7cd> DW_AT_external : 1
+ <7cd> DW_AT_name : t16a
+ <7d2> DW_AT_decl_file : 1
+ <7d3> DW_AT_decl_line : 32
+ <7d4> DW_AT_linkage_name: _Z4t16av
+ <7dd> DW_AT_type : <0x7c4>
+ <7e1> DW_AT_low_pc : (addr_index: 0x0): <no .debug_addr section>
+ <7e2> DW_AT_high_pc : 0x13
+ <7ea> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <7ec> DW_AT_GNU_all_tail_call_sites: 1
+ <1><7ec>: Abbrev Number: 12 (DW_TAG_variable)
+ <7ed> DW_AT_name : c3
+ <7f0> DW_AT_decl_file : 1
+ <7f1> DW_AT_decl_line : 29
+ <7f2> DW_AT_type : signature: 0xb534bdc1f01629bb
+ <7fa> DW_AT_external : 1
+ <7fa> DW_AT_location : 2 byte block: fb 1 (DW_OP_GNU_addr_index <0x1>)
+ <1><7fd>: Abbrev Number: 0
+ Compilation Unit @ offset 0x7fe:
+ Length: 0x329 (32-bit)
+ Version: 4
+ Abbrev Offset: 0x0
+ Pointer Size: 8
+ Section contributions:
+ .debug_abbrev.dwo: 0x42e 0x1f2
+ .debug_line.dwo: 0xbb 0x3d
+ .debug_loc.dwo: 0x0 0x0
+ .debug_str_offsets.dwo: 0x58 0x18
+ <0><809>: Abbrev Number: 12 (DW_TAG_compile_unit)
+ <80a> DW_AT_producer : GNU C++ 4.7.x-google 20120720 (prerelease)
+ <835> DW_AT_language : 4 (C++)
+ <836> DW_AT_name : dwp_test_2.cc
+ <844> DW_AT_comp_dir : /home/ccoutant/opensource/binutils-git/binutils/gold/testsuite
+ <883> DW_AT_GNU_dwo_id : 0xcf0cab718ce0f8b9
+ <1><88b>: Abbrev Number: 13 (DW_TAG_class_type)
+ <88c> DW_AT_name : C1
+ <88f> DW_AT_signature : signature: 0xb5faa2a4b7a919c4
+ <897> DW_AT_declaration : 1
+ <897> DW_AT_sibling : <0x8b7>
+ <2><89b>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <89c> DW_AT_external : 1
+ <89c> DW_AT_name : t1a
+ <8a0> DW_AT_decl_file : 1
+ <8a1> DW_AT_decl_line : 29
+ <8a2> DW_AT_linkage_name: (indexed string: 0x4): _ZN2C13t1aEv
+ <8a3> DW_AT_type : <0x8be>
+ <8a7> DW_AT_accessibility: 1 (public)
+ <8a8> DW_AT_declaration : 1
+ <2><8a8>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <8a9> DW_AT_external : 1
+ <8a9> DW_AT_name : t1_2
+ <8ae> DW_AT_decl_file : 1
+ <8af> DW_AT_decl_line : 30
+ <8b0> DW_AT_linkage_name: (indexed string: 0x5): _ZN2C14t1_2Ev
+ <8b1> DW_AT_type : <0x8b7>
+ <8b5> DW_AT_accessibility: 1 (public)
+ <8b6> DW_AT_declaration : 1
+ <2><8b6>: Abbrev Number: 0
+ <1><8b7>: Abbrev Number: 7 (DW_TAG_base_type)
+ <8b8> DW_AT_byte_size : 4
+ <8b9> DW_AT_encoding : 5 (signed)
+ <8ba> DW_AT_name : int
+ <1><8be>: Abbrev Number: 7 (DW_TAG_base_type)
+ <8bf> DW_AT_byte_size : 1
+ <8c0> DW_AT_encoding : 2 (boolean)
+ <8c1> DW_AT_name : bool
+ <1><8c6>: Abbrev Number: 15 (DW_TAG_pointer_type)
+ <8c7> DW_AT_byte_size : 8
+ <8c8> DW_AT_type : signature: 0xb5faa2a4b7a919c4
+ <1><8d0>: Abbrev Number: 13 (DW_TAG_class_type)
+ <8d1> DW_AT_name : C3
+ <8d4> DW_AT_signature : signature: 0xb534bdc1f01629bb
+ <8dc> DW_AT_declaration : 1
+ <8dc> DW_AT_sibling : <0x8ed>
+ <2><8e0>: Abbrev Number: 14 (DW_TAG_subprogram)
+ <8e1> DW_AT_external : 1
+ <8e1> DW_AT_name : f4
+ <8e4> DW_AT_decl_file : 1
+ <8e5> DW_AT_decl_line : 53
+ <8e6> DW_AT_linkage_name: (indexed string: 0x3): _ZN2C32f4Ev
+ <8e7> DW_AT_type : <0x8fc>
+ <8eb> DW_AT_accessibility: 1 (public)
+ <8ec> DW_AT_declaration : 1
+ <2><8ec>: Abbrev Number: 0
+ <1><8ed>: Abbrev Number: 15 (DW_TAG_pointer_type)
+ <8ee> DW_AT_byte_size : 8
+ <8ef> DW_AT_type : signature: 0xb534bdc1f01629bb
+ <1><8f7>: Abbrev Number: 9 (DW_TAG_subroutine_type)
+ <8f8> DW_AT_type : <0x8be>
+ <1><8fc>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <8fd> DW_AT_byte_size : 8
+ <8fe> DW_AT_type : <0x8f7>
+ <1><902>: Abbrev Number: 16 (DW_TAG_subprogram)
+ <903> DW_AT_external : 1
+ <903> DW_AT_name : f13i
+ <908> DW_AT_decl_file : 1
+ <909> DW_AT_decl_line : 70
+ <90a> DW_AT_linkage_name: _Z4f13iv
+ <913> DW_AT_low_pc : (addr_index: 0x0): <no .debug_addr section>
+ <914> DW_AT_high_pc : 0x6
+ <91c> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <91e> DW_AT_GNU_all_call_sites: 1
+ <1><91e>: Abbrev Number: 17 (DW_TAG_subprogram)
+ <91f> DW_AT_specification: <0x8a8>
+ <923> DW_AT_decl_file : 2
+ <924> DW_AT_low_pc : (addr_index: 0x1): <no .debug_addr section>
+ <925> DW_AT_high_pc : 0xf
+ <92d> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <92f> DW_AT_object_pointer: <0x937>
+ <933> DW_AT_GNU_all_call_sites: 1
+ <933> DW_AT_sibling : <0x945>
+ <2><937>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <938> DW_AT_name : this
+ <93d> DW_AT_type : <0x945>
+ <941> DW_AT_artificial : 1
+ <941> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><944>: Abbrev Number: 0
+ <1><945>: Abbrev Number: 19 (DW_TAG_const_type)
+ <946> DW_AT_type : <0x8c6>
+ <1><94a>: Abbrev Number: 20 (DW_TAG_subprogram)
+ <94b> DW_AT_specification: <0x89b>
+ <94f> DW_AT_decl_file : 2
+ <950> DW_AT_decl_line : 36
+ <951> DW_AT_low_pc : (addr_index: 0x2): <no .debug_addr section>
+ <952> DW_AT_high_pc : 0x20
+ <95a> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <95c> DW_AT_object_pointer: <0x964>
+ <960> DW_AT_GNU_all_tail_call_sites: 1
+ <960> DW_AT_sibling : <0x972>
+ <2><964>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <965> DW_AT_name : this
+ <96a> DW_AT_type : <0x945>
+ <96e> DW_AT_artificial : 1
+ <96e> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><971>: Abbrev Number: 0
+ <1><972>: Abbrev Number: 21 (DW_TAG_subprogram)
+ <973> DW_AT_external : 1
+ <973> DW_AT_name : f10
+ <977> DW_AT_decl_file : 2
+ <978> DW_AT_decl_line : 72
+ <979> DW_AT_linkage_name: _Z3f10v
+ <981> DW_AT_type : <0x8b7>
+ <985> DW_AT_low_pc : (addr_index: 0x3): <no .debug_addr section>
+ <986> DW_AT_high_pc : 0xb
+ <98e> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <990> DW_AT_GNU_all_call_sites: 1
+ <1><990>: Abbrev Number: 22 (DW_TAG_subprogram)
+ <991> DW_AT_external : 1
+ <991> DW_AT_name : f11b
+ <996> DW_AT_decl_file : 2
+ <997> DW_AT_decl_line : 80
+ <998> DW_AT_linkage_name: _Z4f11bPFivE
+ <9a5> DW_AT_type : <0x8b7>
+ <9a9> DW_AT_low_pc : (addr_index: 0x4): <no .debug_addr section>
+ <9aa> DW_AT_high_pc : 0x14
+ <9b2> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <9b4> DW_AT_GNU_all_tail_call_sites: 1
+ <9b4> DW_AT_sibling : <0x9c7>
+ <2><9b8>: Abbrev Number: 23 (DW_TAG_formal_parameter)
+ <9b9> DW_AT_name : pfn
+ <9bd> DW_AT_decl_file : 2
+ <9be> DW_AT_decl_line : 80
+ <9bf> DW_AT_type : <0x9cc>
+ <9c3> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><9c6>: Abbrev Number: 0
+ <1><9c7>: Abbrev Number: 9 (DW_TAG_subroutine_type)
+ <9c8> DW_AT_type : <0x8b7>
+ <1><9cc>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <9cd> DW_AT_byte_size : 8
+ <9ce> DW_AT_type : <0x9c7>
+ <1><9d2>: Abbrev Number: 24 (DW_TAG_subprogram)
+ <9d3> DW_AT_specification: <0x8e0>
+ <9d7> DW_AT_decl_file : 2
+ <9d8> DW_AT_decl_line : 88
+ <9d9> DW_AT_low_pc : (addr_index: 0x5): <no .debug_addr section>
+ <9da> DW_AT_high_pc : 0xf
+ <9e2> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <9e4> DW_AT_object_pointer: <0x9ec>
+ <9e8> DW_AT_GNU_all_call_sites: 1
+ <9e8> DW_AT_sibling : <0x9fa>
+ <2><9ec>: Abbrev Number: 18 (DW_TAG_formal_parameter)
+ <9ed> DW_AT_name : this
+ <9f2> DW_AT_type : <0x9fa>
+ <9f6> DW_AT_artificial : 1
+ <9f6> DW_AT_location : 2 byte block: 91 68 (DW_OP_fbreg: -24)
+ <2><9f9>: Abbrev Number: 0
+ <1><9fa>: Abbrev Number: 19 (DW_TAG_const_type)
+ <9fb> DW_AT_type : <0x8ed>
+ <1><9ff>: Abbrev Number: 25 (DW_TAG_subroutine_type)
+ <1><a00>: Abbrev Number: 21 (DW_TAG_subprogram)
+ <a01> DW_AT_external : 1
+ <a01> DW_AT_name : f13
+ <a05> DW_AT_decl_file : 2
+ <a06> DW_AT_decl_line : 96
+ <a07> DW_AT_linkage_name: _Z3f13v
+ <a0f> DW_AT_type : <0xa1e>
+ <a13> DW_AT_low_pc : (addr_index: 0x6): <no .debug_addr section>
+ <a14> DW_AT_high_pc : 0xb
+ <a1c> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <a1e> DW_AT_GNU_all_call_sites: 1
+ <1><a1e>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <a1f> DW_AT_byte_size : 8
+ <a20> DW_AT_type : <0x9ff>
+ <1><a24>: Abbrev Number: 21 (DW_TAG_subprogram)
+ <a25> DW_AT_external : 1
+ <a25> DW_AT_name : f14
+ <a29> DW_AT_decl_file : 2
+ <a2a> DW_AT_decl_line : 104
+ <a2b> DW_AT_linkage_name: _Z3f14v
+ <a33> DW_AT_type : <0xa42>
+ <a37> DW_AT_low_pc : (addr_index: 0x7): <no .debug_addr section>
+ <a38> DW_AT_high_pc : 0xb
+ <a40> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <a42> DW_AT_GNU_all_call_sites: 1
+ <1><a42>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <a43> DW_AT_byte_size : 8
+ <a44> DW_AT_type : <0xa48>
+ <1><a48>: Abbrev Number: 19 (DW_TAG_const_type)
+ <a49> DW_AT_type : <0xa4d>
+ <1><a4d>: Abbrev Number: 7 (DW_TAG_base_type)
+ <a4e> DW_AT_byte_size : 1
+ <a4f> DW_AT_encoding : 6 (signed char)
+ <a50> DW_AT_name : char
+ <1><a55>: Abbrev Number: 21 (DW_TAG_subprogram)
+ <a56> DW_AT_external : 1
+ <a56> DW_AT_name : f15
+ <a5a> DW_AT_decl_file : 2
+ <a5b> DW_AT_decl_line : 112
+ <a5c> DW_AT_linkage_name: _Z3f15v
+ <a64> DW_AT_type : <0xa73>
+ <a68> DW_AT_low_pc : (addr_index: 0x8): <no .debug_addr section>
+ <a69> DW_AT_high_pc : 0xb
+ <a71> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <a73> DW_AT_GNU_all_call_sites: 1
+ <1><a73>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <a74> DW_AT_byte_size : 8
+ <a75> DW_AT_type : <0xa79>
+ <1><a79>: Abbrev Number: 19 (DW_TAG_const_type)
+ <a7a> DW_AT_type : <0xa7e>
+ <1><a7e>: Abbrev Number: 7 (DW_TAG_base_type)
+ <a7f> DW_AT_byte_size : 4
+ <a80> DW_AT_encoding : 5 (signed)
+ <a81> DW_AT_name : wchar_t
+ <1><a89>: Abbrev Number: 26 (DW_TAG_subprogram)
+ <a8a> DW_AT_external : 1
+ <a8a> DW_AT_name : f18
+ <a8e> DW_AT_decl_file : 2
+ <a8f> DW_AT_decl_line : 127
+ <a90> DW_AT_linkage_name: _Z3f18i
+ <a98> DW_AT_type : <0xa42>
+ <a9c> DW_AT_low_pc : (addr_index: 0x9): <no .debug_addr section>
+ <a9d> DW_AT_high_pc : 0x44
+ <aa5> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa)
+ <aa7> DW_AT_GNU_all_call_sites: 1
+ <aa7> DW_AT_sibling : <0xab8>
+ <2><aab>: Abbrev Number: 23 (DW_TAG_formal_parameter)
+ <aac> DW_AT_name : i
+ <aae> DW_AT_decl_file : 2
+ <aaf> DW_AT_decl_line : 127
+ <ab0> DW_AT_type : <0x8b7>
+ <ab4> DW_AT_location : 2 byte block: 91 6c (DW_OP_fbreg: -20)
+ <2><ab7>: Abbrev Number: 0
+ <1><ab8>: Abbrev Number: 27 (DW_TAG_variable)
+ <ab9> DW_AT_name : v2
+ <abc> DW_AT_decl_file : 2
+ <abd> DW_AT_decl_line : 43
+ <abe> DW_AT_type : <0x8b7>
+ <ac2> DW_AT_external : 1
+ <ac2> DW_AT_location : 2 byte block: fb a (DW_OP_GNU_addr_index <0xa>)
+ <1><ac5>: Abbrev Number: 27 (DW_TAG_variable)
+ <ac6> DW_AT_name : v3
+ <ac9> DW_AT_decl_file : 2
+ <aca> DW_AT_decl_line : 48
+ <acb> DW_AT_type : <0x8b7>
+ <acf> DW_AT_external : 1
+ <acf> DW_AT_location : 2 byte block: fb b (DW_OP_GNU_addr_index <0xb>)
+ <1><ad2>: Abbrev Number: 28 (DW_TAG_array_type)
+ <ad3> DW_AT_type : <0xa4d>
+ <ad7> DW_AT_sibling : <0xae2>
+ <2><adb>: Abbrev Number: 29 (DW_TAG_subrange_type)
+ <adc> DW_AT_type : <0xae2>
+ <ae0> DW_AT_upper_bound : 12
+ <2><ae1>: Abbrev Number: 0
+ <1><ae2>: Abbrev Number: 7 (DW_TAG_base_type)
+ <ae3> DW_AT_byte_size : 8
+ <ae4> DW_AT_encoding : 7 (unsigned)
+ <ae5> DW_AT_name : sizetype
+ <1><aee>: Abbrev Number: 27 (DW_TAG_variable)
+ <aef> DW_AT_name : v4
+ <af2> DW_AT_decl_file : 2
+ <af3> DW_AT_decl_line : 52
+ <af4> DW_AT_type : <0xad2>
+ <af8> DW_AT_external : 1
+ <af8> DW_AT_location : 2 byte block: fb c (DW_OP_GNU_addr_index <0xc>)
+ <1><afb>: Abbrev Number: 27 (DW_TAG_variable)
+ <afc> DW_AT_name : v5
+ <aff> DW_AT_decl_file : 2
+ <b00> DW_AT_decl_line : 57
+ <b01> DW_AT_type : <0xad2>
+ <b05> DW_AT_external : 1
+ <b05> DW_AT_location : 2 byte block: fb d (DW_OP_GNU_addr_index <0xd>)
+ <1><b08>: Abbrev Number: 28 (DW_TAG_array_type)
+ <b09> DW_AT_type : <0xa42>
+ <b0d> DW_AT_sibling : <0xb18>
+ <2><b11>: Abbrev Number: 29 (DW_TAG_subrange_type)
+ <b12> DW_AT_type : <0xae2>
+ <b16> DW_AT_upper_bound : 4
+ <2><b17>: Abbrev Number: 0
+ <1><b18>: Abbrev Number: 27 (DW_TAG_variable)
+ <b19> DW_AT_name : t17data
+ <b21> DW_AT_decl_file : 2
+ <b22> DW_AT_decl_line : 119
+ <b23> DW_AT_type : <0xb08>
+ <b27> DW_AT_external : 1
+ <b27> DW_AT_location : 2 byte block: fb e (DW_OP_GNU_addr_index <0xe>)
+ <1><b2a>: Abbrev Number: 0
+
+Contents of the .debug_types.dwo section:
+
+ Compilation Unit @ offset 0x0:
+ Length: 0xf7 (32-bit)
+ Version: 4
+ Abbrev Offset: 0x0
+ Pointer Size: 8
+ Signature: 0xb534bdc1f01629bb
+ Type Offset: 0x25
+ Section contributions:
+ .debug_abbrev.dwo: 0x0 0x154
+ .debug_line.dwo: 0x0 0x40
+ .debug_loc.dwo: 0x0 0x0
+ .debug_str_offsets.dwo: 0x0 0x14
+ <0><17>: Abbrev Number: 1 (DW_TAG_type_unit)
+ <18> DW_AT_language : 4 (C++)
+ <19> DW_AT_GNU_odr_signature: 0x880a5c4d6e59da8a
+ <21> DW_AT_stmt_list : 0x0
+ <1><25>: Abbrev Number: 2 (DW_TAG_class_type)
+ <26> DW_AT_name : C3
+ <29> DW_AT_byte_size : 4
+ <2a> DW_AT_decl_file : 2
+ <2b> DW_AT_decl_line : 47
+ <2c> DW_AT_sibling : <0xda>
+ <2><30>: Abbrev Number: 3 (DW_TAG_member)
+ <31> DW_AT_name : (indexed string: 0x3): member1
+ <32> DW_AT_decl_file : 2
+ <33> DW_AT_decl_line : 54
+ <34> DW_AT_type : <0xda>
+ <38> DW_AT_data_member_location: 0
+ <39> DW_AT_accessibility: 1 (public)
+ <2><3a>: Abbrev Number: 4 (DW_TAG_subprogram)
+ <3b> DW_AT_external : 1
+ <3b> DW_AT_name : (indexed string: 0x0): testcase1
+ <3c> DW_AT_decl_file : 2
+ <3d> DW_AT_decl_line : 50
+ <3e> DW_AT_linkage_name: _ZN2C39testcase1Ev
+ <51> DW_AT_type : <0xe1>
+ <55> DW_AT_accessibility: 1 (public)
+ <56> DW_AT_declaration : 1
+ <56> DW_AT_object_pointer: <0x5e>
+ <5a> DW_AT_sibling : <0x64>
+ <3><5e>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <5f> DW_AT_type : <0xe9>
+ <63> DW_AT_artificial : 1
+ <3><63>: Abbrev Number: 0
+ <2><64>: Abbrev Number: 4 (DW_TAG_subprogram)
+ <65> DW_AT_external : 1
+ <65> DW_AT_name : (indexed string: 0x1): testcase2
+ <66> DW_AT_decl_file : 2
+ <67> DW_AT_decl_line : 51
+ <68> DW_AT_linkage_name: _ZN2C39testcase2Ev
+ <7b> DW_AT_type : <0xe1>
+ <7f> DW_AT_accessibility: 1 (public)
+ <80> DW_AT_declaration : 1
+ <80> DW_AT_object_pointer: <0x88>
+ <84> DW_AT_sibling : <0x8e>
+ <3><88>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <89> DW_AT_type : <0xe9>
+ <8d> DW_AT_artificial : 1
+ <3><8d>: Abbrev Number: 0
+ <2><8e>: Abbrev Number: 4 (DW_TAG_subprogram)
+ <8f> DW_AT_external : 1
+ <8f> DW_AT_name : (indexed string: 0x2): testcase3
+ <90> DW_AT_decl_file : 2
+ <91> DW_AT_decl_line : 52
+ <92> DW_AT_linkage_name: _ZN2C39testcase3Ev
+ <a5> DW_AT_type : <0xe1>
+ <a9> DW_AT_accessibility: 1 (public)
+ <aa> DW_AT_declaration : 1
+ <aa> DW_AT_object_pointer: <0xb2>
+ <ae> DW_AT_sibling : <0xb8>
+ <3><b2>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <b3> DW_AT_type : <0xe9>
+ <b7> DW_AT_artificial : 1
+ <3><b7>: Abbrev Number: 0
+ <2><b8>: Abbrev Number: 6 (DW_TAG_subprogram)
+ <b9> DW_AT_external : 1
+ <b9> DW_AT_name : f4
+ <bc> DW_AT_decl_file : 2
+ <bd> DW_AT_decl_line : 53
+ <be> DW_AT_linkage_name: _ZN2C32f4Ev
+ <ca> DW_AT_type : <0xef>
+ <ce> DW_AT_accessibility: 1 (public)
+ <cf> DW_AT_declaration : 1
+ <cf> DW_AT_object_pointer: <0xd3>
+ <3><d3>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <d4> DW_AT_type : <0xe9>
+ <d8> DW_AT_artificial : 1
+ <3><d8>: Abbrev Number: 0
+ <2><d9>: Abbrev Number: 0
+ <1><da>: Abbrev Number: 7 (DW_TAG_base_type)
+ <db> DW_AT_byte_size : 4
+ <dc> DW_AT_encoding : 5 (signed)
+ <dd> DW_AT_name : int
+ <1><e1>: Abbrev Number: 7 (DW_TAG_base_type)
+ <e2> DW_AT_byte_size : 1
+ <e3> DW_AT_encoding : 2 (boolean)
+ <e4> DW_AT_name : bool
+ <1><e9>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <ea> DW_AT_byte_size : 8
+ <eb> DW_AT_type : <0x25>
+ <1><ef>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <f0> DW_AT_byte_size : 8
+ <f1> DW_AT_type : <0xf5>
+ <1><f5>: Abbrev Number: 9 (DW_TAG_subroutine_type)
+ <f6> DW_AT_type : <0xe1>
+ <1><fa>: Abbrev Number: 0
+ Compilation Unit @ offset 0xfb:
+ Length: 0xf1 (32-bit)
+ Version: 4
+ Abbrev Offset: 0x0
+ Pointer Size: 8
+ Signature: 0xab98c7bc886f5266
+ Type Offset: 0x25
+ Section contributions:
+ .debug_abbrev.dwo: 0x0 0x154
+ .debug_line.dwo: 0x0 0x40
+ .debug_loc.dwo: 0x0 0x0
+ .debug_str_offsets.dwo: 0x0 0x14
+ <0><112>: Abbrev Number: 1 (DW_TAG_type_unit)
+ <113> DW_AT_language : 4 (C++)
+ <114> DW_AT_GNU_odr_signature: 0xae4af0d8bfcef94b
+ <11c> DW_AT_stmt_list : 0x0
+ <1><120>: Abbrev Number: 2 (DW_TAG_class_type)
+ <121> DW_AT_name : C2
+ <124> DW_AT_byte_size : 4
+ <125> DW_AT_decl_file : 2
+ <126> DW_AT_decl_line : 37
+ <127> DW_AT_sibling : <0x1da>
+ <2><12b>: Abbrev Number: 3 (DW_TAG_member)
+ <12c> DW_AT_name : (indexed string: 0x3): member1
+ <12d> DW_AT_decl_file : 2
+ <12e> DW_AT_decl_line : 44
+ <12f> DW_AT_type : <0x1da>
+ <133> DW_AT_data_member_location: 0
+ <134> DW_AT_accessibility: 1 (public)
+ <2><135>: Abbrev Number: 4 (DW_TAG_subprogram)
+ <136> DW_AT_external : 1
+ <136> DW_AT_name : (indexed string: 0x0): testcase1
+ <137> DW_AT_decl_file : 2
+ <138> DW_AT_decl_line : 40
+ <139> DW_AT_linkage_name: _ZN2C29testcase1Ev
+ <14c> DW_AT_type : <0x1e1>
+ <150> DW_AT_accessibility: 1 (public)
+ <151> DW_AT_declaration : 1
+ <151> DW_AT_object_pointer: <0x159>
+ <155> DW_AT_sibling : <0x15f>
+ <3><159>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <15a> DW_AT_type : <0x1e9>
+ <15e> DW_AT_artificial : 1
+ <3><15e>: Abbrev Number: 0
+ <2><15f>: Abbrev Number: 4 (DW_TAG_subprogram)
+ <160> DW_AT_external : 1
+ <160> DW_AT_name : (indexed string: 0x1): testcase2
+ <161> DW_AT_decl_file : 2
+ <162> DW_AT_decl_line : 41
+ <163> DW_AT_linkage_name: _ZN2C29testcase2Ev
+ <176> DW_AT_type : <0x1e1>
+ <17a> DW_AT_accessibility: 1 (public)
+ <17b> DW_AT_declaration : 1
+ <17b> DW_AT_object_pointer: <0x183>
+ <17f> DW_AT_sibling : <0x189>
+ <3><183>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <184> DW_AT_type : <0x1e9>
+ <188> DW_AT_artificial : 1
+ <3><188>: Abbrev Number: 0
+ <2><189>: Abbrev Number: 4 (DW_TAG_subprogram)
+ <18a> DW_AT_external : 1
+ <18a> DW_AT_name : (indexed string: 0x2): testcase3
+ <18b> DW_AT_decl_file : 2
+ <18c> DW_AT_decl_line : 42
+ <18d> DW_AT_linkage_name: _ZN2C29testcase3Ev
+ <1a0> DW_AT_type : <0x1e1>
+ <1a4> DW_AT_accessibility: 1 (public)
+ <1a5> DW_AT_declaration : 1
+ <1a5> DW_AT_object_pointer: <0x1ad>
+ <1a9> DW_AT_sibling : <0x1b3>
+ <3><1ad>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <1ae> DW_AT_type : <0x1e9>
+ <1b2> DW_AT_artificial : 1
+ <3><1b2>: Abbrev Number: 0
+ <2><1b3>: Abbrev Number: 10 (DW_TAG_subprogram)
+ <1b4> DW_AT_external : 1
+ <1b4> DW_AT_name : (indexed string: 0x4): testcase4
+ <1b5> DW_AT_decl_file : 2
+ <1b6> DW_AT_decl_line : 43
+ <1b7> DW_AT_linkage_name: _ZN2C29testcase4Ev
+ <1ca> DW_AT_type : <0x1e1>
+ <1ce> DW_AT_accessibility: 1 (public)
+ <1cf> DW_AT_declaration : 1
+ <1cf> DW_AT_object_pointer: <0x1d3>
+ <3><1d3>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <1d4> DW_AT_type : <0x1e9>
+ <1d8> DW_AT_artificial : 1
+ <3><1d8>: Abbrev Number: 0
+ <2><1d9>: Abbrev Number: 0
+ <1><1da>: Abbrev Number: 7 (DW_TAG_base_type)
+ <1db> DW_AT_byte_size : 4
+ <1dc> DW_AT_encoding : 5 (signed)
+ <1dd> DW_AT_name : int
+ <1><1e1>: Abbrev Number: 7 (DW_TAG_base_type)
+ <1e2> DW_AT_byte_size : 1
+ <1e3> DW_AT_encoding : 2 (boolean)
+ <1e4> DW_AT_name : bool
+ <1><1e9>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <1ea> DW_AT_byte_size : 8
+ <1eb> DW_AT_type : <0x120>
+ <1><1ef>: Abbrev Number: 0
+ Compilation Unit @ offset 0x1f0:
+ Length: 0x141 (32-bit)
+ Version: 4
+ Abbrev Offset: 0x0
+ Pointer Size: 8
+ Signature: 0xb5faa2a4b7a919c4
+ Type Offset: 0x25
+ Section contributions:
+ .debug_abbrev.dwo: 0x0 0x154
+ .debug_line.dwo: 0x0 0x40
+ .debug_loc.dwo: 0x0 0x0
+ .debug_str_offsets.dwo: 0x0 0x14
+ <0><207>: Abbrev Number: 1 (DW_TAG_type_unit)
+ <208> DW_AT_language : 4 (C++)
+ <209> DW_AT_GNU_odr_signature: 0xc7fbeb753b05ade3
+ <211> DW_AT_stmt_list : 0x0
+ <1><215>: Abbrev Number: 2 (DW_TAG_class_type)
+ <216> DW_AT_name : C1
+ <219> DW_AT_byte_size : 4
+ <21a> DW_AT_decl_file : 2
+ <21b> DW_AT_decl_line : 25
+ <21c> DW_AT_sibling : <0x31f>
+ <2><220>: Abbrev Number: 3 (DW_TAG_member)
+ <221> DW_AT_name : (indexed string: 0x3): member1
+ <222> DW_AT_decl_file : 2
+ <223> DW_AT_decl_line : 34
+ <224> DW_AT_type : <0x31f>
+ <228> DW_AT_data_member_location: 0
+ <229> DW_AT_accessibility: 1 (public)
+ <2><22a>: Abbrev Number: 4 (DW_TAG_subprogram)
+ <22b> DW_AT_external : 1
+ <22b> DW_AT_name : (indexed string: 0x0): testcase1
+ <22c> DW_AT_decl_file : 2
+ <22d> DW_AT_decl_line : 28
+ <22e> DW_AT_linkage_name: _ZN2C19testcase1Ev
+ <241> DW_AT_type : <0x326>
+ <245> DW_AT_accessibility: 1 (public)
+ <246> DW_AT_declaration : 1
+ <246> DW_AT_object_pointer: <0x24e>
+ <24a> DW_AT_sibling : <0x254>
+ <3><24e>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <24f> DW_AT_type : <0x32e>
+ <253> DW_AT_artificial : 1
+ <3><253>: Abbrev Number: 0
+ <2><254>: Abbrev Number: 11 (DW_TAG_subprogram)
+ <255> DW_AT_external : 1
+ <255> DW_AT_name : t1a
+ <259> DW_AT_decl_file : 2
+ <25a> DW_AT_decl_line : 29
+ <25b> DW_AT_linkage_name: _ZN2C13t1aEv
+ <268> DW_AT_type : <0x326>
+ <26c> DW_AT_accessibility: 1 (public)
+ <26d> DW_AT_declaration : 1
+ <26d> DW_AT_object_pointer: <0x275>
+ <271> DW_AT_sibling : <0x27b>
+ <3><275>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <276> DW_AT_type : <0x32e>
+ <27a> DW_AT_artificial : 1
+ <3><27a>: Abbrev Number: 0
+ <2><27b>: Abbrev Number: 11 (DW_TAG_subprogram)
+ <27c> DW_AT_external : 1
+ <27c> DW_AT_name : t1_2
+ <281> DW_AT_decl_file : 2
+ <282> DW_AT_decl_line : 30
+ <283> DW_AT_linkage_name: _ZN2C14t1_2Ev
+ <291> DW_AT_type : <0x31f>
+ <295> DW_AT_accessibility: 1 (public)
+ <296> DW_AT_declaration : 1
+ <296> DW_AT_object_pointer: <0x29e>
+ <29a> DW_AT_sibling : <0x2a4>
+ <3><29e>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <29f> DW_AT_type : <0x32e>
+ <2a3> DW_AT_artificial : 1
+ <3><2a3>: Abbrev Number: 0
+ <2><2a4>: Abbrev Number: 4 (DW_TAG_subprogram)
+ <2a5> DW_AT_external : 1
+ <2a5> DW_AT_name : (indexed string: 0x1): testcase2
+ <2a6> DW_AT_decl_file : 2
+ <2a7> DW_AT_decl_line : 31
+ <2a8> DW_AT_linkage_name: _ZN2C19testcase2Ev
+ <2bb> DW_AT_type : <0x326>
+ <2bf> DW_AT_accessibility: 1 (public)
+ <2c0> DW_AT_declaration : 1
+ <2c0> DW_AT_object_pointer: <0x2c8>
+ <2c4> DW_AT_sibling : <0x2ce>
+ <3><2c8>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <2c9> DW_AT_type : <0x32e>
+ <2cd> DW_AT_artificial : 1
+ <3><2cd>: Abbrev Number: 0
+ <2><2ce>: Abbrev Number: 4 (DW_TAG_subprogram)
+ <2cf> DW_AT_external : 1
+ <2cf> DW_AT_name : (indexed string: 0x2): testcase3
+ <2d0> DW_AT_decl_file : 2
+ <2d1> DW_AT_decl_line : 32
+ <2d2> DW_AT_linkage_name: _ZN2C19testcase3Ev
+ <2e5> DW_AT_type : <0x326>
+ <2e9> DW_AT_accessibility: 1 (public)
+ <2ea> DW_AT_declaration : 1
+ <2ea> DW_AT_object_pointer: <0x2f2>
+ <2ee> DW_AT_sibling : <0x2f8>
+ <3><2f2>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <2f3> DW_AT_type : <0x32e>
+ <2f7> DW_AT_artificial : 1
+ <3><2f7>: Abbrev Number: 0
+ <2><2f8>: Abbrev Number: 10 (DW_TAG_subprogram)
+ <2f9> DW_AT_external : 1
+ <2f9> DW_AT_name : (indexed string: 0x4): testcase4
+ <2fa> DW_AT_decl_file : 2
+ <2fb> DW_AT_decl_line : 33
+ <2fc> DW_AT_linkage_name: _ZN2C19testcase4Ev
+ <30f> DW_AT_type : <0x326>
+ <313> DW_AT_accessibility: 1 (public)
+ <314> DW_AT_declaration : 1
+ <314> DW_AT_object_pointer: <0x318>
+ <3><318>: Abbrev Number: 5 (DW_TAG_formal_parameter)
+ <319> DW_AT_type : <0x32e>
+ <31d> DW_AT_artificial : 1
+ <3><31d>: Abbrev Number: 0
+ <2><31e>: Abbrev Number: 0
+ <1><31f>: Abbrev Number: 7 (DW_TAG_base_type)
+ <320> DW_AT_byte_size : 4
+ <321> DW_AT_encoding : 5 (signed)
+ <322> DW_AT_name : int
+ <1><326>: Abbrev Number: 7 (DW_TAG_base_type)
+ <327> DW_AT_byte_size : 1
+ <328> DW_AT_encoding : 2 (boolean)
+ <329> DW_AT_name : bool
+ <1><32e>: Abbrev Number: 8 (DW_TAG_pointer_type)
+ <32f> DW_AT_byte_size : 8
+ <330> DW_AT_type : <0x215>
+ <1><334>: Abbrev Number: 0
+
Binary files /dev/null and binutils-2.35.1/binutils/testsuite/binutils-all/x86-64/pr26808.dwp.bz2 differ
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/arm/mve-vldr-vstr-bad.d 2020-11-25 14:37:41.000000000 +0000
@@ -0,0 +1,5 @@
+#name: bad MVE VLDR VSTR wrong error message for addressing mode without [].
+#as: -march=armv8.1-m.main+mve.fp -mthumb -mfloat-abi=hard
+#error_output: mve-vldr-vstr-bad.l
+
+.*: +file format .*arm.*
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/arm/mve-vldr-vstr-bad.l 2020-11-25 14:37:41.000000000 +0000
@@ -0,0 +1,811 @@
+[^:]*: Assembler messages:
+[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r0'
+[^:]*:12: Error: syntax error -- `vstrb.8 q0,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r1'
+[^:]*:12: Error: syntax error -- `vstrb.8 q0,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r2'
+[^:]*:12: Error: syntax error -- `vstrb.8 q0,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r4'
+[^:]*:12: Error: syntax error -- `vstrb.8 q0,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r7'
+[^:]*:12: Error: syntax error -- `vstrb.8 q0,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r8'
+[^:]*:12: Error: syntax error -- `vstrb.8 q0,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r10'
+[^:]*:12: Error: syntax error -- `vstrb.8 q0,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r12'
+[^:]*:12: Error: syntax error -- `vstrb.8 q0,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r14'
+[^:]*:12: Error: syntax error -- `vstrb.8 q0,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r0'
+[^:]*:12: Error: syntax error -- `vstrb.8 q1,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r1'
+[^:]*:12: Error: syntax error -- `vstrb.8 q1,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r2'
+[^:]*:12: Error: syntax error -- `vstrb.8 q1,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r4'
+[^:]*:12: Error: syntax error -- `vstrb.8 q1,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r7'
+[^:]*:12: Error: syntax error -- `vstrb.8 q1,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r8'
+[^:]*:12: Error: syntax error -- `vstrb.8 q1,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r10'
+[^:]*:12: Error: syntax error -- `vstrb.8 q1,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r12'
+[^:]*:12: Error: syntax error -- `vstrb.8 q1,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r14'
+[^:]*:12: Error: syntax error -- `vstrb.8 q1,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r0'
+[^:]*:12: Error: syntax error -- `vstrb.8 q2,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r1'
+[^:]*:12: Error: syntax error -- `vstrb.8 q2,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r2'
+[^:]*:12: Error: syntax error -- `vstrb.8 q2,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r4'
+[^:]*:12: Error: syntax error -- `vstrb.8 q2,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r7'
+[^:]*:12: Error: syntax error -- `vstrb.8 q2,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r8'
+[^:]*:12: Error: syntax error -- `vstrb.8 q2,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r10'
+[^:]*:12: Error: syntax error -- `vstrb.8 q2,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r12'
+[^:]*:12: Error: syntax error -- `vstrb.8 q2,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r14'
+[^:]*:12: Error: syntax error -- `vstrb.8 q2,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r0'
+[^:]*:12: Error: syntax error -- `vstrb.8 q4,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r1'
+[^:]*:12: Error: syntax error -- `vstrb.8 q4,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r2'
+[^:]*:12: Error: syntax error -- `vstrb.8 q4,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r4'
+[^:]*:12: Error: syntax error -- `vstrb.8 q4,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r7'
+[^:]*:12: Error: syntax error -- `vstrb.8 q4,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r8'
+[^:]*:12: Error: syntax error -- `vstrb.8 q4,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r10'
+[^:]*:12: Error: syntax error -- `vstrb.8 q4,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r12'
+[^:]*:12: Error: syntax error -- `vstrb.8 q4,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r14'
+[^:]*:12: Error: syntax error -- `vstrb.8 q4,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r0'
+[^:]*:12: Error: syntax error -- `vstrb.8 q7,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r1'
+[^:]*:12: Error: syntax error -- `vstrb.8 q7,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r2'
+[^:]*:12: Error: syntax error -- `vstrb.8 q7,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r4'
+[^:]*:12: Error: syntax error -- `vstrb.8 q7,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r7'
+[^:]*:12: Error: syntax error -- `vstrb.8 q7,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r8'
+[^:]*:12: Error: syntax error -- `vstrb.8 q7,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r10'
+[^:]*:12: Error: syntax error -- `vstrb.8 q7,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r12'
+[^:]*:12: Error: syntax error -- `vstrb.8 q7,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r14'
+[^:]*:12: Error: syntax error -- `vstrb.8 q7,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r0'
+[^:]*:12: Error: syntax error -- `vstrb.16 q0,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r1'
+[^:]*:12: Error: syntax error -- `vstrb.16 q0,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r2'
+[^:]*:12: Error: syntax error -- `vstrb.16 q0,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r4'
+[^:]*:12: Error: syntax error -- `vstrb.16 q0,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r7'
+[^:]*:12: Error: syntax error -- `vstrb.16 q0,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r8'
+[^:]*:12: Error: syntax error -- `vstrb.16 q0,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r10'
+[^:]*:12: Error: syntax error -- `vstrb.16 q0,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r12'
+[^:]*:12: Error: syntax error -- `vstrb.16 q0,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r14'
+[^:]*:12: Error: syntax error -- `vstrb.16 q0,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r0'
+[^:]*:12: Error: syntax error -- `vstrb.16 q1,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r1'
+[^:]*:12: Error: syntax error -- `vstrb.16 q1,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r2'
+[^:]*:12: Error: syntax error -- `vstrb.16 q1,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r4'
+[^:]*:12: Error: syntax error -- `vstrb.16 q1,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r7'
+[^:]*:12: Error: syntax error -- `vstrb.16 q1,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r8'
+[^:]*:12: Error: syntax error -- `vstrb.16 q1,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r10'
+[^:]*:12: Error: syntax error -- `vstrb.16 q1,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r12'
+[^:]*:12: Error: syntax error -- `vstrb.16 q1,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r14'
+[^:]*:12: Error: syntax error -- `vstrb.16 q1,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r0'
+[^:]*:12: Error: syntax error -- `vstrb.16 q2,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r1'
+[^:]*:12: Error: syntax error -- `vstrb.16 q2,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r2'
+[^:]*:12: Error: syntax error -- `vstrb.16 q2,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r4'
+[^:]*:12: Error: syntax error -- `vstrb.16 q2,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r7'
+[^:]*:12: Error: syntax error -- `vstrb.16 q2,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r8'
+[^:]*:12: Error: syntax error -- `vstrb.16 q2,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r10'
+[^:]*:12: Error: syntax error -- `vstrb.16 q2,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r12'
+[^:]*:12: Error: syntax error -- `vstrb.16 q2,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r14'
+[^:]*:12: Error: syntax error -- `vstrb.16 q2,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r0'
+[^:]*:12: Error: syntax error -- `vstrb.16 q4,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r1'
+[^:]*:12: Error: syntax error -- `vstrb.16 q4,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r2'
+[^:]*:12: Error: syntax error -- `vstrb.16 q4,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r4'
+[^:]*:12: Error: syntax error -- `vstrb.16 q4,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r7'
+[^:]*:12: Error: syntax error -- `vstrb.16 q4,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r8'
+[^:]*:12: Error: syntax error -- `vstrb.16 q4,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r10'
+[^:]*:12: Error: syntax error -- `vstrb.16 q4,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r12'
+[^:]*:12: Error: syntax error -- `vstrb.16 q4,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r14'
+[^:]*:12: Error: syntax error -- `vstrb.16 q4,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r0'
+[^:]*:12: Error: syntax error -- `vstrb.16 q7,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r1'
+[^:]*:12: Error: syntax error -- `vstrb.16 q7,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r2'
+[^:]*:12: Error: syntax error -- `vstrb.16 q7,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r4'
+[^:]*:12: Error: syntax error -- `vstrb.16 q7,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r7'
+[^:]*:12: Error: syntax error -- `vstrb.16 q7,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r8'
+[^:]*:12: Error: syntax error -- `vstrb.16 q7,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r10'
+[^:]*:12: Error: syntax error -- `vstrb.16 q7,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r12'
+[^:]*:12: Error: syntax error -- `vstrb.16 q7,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r14'
+[^:]*:12: Error: syntax error -- `vstrb.16 q7,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r0'
+[^:]*:12: Error: syntax error -- `vstrb.32 q0,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r1'
+[^:]*:12: Error: syntax error -- `vstrb.32 q0,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r2'
+[^:]*:12: Error: syntax error -- `vstrb.32 q0,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r4'
+[^:]*:12: Error: syntax error -- `vstrb.32 q0,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r7'
+[^:]*:12: Error: syntax error -- `vstrb.32 q0,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r8'
+[^:]*:12: Error: syntax error -- `vstrb.32 q0,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r10'
+[^:]*:12: Error: syntax error -- `vstrb.32 q0,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r12'
+[^:]*:12: Error: syntax error -- `vstrb.32 q0,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r14'
+[^:]*:12: Error: syntax error -- `vstrb.32 q0,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r0'
+[^:]*:12: Error: syntax error -- `vstrb.32 q1,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r1'
+[^:]*:12: Error: syntax error -- `vstrb.32 q1,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r2'
+[^:]*:12: Error: syntax error -- `vstrb.32 q1,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r4'
+[^:]*:12: Error: syntax error -- `vstrb.32 q1,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r7'
+[^:]*:12: Error: syntax error -- `vstrb.32 q1,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r8'
+[^:]*:12: Error: syntax error -- `vstrb.32 q1,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r10'
+[^:]*:12: Error: syntax error -- `vstrb.32 q1,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r12'
+[^:]*:12: Error: syntax error -- `vstrb.32 q1,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r14'
+[^:]*:12: Error: syntax error -- `vstrb.32 q1,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r0'
+[^:]*:12: Error: syntax error -- `vstrb.32 q2,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r1'
+[^:]*:12: Error: syntax error -- `vstrb.32 q2,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r2'
+[^:]*:12: Error: syntax error -- `vstrb.32 q2,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r4'
+[^:]*:12: Error: syntax error -- `vstrb.32 q2,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r7'
+[^:]*:12: Error: syntax error -- `vstrb.32 q2,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r8'
+[^:]*:12: Error: syntax error -- `vstrb.32 q2,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r10'
+[^:]*:12: Error: syntax error -- `vstrb.32 q2,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r12'
+[^:]*:12: Error: syntax error -- `vstrb.32 q2,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r14'
+[^:]*:12: Error: syntax error -- `vstrb.32 q2,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r0'
+[^:]*:12: Error: syntax error -- `vstrb.32 q4,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r1'
+[^:]*:12: Error: syntax error -- `vstrb.32 q4,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r2'
+[^:]*:12: Error: syntax error -- `vstrb.32 q4,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r4'
+[^:]*:12: Error: syntax error -- `vstrb.32 q4,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r7'
+[^:]*:12: Error: syntax error -- `vstrb.32 q4,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r8'
+[^:]*:12: Error: syntax error -- `vstrb.32 q4,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r10'
+[^:]*:12: Error: syntax error -- `vstrb.32 q4,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r12'
+[^:]*:12: Error: syntax error -- `vstrb.32 q4,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r14'
+[^:]*:12: Error: syntax error -- `vstrb.32 q4,r14'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r0'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r0'
+[^:]*:12: Error: syntax error -- `vstrb.32 q7,r0'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r1'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r1'
+[^:]*:12: Error: syntax error -- `vstrb.32 q7,r1'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r2'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r2'
+[^:]*:12: Error: syntax error -- `vstrb.32 q7,r2'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r4'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r4'
+[^:]*:12: Error: syntax error -- `vstrb.32 q7,r4'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r7'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r7'
+[^:]*:12: Error: syntax error -- `vstrb.32 q7,r7'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r8'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r8'
+[^:]*:12: Error: syntax error -- `vstrb.32 q7,r8'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r10'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r10'
+[^:]*:12: Error: syntax error -- `vstrb.32 q7,r10'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r12'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r12'
+[^:]*:12: Error: syntax error -- `vstrb.32 q7,r12'
+[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r14'
+[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r14'
+[^:]*:12: Error: syntax error -- `vstrb.32 q7,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r0'
+[^:]*:22: Error: syntax error -- `vstrh.16 q0,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r1'
+[^:]*:22: Error: syntax error -- `vstrh.16 q0,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r2'
+[^:]*:22: Error: syntax error -- `vstrh.16 q0,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r4'
+[^:]*:22: Error: syntax error -- `vstrh.16 q0,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r7'
+[^:]*:22: Error: syntax error -- `vstrh.16 q0,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r8'
+[^:]*:22: Error: syntax error -- `vstrh.16 q0,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r10'
+[^:]*:22: Error: syntax error -- `vstrh.16 q0,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r12'
+[^:]*:22: Error: syntax error -- `vstrh.16 q0,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r14'
+[^:]*:22: Error: syntax error -- `vstrh.16 q0,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r0'
+[^:]*:22: Error: syntax error -- `vstrh.16 q1,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r1'
+[^:]*:22: Error: syntax error -- `vstrh.16 q1,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r2'
+[^:]*:22: Error: syntax error -- `vstrh.16 q1,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r4'
+[^:]*:22: Error: syntax error -- `vstrh.16 q1,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r7'
+[^:]*:22: Error: syntax error -- `vstrh.16 q1,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r8'
+[^:]*:22: Error: syntax error -- `vstrh.16 q1,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r10'
+[^:]*:22: Error: syntax error -- `vstrh.16 q1,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r12'
+[^:]*:22: Error: syntax error -- `vstrh.16 q1,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r14'
+[^:]*:22: Error: syntax error -- `vstrh.16 q1,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r0'
+[^:]*:22: Error: syntax error -- `vstrh.16 q2,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r1'
+[^:]*:22: Error: syntax error -- `vstrh.16 q2,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r2'
+[^:]*:22: Error: syntax error -- `vstrh.16 q2,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r4'
+[^:]*:22: Error: syntax error -- `vstrh.16 q2,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r7'
+[^:]*:22: Error: syntax error -- `vstrh.16 q2,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r8'
+[^:]*:22: Error: syntax error -- `vstrh.16 q2,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r10'
+[^:]*:22: Error: syntax error -- `vstrh.16 q2,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r12'
+[^:]*:22: Error: syntax error -- `vstrh.16 q2,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r14'
+[^:]*:22: Error: syntax error -- `vstrh.16 q2,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r0'
+[^:]*:22: Error: syntax error -- `vstrh.16 q4,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r1'
+[^:]*:22: Error: syntax error -- `vstrh.16 q4,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r2'
+[^:]*:22: Error: syntax error -- `vstrh.16 q4,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r4'
+[^:]*:22: Error: syntax error -- `vstrh.16 q4,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r7'
+[^:]*:22: Error: syntax error -- `vstrh.16 q4,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r8'
+[^:]*:22: Error: syntax error -- `vstrh.16 q4,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r10'
+[^:]*:22: Error: syntax error -- `vstrh.16 q4,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r12'
+[^:]*:22: Error: syntax error -- `vstrh.16 q4,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r14'
+[^:]*:22: Error: syntax error -- `vstrh.16 q4,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r0'
+[^:]*:22: Error: syntax error -- `vstrh.16 q7,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r1'
+[^:]*:22: Error: syntax error -- `vstrh.16 q7,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r2'
+[^:]*:22: Error: syntax error -- `vstrh.16 q7,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r4'
+[^:]*:22: Error: syntax error -- `vstrh.16 q7,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r7'
+[^:]*:22: Error: syntax error -- `vstrh.16 q7,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r8'
+[^:]*:22: Error: syntax error -- `vstrh.16 q7,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r10'
+[^:]*:22: Error: syntax error -- `vstrh.16 q7,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r12'
+[^:]*:22: Error: syntax error -- `vstrh.16 q7,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r14'
+[^:]*:22: Error: syntax error -- `vstrh.16 q7,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r0'
+[^:]*:22: Error: syntax error -- `vstrh.32 q0,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r1'
+[^:]*:22: Error: syntax error -- `vstrh.32 q0,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r2'
+[^:]*:22: Error: syntax error -- `vstrh.32 q0,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r4'
+[^:]*:22: Error: syntax error -- `vstrh.32 q0,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r7'
+[^:]*:22: Error: syntax error -- `vstrh.32 q0,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r8'
+[^:]*:22: Error: syntax error -- `vstrh.32 q0,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r10'
+[^:]*:22: Error: syntax error -- `vstrh.32 q0,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r12'
+[^:]*:22: Error: syntax error -- `vstrh.32 q0,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r14'
+[^:]*:22: Error: syntax error -- `vstrh.32 q0,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r0'
+[^:]*:22: Error: syntax error -- `vstrh.32 q1,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r1'
+[^:]*:22: Error: syntax error -- `vstrh.32 q1,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r2'
+[^:]*:22: Error: syntax error -- `vstrh.32 q1,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r4'
+[^:]*:22: Error: syntax error -- `vstrh.32 q1,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r7'
+[^:]*:22: Error: syntax error -- `vstrh.32 q1,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r8'
+[^:]*:22: Error: syntax error -- `vstrh.32 q1,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r10'
+[^:]*:22: Error: syntax error -- `vstrh.32 q1,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r12'
+[^:]*:22: Error: syntax error -- `vstrh.32 q1,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r14'
+[^:]*:22: Error: syntax error -- `vstrh.32 q1,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r0'
+[^:]*:22: Error: syntax error -- `vstrh.32 q2,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r1'
+[^:]*:22: Error: syntax error -- `vstrh.32 q2,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r2'
+[^:]*:22: Error: syntax error -- `vstrh.32 q2,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r4'
+[^:]*:22: Error: syntax error -- `vstrh.32 q2,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r7'
+[^:]*:22: Error: syntax error -- `vstrh.32 q2,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r8'
+[^:]*:22: Error: syntax error -- `vstrh.32 q2,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r10'
+[^:]*:22: Error: syntax error -- `vstrh.32 q2,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r12'
+[^:]*:22: Error: syntax error -- `vstrh.32 q2,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r14'
+[^:]*:22: Error: syntax error -- `vstrh.32 q2,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r0'
+[^:]*:22: Error: syntax error -- `vstrh.32 q4,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r1'
+[^:]*:22: Error: syntax error -- `vstrh.32 q4,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r2'
+[^:]*:22: Error: syntax error -- `vstrh.32 q4,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r4'
+[^:]*:22: Error: syntax error -- `vstrh.32 q4,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r7'
+[^:]*:22: Error: syntax error -- `vstrh.32 q4,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r8'
+[^:]*:22: Error: syntax error -- `vstrh.32 q4,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r10'
+[^:]*:22: Error: syntax error -- `vstrh.32 q4,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r12'
+[^:]*:22: Error: syntax error -- `vstrh.32 q4,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r14'
+[^:]*:22: Error: syntax error -- `vstrh.32 q4,r14'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r0'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r0'
+[^:]*:22: Error: syntax error -- `vstrh.32 q7,r0'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r1'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r1'
+[^:]*:22: Error: syntax error -- `vstrh.32 q7,r1'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r2'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r2'
+[^:]*:22: Error: syntax error -- `vstrh.32 q7,r2'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r4'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r4'
+[^:]*:22: Error: syntax error -- `vstrh.32 q7,r4'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r7'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r7'
+[^:]*:22: Error: syntax error -- `vstrh.32 q7,r7'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r8'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r8'
+[^:]*:22: Error: syntax error -- `vstrh.32 q7,r8'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r10'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r10'
+[^:]*:22: Error: syntax error -- `vstrh.32 q7,r10'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r12'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r12'
+[^:]*:22: Error: syntax error -- `vstrh.32 q7,r12'
+[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r14'
+[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r14'
+[^:]*:22: Error: syntax error -- `vstrh.32 q7,r14'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r0'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r0'
+[^:]*:30: Error: syntax error -- `vstrw.32 q0,r0'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r1'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r1'
+[^:]*:30: Error: syntax error -- `vstrw.32 q0,r1'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r2'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r2'
+[^:]*:30: Error: syntax error -- `vstrw.32 q0,r2'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r4'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r4'
+[^:]*:30: Error: syntax error -- `vstrw.32 q0,r4'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r7'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r7'
+[^:]*:30: Error: syntax error -- `vstrw.32 q0,r7'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r8'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r8'
+[^:]*:30: Error: syntax error -- `vstrw.32 q0,r8'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r10'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r10'
+[^:]*:30: Error: syntax error -- `vstrw.32 q0,r10'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r12'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r12'
+[^:]*:30: Error: syntax error -- `vstrw.32 q0,r12'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r14'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r14'
+[^:]*:30: Error: syntax error -- `vstrw.32 q0,r14'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r0'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r0'
+[^:]*:30: Error: syntax error -- `vstrw.32 q1,r0'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r1'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r1'
+[^:]*:30: Error: syntax error -- `vstrw.32 q1,r1'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r2'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r2'
+[^:]*:30: Error: syntax error -- `vstrw.32 q1,r2'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r4'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r4'
+[^:]*:30: Error: syntax error -- `vstrw.32 q1,r4'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r7'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r7'
+[^:]*:30: Error: syntax error -- `vstrw.32 q1,r7'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r8'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r8'
+[^:]*:30: Error: syntax error -- `vstrw.32 q1,r8'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r10'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r10'
+[^:]*:30: Error: syntax error -- `vstrw.32 q1,r10'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r12'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r12'
+[^:]*:30: Error: syntax error -- `vstrw.32 q1,r12'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r14'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r14'
+[^:]*:30: Error: syntax error -- `vstrw.32 q1,r14'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r0'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r0'
+[^:]*:30: Error: syntax error -- `vstrw.32 q2,r0'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r1'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r1'
+[^:]*:30: Error: syntax error -- `vstrw.32 q2,r1'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r2'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r2'
+[^:]*:30: Error: syntax error -- `vstrw.32 q2,r2'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r4'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r4'
+[^:]*:30: Error: syntax error -- `vstrw.32 q2,r4'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r7'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r7'
+[^:]*:30: Error: syntax error -- `vstrw.32 q2,r7'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r8'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r8'
+[^:]*:30: Error: syntax error -- `vstrw.32 q2,r8'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r10'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r10'
+[^:]*:30: Error: syntax error -- `vstrw.32 q2,r10'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r12'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r12'
+[^:]*:30: Error: syntax error -- `vstrw.32 q2,r12'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r14'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r14'
+[^:]*:30: Error: syntax error -- `vstrw.32 q2,r14'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r0'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r0'
+[^:]*:30: Error: syntax error -- `vstrw.32 q4,r0'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r1'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r1'
+[^:]*:30: Error: syntax error -- `vstrw.32 q4,r1'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r2'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r2'
+[^:]*:30: Error: syntax error -- `vstrw.32 q4,r2'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r4'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r4'
+[^:]*:30: Error: syntax error -- `vstrw.32 q4,r4'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r7'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r7'
+[^:]*:30: Error: syntax error -- `vstrw.32 q4,r7'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r8'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r8'
+[^:]*:30: Error: syntax error -- `vstrw.32 q4,r8'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r10'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r10'
+[^:]*:30: Error: syntax error -- `vstrw.32 q4,r10'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r12'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r12'
+[^:]*:30: Error: syntax error -- `vstrw.32 q4,r12'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r14'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r14'
+[^:]*:30: Error: syntax error -- `vstrw.32 q4,r14'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r0'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r0'
+[^:]*:30: Error: syntax error -- `vstrw.32 q7,r0'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r1'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r1'
+[^:]*:30: Error: syntax error -- `vstrw.32 q7,r1'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r2'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r2'
+[^:]*:30: Error: syntax error -- `vstrw.32 q7,r2'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r4'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r4'
+[^:]*:30: Error: syntax error -- `vstrw.32 q7,r4'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r7'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r7'
+[^:]*:30: Error: syntax error -- `vstrw.32 q7,r7'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r8'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r8'
+[^:]*:30: Error: syntax error -- `vstrw.32 q7,r8'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r10'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r10'
+[^:]*:30: Error: syntax error -- `vstrw.32 q7,r10'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r12'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r12'
+[^:]*:30: Error: syntax error -- `vstrw.32 q7,r12'
+[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r14'
+[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r14'
+[^:]*:30: Error: syntax error -- `vstrw.32 q7,r14'
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/arm/mve-vldr-vstr-bad.s 2020-11-25 14:37:41.000000000 +0000
@@ -0,0 +1,30 @@
+.syntax unified
+.thumb
+
+.irp op1, 8, 16, 32
+.irp op2, q0, q1, q2, q4, q7
+.irp op3, r0, r1, r2, r4, r7, r8, r10, r12, r14
+vldrb.s\op1 \op2, \op3
+vldrb.u\op1 \op2, \op3
+vstrb.\op1 \op2, \op3
+.endr
+.endr
+.endr
+
+.irp op1, 16, 32
+.irp op2, q0, q1, q2, q4, q7
+.irp op3, r0, r1, r2, r4, r7, r8, r10, r12, r14
+vldrh.s\op1 \op2, \op3
+vldrh.u\op1 \op2, \op3
+vstrh.\op1 \op2, \op3
+.endr
+.endr
+.endr
+
+.irp op2, q0, q1, q2, q4, q7
+.irp op3, r0, r1, r2, r4, r7, r8, r10, r12, r14
+vldrw.s32 \op2, \op3
+vldrw.u32 \op2, \op3
+vstrw.32 \op2, \op3
+.endr
+.endr
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/arm/pr26858.d 2020-11-25 14:37:41.000000000 +0000
@@ -0,0 +1,8 @@
+# name: PR26858
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+[^>]*> ee266a87 vmul.f32 s12, s13, s14
+[^>]*> ee000a81 vmla.f32 s0, s1, s2
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/arm/pr26858.s 2020-11-25 14:37:41.000000000 +0000
@@ -0,0 +1,6 @@
+.syntax unified
+.arch armv8-r
+.arm
+.fpu fpv5-sp-d16
+vmul.f32 s12, s13, s14
+vmla.f32 s0, s1, s2
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/dwarf4-line-1.d 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,50 @@
+#as: -gdwarf-4
+#readelf: -wl
+#name: DWARF4 .debug_line 1
+
+Raw dump of debug contents of section \.z?debug_line:
+
+ Offset: 0x0
+ Length: .*
+ DWARF Version: 4
+ Prologue Length: .*
+ Minimum Instruction Length: 1
+ Maximum Ops per Instruction: 1
+ Initial value of 'is_stmt': 1
+ Line Base: -5
+ Line Range: 14
+ Opcode Base: 13
+
+ Opcodes:
+ Opcode 1 has 0 args
+ Opcode 2 has 1 arg
+ Opcode 3 has 1 arg
+ Opcode 4 has 1 arg
+ Opcode 5 has 1 arg
+ Opcode 6 has 0 args
+ Opcode 7 has 0 args
+ Opcode 8 has 0 args
+ Opcode 9 has 1 arg
+ Opcode 10 has 0 args
+ Opcode 11 has 0 args
+ Opcode 12 has 1 arg
+
+ The Directory Table \(offset 0x.*\):
+ 1 .*/gas/testsuite/gas/i386
+
+ The File Name Table \(offset 0x.*\):
+ Entry Dir Time Size Name
+ 1 0 0 0 foo.c
+ 2 0 0 0 foo.h
+
+ Line Number Statements:
+ \[0x.*\] Extended opcode 2: set Address to 0x0
+ \[0x.*\] Advance Line by 81 to 82
+ \[0x.*\] Copy
+ \[0x.*\] Set File Name to entry 2 in the File Name Table
+ \[0x.*\] Advance Line by -73 to 9
+ \[0x.*\] Special opcode 19: advance Address by 1 to 0x1 and Line by 0 to 9
+ \[0x.*\] Advance PC by 3 to 0x4
+ \[0x.*\] Extended opcode 1: End of Sequence
+
+
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/dwarf4-line-1.s 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,14 @@
+ .file "foo.c"
+ .text
+bar:
+#APP
+# 82 "foo.h" 1
+ nop
+# 0 "" 2
+#NO_APP
+ ret
+foo:
+ .file 1 "foo.c"
+ nop
+ .file 2 "foo.h"
+ ret
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/dwarf5-line-1.d 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,50 @@
+#as: -gdwarf-5
+#readelf: -wl
+#name: DWARF5 .debug_line 1
+
+Raw dump of debug contents of section \.z?debug_line:
+
+ Offset: 0x0
+ Length: .*
+ DWARF Version: 5
+ Address size \(bytes\): .*
+ Segment selector \(bytes\): 0
+ Prologue Length: .*
+ Minimum Instruction Length: 1
+ Maximum Ops per Instruction: 1
+ Initial value of 'is_stmt': 1
+ Line Base: -5
+ Line Range: 14
+ Opcode Base: 13
+
+ Opcodes:
+ Opcode 1 has 0 args
+ Opcode 2 has 1 arg
+ Opcode 3 has 1 arg
+ Opcode 4 has 1 arg
+ Opcode 5 has 1 arg
+ Opcode 6 has 0 args
+ Opcode 7 has 0 args
+ Opcode 8 has 0 args
+ Opcode 9 has 1 arg
+ Opcode 10 has 0 args
+ Opcode 11 has 0 args
+ Opcode 12 has 1 arg
+
+ The Directory Table \(offset 0x.*, lines 2, columns 1\):
+ Entry Name
+ 0 \(indirect line string, offset: 0x.*\): .*/gas/testsuite/gas/i386
+ 1 \(indirect line string, offset: 0x.*\): .*/gas/testsuite/gas/i386
+
+ The File Name Table \(offset 0x.*, lines 2, columns 3\):
+ Entry Dir MD5 Name
+ 0 0 0xbbd69fc03ce253b2dbaab2522dd519ae \(indirect line string, offset: 0x.*\): core.c
+ 1 0 0x00000000000000000000000000000000 \(indirect line string, offset: 0x.*\): types.h
+
+ Line Number Statements:
+ \[0x.*\] Extended opcode 2: set Address to 0x0
+ \[0x.*\] Special opcode 8: advance Address by 0 to 0x0 and Line by 3 to 4
+ \[0x.*\] Advance PC by 1 to 0x1
+ \[0x.*\] Extended opcode 1: End of Sequence
+
+
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/dwarf5-line-1.s 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,6 @@
+ .text
+ .global kretprobe_trampoline
+kretprobe_trampoline:
+ ret
+ .file 0 "core.c" md5 0xbbd69fc03ce253b2dbaab2522dd519ae
+ .file 1 "types.h"
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/dwarf5-line-2.d 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,49 @@
+#as: -gdwarf-5
+#readelf: -wl
+#name: DWARF5 .debug_line 2
+
+Raw dump of debug contents of section \.z?debug_line:
+
+ Offset: 0x0
+ Length: .*
+ DWARF Version: 5
+ Address size \(bytes\): .*
+ Segment selector \(bytes\): 0
+ Prologue Length: .*
+ Minimum Instruction Length: 1
+ Maximum Ops per Instruction: 1
+ Initial value of 'is_stmt': 1
+ Line Base: -5
+ Line Range: 14
+ Opcode Base: 13
+
+ Opcodes:
+ Opcode 1 has 0 args
+ Opcode 2 has 1 arg
+ Opcode 3 has 1 arg
+ Opcode 4 has 1 arg
+ Opcode 5 has 1 arg
+ Opcode 6 has 0 args
+ Opcode 7 has 0 args
+ Opcode 8 has 0 args
+ Opcode 9 has 1 arg
+ Opcode 10 has 0 args
+ Opcode 11 has 0 args
+ Opcode 12 has 1 arg
+
+ The Directory Table \(offset 0x.*, lines 2, columns 1\):
+ Entry Name
+ 0 \(indirect line string, offset: 0x.*\): .*/gas/testsuite/gas/i386
+ 1 \(indirect line string, offset: 0x.*\): .*/gas/testsuite/gas/i386
+
+ The File Name Table \(offset 0x.*, lines 1, columns 3\):
+ Entry Dir MD5 Name
+ 0 0 0xbbd69fc03ce253b2dbaab2522dd519ae \(indirect line string, offset: 0x.*\): core.c
+
+ Line Number Statements:
+ \[0x.*\] Extended opcode 2: set Address to 0x0
+ \[0x.*\] Special opcode 8: advance Address by 0 to 0x0 and Line by 3 to 4
+ \[0x.*\] Advance PC by 1 to 0x1
+ \[0x.*\] Extended opcode 1: End of Sequence
+
+
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/dwarf5-line-2.s 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,5 @@
+ .text
+ .global kretprobe_trampoline
+kretprobe_trampoline:
+ ret
+ .file 0 "core.c" md5 0xbbd69fc03ce253b2dbaab2522dd519ae
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/dwarf5-line-3.d 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,49 @@
+#as: -g -gdwarf-5
+#readelf: -wl
+#name: DWARF5 .debug_line 2
+
+Raw dump of debug contents of section \.z?debug_line:
+
+ Offset: 0x0
+ Length: .*
+ DWARF Version: 5
+ Address size \(bytes\): .*
+ Segment selector \(bytes\): 0
+ Prologue Length: .*
+ Minimum Instruction Length: 1
+ Maximum Ops per Instruction: 1
+ Initial value of 'is_stmt': 1
+ Line Base: -5
+ Line Range: 14
+ Opcode Base: 13
+
+ Opcodes:
+ Opcode 1 has 0 args
+ Opcode 2 has 1 arg
+ Opcode 3 has 1 arg
+ Opcode 4 has 1 arg
+ Opcode 5 has 1 arg
+ Opcode 6 has 0 args
+ Opcode 7 has 0 args
+ Opcode 8 has 0 args
+ Opcode 9 has 1 arg
+ Opcode 10 has 0 args
+ Opcode 11 has 0 args
+ Opcode 12 has 1 arg
+
+ The Directory Table \(offset 0x.*, lines 1, columns 1\):
+ Entry Name
+ 0 \(indirect line string, offset: 0x.*\): .*
+
+ The File Name Table \(offset 0x.*, lines 2, columns 2\):
+ Entry Dir Name
+ 0 0 \(indirect line string, offset: 0x.*\): dwarf5-line-2.S
+ 1 0 \(indirect line string, offset: 0x.*\): dwarf5-line-2.S
+
+ Line Number Statements:
+ \[0x.*\] Extended opcode 2: set Address to 0x0
+ \[0x.*\] Special opcode 7: advance Address by 0 to 0x0 and Line by 2 to 3
+ \[0x.*\] Advance PC by 1 to 0x1
+ \[0x.*\] Extended opcode 1: End of Sequence
+
+
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/dwarf5-line-3.s 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,10 @@
+# 1 "foo.S"
+# 1 "<built-in>"
+# 1 "<command-line>"
+# 31 "<command-line>"
+# 1 "/usr/include/stdc-predef.h" 1 3 4
+# 32 "<command-line>" 2
+# 1 "dwarf5-line-2.S"
+ .text
+lbasename:
+ .nop
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/enqcmd-16bit.d 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,21 @@
+#as: -I${srcdir}/$subdir
+#objdump: -dw -Mi8086
+#name: i386 16-bit ENQCMD[S] insns
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+#pass
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/enqcmd-16bit.s 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,4 @@
+# Check ENQCMD[S] 16-bit instructions
+
+ .code16
+.include "movdir.s"
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/ppc/be.d 2020-11-25 14:37:47.000000000 +0000
@@ -0,0 +1,17 @@
+#objdump: -d -Mcom
+#as: -mcom -be
+#name: BE only instructions
+
+.*
+
+Disassembly of section \.text:
+
+0+00 <start>:
+.*: ba 8a 00 10 lmw r20,16\(r10\)
+.*: 7d 4b 0c aa lswi r10,r11,1
+.*: 7d 8b 04 aa lswi r12,r11,32
+.*: 7d 4b 64 2a lswx r10,r11,r12
+.*: be 8a 00 10 stmw r20,16\(r10\)
+.*: 7d 4b 0d aa stswi r10,r11,1
+.*: 7d 4b 05 aa stswi r10,r11,32
+.*: 7d 4b 65 2a stswx r10,r11,r12
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/ppc/be.s 2020-11-25 14:37:47.000000000 +0000
@@ -0,0 +1,10 @@
+ .text
+start:
+ lmw 20,16(10)
+ lswi 10,11,1
+ lswi 12,11,32
+ lswx 10,11,12
+ stmw 20,16(10)
+ stswi 10,11,1
+ stswi 10,11,32
+ stswx 10,11,12
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/ppc/le_error.d 2020-11-25 14:37:47.000000000 +0000
@@ -0,0 +1,3 @@
+#as: -mcom -le
+#source: be.s
+#error_output: le_error.l
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/ppc/le_error.l 2020-11-25 14:37:47.000000000 +0000
@@ -0,0 +1,9 @@
+.*Assembler messages:
+.*invalid when little-endian
+.*invalid when little-endian
+.*invalid when little-endian
+.*invalid when little-endian
+.*invalid when little-endian
+.*invalid when little-endian
+.*invalid when little-endian
+.*invalid when little-endian
--- /dev/null 2020-11-25 08:59:50.417841307 +0000
+++ binutils-2.35.1/gas/testsuite/gas/i386/movdir-16bit.s 2020-11-25 14:37:42.000000000 +0000
@@ -0,0 +1,4 @@
+# Check MOVDIR[I,64B] 16-bit instructions
+
+ .code16
+.include "movdir.s"