106 lines
4.2 KiB
Diff
106 lines
4.2 KiB
Diff
Patch carried over from the prior iasl package and updated. This allows
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for builds on systems requiring aligned memory access. Please see
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http://lists.acpica.org/pipermail/devel/2010-July/000159.html. Resolves
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BZ#865013 and BZ#856856.
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--
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Add more platforms to the list of the ones requiring aligned memory access.
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Also fix callsites where wrong assumptions where made in terms of aligment.
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Signed-off-by: Mattia Dongili <malattia@linux.it>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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---
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source/components/executer/exoparg2.c | 12 +++++++++---
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source/include/actypes.h | 26 +++++++++++++-------------
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3 files changed, 32 insertions(+), 21 deletions(-)
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Index: acpica-unix-20180508/source/components/executer/exoparg2.c
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===================================================================
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--- acpica-unix-20180508.orig/source/components/executer/exoparg2.c
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+++ acpica-unix-20180508/source/components/executer/exoparg2.c
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@@ -172,6 +172,8 @@ AcpiExOpcode_2A_2T_1R (
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ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0];
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ACPI_OPERAND_OBJECT *ReturnDesc1 = NULL;
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ACPI_OPERAND_OBJECT *ReturnDesc2 = NULL;
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+ UINT64 ReturnValue1 = 0;
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+ UINT64 ReturnValue2 = 0;
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ACPI_STATUS Status;
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@@ -206,8 +208,10 @@ AcpiExOpcode_2A_2T_1R (
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Status = AcpiUtDivide (
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Operand[0]->Integer.Value,
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Operand[1]->Integer.Value,
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- &ReturnDesc1->Integer.Value,
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- &ReturnDesc2->Integer.Value);
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+ &ReturnValue1, &ReturnValue2);
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+ ReturnDesc1->Integer.Value = ReturnValue1;
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+ ReturnDesc2->Integer.Value = ReturnValue2;
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+
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if (ACPI_FAILURE (Status))
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{
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goto Cleanup;
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@@ -282,6 +286,7 @@ AcpiExOpcode_2A_1T_1R (
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ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0];
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ACPI_OPERAND_OBJECT *ReturnDesc = NULL;
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UINT64 Index;
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+ UINT64 ReturnValue = 0;
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ACPI_STATUS Status = AE_OK;
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ACPI_SIZE Length = 0;
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@@ -327,7 +332,8 @@ AcpiExOpcode_2A_1T_1R (
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Operand[0]->Integer.Value,
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Operand[1]->Integer.Value,
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NULL,
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- &ReturnDesc->Integer.Value);
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+ &ReturnValue);
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+ ReturnDesc->Integer.Value = ReturnValue;
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break;
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case AML_CONCATENATE_OP: /* Concatenate (Data1, Data2, Result) */
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Index: acpica-unix-20180508/source/include/actypes.h
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===================================================================
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--- acpica-unix-20180508.orig/source/include/actypes.h
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+++ acpica-unix-20180508/source/include/actypes.h
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@@ -143,6 +143,19 @@ typedef COMPILER_DEPENDENT_INT64
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*/
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#define ACPI_THREAD_ID UINT64
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+/*
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+ * In the case of the Itanium Processor Family (IPF), the hardware does not
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+ * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED flag
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+ * to indicate that special precautions must be taken to avoid alignment faults.
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+ * (IA64 or ia64 is currently used by existing compilers to indicate IPF.)
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+ *
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+ * Note: EM64T and other X86-64 processors support misaligned transfers,
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+ * so there is no need to define this flag.
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+ */
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+#if defined (__IA64__) || defined (__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__hppa__) || defined(__arm__)
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+#define ACPI_MISALIGNMENT_NOT_SUPPORTED
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+#endif
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+
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/*******************************************************************************
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*
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@@ -170,20 +183,6 @@ typedef UINT64
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#define ACPI_USE_NATIVE_DIVIDE /* Has native 64-bit integer support */
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#define ACPI_USE_NATIVE_MATH64 /* Has native 64-bit integer support */
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-/*
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- * In the case of the Itanium Processor Family (IPF), the hardware does not
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- * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED
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- * flag to indicate that special precautions must be taken to avoid alignment
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- * faults. (IA64 or ia64 is currently used by existing compilers to indicate
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- * IPF.)
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- *
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- * Note: EM64T and other X86-64 processors support misaligned transfers,
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- * so there is no need to define this flag.
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- */
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-#if defined (__IA64__) || defined (__ia64__)
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-#define ACPI_MISALIGNMENT_NOT_SUPPORTED
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-#endif
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-
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/*******************************************************************************
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*
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